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stm32f30x_iwdg.c

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00001 /**
00002   ******************************************************************************
00003   * @file    stm32f30x_iwdg.c
00004   * @author  MCD Application Team
00005   * @version V1.2.3
00006   * @date    10-July-2015
00007   * @brief   This file provides firmware functions to manage the following 
00008   *          functionalities of the Independent watchdog (IWDG) peripheral:           
00009   *           + Prescaler and Counter configuration
00010   *           + IWDG activation
00011   *           + Flag management
00012   *
00013   @verbatim  
00014   
00015  ===============================================================================
00016                           ##### IWDG features #####
00017  ===============================================================================
00018     [..] The IWDG can be started by either software or hardware (configurable
00019          through option byte).
00020     [..] The IWDG is clocked by its own dedicated low-speed clock (LSI) and
00021          thus stays active even if the main clock fails.
00022          Once the IWDG is started, the LSI is forced ON and cannot be disabled
00023          (LSI cannot be disabled too), and the counter starts counting down from 
00024          the reset value of 0xFFF. When it reaches the end of count value (0x000)
00025          a system reset is generated.
00026          The IWDG counter should be reloaded at regular intervals to prevent
00027          an MCU reset.
00028     [..] The IWDG is implemented in the VDD voltage domain that is still functional
00029          in STOP and STANDBY mode (IWDG reset can wake-up from STANDBY).          
00030     [..] IWDGRST flag in RCC_CSR register can be used to inform when a IWDG
00031          reset occurs.
00032     [..] Min-max timeout value @41KHz (LSI): ~0.1ms / ~25.5s
00033          The IWDG timeout may vary due to LSI frequency dispersion. STM32F30x
00034          devices provide the capability to measure the LSI frequency (LSI clock
00035          connected internally to TIM16 CH1 input capture). The measured value
00036          can be used to have an IWDG timeout with an acceptable accuracy. 
00037          For more information, please refer to the STM32F30x Reference manual.
00038 
00039                       ##### How to use this driver #####
00040  ===============================================================================
00041     [..] This driver allows to use IWDG peripheral with either window option enabled
00042          or disabled. To do so follow one of the two procedures below.
00043     (#) Window option is enabled:    
00044         (++) Start the IWDG using IWDG_Enable() function, when the IWDG is used
00045              in software mode (no need to enable the LSI, it will be enabled
00046              by hardware).        
00047         (++) Enable write access to IWDG_PR and IWDG_RLR registers using
00048              IWDG_WriteAccessCmd(IWDG_WriteAccess_Enable) function.
00049         (++) Configure the IWDG prescaler using IWDG_SetPrescaler() function.
00050         (++) Configure the IWDG counter value using IWDG_SetReload() function.
00051              This value will be loaded in the IWDG counter each time the counter
00052              is reloaded, then the IWDG will start counting down from this value.
00053         (++) Wait for the IWDG registers to be updated using IWDG_GetFlagStatus() function.
00054         (++) Configure the IWDG refresh window using IWDG_SetWindowValue() function.
00055 
00056     (#) Window option is disabled:    
00057         (++) Enable write access to IWDG_PR and IWDG_RLR registers using
00058              IWDG_WriteAccessCmd(IWDG_WriteAccess_Enable) function.
00059         (++) Configure the IWDG prescaler using IWDG_SetPrescaler() function.
00060         (++) Configure the IWDG counter value using IWDG_SetReload() function.
00061              This value will be loaded in the IWDG counter each time the counter
00062              is reloaded, then the IWDG will start counting down from this value.
00063         (++) Wait for the IWDG registers to be updated using IWDG_GetFlagStatus() function.
00064         (++) reload the IWDG counter at regular intervals during normal operation 
00065              to prevent an MCU reset, using IWDG_ReloadCounter() function.
00066         (++) Start the IWDG using IWDG_Enable() function, when the IWDG is used
00067              in software mode (no need to enable the LSI, it will be enabled
00068              by hardware).    
00069           
00070   @endverbatim
00071     
00072   ******************************************************************************
00073   * @attention
00074   *
00075   * <h2><center>&copy; COPYRIGHT 2015 STMicroelectronics</center></h2>
00076   *
00077   * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
00078   * You may not use this file except in compliance with the License.
00079   * You may obtain a copy of the License at:
00080   *
00081   *        http://www.st.com/software_license_agreement_liberty_v2
00082   *
00083   * Unless required by applicable law or agreed to in writing, software 
00084   * distributed under the License is distributed on an "AS IS" BASIS, 
00085   * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
00086   * See the License for the specific language governing permissions and
00087   * limitations under the License.
00088   *
00089   ******************************************************************************
00090   */
00091 
00092 /* Includes ------------------------------------------------------------------*/
00093 #include "stm32f30x_iwdg.h"
00094 
00095 /** @addtogroup STM32F30x_StdPeriph_Driver
00096   * @{
00097   */
00098 
00099 /** @defgroup IWDG 
00100   * @brief IWDG driver modules
00101   * @{
00102   */ 
00103 
00104 /* Private typedef -----------------------------------------------------------*/
00105 /* Private define ------------------------------------------------------------*/
00106 /* ---------------------- IWDG registers bit mask ----------------------------*/
00107 /* KR register bit mask */
00108 #define KR_KEY_RELOAD    ((uint16_t)0xAAAA)
00109 #define KR_KEY_ENABLE    ((uint16_t)0xCCCC)
00110 
00111 /* Private macro -------------------------------------------------------------*/
00112 /* Private variables ---------------------------------------------------------*/
00113 /* Private function prototypes -----------------------------------------------*/
00114 /* Private functions ---------------------------------------------------------*/
00115 
00116 /** @defgroup IWDG_Private_Functions
00117   * @{
00118   */
00119 
00120 /** @defgroup IWDG_Group1 Prescaler and Counter configuration functions
00121  *  @brief   Prescaler and Counter configuration functions
00122  *
00123 @verbatim   
00124  ===============================================================================
00125             ##### Prescaler and Counter configuration functions #####
00126  ===============================================================================  
00127 
00128 @endverbatim
00129   * @{
00130   */
00131 
00132 /**
00133   * @brief  Enables or disables write access to IWDG_PR and IWDG_RLR registers.
00134   * @param  IWDG_WriteAccess: new state of write access to IWDG_PR and IWDG_RLR registers.
00135   *   This parameter can be one of the following values:
00136   *     @arg IWDG_WriteAccess_Enable: Enable write access to IWDG_PR and IWDG_RLR registers
00137   *     @arg IWDG_WriteAccess_Disable: Disable write access to IWDG_PR and IWDG_RLR registers
00138   * @retval None
00139   */
00140 void IWDG_WriteAccessCmd(uint16_t IWDG_WriteAccess)
00141 {
00142   /* Check the parameters */
00143   assert_param(IS_IWDG_WRITE_ACCESS(IWDG_WriteAccess));
00144   IWDG->KR = IWDG_WriteAccess;
00145 }
00146 
00147 /**
00148   * @brief  Sets IWDG Prescaler value.
00149   * @param  IWDG_Prescaler: specifies the IWDG Prescaler value.
00150   *   This parameter can be one of the following values:
00151   *     @arg IWDG_Prescaler_4: IWDG prescaler set to 4
00152   *     @arg IWDG_Prescaler_8: IWDG prescaler set to 8
00153   *     @arg IWDG_Prescaler_16: IWDG prescaler set to 16
00154   *     @arg IWDG_Prescaler_32: IWDG prescaler set to 32
00155   *     @arg IWDG_Prescaler_64: IWDG prescaler set to 64
00156   *     @arg IWDG_Prescaler_128: IWDG prescaler set to 128
00157   *     @arg IWDG_Prescaler_256: IWDG prescaler set to 256
00158   * @retval None
00159   */
00160 void IWDG_SetPrescaler(uint8_t IWDG_Prescaler)
00161 {
00162   /* Check the parameters */
00163   assert_param(IS_IWDG_PRESCALER(IWDG_Prescaler));
00164   IWDG->PR = IWDG_Prescaler;
00165 }
00166 
00167 /**
00168   * @brief  Sets IWDG Reload value.
00169   * @param  Reload: specifies the IWDG Reload value.
00170   *   This parameter must be a number between 0 and 0x0FFF.
00171   * @retval None
00172   */
00173 void IWDG_SetReload(uint16_t Reload)
00174 {
00175   /* Check the parameters */
00176   assert_param(IS_IWDG_RELOAD(Reload));
00177   IWDG->RLR = Reload;
00178 }
00179 
00180 /**
00181   * @brief  Reloads IWDG counter with value defined in the reload register
00182   *   (write access to IWDG_PR and IWDG_RLR registers disabled).
00183   * @param  None
00184   * @retval None
00185   */
00186 void IWDG_ReloadCounter(void)
00187 {
00188   IWDG->KR = KR_KEY_RELOAD;
00189 }
00190 
00191 
00192 /**
00193   * @brief  Sets the IWDG window value.
00194   * @param  WindowValue: specifies the window value to be compared to the downcounter.
00195   * @retval None
00196   */
00197 void IWDG_SetWindowValue(uint16_t WindowValue)
00198 {
00199   /* Check the parameters */
00200   assert_param(IS_IWDG_WINDOW_VALUE(WindowValue));
00201   IWDG->WINR = WindowValue;
00202 }
00203 
00204 /**
00205   * @}
00206   */
00207 
00208 /** @defgroup IWDG_Group2 IWDG activation function
00209  *  @brief   IWDG activation function 
00210  *
00211 @verbatim   
00212  ===============================================================================
00213                     ##### IWDG activation function #####
00214  ===============================================================================  
00215 
00216 @endverbatim
00217   * @{
00218   */
00219 
00220 /**
00221   * @brief  Enables IWDG (write access to IWDG_PR and IWDG_RLR registers disabled).
00222   * @param  None
00223   * @retval None
00224   */
00225 void IWDG_Enable(void)
00226 {
00227   IWDG->KR = KR_KEY_ENABLE;
00228 }
00229 
00230 /**
00231   * @}
00232   */
00233 
00234 /** @defgroup IWDG_Group3 Flag management function 
00235  *  @brief  Flag management function  
00236  *
00237 @verbatim   
00238  ===============================================================================
00239                      ##### Flag management function ##### 
00240  ===============================================================================  
00241 
00242 @endverbatim
00243   * @{
00244   */
00245 
00246 /**
00247   * @brief  Checks whether the specified IWDG flag is set or not.
00248   * @param  IWDG_FLAG: specifies the flag to check.
00249   *   This parameter can be one of the following values:
00250   *     @arg IWDG_FLAG_PVU: Prescaler Value Update on going
00251   *     @arg IWDG_FLAG_RVU: Reload Value Update on going
00252   *     @arg IWDG_FLAG_WVU: Counter Window Value Update on going
00253   * @retval The new state of IWDG_FLAG (SET or RESET).
00254   */
00255 FlagStatus IWDG_GetFlagStatus(uint16_t IWDG_FLAG)
00256 {
00257   FlagStatus bitstatus = RESET;
00258   /* Check the parameters */
00259   assert_param(IS_IWDG_FLAG(IWDG_FLAG));
00260   if ((IWDG->SR & IWDG_FLAG) != (uint32_t)RESET)
00261   {
00262     bitstatus = SET;
00263   }
00264   else
00265   {
00266     bitstatus = RESET;
00267   }
00268   /* Return the flag status */
00269   return bitstatus;
00270 }
00271 
00272 /**
00273   * @}
00274   */
00275 
00276 /**
00277   * @}
00278   */
00279 
00280 /**
00281   * @}
00282   */
00283 
00284 /**
00285   * @}
00286   */
00287 
00288 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/