stm32f30x_adc.h

00001 /**
00002   ******************************************************************************
00003   * @file    stm32f30x_adc.h
00004   * @author  MCD Application Team
00005   * @version V1.2.3
00006   * @date    10-July-2015
00007   * @brief   This file contains all the functions prototypes for the ADC firmware 
00008   *          library.
00009   ******************************************************************************
00010   * @attention
00011   *
00012   * <h2><center>&copy; COPYRIGHT 2015 STMicroelectronics</center></h2>
00013   *
00014   * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
00015   * You may not use this file except in compliance with the License.
00016   * You may obtain a copy of the License at:
00017   *
00018   *        http://www.st.com/software_license_agreement_liberty_v2
00019   *
00020   * Unless required by applicable law or agreed to in writing, software 
00021   * distributed under the License is distributed on an "AS IS" BASIS, 
00022   * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
00023   * See the License for the specific language governing permissions and
00024   * limitations under the License.
00025   *
00026   ******************************************************************************
00027   */
00028 
00029 /* Define to prevent recursive inclusion -------------------------------------*/
00030 #ifndef __STM32F30x_ADC_H
00031 #define __STM32F30x_ADC_H
00032 
00033 #ifdef __cplusplus
00034  extern "C" {
00035 #endif
00036 
00037 /* Includes ------------------------------------------------------------------*/
00038 #include "stm32f30x.h"
00039 
00040 /** @addtogroup STM32F30x_StdPeriph_Driver
00041   * @{
00042   */
00043 
00044 /** @addtogroup ADC
00045   * @{
00046   */
00047 
00048 /* Exported types ------------------------------------------------------------*/
00049 
00050 /** 
00051   * @brief  ADC Init structure definition  
00052   */
00053 typedef struct
00054 {
00055 
00056   uint32_t ADC_ContinuousConvMode;        /*!< Specifies whether the conversion is performed in
00057                                                Continuous or Single mode.
00058                                                This parameter can be set to ENABLE or DISABLE. */
00059   uint32_t ADC_Resolution;                /*!< Configures the ADC resolution.
00060                                                This parameter can be a value of @ref ADC_resolution */ 
00061   uint32_t ADC_ExternalTrigConvEvent;      /*!< Defines the external trigger used to start the analog
00062                                                to digital conversion of regular channels. This parameter
00063                                                can be a value of @ref ADC_external_trigger_sources_for_regular_channels_conversion */
00064   uint32_t ADC_ExternalTrigEventEdge;      /*!< Select the external trigger edge and enable the trigger of a regular group.                                               
00065                                                This parameter can be a value of 
00066                                                @ref ADC_external_trigger_edge_for_regular_channels_conversion */
00067   uint32_t ADC_DataAlign;                 /*!< Specifies whether the ADC data alignment is left or right.
00068                                                This parameter can be a value of @ref ADC_data_align */
00069   uint32_t ADC_OverrunMode;               /*!< Specifies the way data overrun are managed.
00070                                                This parameter can be set to ENABLE or DISABLE. */
00071   uint32_t ADC_AutoInjMode;               /*!< Enable/disable automatic injected group conversion after
00072                                                regular group conversion.
00073                                                This parameter can be set to ENABLE or DISABLE. */
00074   uint8_t ADC_NbrOfRegChannel;            /*!< Specifies the number of ADC channels that will be converted
00075                                                using the sequencer for regular channel group.
00076                                                This parameter must range from 1 to 16. */
00077 }ADC_InitTypeDef;
00078 
00079 /**
00080   * @}
00081   */
00082 /** 
00083   * @brief  ADC Init structure definition  
00084   */
00085 typedef struct
00086 {
00087 
00088    uint32_t ADC_ExternalTrigInjecConvEvent;     /*!< Defines the external trigger used to start the analog
00089                                                      to digital conversion of injected channels. This parameter
00090                                                      can be a value of @ref ADC_external_trigger_sources_for_Injected_channels_conversion */
00091   uint32_t ADC_ExternalTrigInjecEventEdge;     /*!< Select the external trigger edge and enable the trigger of an injected group. 
00092                                                     This parameter can be a value of 
00093                                                     @ref ADC_external_trigger_edge_for_Injected_channels_conversion */
00094   uint8_t ADC_NbrOfInjecChannel;               /*!< Specifies the number of ADC channels that will be converted
00095                                                     using the sequencer for injected channel group.
00096                                                     This parameter must range from 1 to 4. */ 
00097   uint32_t ADC_InjecSequence1; 
00098   uint32_t ADC_InjecSequence2;
00099   uint32_t ADC_InjecSequence3;
00100   uint32_t ADC_InjecSequence4;                                            
00101 }ADC_InjectedInitTypeDef;
00102 
00103 /**
00104   * @}
00105   */
00106 typedef struct 
00107 {
00108   uint32_t ADC_Mode;                      /*!< Configures the ADC to operate in 
00109                                                independent or multi mode. 
00110                                                This parameter can be a value of @ref ADC_mode */                                              
00111   uint32_t ADC_Clock;                    /*!< Select the clock of the ADC. The clock is common for both master 
00112                                               and slave ADCs.
00113                                               This parameter can be a value of @ref ADC_Clock */
00114   uint32_t ADC_DMAAccessMode;             /*!< Configures the Direct memory access mode for multi ADC mode.                                               
00115                                                This parameter can be a value of 
00116                                                @ref ADC_Direct_memory_access_mode_for_multi_mode */
00117   uint32_t ADC_DMAMode;                  /*!< Configures the DMA mode for ADC.                                             
00118                                               This parameter can be a value of @ref ADC_DMA_Mode_definition */
00119   uint8_t ADC_TwoSamplingDelay;          /*!< Configures the Delay between 2 sampling phases.
00120                                                This parameter can be a value between  0x0 and 0xF  */
00121   
00122 }ADC_CommonInitTypeDef;
00123 
00124 /* Exported constants --------------------------------------------------------*/
00125 
00126 /** @defgroup ADC_Exported_Constants
00127   * @{
00128   */ 
00129 
00130 #define IS_ADC_ALL_PERIPH(PERIPH) (((PERIPH) == ADC1) || \
00131                                    ((PERIPH) == ADC2) || \
00132                                    ((PERIPH) == ADC3) || \
00133                                    ((PERIPH) == ADC4))
00134 
00135 #define IS_ADC_DMA_PERIPH(PERIPH) (((PERIPH) == ADC1) || \
00136                                    ((PERIPH) == ADC2) || \
00137                                    ((PERIPH) == ADC3) || \
00138                                    ((PERIPH) == ADC4))
00139 
00140 /** @defgroup ADC_ContinuousConvMode 
00141   * @{
00142   */
00143 #define ADC_ContinuousConvMode_Enable    ((uint32_t)0x00002000)  /*!<  ADC continuous conversion mode enable */
00144 #define ADC_ContinuousConvMode_Disable   ((uint32_t)0x00000000)  /*!<  ADC continuous conversion mode disable */
00145 #define IS_ADC_CONVMODE(MODE) (((MODE) == ADC_ContinuousConvMode_Enable) || \
00146                                ((MODE) == ADC_ContinuousConvMode_Disable))
00147 /**
00148   * @}
00149   */
00150 /** @defgroup ADC_OverunMode 
00151   * @{
00152   */
00153 #define ADC_OverrunMode_Enable   ((uint32_t)0x00001000)  /*!<  ADC Overrun Mode enable */
00154 #define ADC_OverrunMode_Disable  ((uint32_t)0x00000000)  /*!<  ADC Overrun Mode disable */
00155 #define IS_ADC_OVRUNMODE(MODE) (((MODE) == ADC_OverrunMode_Enable) || \
00156                                 ((MODE) == ADC_OverrunMode_Disable))
00157 /**
00158   * @}
00159   */
00160 /** @defgroup ADC_AutoInjecMode 
00161   * @{
00162   */
00163 #define ADC_AutoInjec_Enable     ((uint32_t)0x02000000)  /*!<  ADC Auto injected Mode enable */
00164 #define ADC_AutoInjec_Disable    ((uint32_t)0x00000000)  /*!<  ADC Auto injected Mode disable */
00165 #define IS_ADC_AUTOINJECMODE(MODE) (((MODE) == ADC_AutoInjec_Enable) || \
00166                                     ((MODE) == ADC_AutoInjec_Disable))
00167 /**
00168   * @}
00169   */
00170 /** @defgroup ADC_resolution 
00171   * @{
00172   */ 
00173 #define ADC_Resolution_12b                         ((uint32_t)0x00000000)  /*!<  ADC 12-bit resolution */
00174 #define ADC_Resolution_10b                         ((uint32_t)0x00000008)  /*!<  ADC 10-bit resolution */
00175 #define ADC_Resolution_8b                          ((uint32_t)0x00000010)  /*!<  ADC 8-bit resolution */
00176 #define ADC_Resolution_6b                          ((uint32_t)0x00000018)  /*!<  ADC 6-bit resolution */
00177 #define IS_ADC_RESOLUTION(RESOLUTION) (((RESOLUTION) == ADC_Resolution_12b) || \
00178                                        ((RESOLUTION) == ADC_Resolution_10b) || \
00179                                        ((RESOLUTION) == ADC_Resolution_8b) || \
00180                                        ((RESOLUTION) == ADC_Resolution_6b))
00181                                       
00182 /**
00183   * @}
00184   */ 
00185   
00186   
00187 /** @defgroup ADC_external_trigger_edge_for_regular_channels_conversion 
00188   * @{
00189   */
00190 #define ADC_ExternalTrigEventEdge_None            ((uint16_t)0x0000)     /*!<  ADC No external trigger for regular conversion */
00191 #define ADC_ExternalTrigEventEdge_RisingEdge      ((uint16_t)0x0400)     /*!<  ADC external trigger rising edge for regular conversion */
00192 #define ADC_ExternalTrigEventEdge_FallingEdge     ((uint16_t)0x0800)     /*!<  ADC ADC external trigger falling edge for regular conversion */
00193 #define ADC_ExternalTrigEventEdge_BothEdge        ((uint16_t)0x0C00)     /*!<  ADC ADC external trigger both edges for regular conversion */
00194 
00195 #define IS_EXTERNALTRIG_EDGE(EDGE) (((EDGE) == ADC_ExternalTrigEventEdge_None) || \
00196                                     ((EDGE) == ADC_ExternalTrigEventEdge_RisingEdge) || \
00197                                     ((EDGE) == ADC_ExternalTrigEventEdge_FallingEdge) || \
00198                                     ((EDGE) == ADC_ExternalTrigEventEdge_BothEdge))
00199   
00200 /**
00201   * @}
00202   */
00203    
00204 /** @defgroup ADC_external_trigger_edge_for_Injected_channels_conversion 
00205   * @{
00206   */     
00207 #define ADC_ExternalTrigInjecEventEdge_None          ((uint16_t)0x0000)    /*!<  ADC No external trigger for regular conversion */
00208 #define ADC_ExternalTrigInjecEventEdge_RisingEdge    ((uint16_t)0x0040)    /*!<  ADC external trigger rising edge for injected conversion */
00209 #define ADC_ExternalTrigInjecEventEdge_FallingEdge   ((uint16_t)0x0080)  /*!<  ADC external trigger falling edge for injected conversion */
00210 #define ADC_ExternalTrigInjecEventEdge_BothEdge      ((uint16_t)0x00C0)  /*!<  ADC external trigger both edges for injected conversion */
00211 
00212 #define IS_EXTERNALTRIGINJ_EDGE(EDGE) (((EDGE) == ADC_ExternalTrigInjecEventEdge_None) || \
00213                                        ((EDGE) == ADC_ExternalTrigInjecEventEdge_RisingEdge) || \
00214                                        ((EDGE) == ADC_ExternalTrigInjecEventEdge_FallingEdge) || \
00215                                        ((EDGE) == ADC_ExternalTrigInjecEventEdge_BothEdge))
00216   
00217 /** @defgroup ADC_external_trigger_sources_for_regular_channels_conversion 
00218   * @{
00219   */
00220 #define ADC_ExternalTrigConvEvent_0              ((uint16_t)0x0000)   /*!<  ADC external trigger event 0 */
00221 #define ADC_ExternalTrigConvEvent_1              ((uint16_t)0x0040)   /*!<  ADC external trigger event 1 */
00222 #define ADC_ExternalTrigConvEvent_2              ((uint16_t)0x0080)   /*!<  ADC external trigger event 2 */
00223 #define ADC_ExternalTrigConvEvent_3              ((uint16_t)0x00C0)   /*!<  ADC external trigger event 3 */
00224 #define ADC_ExternalTrigConvEvent_4              ((uint16_t)0x0100)   /*!<  ADC external trigger event 4 */
00225 #define ADC_ExternalTrigConvEvent_5              ((uint16_t)0x0140)   /*!<  ADC external trigger event 5 */
00226 #define ADC_ExternalTrigConvEvent_6              ((uint16_t)0x0180)   /*!<  ADC external trigger event 6 */
00227 #define ADC_ExternalTrigConvEvent_7              ((uint16_t)0x01C0)   /*!<  ADC external trigger event 7 */
00228 #define ADC_ExternalTrigConvEvent_8              ((uint16_t)0x0200)   /*!<  ADC external trigger event 8 */
00229 #define ADC_ExternalTrigConvEvent_9              ((uint16_t)0x0240)   /*!<  ADC external trigger event 9 */
00230 #define ADC_ExternalTrigConvEvent_10             ((uint16_t)0x0280)   /*!<  ADC external trigger event 10 */
00231 #define ADC_ExternalTrigConvEvent_11             ((uint16_t)0x02C0)   /*!<  ADC external trigger event 11 */
00232 #define ADC_ExternalTrigConvEvent_12             ((uint16_t)0x0300)   /*!<  ADC external trigger event 12 */
00233 #define ADC_ExternalTrigConvEvent_13             ((uint16_t)0x0340)   /*!<  ADC external trigger event 13 */
00234 #define ADC_ExternalTrigConvEvent_14             ((uint16_t)0x0380)   /*!<  ADC external trigger event 14 */
00235 #define ADC_ExternalTrigConvEvent_15             ((uint16_t)0x03C0)   /*!<  ADC external trigger event 15 */
00236 
00237 #define IS_ADC_EXT_TRIG(REGTRIG) (((REGTRIG) == ADC_ExternalTrigConvEvent_0) || \
00238                                   ((REGTRIG) == ADC_ExternalTrigConvEvent_1) || \
00239                                   ((REGTRIG) == ADC_ExternalTrigConvEvent_2) || \
00240                                   ((REGTRIG) == ADC_ExternalTrigConvEvent_3) || \
00241                                   ((REGTRIG) == ADC_ExternalTrigConvEvent_4) || \
00242                                   ((REGTRIG) == ADC_ExternalTrigConvEvent_5) || \
00243                                   ((REGTRIG) == ADC_ExternalTrigConvEvent_6) || \
00244                                   ((REGTRIG) == ADC_ExternalTrigConvEvent_7) || \
00245                                   ((REGTRIG) == ADC_ExternalTrigConvEvent_8) || \
00246                                   ((REGTRIG) == ADC_ExternalTrigConvEvent_9) || \
00247                                   ((REGTRIG) == ADC_ExternalTrigConvEvent_10) || \
00248                                   ((REGTRIG) == ADC_ExternalTrigConvEvent_11) || \
00249                                   ((REGTRIG) == ADC_ExternalTrigConvEvent_12) || \
00250                                   ((REGTRIG) == ADC_ExternalTrigConvEvent_13) || \
00251                                   ((REGTRIG) == ADC_ExternalTrigConvEvent_14) || \
00252                                   ((REGTRIG) == ADC_ExternalTrigConvEvent_15))
00253 
00254 /**
00255   * @}
00256   */
00257 
00258 /** @defgroup ADC_external_trigger_sources_for_Injected_channels_conversion 
00259   * @{
00260   */
00261         
00262 #define ADC_ExternalTrigInjecConvEvent_0              ((uint16_t)0x0000)  /*!<  ADC external trigger for injected conversion event 0 */
00263 #define ADC_ExternalTrigInjecConvEvent_1              ((uint16_t)0x0004)  /*!<  ADC external trigger for injected conversion event 1 */
00264 #define ADC_ExternalTrigInjecConvEvent_2              ((uint16_t)0x0008)  /*!<  ADC external trigger for injected conversion event 2 */
00265 #define ADC_ExternalTrigInjecConvEvent_3              ((uint16_t)0x000C)  /*!<  ADC external trigger for injected conversion event 3 */
00266 #define ADC_ExternalTrigInjecConvEvent_4              ((uint16_t)0x0010)  /*!<  ADC external trigger for injected conversion event 4 */
00267 #define ADC_ExternalTrigInjecConvEvent_5              ((uint16_t)0x0014)  /*!<  ADC external trigger for injected conversion event 5 */
00268 #define ADC_ExternalTrigInjecConvEvent_6              ((uint16_t)0x0018)  /*!<  ADC external trigger for injected conversion event 6 */
00269 #define ADC_ExternalTrigInjecConvEvent_7              ((uint16_t)0x001C)  /*!<  ADC external trigger for injected conversion event 7 */
00270 #define ADC_ExternalTrigInjecConvEvent_8              ((uint16_t)0x0020)  /*!<  ADC external trigger for injected conversion event 8 */
00271 #define ADC_ExternalTrigInjecConvEvent_9              ((uint16_t)0x0024)  /*!<  ADC external trigger for injected conversion event 9 */
00272 #define ADC_ExternalTrigInjecConvEvent_10             ((uint16_t)0x0028)  /*!<  ADC external trigger for injected conversion event 10 */
00273 #define ADC_ExternalTrigInjecConvEvent_11             ((uint16_t)0x002C)  /*!<  ADC external trigger for injected conversion event 11 */
00274 #define ADC_ExternalTrigInjecConvEvent_12             ((uint16_t)0x0030)  /*!<  ADC external trigger for injected conversion event 12 */
00275 #define ADC_ExternalTrigInjecConvEvent_13             ((uint16_t)0x0034)  /*!<  ADC external trigger for injected conversion event 13 */
00276 #define ADC_ExternalTrigInjecConvEvent_14             ((uint16_t)0x0038)  /*!<  ADC external trigger for injected conversion event 14 */
00277 #define ADC_ExternalTrigInjecConvEvent_15             ((uint16_t)0x003C)  /*!<  ADC external trigger for injected conversion event 15 */
00278 
00279 #define IS_ADC_EXT_INJEC_TRIG(INJTRIG) (((INJTRIG) == ADC_ExternalTrigInjecConvEvent_0) || \
00280                                         ((INJTRIG) == ADC_ExternalTrigInjecConvEvent_1) || \
00281                                         ((INJTRIG) == ADC_ExternalTrigInjecConvEvent_2) || \
00282                                         ((INJTRIG) == ADC_ExternalTrigInjecConvEvent_3) || \
00283                                         ((INJTRIG) == ADC_ExternalTrigInjecConvEvent_4) || \
00284                                         ((INJTRIG) == ADC_ExternalTrigInjecConvEvent_5) || \
00285                                         ((INJTRIG) == ADC_ExternalTrigInjecConvEvent_6) || \
00286                                         ((INJTRIG) == ADC_ExternalTrigInjecConvEvent_7) || \
00287                                         ((INJTRIG) == ADC_ExternalTrigInjecConvEvent_8) || \
00288                                         ((INJTRIG) == ADC_ExternalTrigInjecConvEvent_9) || \
00289                                         ((INJTRIG) == ADC_ExternalTrigInjecConvEvent_10) || \
00290                                         ((INJTRIG) == ADC_ExternalTrigInjecConvEvent_11) || \
00291                                         ((INJTRIG) == ADC_ExternalTrigInjecConvEvent_12) || \
00292                                         ((INJTRIG) == ADC_ExternalTrigInjecConvEvent_13) || \
00293                                         ((INJTRIG) == ADC_ExternalTrigInjecConvEvent_14) || \
00294                                         ((INJTRIG) == ADC_ExternalTrigInjecConvEvent_15))
00295 /**
00296   * @}
00297   */
00298 /** @defgroup ADC_data_align 
00299   * @{
00300   */
00301 
00302 #define ADC_DataAlign_Right                        ((uint32_t)0x00000000)  /*!<  ADC Data alignment right */
00303 #define ADC_DataAlign_Left                         ((uint32_t)0x00000020)  /*!<  ADC Data alignment left */
00304 #define IS_ADC_DATA_ALIGN(ALIGN) (((ALIGN) == ADC_DataAlign_Right) || \
00305                                   ((ALIGN) == ADC_DataAlign_Left))
00306 /**
00307   * @}
00308   */
00309 
00310 /** @defgroup ADC_channels 
00311   * @{
00312   */
00313 
00314 #define ADC_Channel_1                               ((uint8_t)0x01)    /*!<  ADC Channel 1 */
00315 #define ADC_Channel_2                               ((uint8_t)0x02)    /*!<  ADC Channel 2 */
00316 #define ADC_Channel_3                               ((uint8_t)0x03)    /*!<  ADC Channel 3 */
00317 #define ADC_Channel_4                               ((uint8_t)0x04)    /*!<  ADC Channel 4 */
00318 #define ADC_Channel_5                               ((uint8_t)0x05)    /*!<  ADC Channel 5 */
00319 #define ADC_Channel_6                               ((uint8_t)0x06)    /*!<  ADC Channel 6 */
00320 #define ADC_Channel_7                               ((uint8_t)0x07)    /*!<  ADC Channel 7 */
00321 #define ADC_Channel_8                               ((uint8_t)0x08)    /*!<  ADC Channel 8 */
00322 #define ADC_Channel_9                               ((uint8_t)0x09)    /*!<  ADC Channel 9 */
00323 #define ADC_Channel_10                              ((uint8_t)0x0A)    /*!<  ADC Channel 10 */
00324 #define ADC_Channel_11                              ((uint8_t)0x0B)    /*!<  ADC Channel 11 */
00325 #define ADC_Channel_12                              ((uint8_t)0x0C)    /*!<  ADC Channel 12 */
00326 #define ADC_Channel_13                              ((uint8_t)0x0D)    /*!<  ADC Channel 13 */
00327 #define ADC_Channel_14                              ((uint8_t)0x0E)    /*!<  ADC Channel 14 */
00328 #define ADC_Channel_15                              ((uint8_t)0x0F)    /*!<  ADC Channel 15 */
00329 #define ADC_Channel_16                              ((uint8_t)0x10)    /*!<  ADC Channel 16 */
00330 #define ADC_Channel_17                              ((uint8_t)0x11)    /*!<  ADC Channel 17 */
00331 #define ADC_Channel_18                              ((uint8_t)0x12)    /*!<  ADC Channel 18 */
00332 
00333 #define ADC_Channel_TempSensor                      ((uint8_t)ADC_Channel_16)
00334 #define ADC_Channel_Vrefint                         ((uint8_t)ADC_Channel_18)
00335 #define ADC_Channel_Vbat                            ((uint8_t)ADC_Channel_17)
00336 
00337 #define IS_ADC_CHANNEL(CHANNEL) (((CHANNEL) == ADC_Channel_1)  || \
00338                                  ((CHANNEL) == ADC_Channel_2)  || \
00339                                  ((CHANNEL) == ADC_Channel_3)  || \
00340                                  ((CHANNEL) == ADC_Channel_4)  || \
00341                                  ((CHANNEL) == ADC_Channel_5)  || \
00342                                  ((CHANNEL) == ADC_Channel_6)  || \
00343                                  ((CHANNEL) == ADC_Channel_7)  || \
00344                                  ((CHANNEL) == ADC_Channel_8)  || \
00345                                  ((CHANNEL) == ADC_Channel_9)  || \
00346                                  ((CHANNEL) == ADC_Channel_10) || \
00347                                  ((CHANNEL) == ADC_Channel_11) || \
00348                                  ((CHANNEL) == ADC_Channel_12) || \
00349                                  ((CHANNEL) == ADC_Channel_13) || \
00350                                  ((CHANNEL) == ADC_Channel_14) || \
00351                                  ((CHANNEL) == ADC_Channel_15) || \
00352                                  ((CHANNEL) == ADC_Channel_16) || \
00353                                  ((CHANNEL) == ADC_Channel_17) || \
00354                                  ((CHANNEL) == ADC_Channel_18))
00355 #define IS_ADC_DIFFCHANNEL(CHANNEL) (((CHANNEL) == ADC_Channel_1)  || \
00356                                      ((CHANNEL) == ADC_Channel_2)  || \
00357                                      ((CHANNEL) == ADC_Channel_3)  || \
00358                                      ((CHANNEL) == ADC_Channel_4)  || \
00359                                      ((CHANNEL) == ADC_Channel_5)  || \
00360                                      ((CHANNEL) == ADC_Channel_6)  || \
00361                                      ((CHANNEL) == ADC_Channel_7)  || \
00362                                      ((CHANNEL) == ADC_Channel_8)  || \
00363                                      ((CHANNEL) == ADC_Channel_9)  || \
00364                                      ((CHANNEL) == ADC_Channel_10) || \
00365                                      ((CHANNEL) == ADC_Channel_11) || \
00366                                      ((CHANNEL) == ADC_Channel_12) || \
00367                                      ((CHANNEL) == ADC_Channel_13) || \
00368                                      ((CHANNEL) == ADC_Channel_14))
00369 /**
00370   * @}
00371   */
00372 
00373 /** @defgroup ADC_mode 
00374   * @{
00375   */    
00376 #define ADC_Mode_Independent                  ((uint32_t)0x00000000) /*!<  ADC independent mode */
00377 #define ADC_Mode_CombRegSimulInjSimul         ((uint32_t)0x00000001) /*!<  ADC multi ADC mode: Combined Regular simultaneous injected simultaneous mode */
00378 #define ADC_Mode_CombRegSimulAltTrig          ((uint32_t)0x00000002) /*!<  ADC multi ADC mode: Combined Regular simultaneous Alternate trigger mode */
00379 #define ADC_Mode_InjSimul                     ((uint32_t)0x00000005) /*!<  ADC multi ADC mode: Injected simultaneous mode */
00380 #define ADC_Mode_RegSimul                     ((uint32_t)0x00000006) /*!<  ADC multi ADC mode: Regular simultaneous mode */
00381 #define ADC_Mode_Interleave                   ((uint32_t)0x00000007) /*!<  ADC multi ADC mode: Interleave mode */
00382 #define ADC_Mode_AltTrig                      ((uint32_t)0x00000009) /*!<  ADC multi ADC mode: Alternate Trigger mode */
00383 
00384 #define IS_ADC_MODE(MODE) (((MODE) == ADC_Mode_Independent) || \
00385                            ((MODE) == ADC_Mode_CombRegSimulInjSimul) || \
00386                            ((MODE) == ADC_Mode_CombRegSimulAltTrig) || \
00387                            ((MODE) == ADC_Mode_InjSimul) || \
00388                            ((MODE) == ADC_Mode_RegSimul) || \
00389                            ((MODE) == ADC_Mode_Interleave) || \
00390                            ((MODE) == ADC_Mode_AltTrig))
00391                                      
00392 /**
00393   * @}
00394   */
00395 
00396 /** @defgroup ADC_Clock 
00397   * @{
00398   */ 
00399 #define ADC_Clock_AsynClkMode                  ((uint32_t)0x00000000)   /*!< ADC Asynchronous clock mode */
00400 #define ADC_Clock_SynClkModeDiv1               ((uint32_t)0x00010000)   /*!< Synchronous clock mode divided by 1 */
00401 #define ADC_Clock_SynClkModeDiv2               ((uint32_t)0x00020000)   /*!<  Synchronous clock mode divided by 2 */
00402 #define ADC_Clock_SynClkModeDiv4               ((uint32_t)0x00030000)   /*!<  Synchronous clock mode divided by 4 */
00403 #define IS_ADC_CLOCKMODE(CLOCK) (((CLOCK) == ADC_Clock_AsynClkMode) ||\
00404                 ((CLOCK) == ADC_Clock_SynClkModeDiv1) ||\
00405                 ((CLOCK) == ADC_Clock_SynClkModeDiv2)||\
00406                 ((CLOCK) == ADC_Clock_SynClkModeDiv4))
00407 /**
00408   * @}
00409   */
00410 /** @defgroup ADC_Direct_memory_access_mode_for_multi_mode 
00411   * @{
00412   */ 
00413 #define ADC_DMAAccessMode_Disabled      ((uint32_t)0x00000000)     /*!<  DMA mode disabled */
00414 #define ADC_DMAAccessMode_1             ((uint32_t)0x00008000)     /*!<  DMA mode enabled for 12 and 10-bit resolution (6 bit) */
00415 #define ADC_DMAAccessMode_2             ((uint32_t)0x0000C000)     /*!<  DMA mode enabled for 8 and 6-bit resolution (8bit) */
00416 #define IS_ADC_DMA_ACCESS_MODE(MODE) (((MODE) == ADC_DMAAccessMode_Disabled) || \
00417                                       ((MODE) == ADC_DMAAccessMode_1) || \
00418                                       ((MODE) == ADC_DMAAccessMode_2))
00419                                      
00420 /**
00421   * @}
00422   */
00423 /** @defgroup ADC_sampling_time 
00424   * @{
00425   */
00426 
00427 #define ADC_SampleTime_1Cycles5                    ((uint8_t)0x00)   /*!<  ADC sampling time 1.5 cycle */
00428 #define ADC_SampleTime_2Cycles5                    ((uint8_t)0x01)   /*!<  ADC sampling time 2.5 cycles */
00429 #define ADC_SampleTime_4Cycles5                    ((uint8_t)0x02)   /*!<  ADC sampling time 4.5 cycles */
00430 #define ADC_SampleTime_7Cycles5                    ((uint8_t)0x03)   /*!<  ADC sampling time 7.5 cycles */
00431 #define ADC_SampleTime_19Cycles5                   ((uint8_t)0x04)   /*!<  ADC sampling time 19.5 cycles */
00432 #define ADC_SampleTime_61Cycles5                   ((uint8_t)0x05)   /*!<  ADC sampling time 61.5 cycles */
00433 #define ADC_SampleTime_181Cycles5                  ((uint8_t)0x06)   /*!<  ADC sampling time 181.5 cycles */
00434 #define ADC_SampleTime_601Cycles5                  ((uint8_t)0x07)   /*!<  ADC sampling time 601.5 cycles */
00435 #define IS_ADC_SAMPLE_TIME(TIME) (((TIME) == ADC_SampleTime_1Cycles5) || \
00436                                   ((TIME) == ADC_SampleTime_2Cycles5) || \
00437                                   ((TIME) == ADC_SampleTime_4Cycles5) || \
00438                                   ((TIME) == ADC_SampleTime_7Cycles5) || \
00439                                   ((TIME) == ADC_SampleTime_19Cycles5) || \
00440                                   ((TIME) == ADC_SampleTime_61Cycles5) || \
00441                                   ((TIME) == ADC_SampleTime_181Cycles5) || \
00442                                   ((TIME) == ADC_SampleTime_601Cycles5))
00443 /**
00444   * @}
00445   */
00446 
00447 /** @defgroup ADC_injected_Channel_selection 
00448   * @{
00449   */
00450 
00451 #define ADC_InjectedChannel_1                       ADC_Channel_1        /*!<  ADC Injected channel 1 */
00452 #define ADC_InjectedChannel_2                       ADC_Channel_2        /*!<  ADC Injected channel 2 */
00453 #define ADC_InjectedChannel_3                       ADC_Channel_3        /*!<  ADC Injected channel 3 */
00454 #define ADC_InjectedChannel_4                       ADC_Channel_4        /*!<  ADC Injected channel 4 */
00455 #define ADC_InjectedChannel_5                       ADC_Channel_5        /*!<  ADC Injected channel 5 */
00456 #define ADC_InjectedChannel_6                       ADC_Channel_6        /*!<  ADC Injected channel 6 */
00457 #define ADC_InjectedChannel_7                       ADC_Channel_7        /*!<  ADC Injected channel 7 */
00458 #define ADC_InjectedChannel_8                       ADC_Channel_8        /*!<  ADC Injected channel 8 */
00459 #define ADC_InjectedChannel_9                       ADC_Channel_9        /*!<  ADC Injected channel 9 */
00460 #define ADC_InjectedChannel_10                      ADC_Channel_10       /*!<  ADC Injected channel 10 */
00461 #define ADC_InjectedChannel_11                      ADC_Channel_11       /*!<  ADC Injected channel 11 */
00462 #define ADC_InjectedChannel_12                      ADC_Channel_12       /*!<  ADC Injected channel 12 */
00463 #define ADC_InjectedChannel_13                      ADC_Channel_13       /*!<  ADC Injected channel 13 */
00464 #define ADC_InjectedChannel_14                      ADC_Channel_14       /*!<  ADC Injected channel 14 */
00465 #define ADC_InjectedChannel_15                      ADC_Channel_15       /*!<  ADC Injected channel 15 */
00466 #define ADC_InjectedChannel_16                      ADC_Channel_16       /*!<  ADC Injected channel 16 */
00467 #define ADC_InjectedChannel_17                      ADC_Channel_17       /*!<  ADC Injected channel 17 */
00468 #define ADC_InjectedChannel_18                      ADC_Channel_18       /*!<  ADC Injected channel 18 */
00469 
00470 #define IS_ADC_INJECTED_CHANNEL(CHANNEL) (((CHANNEL) == ADC_InjectedChannel_1) || \
00471                                           ((CHANNEL) == ADC_InjectedChannel_2) || \
00472                                           ((CHANNEL) == ADC_InjectedChannel_3) || \
00473                                           ((CHANNEL) == ADC_InjectedChannel_4) ||\
00474                                           ((CHANNEL) == ADC_InjectedChannel_5) ||\
00475                                           ((CHANNEL) == ADC_InjectedChannel_6) ||\
00476                                           ((CHANNEL) == ADC_InjectedChannel_7) ||\
00477                                           ((CHANNEL) == ADC_InjectedChannel_8) ||\
00478                                           ((CHANNEL) == ADC_InjectedChannel_9) ||\
00479                                           ((CHANNEL) == ADC_InjectedChannel_10) ||\
00480                                           ((CHANNEL) == ADC_InjectedChannel_11) ||\
00481                                           ((CHANNEL) == ADC_InjectedChannel_12) ||\
00482                                           ((CHANNEL) == ADC_InjectedChannel_13) ||\
00483                                           ((CHANNEL) == ADC_InjectedChannel_14) ||\
00484                                           ((CHANNEL) == ADC_InjectedChannel_15) ||\
00485                                           ((CHANNEL) == ADC_InjectedChannel_16) ||\
00486                                           ((CHANNEL) == ADC_InjectedChannel_17) ||\
00487                                           ((CHANNEL) == ADC_InjectedChannel_18))
00488 /**
00489   * @}
00490   */
00491 
00492 /** @defgroup ADC_injected_Sequence_selection 
00493   * @{
00494   */
00495 
00496 #define ADC_InjectedSequence_1                       ADC_Channel_1        /*!<  ADC Injected sequence 1 */
00497 #define ADC_InjectedSequence_2                       ADC_Channel_2        /*!<  ADC Injected sequence 2 */
00498 #define ADC_InjectedSequence_3                       ADC_Channel_3        /*!<  ADC Injected sequence 3 */
00499 #define ADC_InjectedSequence_4                       ADC_Channel_4        /*!<  ADC Injected sequence 4 */
00500 #define IS_ADC_INJECTED_SEQUENCE(SEQUENCE) (((SEQUENCE) == ADC_InjectedSequence_1) || \
00501                                             ((SEQUENCE) == ADC_InjectedSequence_2) || \
00502                                             ((SEQUENCE) == ADC_InjectedSequence_3) || \
00503                                             ((SEQUENCE) == ADC_InjectedSequence_4))
00504 /**
00505   * @}
00506   */
00507 
00508 /** @defgroup ADC_analog_watchdog_selection 
00509   * @{
00510   */
00511 
00512 #define ADC_AnalogWatchdog_SingleRegEnable         ((uint32_t)0x00C00000)    /*!<  ADC Analog watchdog single regular mode */
00513 #define ADC_AnalogWatchdog_SingleInjecEnable       ((uint32_t)0x01400000)    /*!<  ADC Analog watchdog single injected mode */
00514 #define ADC_AnalogWatchdog_SingleRegOrInjecEnable  ((uint32_t)0x01C00000)    /*!<  ADC Analog watchdog single regular or injected mode */
00515 #define ADC_AnalogWatchdog_AllRegEnable            ((uint32_t)0x00800000)    /*!<  ADC Analog watchdog all regular mode */
00516 #define ADC_AnalogWatchdog_AllInjecEnable          ((uint32_t)0x01000000)    /*!<  ADC Analog watchdog all injected mode */
00517 #define ADC_AnalogWatchdog_AllRegAllInjecEnable    ((uint32_t)0x01800000)    /*!<  ADC Analog watchdog all regular and all injected mode */
00518 #define ADC_AnalogWatchdog_None                    ((uint32_t)0x00000000)    /*!<  ADC Analog watchdog off */
00519 
00520 #define IS_ADC_ANALOG_WATCHDOG(WATCHDOG) (((WATCHDOG) == ADC_AnalogWatchdog_SingleRegEnable) || \
00521                                           ((WATCHDOG) == ADC_AnalogWatchdog_SingleInjecEnable) || \
00522                                           ((WATCHDOG) == ADC_AnalogWatchdog_SingleRegOrInjecEnable) || \
00523                                           ((WATCHDOG) == ADC_AnalogWatchdog_AllRegEnable) || \
00524                                           ((WATCHDOG) == ADC_AnalogWatchdog_AllInjecEnable) || \
00525                                           ((WATCHDOG) == ADC_AnalogWatchdog_AllRegAllInjecEnable) || \
00526                                           ((WATCHDOG) == ADC_AnalogWatchdog_None))
00527 /**
00528   * @}
00529   */
00530 
00531 /** @defgroup ADC_Calibration_Mode_definition 
00532   * @{
00533   */
00534 #define ADC_CalibrationMode_Single         ((uint32_t)0x00000000)   /*!<  ADC Calibration for single ended channel */
00535 #define ADC_CalibrationMode_Differential   ((uint32_t)0x40000000)   /*!<  ADC Calibration for differential channel */
00536 
00537 #define IS_ADC_CALIBRATION_MODE(MODE) (((MODE) == ADC_CalibrationMode_Single) ||((MODE) == ADC_CalibrationMode_Differential))
00538 
00539 /**
00540   * @}
00541   */
00542 
00543 /** @defgroup ADC_DMA_Mode_definition 
00544   * @{
00545   */
00546 #define ADC_DMAMode_OneShot    ((uint32_t)0x00000000)   /*!<  ADC DMA Oneshot mode */
00547 #define ADC_DMAMode_Circular   ((uint32_t)0x00000002)   /*!<  ADC DMA circular mode */
00548 
00549 #define IS_ADC_DMA_MODE(MODE) (((MODE) == ADC_DMAMode_OneShot) || ((MODE) == ADC_DMAMode_Circular))
00550 /**
00551   * @}
00552   */
00553 
00554 /** @defgroup ADC_interrupts_definition 
00555   * @{
00556   */
00557 
00558 #define ADC_IT_RDY           ((uint16_t)0x0001)  /*!< ADC Ready (ADRDY) interrupt source */
00559 #define ADC_IT_EOSMP         ((uint16_t)0x0002)  /*!< ADC End of Sampling interrupt source */
00560 #define ADC_IT_EOC           ((uint16_t)0x0004)  /*!< ADC End of Regular Conversion interrupt source */
00561 #define ADC_IT_EOS           ((uint16_t)0x0008)  /*!< ADC End of Regular sequence of Conversions interrupt source */
00562 #define ADC_IT_OVR           ((uint16_t)0x0010)  /*!< ADC overrun interrupt source */
00563 #define ADC_IT_JEOC          ((uint16_t)0x0020)  /*!< ADC End of Injected Conversion interrupt source */
00564 #define ADC_IT_JEOS          ((uint16_t)0x0040)  /*!< ADC End of Injected sequence of Conversions interrupt source */
00565 #define ADC_IT_AWD1          ((uint16_t)0x0080)  /*!< ADC Analog watchdog 1 interrupt source */
00566 #define ADC_IT_AWD2          ((uint16_t)0x0100)  /*!< ADC Analog watchdog 2 interrupt source */
00567 #define ADC_IT_AWD3          ((uint16_t)0x0200)  /*!< ADC Analog watchdog 3 interrupt source */
00568 #define ADC_IT_JQOVF         ((uint16_t)0x0400)  /*!< ADC Injected Context Queue Overflow interrupt source */
00569 
00570 
00571 #define IS_ADC_IT(IT) ((((IT) & (uint16_t)0xF800) == 0x0000) && ((IT) != 0x0000))
00572 
00573 #define IS_ADC_GET_IT(IT) (((IT) == ADC_IT_RDY) || ((IT) == ADC_IT_EOSMP) || \
00574                            ((IT) == ADC_IT_EOC) || ((IT) == ADC_IT_EOS) || \
00575                            ((IT) == ADC_IT_OVR) || ((IT) == ADC_IT_EOS) || \
00576                            ((IT) == ADC_IT_JEOS) || ((IT) == ADC_IT_AWD1) || \
00577                            ((IT) == ADC_IT_AWD2) || ((IT) == ADC_IT_AWD3) || \
00578                            ((IT) == ADC_IT_JQOVF))
00579 /**
00580   * @}
00581   */
00582 
00583 /** @defgroup ADC_flags_definition 
00584   * @{
00585   */
00586   
00587 #define ADC_FLAG_RDY           ((uint16_t)0x0001)  /*!< ADC Ready (ADRDY) flag */
00588 #define ADC_FLAG_EOSMP         ((uint16_t)0x0002)  /*!< ADC End of Sampling flag */
00589 #define ADC_FLAG_EOC           ((uint16_t)0x0004)  /*!< ADC End of Regular Conversion flag */
00590 #define ADC_FLAG_EOS           ((uint16_t)0x0008)  /*!< ADC End of Regular sequence of Conversions flag */
00591 #define ADC_FLAG_OVR           ((uint16_t)0x0010)  /*!< ADC overrun flag */
00592 #define ADC_FLAG_JEOC          ((uint16_t)0x0020)  /*!< ADC End of Injected Conversion flag */
00593 #define ADC_FLAG_JEOS          ((uint16_t)0x0040)  /*!< ADC End of Injected sequence of Conversions flag */
00594 #define ADC_FLAG_AWD1          ((uint16_t)0x0080)  /*!< ADC Analog watchdog 1 flag */
00595 #define ADC_FLAG_AWD2          ((uint16_t)0x0100)  /*!< ADC Analog watchdog 2 flag */
00596 #define ADC_FLAG_AWD3          ((uint16_t)0x0200)  /*!< ADC Analog watchdog 3 flag */
00597 #define ADC_FLAG_JQOVF         ((uint16_t)0x0400)  /*!< ADC Injected Context Queue Overflow flag */
00598 
00599 #define IS_ADC_CLEAR_FLAG(FLAG) ((((FLAG) & (uint16_t)0xF800) == 0x0000) && ((FLAG) != 0x0000))
00600 #define IS_ADC_GET_FLAG(FLAG) (((FLAG) == ADC_FLAG_RDY) || ((FLAG) == ADC_FLAG_EOSMP) || \
00601                                ((FLAG) == ADC_FLAG_EOC) || ((FLAG) == ADC_FLAG_EOS) || \
00602                                ((FLAG) == ADC_FLAG_OVR) || ((FLAG) == ADC_FLAG_JEOC) || \
00603                                ((FLAG) == ADC_FLAG_JEOS) || ((FLAG) == ADC_FLAG_AWD1) || \
00604                                ((FLAG) == ADC_FLAG_AWD2) || ((FLAG) == ADC_FLAG_AWD3) || \
00605                                ((FLAG) == ADC_FLAG_JQOVF))
00606 /**
00607   * @}
00608   */
00609 
00610 /** @defgroup ADC_Common_flags_definition 
00611   * @{
00612   */
00613   
00614 #define ADC_FLAG_MSTRDY           ((uint32_t)0x00000001)  /*!< ADC Master Ready (ADRDY) flag */
00615 #define ADC_FLAG_MSTEOSMP         ((uint32_t)0x00000002)  /*!< ADC Master End of Sampling flag */
00616 #define ADC_FLAG_MSTEOC           ((uint32_t)0x00000004)  /*!< ADC Master End of Regular Conversion flag */
00617 #define ADC_FLAG_MSTEOS           ((uint32_t)0x00000008)  /*!< ADC Master End of Regular sequence of Conversions flag */
00618 #define ADC_FLAG_MSTOVR           ((uint32_t)0x00000010)  /*!< ADC Master overrun flag */
00619 #define ADC_FLAG_MSTJEOC          ((uint32_t)0x00000020)  /*!< ADC Master End of Injected Conversion flag */
00620 #define ADC_FLAG_MSTJEOS          ((uint32_t)0x00000040)  /*!< ADC Master End of Injected sequence of Conversions flag */
00621 #define ADC_FLAG_MSTAWD1          ((uint32_t)0x00000080)  /*!< ADC Master Analog watchdog 1 flag */
00622 #define ADC_FLAG_MSTAWD2          ((uint32_t)0x00000100)  /*!< ADC Master Analog watchdog 2 flag */
00623 #define ADC_FLAG_MSTAWD3          ((uint32_t)0x00000200)  /*!< ADC Master Analog watchdog 3 flag */
00624 #define ADC_FLAG_MSTJQOVF         ((uint32_t)0x00000400)  /*!< ADC Master Injected Context Queue Overflow flag */
00625 
00626 #define ADC_FLAG_SLVRDY           ((uint32_t)0x00010000)  /*!< ADC Slave Ready (ADRDY) flag */
00627 #define ADC_FLAG_SLVEOSMP         ((uint32_t)0x00020000)  /*!< ADC Slave End of Sampling flag */
00628 #define ADC_FLAG_SLVEOC           ((uint32_t)0x00040000)  /*!< ADC Slave End of Regular Conversion flag */
00629 #define ADC_FLAG_SLVEOS           ((uint32_t)0x00080000)  /*!< ADC Slave End of Regular sequence of Conversions flag */
00630 #define ADC_FLAG_SLVOVR           ((uint32_t)0x00100000)  /*!< ADC Slave overrun flag */
00631 #define ADC_FLAG_SLVJEOC          ((uint32_t)0x00200000)  /*!< ADC Slave End of Injected Conversion flag */
00632 #define ADC_FLAG_SLVJEOS          ((uint32_t)0x00400000)  /*!< ADC Slave End of Injected sequence of Conversions flag */
00633 #define ADC_FLAG_SLVAWD1          ((uint32_t)0x00800000)  /*!< ADC Slave Analog watchdog 1 flag */
00634 #define ADC_FLAG_SLVAWD2          ((uint32_t)0x01000000)  /*!< ADC Slave Analog watchdog 2 flag */
00635 #define ADC_FLAG_SLVAWD3          ((uint32_t)0x02000000)  /*!< ADC Slave Analog watchdog 3 flag */
00636 #define ADC_FLAG_SLVJQOVF         ((uint32_t)0x04000000)  /*!< ADC Slave Injected Context Queue Overflow flag */
00637 
00638 #define IS_ADC_CLEAR_COMMONFLAG(FLAG) ((((FLAG) & (uint32_t)0xF800F800) == 0x0000) && ((FLAG) != 0x00000000))
00639 #define IS_ADC_GET_COMMONFLAG(FLAG) (((FLAG) == ADC_FLAG_MSTRDY) || ((FLAG) == ADC_FLAG_MSTEOSMP) || \
00640                                      ((FLAG) == ADC_FLAG_MSTEOC) || ((FLAG) == ADC_FLAG_MSTEOS) || \
00641                                      ((FLAG) == ADC_FLAG_MSTOVR) || ((FLAG) == ADC_FLAG_MSTEOS) || \
00642                                      ((FLAG) == ADC_FLAG_MSTJEOS) || ((FLAG) == ADC_FLAG_MSTAWD1) || \
00643                                      ((FLAG) == ADC_FLAG_MSTAWD2) || ((FLAG) == ADC_FLAG_MSTAWD3) || \
00644                                      ((FLAG) == ADC_FLAG_MSTJQOVF) || \
00645                                      ((FLAG) == ADC_FLAG_SLVRDY) || ((FLAG) == ADC_FLAG_SLVEOSMP) || \
00646                                      ((FLAG) == ADC_FLAG_SLVEOC) || ((FLAG) == ADC_FLAG_SLVEOS) || \
00647                                      ((FLAG) == ADC_FLAG_SLVOVR) || ((FLAG) == ADC_FLAG_SLVEOS) || \
00648                                      ((FLAG) == ADC_FLAG_SLVJEOS) || ((FLAG) == ADC_FLAG_SLVAWD1) || \
00649                                      ((FLAG) == ADC_FLAG_SLVAWD2) || ((FLAG) == ADC_FLAG_SLVAWD3) || \
00650                                      ((FLAG) == ADC_FLAG_SLVJQOVF))
00651 /**
00652   * @}
00653   */
00654 
00655 /** @defgroup ADC_thresholds 
00656   * @{
00657   */
00658 
00659 #define IS_ADC_THRESHOLD(THRESHOLD) ((THRESHOLD) <= 0xFFF)  
00660 
00661 /**
00662   * @}
00663   */
00664 
00665 /** @defgroup ADC_injected_offset 
00666   * @{
00667   */
00668 
00669 #define IS_ADC_OFFSET(OFFSET) ((OFFSET) <= 0xFFF)   
00670 
00671 /**
00672   * @}
00673   */
00674 
00675 /** @defgroup ADC_injected_length 
00676   * @{
00677   */
00678 
00679 #define IS_ADC_INJECTED_LENGTH(LENGTH) (((LENGTH) >= 0x1) && ((LENGTH) <= 0x4))
00680 
00681 /**
00682   * @}
00683   */
00684 
00685 
00686 /** @defgroup ADC_regular_length 
00687   * @{
00688   */
00689 
00690 #define IS_ADC_REGULAR_LENGTH(LENGTH) (((LENGTH) >= 0x1) && ((LENGTH) <= 0x10)) 
00691 /**
00692   * @}
00693   */
00694 
00695 /** @defgroup ADC_regular_discontinuous_mode_number 
00696   * @{
00697   */
00698 
00699 #define IS_ADC_REGULAR_DISC_NUMBER(NUMBER) (((NUMBER) >= 0x1) && ((NUMBER) <= 0x8))  
00700 
00701 /**
00702   * @}
00703   */
00704 
00705 /** @defgroup ADC_two_sampling_delay_number 
00706   * @{
00707   */
00708 #define IS_ADC_TWOSAMPLING_DELAY(DELAY) (((DELAY) <= 0xF))
00709 
00710 /**
00711   * @}
00712   */
00713 /**
00714   * @}
00715   */
00716 
00717 
00718 /* Exported macro ------------------------------------------------------------*/
00719 /* Exported functions ------------------------------------------------------- */ 
00720 
00721 /*  Function used to set the ADC configuration to the default reset state *****/
00722 void ADC_DeInit(ADC_TypeDef* ADCx); 
00723 
00724 /* Initialization and Configuration functions *********************************/
00725 void ADC_Init(ADC_TypeDef* ADCx, ADC_InitTypeDef* ADC_InitStruct);  
00726 void ADC_StructInit(ADC_InitTypeDef* ADC_InitStruct); 
00727 void ADC_InjectedInit(ADC_TypeDef* ADCx, ADC_InjectedInitTypeDef* ADC_InjectedInitStruct); 
00728 void ADC_InjectedStructInit(ADC_InjectedInitTypeDef* ADC_InjectedInitStruct);
00729 void ADC_CommonInit(ADC_TypeDef* ADCx, ADC_CommonInitTypeDef* ADC_CommonInitStruct);    
00730 void ADC_CommonStructInit(ADC_CommonInitTypeDef* ADC_CommonInitStruct);
00731 
00732 void ADC_Cmd(ADC_TypeDef* ADCx, FunctionalState NewState); 
00733 void ADC_StartCalibration(ADC_TypeDef* ADCx); 
00734 uint32_t ADC_GetCalibrationValue(ADC_TypeDef* ADCx);
00735 void ADC_SetCalibrationValue(ADC_TypeDef* ADCx, uint32_t ADC_Calibration);
00736 void ADC_SelectCalibrationMode(ADC_TypeDef* ADCx, uint32_t ADC_CalibrationMode); 
00737 FlagStatus ADC_GetCalibrationStatus(ADC_TypeDef* ADCx);
00738 void ADC_DisableCmd(ADC_TypeDef* ADCx); 
00739 FlagStatus ADC_GetDisableCmdStatus(ADC_TypeDef* ADCx); 
00740 void ADC_VoltageRegulatorCmd(ADC_TypeDef* ADCx, FunctionalState NewState);  
00741 void ADC_SelectDifferentialMode(ADC_TypeDef* ADCx, uint8_t ADC_Channel, FunctionalState NewState);
00742 void ADC_SelectQueueOfContextMode(ADC_TypeDef* ADCx, FunctionalState NewState);
00743 void ADC_AutoDelayCmd(ADC_TypeDef* ADCx, FunctionalState NewState); 
00744 
00745 /* Analog Watchdog configuration functions ************************************/
00746 void ADC_AnalogWatchdogCmd(ADC_TypeDef* ADCx, uint32_t ADC_AnalogWatchdog); 
00747 void ADC_AnalogWatchdog1ThresholdsConfig(ADC_TypeDef* ADCx, uint16_t HighThreshold, uint16_t LowThreshold); 
00748 void ADC_AnalogWatchdog2ThresholdsConfig(ADC_TypeDef* ADCx, uint8_t HighThreshold, uint8_t LowThreshold);   
00749 void ADC_AnalogWatchdog3ThresholdsConfig(ADC_TypeDef* ADCx, uint8_t HighThreshold, uint8_t LowThreshold);   
00750 void ADC_AnalogWatchdog1SingleChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel); 
00751 void ADC_AnalogWatchdog2SingleChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel);   
00752 void ADC_AnalogWatchdog3SingleChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel); 
00753 
00754 /* Temperature Sensor, Vrefint and Vbat management function */
00755 void ADC_TempSensorCmd(ADC_TypeDef* ADCx, FunctionalState NewState);  
00756 void ADC_VrefintCmd(ADC_TypeDef* ADCx, FunctionalState NewState); 
00757 void ADC_VbatCmd(ADC_TypeDef* ADCx, FunctionalState NewState); 
00758 
00759 /* Channels Configuration functions ***********************************/
00760 void ADC_RegularChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint8_t Rank, uint8_t ADC_SampleTime);
00761 void ADC_RegularChannelSequencerLengthConfig(ADC_TypeDef* ADCx, uint8_t SequencerLength); 
00762 void ADC_ExternalTriggerConfig(ADC_TypeDef* ADCx, uint16_t ADC_ExternalTrigConvEvent, uint16_t ADC_ExternalTrigEventEdge); 
00763  
00764 void ADC_StartConversion(ADC_TypeDef* ADCx);
00765 FlagStatus ADC_GetStartConversionStatus(ADC_TypeDef* ADCx);
00766 void ADC_StopConversion(ADC_TypeDef* ADCx);
00767 void ADC_DiscModeChannelCountConfig(ADC_TypeDef* ADCx, uint8_t Number); 
00768 void ADC_DiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState); 
00769 uint16_t ADC_GetConversionValue(ADC_TypeDef* ADCx);
00770 uint32_t ADC_GetDualModeConversionValue(ADC_TypeDef* ADCx);
00771 
00772 void ADC_SetChannelOffset1(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint16_t Offset);  
00773 void ADC_SetChannelOffset2(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint16_t Offset);  
00774 void ADC_SetChannelOffset3(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint16_t Offset);  
00775 void ADC_SetChannelOffset4(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint16_t Offset);  
00776 
00777 void ADC_ChannelOffset1Cmd(ADC_TypeDef* ADCx, FunctionalState NewState);  
00778 void ADC_ChannelOffset2Cmd(ADC_TypeDef* ADCx, FunctionalState NewState); 
00779 void ADC_ChannelOffset3Cmd(ADC_TypeDef* ADCx, FunctionalState NewState);  
00780 void ADC_ChannelOffset4Cmd(ADC_TypeDef* ADCx, FunctionalState NewState);  
00781 
00782 /* Regular Channels DMA Configuration functions *******************************/
00783 void ADC_DMACmd(ADC_TypeDef* ADCx, FunctionalState NewState); 
00784 void ADC_DMAConfig(ADC_TypeDef* ADCx, uint32_t ADC_DMAMode);  
00785 
00786 /* Injected channels Configuration functions **********************************/
00787 void ADC_InjectedChannelSampleTimeConfig(ADC_TypeDef* ADCx, uint8_t ADC_InjectedChannel, uint8_t ADC_SampleTime);
00788 void ADC_StartInjectedConversion(ADC_TypeDef* ADCx); 
00789 FlagStatus ADC_GetStartInjectedConversionStatus(ADC_TypeDef* ADCx); 
00790 void ADC_StopInjectedConversion(ADC_TypeDef* ADCx); 
00791 void ADC_AutoInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState); 
00792 void ADC_InjectedDiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState); 
00793 uint16_t ADC_GetInjectedConversionValue(ADC_TypeDef* ADCx, uint8_t ADC_InjectedChannel);  
00794 
00795 /* ADC Dual Modes Configuration functions *************************************/
00796 FlagStatus ADC_GetCommonFlagStatus(ADC_TypeDef* ADCx, uint32_t ADC_FLAG);
00797 void ADC_ClearCommonFlag(ADC_TypeDef* ADCx, uint32_t ADC_FLAG); 
00798 
00799 /* Interrupts and flags management functions **********************************/
00800 void ADC_ITConfig(ADC_TypeDef* ADCx, uint32_t ADC_IT, FunctionalState NewState); 
00801 FlagStatus ADC_GetFlagStatus(ADC_TypeDef* ADCx, uint32_t ADC_FLAG);
00802 void ADC_ClearFlag(ADC_TypeDef* ADCx, uint32_t ADC_FLAG); 
00803 ITStatus ADC_GetITStatus(ADC_TypeDef* ADCx, uint32_t ADC_IT);  
00804 void ADC_ClearITPendingBit(ADC_TypeDef* ADCx, uint32_t ADC_IT);  
00805 
00806 #ifdef __cplusplus
00807 }
00808 #endif
00809 
00810 #endif /*__STM32F30x_ADC_H */
00811 
00812 /**
00813   * @}
00814   */
00815 
00816 /**
00817   * @}
00818   */
00819 
00820 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/