Maor Tanami / mbed-rtos

Official mbed Real Time Operating System based on the RTX implementation of the CMSIS-RTOS API open standard.

Fork of mbed-rtos by mbed official

rtx/TARGET_CORTEX_A/rt_HAL_CM.h@118:4c105b8d7cae, 2016-05-23 (annotated)

Committer:
mbed_official
Date:
Mon May 23 11:00:15 2016 +0100
Revision:
118:4c105b8d7cae
Parent:
92:bc9729798a19 
Synchronized with git revision 821c492eb84a24748de5c05c17f7bd9380ca28ff



Full URL: https://github.com/mbedmicro/mbed/commit/821c492eb84a24748de5c05c17f7bd9380ca28ff/

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 48:e9a2c7cb57a4 1 /*----------------------------------------------------------------------------
mbed_official 48:e9a2c7cb57a4 2 * RL-ARM - RTX
mbed_official 48:e9a2c7cb57a4 3 *----------------------------------------------------------------------------
mbed_official 48:e9a2c7cb57a4 4 * Name: RT_HAL_CM.H
mbed_official 48:e9a2c7cb57a4 5 * Purpose: Hardware Abstraction Layer for Cortex-M definitions
mbed_official 92:bc9729798a19 6 * Rev.: V4.70
mbed_official 48:e9a2c7cb57a4 7 *----------------------------------------------------------------------------
mbed_official 48:e9a2c7cb57a4 8 *
mbed_official 92:bc9729798a19 9 * Copyright (c) 1999-2009 KEIL, 2009-2013 ARM Germany GmbH
mbed_official 48:e9a2c7cb57a4 10 * All rights reserved.
mbed_official 48:e9a2c7cb57a4 11 * Redistribution and use in source and binary forms, with or without
mbed_official 48:e9a2c7cb57a4 12 * modification, are permitted provided that the following conditions are met:
mbed_official 48:e9a2c7cb57a4 13 * - Redistributions of source code must retain the above copyright
mbed_official 48:e9a2c7cb57a4 14 * notice, this list of conditions and the following disclaimer.
mbed_official 48:e9a2c7cb57a4 15 * - Redistributions in binary form must reproduce the above copyright
mbed_official 48:e9a2c7cb57a4 16 * notice, this list of conditions and the following disclaimer in the
mbed_official 48:e9a2c7cb57a4 17 * documentation and/or other materials provided with the distribution.
mbed_official 68:d3d0e710b443 18 * - Neither the name of ARM nor the names of its contributors may be used
mbed_official 68:d3d0e710b443 19 * to endorse or promote products derived from this software without
mbed_official 48:e9a2c7cb57a4 20 * specific prior written permission.
mbed_official 48:e9a2c7cb57a4 21 *
mbed_official 68:d3d0e710b443 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 68:d3d0e710b443 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 48:e9a2c7cb57a4 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
mbed_official 48:e9a2c7cb57a4 25 * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
mbed_official 48:e9a2c7cb57a4 26 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
mbed_official 68:d3d0e710b443 27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
mbed_official 68:d3d0e710b443 28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
mbed_official 68:d3d0e710b443 29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
mbed_official 68:d3d0e710b443 30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
mbed_official 48:e9a2c7cb57a4 31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
mbed_official 48:e9a2c7cb57a4 32 * POSSIBILITY OF SUCH DAMAGE.
mbed_official 48:e9a2c7cb57a4 33 *---------------------------------------------------------------------------*/
mbed_official 48:e9a2c7cb57a4 34
mbed_official 48:e9a2c7cb57a4 35 /* Definitions */
mbed_official 48:e9a2c7cb57a4 36 #define INITIAL_xPSR 0x01000000
mbed_official 48:e9a2c7cb57a4 37 #define DEMCR_TRCENA 0x01000000
mbed_official 48:e9a2c7cb57a4 38 #define ITM_ITMENA 0x00000001
mbed_official 48:e9a2c7cb57a4 39 #define MAGIC_WORD 0xE25A2EA5
mbed_official 48:e9a2c7cb57a4 40
mbed_official 48:e9a2c7cb57a4 41 #if defined (__CC_ARM) /* ARM Compiler */
mbed_official 48:e9a2c7cb57a4 42
mbed_official 92:bc9729798a19 43 #if ((__TARGET_ARCH_7_M || __TARGET_ARCH_7E_M) && !defined(NO_EXCLUSIVE_ACCESS))
mbed_official 48:e9a2c7cb57a4 44 #define __USE_EXCLUSIVE_ACCESS
mbed_official 48:e9a2c7cb57a4 45 #else
mbed_official 48:e9a2c7cb57a4 46 #undef __USE_EXCLUSIVE_ACCESS
mbed_official 48:e9a2c7cb57a4 47 #endif
mbed_official 48:e9a2c7cb57a4 48
mbed_official 48:e9a2c7cb57a4 49 #elif defined (__GNUC__) /* GNU Compiler */
mbed_official 48:e9a2c7cb57a4 50
mbed_official 48:e9a2c7cb57a4 51 #undef __USE_EXCLUSIVE_ACCESS
mbed_official 48:e9a2c7cb57a4 52
mbed_official 48:e9a2c7cb57a4 53 #if defined (__CORTEX_M0)
mbed_official 48:e9a2c7cb57a4 54 #define __TARGET_ARCH_6S_M 1
mbed_official 48:e9a2c7cb57a4 55 #else
mbed_official 48:e9a2c7cb57a4 56 #define __TARGET_ARCH_6S_M 0
mbed_official 48:e9a2c7cb57a4 57 #endif
mbed_official 48:e9a2c7cb57a4 58
mbed_official 48:e9a2c7cb57a4 59 #if defined (__VFP_FP__) && !defined(__SOFTFP__)
mbed_official 48:e9a2c7cb57a4 60 #define __TARGET_FPU_VFP 1
mbed_official 48:e9a2c7cb57a4 61 #else
mbed_official 48:e9a2c7cb57a4 62 #define __TARGET_FPU_VFP 0
mbed_official 48:e9a2c7cb57a4 63 #endif
mbed_official 48:e9a2c7cb57a4 64
mbed_official 48:e9a2c7cb57a4 65 #define __inline inline
mbed_official 48:e9a2c7cb57a4 66 #define __weak __attribute__((weak))
mbed_official 48:e9a2c7cb57a4 67
mbed_official 48:e9a2c7cb57a4 68 #ifndef __CMSIS_GENERIC
mbed_official 48:e9a2c7cb57a4 69
mbed_official 48:e9a2c7cb57a4 70 __attribute__((always_inline)) static inline void __enable_irq(void)
mbed_official 48:e9a2c7cb57a4 71 {
mbed_official 48:e9a2c7cb57a4 72 __asm volatile ("cpsie i");
mbed_official 48:e9a2c7cb57a4 73 }
mbed_official 48:e9a2c7cb57a4 74
mbed_official 48:e9a2c7cb57a4 75 __attribute__((always_inline)) static inline U32 __disable_irq(void)
mbed_official 48:e9a2c7cb57a4 76 {
mbed_official 48:e9a2c7cb57a4 77 U32 result;
mbed_official 48:e9a2c7cb57a4 78
mbed_official 48:e9a2c7cb57a4 79 __asm volatile ("mrs %0, primask" : "=r" (result));
mbed_official 48:e9a2c7cb57a4 80 __asm volatile ("cpsid i");
mbed_official 48:e9a2c7cb57a4 81 return(result & 1);
mbed_official 48:e9a2c7cb57a4 82 }
mbed_official 48:e9a2c7cb57a4 83
mbed_official 48:e9a2c7cb57a4 84 #endif
mbed_official 48:e9a2c7cb57a4 85
mbed_official 48:e9a2c7cb57a4 86 __attribute__(( always_inline)) static inline U8 __clz(U32 value)
mbed_official 48:e9a2c7cb57a4 87 {
mbed_official 48:e9a2c7cb57a4 88 U8 result;
mbed_official 68:d3d0e710b443 89
mbed_official 48:e9a2c7cb57a4 90 __asm volatile ("clz %0, %1" : "=r" (result) : "r" (value));
mbed_official 48:e9a2c7cb57a4 91 return(result);
mbed_official 48:e9a2c7cb57a4 92 }
mbed_official 48:e9a2c7cb57a4 93
mbed_official 48:e9a2c7cb57a4 94 #elif defined (__ICCARM__) /* IAR Compiler */
mbed_official 48:e9a2c7cb57a4 95
mbed_official 48:e9a2c7cb57a4 96 #undef __USE_EXCLUSIVE_ACCESS
mbed_official 48:e9a2c7cb57a4 97
mbed_official 48:e9a2c7cb57a4 98 #if (__CORE__ == __ARM6M__)
mbed_official 48:e9a2c7cb57a4 99 #define __TARGET_ARCH_6S_M 1
mbed_official 48:e9a2c7cb57a4 100 #else
mbed_official 48:e9a2c7cb57a4 101 #define __TARGET_ARCH_6S_M 0
mbed_official 48:e9a2c7cb57a4 102 #endif
mbed_official 48:e9a2c7cb57a4 103
mbed_official 48:e9a2c7cb57a4 104 #if defined __ARMVFP__
mbed_official 48:e9a2c7cb57a4 105 #define __TARGET_FPU_VFP 1
mbed_official 48:e9a2c7cb57a4 106 #else
mbed_official 48:e9a2c7cb57a4 107 #define __TARGET_FPU_VFP 0
mbed_official 48:e9a2c7cb57a4 108 #endif
mbed_official 48:e9a2c7cb57a4 109
mbed_official 48:e9a2c7cb57a4 110 #define __inline inline
mbed_official 48:e9a2c7cb57a4 111
mbed_official 48:e9a2c7cb57a4 112 #ifndef __CMSIS_GENERIC
mbed_official 48:e9a2c7cb57a4 113
mbed_official 48:e9a2c7cb57a4 114 static inline void __enable_irq(void)
mbed_official 48:e9a2c7cb57a4 115 {
mbed_official 48:e9a2c7cb57a4 116 __asm volatile ("cpsie i");
mbed_official 48:e9a2c7cb57a4 117 }
mbed_official 48:e9a2c7cb57a4 118
mbed_official 48:e9a2c7cb57a4 119 static inline U32 __disable_irq(void)
mbed_official 48:e9a2c7cb57a4 120 {
mbed_official 48:e9a2c7cb57a4 121 U32 result;
mbed_official 68:d3d0e710b443 122
mbed_official 48:e9a2c7cb57a4 123 __asm volatile ("mrs %0, primask" : "=r" (result));
mbed_official 48:e9a2c7cb57a4 124 __asm volatile ("cpsid i");
mbed_official 48:e9a2c7cb57a4 125 return(result & 1);
mbed_official 48:e9a2c7cb57a4 126 }
mbed_official 48:e9a2c7cb57a4 127
mbed_official 48:e9a2c7cb57a4 128 #endif
mbed_official 48:e9a2c7cb57a4 129
mbed_official 48:e9a2c7cb57a4 130 static inline U8 __clz(U32 value)
mbed_official 48:e9a2c7cb57a4 131 {
mbed_official 48:e9a2c7cb57a4 132 U8 result;
mbed_official 68:d3d0e710b443 133
mbed_official 48:e9a2c7cb57a4 134 __asm volatile ("clz %0, %1" : "=r" (result) : "r" (value));
mbed_official 48:e9a2c7cb57a4 135 return(result);
mbed_official 48:e9a2c7cb57a4 136 }
mbed_official 48:e9a2c7cb57a4 137
mbed_official 48:e9a2c7cb57a4 138 #endif
mbed_official 48:e9a2c7cb57a4 139
mbed_official 48:e9a2c7cb57a4 140 /* NVIC registers */
mbed_official 48:e9a2c7cb57a4 141 #define NVIC_ST_CTRL (*((volatile U32 *)0xE000E010))
mbed_official 48:e9a2c7cb57a4 142 #define NVIC_ST_RELOAD (*((volatile U32 *)0xE000E014))
mbed_official 48:e9a2c7cb57a4 143 #define NVIC_ST_CURRENT (*((volatile U32 *)0xE000E018))
mbed_official 48:e9a2c7cb57a4 144 #define NVIC_ISER ((volatile U32 *)0xE000E100)
mbed_official 48:e9a2c7cb57a4 145 #define NVIC_ICER ((volatile U32 *)0xE000E180)
mbed_official 48:e9a2c7cb57a4 146 #if (__TARGET_ARCH_6S_M)
mbed_official 48:e9a2c7cb57a4 147 #define NVIC_IP ((volatile U32 *)0xE000E400)
mbed_official 48:e9a2c7cb57a4 148 #else
mbed_official 48:e9a2c7cb57a4 149 #define NVIC_IP ((volatile U8 *)0xE000E400)
mbed_official 48:e9a2c7cb57a4 150 #endif
mbed_official 48:e9a2c7cb57a4 151 #define NVIC_INT_CTRL (*((volatile U32 *)0xE000ED04))
mbed_official 48:e9a2c7cb57a4 152 #define NVIC_AIR_CTRL (*((volatile U32 *)0xE000ED0C))
mbed_official 48:e9a2c7cb57a4 153 #define NVIC_SYS_PRI2 (*((volatile U32 *)0xE000ED1C))
mbed_official 48:e9a2c7cb57a4 154 #define NVIC_SYS_PRI3 (*((volatile U32 *)0xE000ED20))
mbed_official 48:e9a2c7cb57a4 155
mbed_official 48:e9a2c7cb57a4 156 #define OS_PEND_IRQ() NVIC_INT_CTRL = (1<<28)
mbed_official 48:e9a2c7cb57a4 157 #define OS_PENDING ((NVIC_INT_CTRL >> 26) & (1<<2 | 1))
mbed_official 48:e9a2c7cb57a4 158 #define OS_UNPEND(fl) NVIC_INT_CTRL = (*fl = OS_PENDING) << 25
mbed_official 48:e9a2c7cb57a4 159 #define OS_PEND(fl,p) NVIC_INT_CTRL = (fl | p<<2) << 26
mbed_official 48:e9a2c7cb57a4 160 #define OS_LOCK() NVIC_ST_CTRL = 0x0005
mbed_official 48:e9a2c7cb57a4 161 #define OS_UNLOCK() NVIC_ST_CTRL = 0x0007
mbed_official 48:e9a2c7cb57a4 162
mbed_official 48:e9a2c7cb57a4 163 #define OS_X_PENDING ((NVIC_INT_CTRL >> 28) & 1)
mbed_official 48:e9a2c7cb57a4 164 #define OS_X_UNPEND(fl) NVIC_INT_CTRL = (*fl = OS_X_PENDING) << 27
mbed_official 48:e9a2c7cb57a4 165 #define OS_X_PEND(fl,p) NVIC_INT_CTRL = (fl | p) << 28
mbed_official 48:e9a2c7cb57a4 166 #if (__TARGET_ARCH_6S_M)
mbed_official 48:e9a2c7cb57a4 167 #define OS_X_INIT(n) NVIC_IP[n>>2] |= 0xFF << (8*(n & 0x03)); \
mbed_official 48:e9a2c7cb57a4 168 NVIC_ISER[n>>5] = 1 << (n & 0x1F)
mbed_official 48:e9a2c7cb57a4 169 #else
mbed_official 48:e9a2c7cb57a4 170 #define OS_X_INIT(n) NVIC_IP[n] = 0xFF; \
mbed_official 48:e9a2c7cb57a4 171 NVIC_ISER[n>>5] = 1 << (n & 0x1F)
mbed_official 48:e9a2c7cb57a4 172 #endif
mbed_official 48:e9a2c7cb57a4 173 #define OS_X_LOCK(n) NVIC_ICER[n>>5] = 1 << (n & 0x1F)
mbed_official 48:e9a2c7cb57a4 174 #define OS_X_UNLOCK(n) NVIC_ISER[n>>5] = 1 << (n & 0x1F)
mbed_official 48:e9a2c7cb57a4 175
mbed_official 48:e9a2c7cb57a4 176 /* Core Debug registers */
mbed_official 48:e9a2c7cb57a4 177 #define DEMCR (*((volatile U32 *)0xE000EDFC))
mbed_official 48:e9a2c7cb57a4 178
mbed_official 48:e9a2c7cb57a4 179 /* ITM registers */
mbed_official 48:e9a2c7cb57a4 180 #define ITM_CONTROL (*((volatile U32 *)0xE0000E80))
mbed_official 48:e9a2c7cb57a4 181 #define ITM_ENABLE (*((volatile U32 *)0xE0000E00))
mbed_official 48:e9a2c7cb57a4 182 #define ITM_PORT30_U32 (*((volatile U32 *)0xE0000078))
mbed_official 48:e9a2c7cb57a4 183 #define ITM_PORT31_U32 (*((volatile U32 *)0xE000007C))
mbed_official 48:e9a2c7cb57a4 184 #define ITM_PORT31_U16 (*((volatile U16 *)0xE000007C))
mbed_official 48:e9a2c7cb57a4 185 #define ITM_PORT31_U8 (*((volatile U8 *)0xE000007C))
mbed_official 48:e9a2c7cb57a4 186
mbed_official 48:e9a2c7cb57a4 187 /* Variables */
mbed_official 48:e9a2c7cb57a4 188 extern BIT dbg_msg;
mbed_official 48:e9a2c7cb57a4 189
mbed_official 48:e9a2c7cb57a4 190 /* Functions */
mbed_official 48:e9a2c7cb57a4 191 #ifdef __USE_EXCLUSIVE_ACCESS
mbed_official 48:e9a2c7cb57a4 192 #define rt_inc(p) while(__strex((__ldrex(p)+1),p))
mbed_official 48:e9a2c7cb57a4 193 #define rt_dec(p) while(__strex((__ldrex(p)-1),p))
mbed_official 48:e9a2c7cb57a4 194 #else
mbed_official 48:e9a2c7cb57a4 195 #define rt_inc(p) __disable_irq();(*p)++;__enable_irq();
mbed_official 48:e9a2c7cb57a4 196 #define rt_dec(p) __disable_irq();(*p)--;__enable_irq();
mbed_official 48:e9a2c7cb57a4 197 #endif
mbed_official 48:e9a2c7cb57a4 198
mbed_official 48:e9a2c7cb57a4 199 __inline static U32 rt_inc_qi (U32 size, U8 *count, U8 *first) {
mbed_official 48:e9a2c7cb57a4 200 U32 cnt,c2;
mbed_official 48:e9a2c7cb57a4 201 #ifdef __USE_EXCLUSIVE_ACCESS
mbed_official 48:e9a2c7cb57a4 202 do {
mbed_official 48:e9a2c7cb57a4 203 if ((cnt = __ldrex(count)) == size) {
mbed_official 48:e9a2c7cb57a4 204 __clrex();
mbed_official 48:e9a2c7cb57a4 205 return (cnt); }
mbed_official 48:e9a2c7cb57a4 206 } while (__strex(cnt+1, count));
mbed_official 48:e9a2c7cb57a4 207 do {
mbed_official 48:e9a2c7cb57a4 208 c2 = (cnt = __ldrex(first)) + 1;
mbed_official 48:e9a2c7cb57a4 209 if (c2 == size) c2 = 0;
mbed_official 48:e9a2c7cb57a4 210 } while (__strex(c2, first));
mbed_official 48:e9a2c7cb57a4 211 #else
mbed_official 48:e9a2c7cb57a4 212 __disable_irq();
mbed_official 48:e9a2c7cb57a4 213 if ((cnt = *count) < size) {
mbed_official 48:e9a2c7cb57a4 214 *count = cnt+1;
mbed_official 48:e9a2c7cb57a4 215 c2 = (cnt = *first) + 1;
mbed_official 48:e9a2c7cb57a4 216 if (c2 == size) c2 = 0;
mbed_official 68:d3d0e710b443 217 *first = c2;
mbed_official 48:e9a2c7cb57a4 218 }
mbed_official 48:e9a2c7cb57a4 219 __enable_irq ();
mbed_official 48:e9a2c7cb57a4 220 #endif
mbed_official 48:e9a2c7cb57a4 221 return (cnt);
mbed_official 48:e9a2c7cb57a4 222 }
mbed_official 48:e9a2c7cb57a4 223
mbed_official 48:e9a2c7cb57a4 224 __inline static void rt_systick_init (void) {
mbed_official 48:e9a2c7cb57a4 225 NVIC_ST_RELOAD = os_trv;
mbed_official 48:e9a2c7cb57a4 226 NVIC_ST_CURRENT = 0;
mbed_official 48:e9a2c7cb57a4 227 NVIC_ST_CTRL = 0x0007;
mbed_official 48:e9a2c7cb57a4 228 NVIC_SYS_PRI3 |= 0xFF000000;
mbed_official 48:e9a2c7cb57a4 229 }
mbed_official 48:e9a2c7cb57a4 230
mbed_official 92:bc9729798a19 231 __inline static U32 rt_systick_val (void) {
mbed_official 92:bc9729798a19 232 return (os_trv - NVIC_ST_CURRENT);
mbed_official 92:bc9729798a19 233 }
mbed_official 92:bc9729798a19 234
mbed_official 92:bc9729798a19 235 __inline static U32 rt_systick_ovf (void) {
mbed_official 92:bc9729798a19 236 return ((NVIC_INT_CTRL >> 26) & 1);
mbed_official 92:bc9729798a19 237 }
mbed_official 92:bc9729798a19 238
mbed_official 48:e9a2c7cb57a4 239 __inline static void rt_svc_init (void) {
mbed_official 48:e9a2c7cb57a4 240 #if !(__TARGET_ARCH_6S_M)
mbed_official 48:e9a2c7cb57a4 241 int sh,prigroup;
mbed_official 48:e9a2c7cb57a4 242 #endif
mbed_official 48:e9a2c7cb57a4 243 NVIC_SYS_PRI3 |= 0x00FF0000;
mbed_official 48:e9a2c7cb57a4 244 #if (__TARGET_ARCH_6S_M)
mbed_official 48:e9a2c7cb57a4 245 NVIC_SYS_PRI2 |= (NVIC_SYS_PRI3<<(8+1)) & 0xFC000000;
mbed_official 48:e9a2c7cb57a4 246 #else
mbed_official 48:e9a2c7cb57a4 247 sh = 8 - __clz (~((NVIC_SYS_PRI3 << 8) & 0xFF000000));
mbed_official 48:e9a2c7cb57a4 248 prigroup = ((NVIC_AIR_CTRL >> 8) & 0x07);
mbed_official 48:e9a2c7cb57a4 249 if (prigroup >= sh) {
mbed_official 48:e9a2c7cb57a4 250 sh = prigroup + 1;
mbed_official 48:e9a2c7cb57a4 251 }
mbed_official 48:e9a2c7cb57a4 252 NVIC_SYS_PRI2 = ((0xFEFFFFFF << sh) & 0xFF000000) | (NVIC_SYS_PRI2 & 0x00FFFFFF);
mbed_official 48:e9a2c7cb57a4 253 #endif
mbed_official 48:e9a2c7cb57a4 254 }
mbed_official 48:e9a2c7cb57a4 255
mbed_official 48:e9a2c7cb57a4 256 extern void rt_set_PSP (U32 stack);
mbed_official 48:e9a2c7cb57a4 257 extern U32 rt_get_PSP (void);
mbed_official 48:e9a2c7cb57a4 258 extern void os_set_env (void);
mbed_official 48:e9a2c7cb57a4 259 extern void *_alloc_box (void *box_mem);
mbed_official 48:e9a2c7cb57a4 260 extern int _free_box (void *box_mem, void *box);
mbed_official 48:e9a2c7cb57a4 261
mbed_official 48:e9a2c7cb57a4 262 extern void rt_init_stack (P_TCB p_TCB, FUNCP task_body);
mbed_official 48:e9a2c7cb57a4 263 extern void rt_ret_val (P_TCB p_TCB, U32 v0);
mbed_official 48:e9a2c7cb57a4 264 extern void rt_ret_val2 (P_TCB p_TCB, U32 v0, U32 v1);
mbed_official 48:e9a2c7cb57a4 265
mbed_official 48:e9a2c7cb57a4 266 extern void dbg_init (void);
mbed_official 48:e9a2c7cb57a4 267 extern void dbg_task_notify (P_TCB p_tcb, BOOL create);
mbed_official 48:e9a2c7cb57a4 268 extern void dbg_task_switch (U32 task_id);
mbed_official 48:e9a2c7cb57a4 269
mbed_official 48:e9a2c7cb57a4 270 #ifdef DBG_MSG
mbed_official 48:e9a2c7cb57a4 271 #define DBG_INIT() dbg_init()
mbed_official 48:e9a2c7cb57a4 272 #define DBG_TASK_NOTIFY(p_tcb,create) if (dbg_msg) dbg_task_notify(p_tcb,create)
mbed_official 92:bc9729798a19 273 #define DBG_TASK_SWITCH(task_id) if (dbg_msg && (os_tsk.new_tsk!=os_tsk.run)) \
mbed_official 48:e9a2c7cb57a4 274 dbg_task_switch(task_id)
mbed_official 48:e9a2c7cb57a4 275 #else
mbed_official 48:e9a2c7cb57a4 276 #define DBG_INIT()
mbed_official 48:e9a2c7cb57a4 277 #define DBG_TASK_NOTIFY(p_tcb,create)
mbed_official 48:e9a2c7cb57a4 278 #define DBG_TASK_SWITCH(task_id)
mbed_official 48:e9a2c7cb57a4 279 #endif
mbed_official 48:e9a2c7cb57a4 280
mbed_official 48:e9a2c7cb57a4 281 /*----------------------------------------------------------------------------
mbed_official 48:e9a2c7cb57a4 282 * end of file
mbed_official 48:e9a2c7cb57a4 283 *---------------------------------------------------------------------------*/
mbed_official 48:e9a2c7cb57a4 284