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targets/cmsis/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32LG_STK3600/efm32lg_ebi.h@0:9b334a45a8ff, 2015-10-01 (annotated)

Committer:
bogdanm
Date:
Thu Oct 01 15:25:22 2015 +0300
Revision:
0:9b334a45a8ff
Child:
50:a417edff4437
Initial commit on mbed-dev



Replaces mbed-src (now inactive)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /**************************************************************************//**
bogdanm 0:9b334a45a8ff 2 * @file efm32lg_ebi.h
bogdanm 0:9b334a45a8ff 3 * @brief EFM32LG_EBI register and bit field definitions
bogdanm 0:9b334a45a8ff 4 * @version 3.20.6
bogdanm 0:9b334a45a8ff 5 ******************************************************************************
bogdanm 0:9b334a45a8ff 6 * @section License
bogdanm 0:9b334a45a8ff 7 * <b>(C) Copyright 2014 Silicon Laboratories, Inc. http://www.silabs.com</b>
bogdanm 0:9b334a45a8ff 8 ******************************************************************************
bogdanm 0:9b334a45a8ff 9 *
bogdanm 0:9b334a45a8ff 10 * Permission is granted to anyone to use this software for any purpose,
bogdanm 0:9b334a45a8ff 11 * including commercial applications, and to alter it and redistribute it
bogdanm 0:9b334a45a8ff 12 * freely, subject to the following restrictions:
bogdanm 0:9b334a45a8ff 13 *
bogdanm 0:9b334a45a8ff 14 * 1. The origin of this software must not be misrepresented; you must not
bogdanm 0:9b334a45a8ff 15 * claim that you wrote the original software.@n
bogdanm 0:9b334a45a8ff 16 * 2. Altered source versions must be plainly marked as such, and must not be
bogdanm 0:9b334a45a8ff 17 * misrepresented as being the original software.@n
bogdanm 0:9b334a45a8ff 18 * 3. This notice may not be removed or altered from any source distribution.
bogdanm 0:9b334a45a8ff 19 *
bogdanm 0:9b334a45a8ff 20 * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Laboratories, Inc.
bogdanm 0:9b334a45a8ff 21 * has no obligation to support this Software. Silicon Laboratories, Inc. is
bogdanm 0:9b334a45a8ff 22 * providing the Software "AS IS", with no express or implied warranties of any
bogdanm 0:9b334a45a8ff 23 * kind, including, but not limited to, any implied warranties of
bogdanm 0:9b334a45a8ff 24 * merchantability or fitness for any particular purpose or warranties against
bogdanm 0:9b334a45a8ff 25 * infringement of any proprietary rights of a third party.
bogdanm 0:9b334a45a8ff 26 *
bogdanm 0:9b334a45a8ff 27 * Silicon Laboratories, Inc. will not be liable for any consequential,
bogdanm 0:9b334a45a8ff 28 * incidental, or special damages, or any other relief, or for any claim by
bogdanm 0:9b334a45a8ff 29 * any third party, arising from your use of this Software.
bogdanm 0:9b334a45a8ff 30 *
bogdanm 0:9b334a45a8ff 31 *****************************************************************************/
bogdanm 0:9b334a45a8ff 32 /**************************************************************************//**
bogdanm 0:9b334a45a8ff 33 * @defgroup EFM32LG_EBI
bogdanm 0:9b334a45a8ff 34 * @{
bogdanm 0:9b334a45a8ff 35 * @brief EFM32LG_EBI Register Declaration
bogdanm 0:9b334a45a8ff 36 *****************************************************************************/
bogdanm 0:9b334a45a8ff 37 typedef struct
bogdanm 0:9b334a45a8ff 38 {
bogdanm 0:9b334a45a8ff 39 __IO uint32_t CTRL; /**< Control Register */
bogdanm 0:9b334a45a8ff 40 __IO uint32_t ADDRTIMING; /**< Address Timing Register */
bogdanm 0:9b334a45a8ff 41 __IO uint32_t RDTIMING; /**< Read Timing Register */
bogdanm 0:9b334a45a8ff 42 __IO uint32_t WRTIMING; /**< Write Timing Register */
bogdanm 0:9b334a45a8ff 43 __IO uint32_t POLARITY; /**< Polarity Register */
bogdanm 0:9b334a45a8ff 44 __IO uint32_t ROUTE; /**< I/O Routing Register */
bogdanm 0:9b334a45a8ff 45 __IO uint32_t ADDRTIMING1; /**< Address Timing Register 1 */
bogdanm 0:9b334a45a8ff 46 __IO uint32_t RDTIMING1; /**< Read Timing Register 1 */
bogdanm 0:9b334a45a8ff 47 __IO uint32_t WRTIMING1; /**< Write Timing Register 1 */
bogdanm 0:9b334a45a8ff 48 __IO uint32_t POLARITY1; /**< Polarity Register 1 */
bogdanm 0:9b334a45a8ff 49 __IO uint32_t ADDRTIMING2; /**< Address Timing Register 2 */
bogdanm 0:9b334a45a8ff 50 __IO uint32_t RDTIMING2; /**< Read Timing Register 2 */
bogdanm 0:9b334a45a8ff 51 __IO uint32_t WRTIMING2; /**< Write Timing Register 2 */
bogdanm 0:9b334a45a8ff 52 __IO uint32_t POLARITY2; /**< Polarity Register 2 */
bogdanm 0:9b334a45a8ff 53 __IO uint32_t ADDRTIMING3; /**< Address Timing Register 3 */
bogdanm 0:9b334a45a8ff 54 __IO uint32_t RDTIMING3; /**< Read Timing Register 3 */
bogdanm 0:9b334a45a8ff 55 __IO uint32_t WRTIMING3; /**< Write Timing Register 3 */
bogdanm 0:9b334a45a8ff 56 __IO uint32_t POLARITY3; /**< Polarity Register 3 */
bogdanm 0:9b334a45a8ff 57 __IO uint32_t PAGECTRL; /**< Page Control Register */
bogdanm 0:9b334a45a8ff 58 __IO uint32_t NANDCTRL; /**< NAND Control Register */
bogdanm 0:9b334a45a8ff 59 __IO uint32_t CMD; /**< Command Register */
bogdanm 0:9b334a45a8ff 60 __I uint32_t STATUS; /**< Status Register */
bogdanm 0:9b334a45a8ff 61 __I uint32_t ECCPARITY; /**< ECC Parity register */
bogdanm 0:9b334a45a8ff 62 __IO uint32_t TFTCTRL; /**< TFT Control Register */
bogdanm 0:9b334a45a8ff 63 __I uint32_t TFTSTATUS; /**< TFT Status Register */
bogdanm 0:9b334a45a8ff 64 __IO uint32_t TFTFRAMEBASE; /**< TFT Frame Base Register */
bogdanm 0:9b334a45a8ff 65 __IO uint32_t TFTSTRIDE; /**< TFT Stride Register */
bogdanm 0:9b334a45a8ff 66 __IO uint32_t TFTSIZE; /**< TFT Size Register */
bogdanm 0:9b334a45a8ff 67 __IO uint32_t TFTHPORCH; /**< TFT Horizontal Porch Register */
bogdanm 0:9b334a45a8ff 68 __IO uint32_t TFTVPORCH; /**< TFT Vertical Porch Register */
bogdanm 0:9b334a45a8ff 69 __IO uint32_t TFTTIMING; /**< TFT Timing Register */
bogdanm 0:9b334a45a8ff 70 __IO uint32_t TFTPOLARITY; /**< TFT Polarity Register */
bogdanm 0:9b334a45a8ff 71 __IO uint32_t TFTDD; /**< TFT Direct Drive Data Register */
bogdanm 0:9b334a45a8ff 72 __IO uint32_t TFTALPHA; /**< TFT Alpha Blending Register */
bogdanm 0:9b334a45a8ff 73 __IO uint32_t TFTPIXEL0; /**< TFT Pixel 0 Register */
bogdanm 0:9b334a45a8ff 74 __IO uint32_t TFTPIXEL1; /**< TFT Pixel 1 Register */
bogdanm 0:9b334a45a8ff 75 __I uint32_t TFTPIXEL; /**< TFT Alpha Blending Result Pixel Register */
bogdanm 0:9b334a45a8ff 76 __IO uint32_t TFTMASK; /**< TFT Masking Register */
bogdanm 0:9b334a45a8ff 77 __I uint32_t IF; /**< Interrupt Flag Register */
bogdanm 0:9b334a45a8ff 78 __IO uint32_t IFS; /**< Interrupt Flag Set Register */
bogdanm 0:9b334a45a8ff 79 __IO uint32_t IFC; /**< Interrupt Flag Clear Register */
bogdanm 0:9b334a45a8ff 80 __IO uint32_t IEN; /**< Interrupt Enable Register */
bogdanm 0:9b334a45a8ff 81 } EBI_TypeDef; /** @} */
bogdanm 0:9b334a45a8ff 82
bogdanm 0:9b334a45a8ff 83 /**************************************************************************//**
bogdanm 0:9b334a45a8ff 84 * @defgroup EFM32LG_EBI_BitFields
bogdanm 0:9b334a45a8ff 85 * @{
bogdanm 0:9b334a45a8ff 86 *****************************************************************************/
bogdanm 0:9b334a45a8ff 87
bogdanm 0:9b334a45a8ff 88 /* Bit fields for EBI CTRL */
bogdanm 0:9b334a45a8ff 89 #define _EBI_CTRL_RESETVALUE 0x00000000UL /**< Default value for EBI_CTRL */
bogdanm 0:9b334a45a8ff 90 #define _EBI_CTRL_MASK 0xCFFFFFFFUL /**< Mask for EBI_CTRL */
bogdanm 0:9b334a45a8ff 91 #define _EBI_CTRL_MODE_SHIFT 0 /**< Shift value for EBI_MODE */
bogdanm 0:9b334a45a8ff 92 #define _EBI_CTRL_MODE_MASK 0x3UL /**< Bit mask for EBI_MODE */
bogdanm 0:9b334a45a8ff 93 #define _EBI_CTRL_MODE_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_CTRL */
bogdanm 0:9b334a45a8ff 94 #define _EBI_CTRL_MODE_D8A8 0x00000000UL /**< Mode D8A8 for EBI_CTRL */
bogdanm 0:9b334a45a8ff 95 #define _EBI_CTRL_MODE_D16A16ALE 0x00000001UL /**< Mode D16A16ALE for EBI_CTRL */
bogdanm 0:9b334a45a8ff 96 #define _EBI_CTRL_MODE_D8A24ALE 0x00000002UL /**< Mode D8A24ALE for EBI_CTRL */
bogdanm 0:9b334a45a8ff 97 #define _EBI_CTRL_MODE_D16 0x00000003UL /**< Mode D16 for EBI_CTRL */
bogdanm 0:9b334a45a8ff 98 #define EBI_CTRL_MODE_DEFAULT (_EBI_CTRL_MODE_DEFAULT << 0) /**< Shifted mode DEFAULT for EBI_CTRL */
bogdanm 0:9b334a45a8ff 99 #define EBI_CTRL_MODE_D8A8 (_EBI_CTRL_MODE_D8A8 << 0) /**< Shifted mode D8A8 for EBI_CTRL */
bogdanm 0:9b334a45a8ff 100 #define EBI_CTRL_MODE_D16A16ALE (_EBI_CTRL_MODE_D16A16ALE << 0) /**< Shifted mode D16A16ALE for EBI_CTRL */
bogdanm 0:9b334a45a8ff 101 #define EBI_CTRL_MODE_D8A24ALE (_EBI_CTRL_MODE_D8A24ALE << 0) /**< Shifted mode D8A24ALE for EBI_CTRL */
bogdanm 0:9b334a45a8ff 102 #define EBI_CTRL_MODE_D16 (_EBI_CTRL_MODE_D16 << 0) /**< Shifted mode D16 for EBI_CTRL */
bogdanm 0:9b334a45a8ff 103 #define _EBI_CTRL_MODE1_SHIFT 2 /**< Shift value for EBI_MODE1 */
bogdanm 0:9b334a45a8ff 104 #define _EBI_CTRL_MODE1_MASK 0xCUL /**< Bit mask for EBI_MODE1 */
bogdanm 0:9b334a45a8ff 105 #define _EBI_CTRL_MODE1_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_CTRL */
bogdanm 0:9b334a45a8ff 106 #define _EBI_CTRL_MODE1_D8A8 0x00000000UL /**< Mode D8A8 for EBI_CTRL */
bogdanm 0:9b334a45a8ff 107 #define _EBI_CTRL_MODE1_D16A16ALE 0x00000001UL /**< Mode D16A16ALE for EBI_CTRL */
bogdanm 0:9b334a45a8ff 108 #define _EBI_CTRL_MODE1_D8A24ALE 0x00000002UL /**< Mode D8A24ALE for EBI_CTRL */
bogdanm 0:9b334a45a8ff 109 #define _EBI_CTRL_MODE1_D16 0x00000003UL /**< Mode D16 for EBI_CTRL */
bogdanm 0:9b334a45a8ff 110 #define EBI_CTRL_MODE1_DEFAULT (_EBI_CTRL_MODE1_DEFAULT << 2) /**< Shifted mode DEFAULT for EBI_CTRL */
bogdanm 0:9b334a45a8ff 111 #define EBI_CTRL_MODE1_D8A8 (_EBI_CTRL_MODE1_D8A8 << 2) /**< Shifted mode D8A8 for EBI_CTRL */
bogdanm 0:9b334a45a8ff 112 #define EBI_CTRL_MODE1_D16A16ALE (_EBI_CTRL_MODE1_D16A16ALE << 2) /**< Shifted mode D16A16ALE for EBI_CTRL */
bogdanm 0:9b334a45a8ff 113 #define EBI_CTRL_MODE1_D8A24ALE (_EBI_CTRL_MODE1_D8A24ALE << 2) /**< Shifted mode D8A24ALE for EBI_CTRL */
bogdanm 0:9b334a45a8ff 114 #define EBI_CTRL_MODE1_D16 (_EBI_CTRL_MODE1_D16 << 2) /**< Shifted mode D16 for EBI_CTRL */
bogdanm 0:9b334a45a8ff 115 #define _EBI_CTRL_MODE2_SHIFT 4 /**< Shift value for EBI_MODE2 */
bogdanm 0:9b334a45a8ff 116 #define _EBI_CTRL_MODE2_MASK 0x30UL /**< Bit mask for EBI_MODE2 */
bogdanm 0:9b334a45a8ff 117 #define _EBI_CTRL_MODE2_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_CTRL */
bogdanm 0:9b334a45a8ff 118 #define _EBI_CTRL_MODE2_D8A8 0x00000000UL /**< Mode D8A8 for EBI_CTRL */
bogdanm 0:9b334a45a8ff 119 #define _EBI_CTRL_MODE2_D16A16ALE 0x00000001UL /**< Mode D16A16ALE for EBI_CTRL */
bogdanm 0:9b334a45a8ff 120 #define _EBI_CTRL_MODE2_D8A24ALE 0x00000002UL /**< Mode D8A24ALE for EBI_CTRL */
bogdanm 0:9b334a45a8ff 121 #define _EBI_CTRL_MODE2_D16 0x00000003UL /**< Mode D16 for EBI_CTRL */
bogdanm 0:9b334a45a8ff 122 #define EBI_CTRL_MODE2_DEFAULT (_EBI_CTRL_MODE2_DEFAULT << 4) /**< Shifted mode DEFAULT for EBI_CTRL */
bogdanm 0:9b334a45a8ff 123 #define EBI_CTRL_MODE2_D8A8 (_EBI_CTRL_MODE2_D8A8 << 4) /**< Shifted mode D8A8 for EBI_CTRL */
bogdanm 0:9b334a45a8ff 124 #define EBI_CTRL_MODE2_D16A16ALE (_EBI_CTRL_MODE2_D16A16ALE << 4) /**< Shifted mode D16A16ALE for EBI_CTRL */
bogdanm 0:9b334a45a8ff 125 #define EBI_CTRL_MODE2_D8A24ALE (_EBI_CTRL_MODE2_D8A24ALE << 4) /**< Shifted mode D8A24ALE for EBI_CTRL */
bogdanm 0:9b334a45a8ff 126 #define EBI_CTRL_MODE2_D16 (_EBI_CTRL_MODE2_D16 << 4) /**< Shifted mode D16 for EBI_CTRL */
bogdanm 0:9b334a45a8ff 127 #define _EBI_CTRL_MODE3_SHIFT 6 /**< Shift value for EBI_MODE3 */
bogdanm 0:9b334a45a8ff 128 #define _EBI_CTRL_MODE3_MASK 0xC0UL /**< Bit mask for EBI_MODE3 */
bogdanm 0:9b334a45a8ff 129 #define _EBI_CTRL_MODE3_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_CTRL */
bogdanm 0:9b334a45a8ff 130 #define _EBI_CTRL_MODE3_D8A8 0x00000000UL /**< Mode D8A8 for EBI_CTRL */
bogdanm 0:9b334a45a8ff 131 #define _EBI_CTRL_MODE3_D16A16ALE 0x00000001UL /**< Mode D16A16ALE for EBI_CTRL */
bogdanm 0:9b334a45a8ff 132 #define _EBI_CTRL_MODE3_D8A24ALE 0x00000002UL /**< Mode D8A24ALE for EBI_CTRL */
bogdanm 0:9b334a45a8ff 133 #define _EBI_CTRL_MODE3_D16 0x00000003UL /**< Mode D16 for EBI_CTRL */
bogdanm 0:9b334a45a8ff 134 #define EBI_CTRL_MODE3_DEFAULT (_EBI_CTRL_MODE3_DEFAULT << 6) /**< Shifted mode DEFAULT for EBI_CTRL */
bogdanm 0:9b334a45a8ff 135 #define EBI_CTRL_MODE3_D8A8 (_EBI_CTRL_MODE3_D8A8 << 6) /**< Shifted mode D8A8 for EBI_CTRL */
bogdanm 0:9b334a45a8ff 136 #define EBI_CTRL_MODE3_D16A16ALE (_EBI_CTRL_MODE3_D16A16ALE << 6) /**< Shifted mode D16A16ALE for EBI_CTRL */
bogdanm 0:9b334a45a8ff 137 #define EBI_CTRL_MODE3_D8A24ALE (_EBI_CTRL_MODE3_D8A24ALE << 6) /**< Shifted mode D8A24ALE for EBI_CTRL */
bogdanm 0:9b334a45a8ff 138 #define EBI_CTRL_MODE3_D16 (_EBI_CTRL_MODE3_D16 << 6) /**< Shifted mode D16 for EBI_CTRL */
bogdanm 0:9b334a45a8ff 139 #define EBI_CTRL_BANK0EN (0x1UL << 8) /**< Bank 0 Enable */
bogdanm 0:9b334a45a8ff 140 #define _EBI_CTRL_BANK0EN_SHIFT 8 /**< Shift value for EBI_BANK0EN */
bogdanm 0:9b334a45a8ff 141 #define _EBI_CTRL_BANK0EN_MASK 0x100UL /**< Bit mask for EBI_BANK0EN */
bogdanm 0:9b334a45a8ff 142 #define _EBI_CTRL_BANK0EN_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_CTRL */
bogdanm 0:9b334a45a8ff 143 #define EBI_CTRL_BANK0EN_DEFAULT (_EBI_CTRL_BANK0EN_DEFAULT << 8) /**< Shifted mode DEFAULT for EBI_CTRL */
bogdanm 0:9b334a45a8ff 144 #define EBI_CTRL_BANK1EN (0x1UL << 9) /**< Bank 1 Enable */
bogdanm 0:9b334a45a8ff 145 #define _EBI_CTRL_BANK1EN_SHIFT 9 /**< Shift value for EBI_BANK1EN */
bogdanm 0:9b334a45a8ff 146 #define _EBI_CTRL_BANK1EN_MASK 0x200UL /**< Bit mask for EBI_BANK1EN */
bogdanm 0:9b334a45a8ff 147 #define _EBI_CTRL_BANK1EN_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_CTRL */
bogdanm 0:9b334a45a8ff 148 #define EBI_CTRL_BANK1EN_DEFAULT (_EBI_CTRL_BANK1EN_DEFAULT << 9) /**< Shifted mode DEFAULT for EBI_CTRL */
bogdanm 0:9b334a45a8ff 149 #define EBI_CTRL_BANK2EN (0x1UL << 10) /**< Bank 2 Enable */
bogdanm 0:9b334a45a8ff 150 #define _EBI_CTRL_BANK2EN_SHIFT 10 /**< Shift value for EBI_BANK2EN */
bogdanm 0:9b334a45a8ff 151 #define _EBI_CTRL_BANK2EN_MASK 0x400UL /**< Bit mask for EBI_BANK2EN */
bogdanm 0:9b334a45a8ff 152 #define _EBI_CTRL_BANK2EN_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_CTRL */
bogdanm 0:9b334a45a8ff 153 #define EBI_CTRL_BANK2EN_DEFAULT (_EBI_CTRL_BANK2EN_DEFAULT << 10) /**< Shifted mode DEFAULT for EBI_CTRL */
bogdanm 0:9b334a45a8ff 154 #define EBI_CTRL_BANK3EN (0x1UL << 11) /**< Bank 3 Enable */
bogdanm 0:9b334a45a8ff 155 #define _EBI_CTRL_BANK3EN_SHIFT 11 /**< Shift value for EBI_BANK3EN */
bogdanm 0:9b334a45a8ff 156 #define _EBI_CTRL_BANK3EN_MASK 0x800UL /**< Bit mask for EBI_BANK3EN */
bogdanm 0:9b334a45a8ff 157 #define _EBI_CTRL_BANK3EN_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_CTRL */
bogdanm 0:9b334a45a8ff 158 #define EBI_CTRL_BANK3EN_DEFAULT (_EBI_CTRL_BANK3EN_DEFAULT << 11) /**< Shifted mode DEFAULT for EBI_CTRL */
bogdanm 0:9b334a45a8ff 159 #define EBI_CTRL_NOIDLE (0x1UL << 12) /**< No idle cycle insertion on bank 0. */
bogdanm 0:9b334a45a8ff 160 #define _EBI_CTRL_NOIDLE_SHIFT 12 /**< Shift value for EBI_NOIDLE */
bogdanm 0:9b334a45a8ff 161 #define _EBI_CTRL_NOIDLE_MASK 0x1000UL /**< Bit mask for EBI_NOIDLE */
bogdanm 0:9b334a45a8ff 162 #define _EBI_CTRL_NOIDLE_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_CTRL */
bogdanm 0:9b334a45a8ff 163 #define EBI_CTRL_NOIDLE_DEFAULT (_EBI_CTRL_NOIDLE_DEFAULT << 12) /**< Shifted mode DEFAULT for EBI_CTRL */
bogdanm 0:9b334a45a8ff 164 #define EBI_CTRL_NOIDLE1 (0x1UL << 13) /**< No idle cycle insertion on bank 1. */
bogdanm 0:9b334a45a8ff 165 #define _EBI_CTRL_NOIDLE1_SHIFT 13 /**< Shift value for EBI_NOIDLE1 */
bogdanm 0:9b334a45a8ff 166 #define _EBI_CTRL_NOIDLE1_MASK 0x2000UL /**< Bit mask for EBI_NOIDLE1 */
bogdanm 0:9b334a45a8ff 167 #define _EBI_CTRL_NOIDLE1_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_CTRL */
bogdanm 0:9b334a45a8ff 168 #define EBI_CTRL_NOIDLE1_DEFAULT (_EBI_CTRL_NOIDLE1_DEFAULT << 13) /**< Shifted mode DEFAULT for EBI_CTRL */
bogdanm 0:9b334a45a8ff 169 #define EBI_CTRL_NOIDLE2 (0x1UL << 14) /**< No idle cycle insertion on bank 2. */
bogdanm 0:9b334a45a8ff 170 #define _EBI_CTRL_NOIDLE2_SHIFT 14 /**< Shift value for EBI_NOIDLE2 */
bogdanm 0:9b334a45a8ff 171 #define _EBI_CTRL_NOIDLE2_MASK 0x4000UL /**< Bit mask for EBI_NOIDLE2 */
bogdanm 0:9b334a45a8ff 172 #define _EBI_CTRL_NOIDLE2_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_CTRL */
bogdanm 0:9b334a45a8ff 173 #define EBI_CTRL_NOIDLE2_DEFAULT (_EBI_CTRL_NOIDLE2_DEFAULT << 14) /**< Shifted mode DEFAULT for EBI_CTRL */
bogdanm 0:9b334a45a8ff 174 #define EBI_CTRL_NOIDLE3 (0x1UL << 15) /**< No idle cycle insertion on bank 3. */
bogdanm 0:9b334a45a8ff 175 #define _EBI_CTRL_NOIDLE3_SHIFT 15 /**< Shift value for EBI_NOIDLE3 */
bogdanm 0:9b334a45a8ff 176 #define _EBI_CTRL_NOIDLE3_MASK 0x8000UL /**< Bit mask for EBI_NOIDLE3 */
bogdanm 0:9b334a45a8ff 177 #define _EBI_CTRL_NOIDLE3_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_CTRL */
bogdanm 0:9b334a45a8ff 178 #define EBI_CTRL_NOIDLE3_DEFAULT (_EBI_CTRL_NOIDLE3_DEFAULT << 15) /**< Shifted mode DEFAULT for EBI_CTRL */
bogdanm 0:9b334a45a8ff 179 #define EBI_CTRL_ARDYEN (0x1UL << 16) /**< ARDY Enable */
bogdanm 0:9b334a45a8ff 180 #define _EBI_CTRL_ARDYEN_SHIFT 16 /**< Shift value for EBI_ARDYEN */
bogdanm 0:9b334a45a8ff 181 #define _EBI_CTRL_ARDYEN_MASK 0x10000UL /**< Bit mask for EBI_ARDYEN */
bogdanm 0:9b334a45a8ff 182 #define _EBI_CTRL_ARDYEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_CTRL */
bogdanm 0:9b334a45a8ff 183 #define EBI_CTRL_ARDYEN_DEFAULT (_EBI_CTRL_ARDYEN_DEFAULT << 16) /**< Shifted mode DEFAULT for EBI_CTRL */
bogdanm 0:9b334a45a8ff 184 #define EBI_CTRL_ARDYTODIS (0x1UL << 17) /**< ARDY Timeout Disable */
bogdanm 0:9b334a45a8ff 185 #define _EBI_CTRL_ARDYTODIS_SHIFT 17 /**< Shift value for EBI_ARDYTODIS */
bogdanm 0:9b334a45a8ff 186 #define _EBI_CTRL_ARDYTODIS_MASK 0x20000UL /**< Bit mask for EBI_ARDYTODIS */
bogdanm 0:9b334a45a8ff 187 #define _EBI_CTRL_ARDYTODIS_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_CTRL */
bogdanm 0:9b334a45a8ff 188 #define EBI_CTRL_ARDYTODIS_DEFAULT (_EBI_CTRL_ARDYTODIS_DEFAULT << 17) /**< Shifted mode DEFAULT for EBI_CTRL */
bogdanm 0:9b334a45a8ff 189 #define EBI_CTRL_ARDY1EN (0x1UL << 18) /**< ARDY Enable for bank 1 */
bogdanm 0:9b334a45a8ff 190 #define _EBI_CTRL_ARDY1EN_SHIFT 18 /**< Shift value for EBI_ARDY1EN */
bogdanm 0:9b334a45a8ff 191 #define _EBI_CTRL_ARDY1EN_MASK 0x40000UL /**< Bit mask for EBI_ARDY1EN */
bogdanm 0:9b334a45a8ff 192 #define _EBI_CTRL_ARDY1EN_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_CTRL */
bogdanm 0:9b334a45a8ff 193 #define EBI_CTRL_ARDY1EN_DEFAULT (_EBI_CTRL_ARDY1EN_DEFAULT << 18) /**< Shifted mode DEFAULT for EBI_CTRL */
bogdanm 0:9b334a45a8ff 194 #define EBI_CTRL_ARDYTO1DIS (0x1UL << 19) /**< ARDY Timeout Disable for bank 1 */
bogdanm 0:9b334a45a8ff 195 #define _EBI_CTRL_ARDYTO1DIS_SHIFT 19 /**< Shift value for EBI_ARDYTO1DIS */
bogdanm 0:9b334a45a8ff 196 #define _EBI_CTRL_ARDYTO1DIS_MASK 0x80000UL /**< Bit mask for EBI_ARDYTO1DIS */
bogdanm 0:9b334a45a8ff 197 #define _EBI_CTRL_ARDYTO1DIS_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_CTRL */
bogdanm 0:9b334a45a8ff 198 #define EBI_CTRL_ARDYTO1DIS_DEFAULT (_EBI_CTRL_ARDYTO1DIS_DEFAULT << 19) /**< Shifted mode DEFAULT for EBI_CTRL */
bogdanm 0:9b334a45a8ff 199 #define EBI_CTRL_ARDY2EN (0x1UL << 20) /**< ARDY Enable for bank 2 */
bogdanm 0:9b334a45a8ff 200 #define _EBI_CTRL_ARDY2EN_SHIFT 20 /**< Shift value for EBI_ARDY2EN */
bogdanm 0:9b334a45a8ff 201 #define _EBI_CTRL_ARDY2EN_MASK 0x100000UL /**< Bit mask for EBI_ARDY2EN */
bogdanm 0:9b334a45a8ff 202 #define _EBI_CTRL_ARDY2EN_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_CTRL */
bogdanm 0:9b334a45a8ff 203 #define EBI_CTRL_ARDY2EN_DEFAULT (_EBI_CTRL_ARDY2EN_DEFAULT << 20) /**< Shifted mode DEFAULT for EBI_CTRL */
bogdanm 0:9b334a45a8ff 204 #define EBI_CTRL_ARDYTO2DIS (0x1UL << 21) /**< ARDY Timeout Disable for bank 2 */
bogdanm 0:9b334a45a8ff 205 #define _EBI_CTRL_ARDYTO2DIS_SHIFT 21 /**< Shift value for EBI_ARDYTO2DIS */
bogdanm 0:9b334a45a8ff 206 #define _EBI_CTRL_ARDYTO2DIS_MASK 0x200000UL /**< Bit mask for EBI_ARDYTO2DIS */
bogdanm 0:9b334a45a8ff 207 #define _EBI_CTRL_ARDYTO2DIS_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_CTRL */
bogdanm 0:9b334a45a8ff 208 #define EBI_CTRL_ARDYTO2DIS_DEFAULT (_EBI_CTRL_ARDYTO2DIS_DEFAULT << 21) /**< Shifted mode DEFAULT for EBI_CTRL */
bogdanm 0:9b334a45a8ff 209 #define EBI_CTRL_ARDY3EN (0x1UL << 22) /**< ARDY Enable for bank 3 */
bogdanm 0:9b334a45a8ff 210 #define _EBI_CTRL_ARDY3EN_SHIFT 22 /**< Shift value for EBI_ARDY3EN */
bogdanm 0:9b334a45a8ff 211 #define _EBI_CTRL_ARDY3EN_MASK 0x400000UL /**< Bit mask for EBI_ARDY3EN */
bogdanm 0:9b334a45a8ff 212 #define _EBI_CTRL_ARDY3EN_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_CTRL */
bogdanm 0:9b334a45a8ff 213 #define EBI_CTRL_ARDY3EN_DEFAULT (_EBI_CTRL_ARDY3EN_DEFAULT << 22) /**< Shifted mode DEFAULT for EBI_CTRL */
bogdanm 0:9b334a45a8ff 214 #define EBI_CTRL_ARDYTO3DIS (0x1UL << 23) /**< ARDY Timeout Disable for bank 3 */
bogdanm 0:9b334a45a8ff 215 #define _EBI_CTRL_ARDYTO3DIS_SHIFT 23 /**< Shift value for EBI_ARDYTO3DIS */
bogdanm 0:9b334a45a8ff 216 #define _EBI_CTRL_ARDYTO3DIS_MASK 0x800000UL /**< Bit mask for EBI_ARDYTO3DIS */
bogdanm 0:9b334a45a8ff 217 #define _EBI_CTRL_ARDYTO3DIS_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_CTRL */
bogdanm 0:9b334a45a8ff 218 #define EBI_CTRL_ARDYTO3DIS_DEFAULT (_EBI_CTRL_ARDYTO3DIS_DEFAULT << 23) /**< Shifted mode DEFAULT for EBI_CTRL */
bogdanm 0:9b334a45a8ff 219 #define EBI_CTRL_BL (0x1UL << 24) /**< Byte Lane Enable for bank 0 */
bogdanm 0:9b334a45a8ff 220 #define _EBI_CTRL_BL_SHIFT 24 /**< Shift value for EBI_BL */
bogdanm 0:9b334a45a8ff 221 #define _EBI_CTRL_BL_MASK 0x1000000UL /**< Bit mask for EBI_BL */
bogdanm 0:9b334a45a8ff 222 #define _EBI_CTRL_BL_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_CTRL */
bogdanm 0:9b334a45a8ff 223 #define EBI_CTRL_BL_DEFAULT (_EBI_CTRL_BL_DEFAULT << 24) /**< Shifted mode DEFAULT for EBI_CTRL */
bogdanm 0:9b334a45a8ff 224 #define EBI_CTRL_BL1 (0x1UL << 25) /**< Byte Lane Enable for bank 1 */
bogdanm 0:9b334a45a8ff 225 #define _EBI_CTRL_BL1_SHIFT 25 /**< Shift value for EBI_BL1 */
bogdanm 0:9b334a45a8ff 226 #define _EBI_CTRL_BL1_MASK 0x2000000UL /**< Bit mask for EBI_BL1 */
bogdanm 0:9b334a45a8ff 227 #define _EBI_CTRL_BL1_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_CTRL */
bogdanm 0:9b334a45a8ff 228 #define EBI_CTRL_BL1_DEFAULT (_EBI_CTRL_BL1_DEFAULT << 25) /**< Shifted mode DEFAULT for EBI_CTRL */
bogdanm 0:9b334a45a8ff 229 #define EBI_CTRL_BL2 (0x1UL << 26) /**< Byte Lane Enable for bank 2 */
bogdanm 0:9b334a45a8ff 230 #define _EBI_CTRL_BL2_SHIFT 26 /**< Shift value for EBI_BL2 */
bogdanm 0:9b334a45a8ff 231 #define _EBI_CTRL_BL2_MASK 0x4000000UL /**< Bit mask for EBI_BL2 */
bogdanm 0:9b334a45a8ff 232 #define _EBI_CTRL_BL2_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_CTRL */
bogdanm 0:9b334a45a8ff 233 #define EBI_CTRL_BL2_DEFAULT (_EBI_CTRL_BL2_DEFAULT << 26) /**< Shifted mode DEFAULT for EBI_CTRL */
bogdanm 0:9b334a45a8ff 234 #define EBI_CTRL_BL3 (0x1UL << 27) /**< Byte Lane Enable for bank 3 */
bogdanm 0:9b334a45a8ff 235 #define _EBI_CTRL_BL3_SHIFT 27 /**< Shift value for EBI_BL3 */
bogdanm 0:9b334a45a8ff 236 #define _EBI_CTRL_BL3_MASK 0x8000000UL /**< Bit mask for EBI_BL3 */
bogdanm 0:9b334a45a8ff 237 #define _EBI_CTRL_BL3_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_CTRL */
bogdanm 0:9b334a45a8ff 238 #define EBI_CTRL_BL3_DEFAULT (_EBI_CTRL_BL3_DEFAULT << 27) /**< Shifted mode DEFAULT for EBI_CTRL */
bogdanm 0:9b334a45a8ff 239 #define EBI_CTRL_ITS (0x1UL << 30) /**< Individual Timing Set, Line Polarity and Mode Definition Enable */
bogdanm 0:9b334a45a8ff 240 #define _EBI_CTRL_ITS_SHIFT 30 /**< Shift value for EBI_ITS */
bogdanm 0:9b334a45a8ff 241 #define _EBI_CTRL_ITS_MASK 0x40000000UL /**< Bit mask for EBI_ITS */
bogdanm 0:9b334a45a8ff 242 #define _EBI_CTRL_ITS_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_CTRL */
bogdanm 0:9b334a45a8ff 243 #define EBI_CTRL_ITS_DEFAULT (_EBI_CTRL_ITS_DEFAULT << 30) /**< Shifted mode DEFAULT for EBI_CTRL */
bogdanm 0:9b334a45a8ff 244 #define EBI_CTRL_ALTMAP (0x1UL << 31) /**< Alternative Address Map Enable */
bogdanm 0:9b334a45a8ff 245 #define _EBI_CTRL_ALTMAP_SHIFT 31 /**< Shift value for EBI_ALTMAP */
bogdanm 0:9b334a45a8ff 246 #define _EBI_CTRL_ALTMAP_MASK 0x80000000UL /**< Bit mask for EBI_ALTMAP */
bogdanm 0:9b334a45a8ff 247 #define _EBI_CTRL_ALTMAP_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_CTRL */
bogdanm 0:9b334a45a8ff 248 #define EBI_CTRL_ALTMAP_DEFAULT (_EBI_CTRL_ALTMAP_DEFAULT << 31) /**< Shifted mode DEFAULT for EBI_CTRL */
bogdanm 0:9b334a45a8ff 249
bogdanm 0:9b334a45a8ff 250 /* Bit fields for EBI ADDRTIMING */
bogdanm 0:9b334a45a8ff 251 #define _EBI_ADDRTIMING_RESETVALUE 0x00000303UL /**< Default value for EBI_ADDRTIMING */
bogdanm 0:9b334a45a8ff 252 #define _EBI_ADDRTIMING_MASK 0x10000303UL /**< Mask for EBI_ADDRTIMING */
bogdanm 0:9b334a45a8ff 253 #define _EBI_ADDRTIMING_ADDRSETUP_SHIFT 0 /**< Shift value for EBI_ADDRSETUP */
bogdanm 0:9b334a45a8ff 254 #define _EBI_ADDRTIMING_ADDRSETUP_MASK 0x3UL /**< Bit mask for EBI_ADDRSETUP */
bogdanm 0:9b334a45a8ff 255 #define _EBI_ADDRTIMING_ADDRSETUP_DEFAULT 0x00000003UL /**< Mode DEFAULT for EBI_ADDRTIMING */
bogdanm 0:9b334a45a8ff 256 #define EBI_ADDRTIMING_ADDRSETUP_DEFAULT (_EBI_ADDRTIMING_ADDRSETUP_DEFAULT << 0) /**< Shifted mode DEFAULT for EBI_ADDRTIMING */
bogdanm 0:9b334a45a8ff 257 #define _EBI_ADDRTIMING_ADDRHOLD_SHIFT 8 /**< Shift value for EBI_ADDRHOLD */
bogdanm 0:9b334a45a8ff 258 #define _EBI_ADDRTIMING_ADDRHOLD_MASK 0x300UL /**< Bit mask for EBI_ADDRHOLD */
bogdanm 0:9b334a45a8ff 259 #define _EBI_ADDRTIMING_ADDRHOLD_DEFAULT 0x00000003UL /**< Mode DEFAULT for EBI_ADDRTIMING */
bogdanm 0:9b334a45a8ff 260 #define EBI_ADDRTIMING_ADDRHOLD_DEFAULT (_EBI_ADDRTIMING_ADDRHOLD_DEFAULT << 8) /**< Shifted mode DEFAULT for EBI_ADDRTIMING */
bogdanm 0:9b334a45a8ff 261 #define EBI_ADDRTIMING_HALFALE (0x1UL << 28) /**< Half Cycle ALE Strobe Duration Enable */
bogdanm 0:9b334a45a8ff 262 #define _EBI_ADDRTIMING_HALFALE_SHIFT 28 /**< Shift value for EBI_HALFALE */
bogdanm 0:9b334a45a8ff 263 #define _EBI_ADDRTIMING_HALFALE_MASK 0x10000000UL /**< Bit mask for EBI_HALFALE */
bogdanm 0:9b334a45a8ff 264 #define _EBI_ADDRTIMING_HALFALE_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_ADDRTIMING */
bogdanm 0:9b334a45a8ff 265 #define EBI_ADDRTIMING_HALFALE_DEFAULT (_EBI_ADDRTIMING_HALFALE_DEFAULT << 28) /**< Shifted mode DEFAULT for EBI_ADDRTIMING */
bogdanm 0:9b334a45a8ff 266
bogdanm 0:9b334a45a8ff 267 /* Bit fields for EBI RDTIMING */
bogdanm 0:9b334a45a8ff 268 #define _EBI_RDTIMING_RESETVALUE 0x00033F03UL /**< Default value for EBI_RDTIMING */
bogdanm 0:9b334a45a8ff 269 #define _EBI_RDTIMING_MASK 0x70033F03UL /**< Mask for EBI_RDTIMING */
bogdanm 0:9b334a45a8ff 270 #define _EBI_RDTIMING_RDSETUP_SHIFT 0 /**< Shift value for EBI_RDSETUP */
bogdanm 0:9b334a45a8ff 271 #define _EBI_RDTIMING_RDSETUP_MASK 0x3UL /**< Bit mask for EBI_RDSETUP */
bogdanm 0:9b334a45a8ff 272 #define _EBI_RDTIMING_RDSETUP_DEFAULT 0x00000003UL /**< Mode DEFAULT for EBI_RDTIMING */
bogdanm 0:9b334a45a8ff 273 #define EBI_RDTIMING_RDSETUP_DEFAULT (_EBI_RDTIMING_RDSETUP_DEFAULT << 0) /**< Shifted mode DEFAULT for EBI_RDTIMING */
bogdanm 0:9b334a45a8ff 274 #define _EBI_RDTIMING_RDSTRB_SHIFT 8 /**< Shift value for EBI_RDSTRB */
bogdanm 0:9b334a45a8ff 275 #define _EBI_RDTIMING_RDSTRB_MASK 0x3F00UL /**< Bit mask for EBI_RDSTRB */
bogdanm 0:9b334a45a8ff 276 #define _EBI_RDTIMING_RDSTRB_DEFAULT 0x0000003FUL /**< Mode DEFAULT for EBI_RDTIMING */
bogdanm 0:9b334a45a8ff 277 #define EBI_RDTIMING_RDSTRB_DEFAULT (_EBI_RDTIMING_RDSTRB_DEFAULT << 8) /**< Shifted mode DEFAULT for EBI_RDTIMING */
bogdanm 0:9b334a45a8ff 278 #define _EBI_RDTIMING_RDHOLD_SHIFT 16 /**< Shift value for EBI_RDHOLD */
bogdanm 0:9b334a45a8ff 279 #define _EBI_RDTIMING_RDHOLD_MASK 0x30000UL /**< Bit mask for EBI_RDHOLD */
bogdanm 0:9b334a45a8ff 280 #define _EBI_RDTIMING_RDHOLD_DEFAULT 0x00000003UL /**< Mode DEFAULT for EBI_RDTIMING */
bogdanm 0:9b334a45a8ff 281 #define EBI_RDTIMING_RDHOLD_DEFAULT (_EBI_RDTIMING_RDHOLD_DEFAULT << 16) /**< Shifted mode DEFAULT for EBI_RDTIMING */
bogdanm 0:9b334a45a8ff 282 #define EBI_RDTIMING_HALFRE (0x1UL << 28) /**< Half Cycle REn Strobe Duration Enable */
bogdanm 0:9b334a45a8ff 283 #define _EBI_RDTIMING_HALFRE_SHIFT 28 /**< Shift value for EBI_HALFRE */
bogdanm 0:9b334a45a8ff 284 #define _EBI_RDTIMING_HALFRE_MASK 0x10000000UL /**< Bit mask for EBI_HALFRE */
bogdanm 0:9b334a45a8ff 285 #define _EBI_RDTIMING_HALFRE_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_RDTIMING */
bogdanm 0:9b334a45a8ff 286 #define EBI_RDTIMING_HALFRE_DEFAULT (_EBI_RDTIMING_HALFRE_DEFAULT << 28) /**< Shifted mode DEFAULT for EBI_RDTIMING */
bogdanm 0:9b334a45a8ff 287 #define EBI_RDTIMING_PREFETCH (0x1UL << 29) /**< Prefetch Enable */
bogdanm 0:9b334a45a8ff 288 #define _EBI_RDTIMING_PREFETCH_SHIFT 29 /**< Shift value for EBI_PREFETCH */
bogdanm 0:9b334a45a8ff 289 #define _EBI_RDTIMING_PREFETCH_MASK 0x20000000UL /**< Bit mask for EBI_PREFETCH */
bogdanm 0:9b334a45a8ff 290 #define _EBI_RDTIMING_PREFETCH_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_RDTIMING */
bogdanm 0:9b334a45a8ff 291 #define EBI_RDTIMING_PREFETCH_DEFAULT (_EBI_RDTIMING_PREFETCH_DEFAULT << 29) /**< Shifted mode DEFAULT for EBI_RDTIMING */
bogdanm 0:9b334a45a8ff 292 #define EBI_RDTIMING_PAGEMODE (0x1UL << 30) /**< Page Mode Access Enable */
bogdanm 0:9b334a45a8ff 293 #define _EBI_RDTIMING_PAGEMODE_SHIFT 30 /**< Shift value for EBI_PAGEMODE */
bogdanm 0:9b334a45a8ff 294 #define _EBI_RDTIMING_PAGEMODE_MASK 0x40000000UL /**< Bit mask for EBI_PAGEMODE */
bogdanm 0:9b334a45a8ff 295 #define _EBI_RDTIMING_PAGEMODE_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_RDTIMING */
bogdanm 0:9b334a45a8ff 296 #define EBI_RDTIMING_PAGEMODE_DEFAULT (_EBI_RDTIMING_PAGEMODE_DEFAULT << 30) /**< Shifted mode DEFAULT for EBI_RDTIMING */
bogdanm 0:9b334a45a8ff 297
bogdanm 0:9b334a45a8ff 298 /* Bit fields for EBI WRTIMING */
bogdanm 0:9b334a45a8ff 299 #define _EBI_WRTIMING_RESETVALUE 0x00033F03UL /**< Default value for EBI_WRTIMING */
bogdanm 0:9b334a45a8ff 300 #define _EBI_WRTIMING_MASK 0x30033F03UL /**< Mask for EBI_WRTIMING */
bogdanm 0:9b334a45a8ff 301 #define _EBI_WRTIMING_WRSETUP_SHIFT 0 /**< Shift value for EBI_WRSETUP */
bogdanm 0:9b334a45a8ff 302 #define _EBI_WRTIMING_WRSETUP_MASK 0x3UL /**< Bit mask for EBI_WRSETUP */
bogdanm 0:9b334a45a8ff 303 #define _EBI_WRTIMING_WRSETUP_DEFAULT 0x00000003UL /**< Mode DEFAULT for EBI_WRTIMING */
bogdanm 0:9b334a45a8ff 304 #define EBI_WRTIMING_WRSETUP_DEFAULT (_EBI_WRTIMING_WRSETUP_DEFAULT << 0) /**< Shifted mode DEFAULT for EBI_WRTIMING */
bogdanm 0:9b334a45a8ff 305 #define _EBI_WRTIMING_WRSTRB_SHIFT 8 /**< Shift value for EBI_WRSTRB */
bogdanm 0:9b334a45a8ff 306 #define _EBI_WRTIMING_WRSTRB_MASK 0x3F00UL /**< Bit mask for EBI_WRSTRB */
bogdanm 0:9b334a45a8ff 307 #define _EBI_WRTIMING_WRSTRB_DEFAULT 0x0000003FUL /**< Mode DEFAULT for EBI_WRTIMING */
bogdanm 0:9b334a45a8ff 308 #define EBI_WRTIMING_WRSTRB_DEFAULT (_EBI_WRTIMING_WRSTRB_DEFAULT << 8) /**< Shifted mode DEFAULT for EBI_WRTIMING */
bogdanm 0:9b334a45a8ff 309 #define _EBI_WRTIMING_WRHOLD_SHIFT 16 /**< Shift value for EBI_WRHOLD */
bogdanm 0:9b334a45a8ff 310 #define _EBI_WRTIMING_WRHOLD_MASK 0x30000UL /**< Bit mask for EBI_WRHOLD */
bogdanm 0:9b334a45a8ff 311 #define _EBI_WRTIMING_WRHOLD_DEFAULT 0x00000003UL /**< Mode DEFAULT for EBI_WRTIMING */
bogdanm 0:9b334a45a8ff 312 #define EBI_WRTIMING_WRHOLD_DEFAULT (_EBI_WRTIMING_WRHOLD_DEFAULT << 16) /**< Shifted mode DEFAULT for EBI_WRTIMING */
bogdanm 0:9b334a45a8ff 313 #define EBI_WRTIMING_HALFWE (0x1UL << 28) /**< Half Cycle WEn Strobe Duration Enable */
bogdanm 0:9b334a45a8ff 314 #define _EBI_WRTIMING_HALFWE_SHIFT 28 /**< Shift value for EBI_HALFWE */
bogdanm 0:9b334a45a8ff 315 #define _EBI_WRTIMING_HALFWE_MASK 0x10000000UL /**< Bit mask for EBI_HALFWE */
bogdanm 0:9b334a45a8ff 316 #define _EBI_WRTIMING_HALFWE_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_WRTIMING */
bogdanm 0:9b334a45a8ff 317 #define EBI_WRTIMING_HALFWE_DEFAULT (_EBI_WRTIMING_HALFWE_DEFAULT << 28) /**< Shifted mode DEFAULT for EBI_WRTIMING */
bogdanm 0:9b334a45a8ff 318 #define EBI_WRTIMING_WBUFDIS (0x1UL << 29) /**< Write Buffer Disable */
bogdanm 0:9b334a45a8ff 319 #define _EBI_WRTIMING_WBUFDIS_SHIFT 29 /**< Shift value for EBI_WBUFDIS */
bogdanm 0:9b334a45a8ff 320 #define _EBI_WRTIMING_WBUFDIS_MASK 0x20000000UL /**< Bit mask for EBI_WBUFDIS */
bogdanm 0:9b334a45a8ff 321 #define _EBI_WRTIMING_WBUFDIS_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_WRTIMING */
bogdanm 0:9b334a45a8ff 322 #define EBI_WRTIMING_WBUFDIS_DEFAULT (_EBI_WRTIMING_WBUFDIS_DEFAULT << 29) /**< Shifted mode DEFAULT for EBI_WRTIMING */
bogdanm 0:9b334a45a8ff 323
bogdanm 0:9b334a45a8ff 324 /* Bit fields for EBI POLARITY */
bogdanm 0:9b334a45a8ff 325 #define _EBI_POLARITY_RESETVALUE 0x00000000UL /**< Default value for EBI_POLARITY */
bogdanm 0:9b334a45a8ff 326 #define _EBI_POLARITY_MASK 0x0000003FUL /**< Mask for EBI_POLARITY */
bogdanm 0:9b334a45a8ff 327 #define EBI_POLARITY_CSPOL (0x1UL << 0) /**< Chip Select Polarity */
bogdanm 0:9b334a45a8ff 328 #define _EBI_POLARITY_CSPOL_SHIFT 0 /**< Shift value for EBI_CSPOL */
bogdanm 0:9b334a45a8ff 329 #define _EBI_POLARITY_CSPOL_MASK 0x1UL /**< Bit mask for EBI_CSPOL */
bogdanm 0:9b334a45a8ff 330 #define _EBI_POLARITY_CSPOL_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_POLARITY */
bogdanm 0:9b334a45a8ff 331 #define _EBI_POLARITY_CSPOL_ACTIVELOW 0x00000000UL /**< Mode ACTIVELOW for EBI_POLARITY */
bogdanm 0:9b334a45a8ff 332 #define _EBI_POLARITY_CSPOL_ACTIVEHIGH 0x00000001UL /**< Mode ACTIVEHIGH for EBI_POLARITY */
bogdanm 0:9b334a45a8ff 333 #define EBI_POLARITY_CSPOL_DEFAULT (_EBI_POLARITY_CSPOL_DEFAULT << 0) /**< Shifted mode DEFAULT for EBI_POLARITY */
bogdanm 0:9b334a45a8ff 334 #define EBI_POLARITY_CSPOL_ACTIVELOW (_EBI_POLARITY_CSPOL_ACTIVELOW << 0) /**< Shifted mode ACTIVELOW for EBI_POLARITY */
bogdanm 0:9b334a45a8ff 335 #define EBI_POLARITY_CSPOL_ACTIVEHIGH (_EBI_POLARITY_CSPOL_ACTIVEHIGH << 0) /**< Shifted mode ACTIVEHIGH for EBI_POLARITY */
bogdanm 0:9b334a45a8ff 336 #define EBI_POLARITY_REPOL (0x1UL << 1) /**< Read Enable Polarity */
bogdanm 0:9b334a45a8ff 337 #define _EBI_POLARITY_REPOL_SHIFT 1 /**< Shift value for EBI_REPOL */
bogdanm 0:9b334a45a8ff 338 #define _EBI_POLARITY_REPOL_MASK 0x2UL /**< Bit mask for EBI_REPOL */
bogdanm 0:9b334a45a8ff 339 #define _EBI_POLARITY_REPOL_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_POLARITY */
bogdanm 0:9b334a45a8ff 340 #define _EBI_POLARITY_REPOL_ACTIVELOW 0x00000000UL /**< Mode ACTIVELOW for EBI_POLARITY */
bogdanm 0:9b334a45a8ff 341 #define _EBI_POLARITY_REPOL_ACTIVEHIGH 0x00000001UL /**< Mode ACTIVEHIGH for EBI_POLARITY */
bogdanm 0:9b334a45a8ff 342 #define EBI_POLARITY_REPOL_DEFAULT (_EBI_POLARITY_REPOL_DEFAULT << 1) /**< Shifted mode DEFAULT for EBI_POLARITY */
bogdanm 0:9b334a45a8ff 343 #define EBI_POLARITY_REPOL_ACTIVELOW (_EBI_POLARITY_REPOL_ACTIVELOW << 1) /**< Shifted mode ACTIVELOW for EBI_POLARITY */
bogdanm 0:9b334a45a8ff 344 #define EBI_POLARITY_REPOL_ACTIVEHIGH (_EBI_POLARITY_REPOL_ACTIVEHIGH << 1) /**< Shifted mode ACTIVEHIGH for EBI_POLARITY */
bogdanm 0:9b334a45a8ff 345 #define EBI_POLARITY_WEPOL (0x1UL << 2) /**< Write Enable Polarity */
bogdanm 0:9b334a45a8ff 346 #define _EBI_POLARITY_WEPOL_SHIFT 2 /**< Shift value for EBI_WEPOL */
bogdanm 0:9b334a45a8ff 347 #define _EBI_POLARITY_WEPOL_MASK 0x4UL /**< Bit mask for EBI_WEPOL */
bogdanm 0:9b334a45a8ff 348 #define _EBI_POLARITY_WEPOL_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_POLARITY */
bogdanm 0:9b334a45a8ff 349 #define _EBI_POLARITY_WEPOL_ACTIVELOW 0x00000000UL /**< Mode ACTIVELOW for EBI_POLARITY */
bogdanm 0:9b334a45a8ff 350 #define _EBI_POLARITY_WEPOL_ACTIVEHIGH 0x00000001UL /**< Mode ACTIVEHIGH for EBI_POLARITY */
bogdanm 0:9b334a45a8ff 351 #define EBI_POLARITY_WEPOL_DEFAULT (_EBI_POLARITY_WEPOL_DEFAULT << 2) /**< Shifted mode DEFAULT for EBI_POLARITY */
bogdanm 0:9b334a45a8ff 352 #define EBI_POLARITY_WEPOL_ACTIVELOW (_EBI_POLARITY_WEPOL_ACTIVELOW << 2) /**< Shifted mode ACTIVELOW for EBI_POLARITY */
bogdanm 0:9b334a45a8ff 353 #define EBI_POLARITY_WEPOL_ACTIVEHIGH (_EBI_POLARITY_WEPOL_ACTIVEHIGH << 2) /**< Shifted mode ACTIVEHIGH for EBI_POLARITY */
bogdanm 0:9b334a45a8ff 354 #define EBI_POLARITY_ALEPOL (0x1UL << 3) /**< Address Latch Polarity */
bogdanm 0:9b334a45a8ff 355 #define _EBI_POLARITY_ALEPOL_SHIFT 3 /**< Shift value for EBI_ALEPOL */
bogdanm 0:9b334a45a8ff 356 #define _EBI_POLARITY_ALEPOL_MASK 0x8UL /**< Bit mask for EBI_ALEPOL */
bogdanm 0:9b334a45a8ff 357 #define _EBI_POLARITY_ALEPOL_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_POLARITY */
bogdanm 0:9b334a45a8ff 358 #define _EBI_POLARITY_ALEPOL_ACTIVELOW 0x00000000UL /**< Mode ACTIVELOW for EBI_POLARITY */
bogdanm 0:9b334a45a8ff 359 #define _EBI_POLARITY_ALEPOL_ACTIVEHIGH 0x00000001UL /**< Mode ACTIVEHIGH for EBI_POLARITY */
bogdanm 0:9b334a45a8ff 360 #define EBI_POLARITY_ALEPOL_DEFAULT (_EBI_POLARITY_ALEPOL_DEFAULT << 3) /**< Shifted mode DEFAULT for EBI_POLARITY */
bogdanm 0:9b334a45a8ff 361 #define EBI_POLARITY_ALEPOL_ACTIVELOW (_EBI_POLARITY_ALEPOL_ACTIVELOW << 3) /**< Shifted mode ACTIVELOW for EBI_POLARITY */
bogdanm 0:9b334a45a8ff 362 #define EBI_POLARITY_ALEPOL_ACTIVEHIGH (_EBI_POLARITY_ALEPOL_ACTIVEHIGH << 3) /**< Shifted mode ACTIVEHIGH for EBI_POLARITY */
bogdanm 0:9b334a45a8ff 363 #define EBI_POLARITY_ARDYPOL (0x1UL << 4) /**< ARDY Polarity */
bogdanm 0:9b334a45a8ff 364 #define _EBI_POLARITY_ARDYPOL_SHIFT 4 /**< Shift value for EBI_ARDYPOL */
bogdanm 0:9b334a45a8ff 365 #define _EBI_POLARITY_ARDYPOL_MASK 0x10UL /**< Bit mask for EBI_ARDYPOL */
bogdanm 0:9b334a45a8ff 366 #define _EBI_POLARITY_ARDYPOL_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_POLARITY */
bogdanm 0:9b334a45a8ff 367 #define _EBI_POLARITY_ARDYPOL_ACTIVELOW 0x00000000UL /**< Mode ACTIVELOW for EBI_POLARITY */
bogdanm 0:9b334a45a8ff 368 #define _EBI_POLARITY_ARDYPOL_ACTIVEHIGH 0x00000001UL /**< Mode ACTIVEHIGH for EBI_POLARITY */
bogdanm 0:9b334a45a8ff 369 #define EBI_POLARITY_ARDYPOL_DEFAULT (_EBI_POLARITY_ARDYPOL_DEFAULT << 4) /**< Shifted mode DEFAULT for EBI_POLARITY */
bogdanm 0:9b334a45a8ff 370 #define EBI_POLARITY_ARDYPOL_ACTIVELOW (_EBI_POLARITY_ARDYPOL_ACTIVELOW << 4) /**< Shifted mode ACTIVELOW for EBI_POLARITY */
bogdanm 0:9b334a45a8ff 371 #define EBI_POLARITY_ARDYPOL_ACTIVEHIGH (_EBI_POLARITY_ARDYPOL_ACTIVEHIGH << 4) /**< Shifted mode ACTIVEHIGH for EBI_POLARITY */
bogdanm 0:9b334a45a8ff 372 #define EBI_POLARITY_BLPOL (0x1UL << 5) /**< BL Polarity */
bogdanm 0:9b334a45a8ff 373 #define _EBI_POLARITY_BLPOL_SHIFT 5 /**< Shift value for EBI_BLPOL */
bogdanm 0:9b334a45a8ff 374 #define _EBI_POLARITY_BLPOL_MASK 0x20UL /**< Bit mask for EBI_BLPOL */
bogdanm 0:9b334a45a8ff 375 #define _EBI_POLARITY_BLPOL_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_POLARITY */
bogdanm 0:9b334a45a8ff 376 #define _EBI_POLARITY_BLPOL_ACTIVELOW 0x00000000UL /**< Mode ACTIVELOW for EBI_POLARITY */
bogdanm 0:9b334a45a8ff 377 #define _EBI_POLARITY_BLPOL_ACTIVEHIGH 0x00000001UL /**< Mode ACTIVEHIGH for EBI_POLARITY */
bogdanm 0:9b334a45a8ff 378 #define EBI_POLARITY_BLPOL_DEFAULT (_EBI_POLARITY_BLPOL_DEFAULT << 5) /**< Shifted mode DEFAULT for EBI_POLARITY */
bogdanm 0:9b334a45a8ff 379 #define EBI_POLARITY_BLPOL_ACTIVELOW (_EBI_POLARITY_BLPOL_ACTIVELOW << 5) /**< Shifted mode ACTIVELOW for EBI_POLARITY */
bogdanm 0:9b334a45a8ff 380 #define EBI_POLARITY_BLPOL_ACTIVEHIGH (_EBI_POLARITY_BLPOL_ACTIVEHIGH << 5) /**< Shifted mode ACTIVEHIGH for EBI_POLARITY */
bogdanm 0:9b334a45a8ff 381
bogdanm 0:9b334a45a8ff 382 /* Bit fields for EBI ROUTE */
bogdanm 0:9b334a45a8ff 383 #define _EBI_ROUTE_RESETVALUE 0x00000000UL /**< Default value for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 384 #define _EBI_ROUTE_MASK 0x777F10FFUL /**< Mask for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 385 #define EBI_ROUTE_EBIPEN (0x1UL << 0) /**< EBI Pin Enable */
bogdanm 0:9b334a45a8ff 386 #define _EBI_ROUTE_EBIPEN_SHIFT 0 /**< Shift value for EBI_EBIPEN */
bogdanm 0:9b334a45a8ff 387 #define _EBI_ROUTE_EBIPEN_MASK 0x1UL /**< Bit mask for EBI_EBIPEN */
bogdanm 0:9b334a45a8ff 388 #define _EBI_ROUTE_EBIPEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 389 #define EBI_ROUTE_EBIPEN_DEFAULT (_EBI_ROUTE_EBIPEN_DEFAULT << 0) /**< Shifted mode DEFAULT for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 390 #define EBI_ROUTE_CS0PEN (0x1UL << 1) /**< EBI_CS0 Pin Enable */
bogdanm 0:9b334a45a8ff 391 #define _EBI_ROUTE_CS0PEN_SHIFT 1 /**< Shift value for EBI_CS0PEN */
bogdanm 0:9b334a45a8ff 392 #define _EBI_ROUTE_CS0PEN_MASK 0x2UL /**< Bit mask for EBI_CS0PEN */
bogdanm 0:9b334a45a8ff 393 #define _EBI_ROUTE_CS0PEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 394 #define EBI_ROUTE_CS0PEN_DEFAULT (_EBI_ROUTE_CS0PEN_DEFAULT << 1) /**< Shifted mode DEFAULT for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 395 #define EBI_ROUTE_CS1PEN (0x1UL << 2) /**< EBI_CS1 Pin Enable */
bogdanm 0:9b334a45a8ff 396 #define _EBI_ROUTE_CS1PEN_SHIFT 2 /**< Shift value for EBI_CS1PEN */
bogdanm 0:9b334a45a8ff 397 #define _EBI_ROUTE_CS1PEN_MASK 0x4UL /**< Bit mask for EBI_CS1PEN */
bogdanm 0:9b334a45a8ff 398 #define _EBI_ROUTE_CS1PEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 399 #define EBI_ROUTE_CS1PEN_DEFAULT (_EBI_ROUTE_CS1PEN_DEFAULT << 2) /**< Shifted mode DEFAULT for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 400 #define EBI_ROUTE_CS2PEN (0x1UL << 3) /**< EBI_CS2 Pin Enable */
bogdanm 0:9b334a45a8ff 401 #define _EBI_ROUTE_CS2PEN_SHIFT 3 /**< Shift value for EBI_CS2PEN */
bogdanm 0:9b334a45a8ff 402 #define _EBI_ROUTE_CS2PEN_MASK 0x8UL /**< Bit mask for EBI_CS2PEN */
bogdanm 0:9b334a45a8ff 403 #define _EBI_ROUTE_CS2PEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 404 #define EBI_ROUTE_CS2PEN_DEFAULT (_EBI_ROUTE_CS2PEN_DEFAULT << 3) /**< Shifted mode DEFAULT for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 405 #define EBI_ROUTE_CS3PEN (0x1UL << 4) /**< EBI_CS3 Pin Enable */
bogdanm 0:9b334a45a8ff 406 #define _EBI_ROUTE_CS3PEN_SHIFT 4 /**< Shift value for EBI_CS3PEN */
bogdanm 0:9b334a45a8ff 407 #define _EBI_ROUTE_CS3PEN_MASK 0x10UL /**< Bit mask for EBI_CS3PEN */
bogdanm 0:9b334a45a8ff 408 #define _EBI_ROUTE_CS3PEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 409 #define EBI_ROUTE_CS3PEN_DEFAULT (_EBI_ROUTE_CS3PEN_DEFAULT << 4) /**< Shifted mode DEFAULT for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 410 #define EBI_ROUTE_ALEPEN (0x1UL << 5) /**< EBI_ALE Pin Enable */
bogdanm 0:9b334a45a8ff 411 #define _EBI_ROUTE_ALEPEN_SHIFT 5 /**< Shift value for EBI_ALEPEN */
bogdanm 0:9b334a45a8ff 412 #define _EBI_ROUTE_ALEPEN_MASK 0x20UL /**< Bit mask for EBI_ALEPEN */
bogdanm 0:9b334a45a8ff 413 #define _EBI_ROUTE_ALEPEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 414 #define EBI_ROUTE_ALEPEN_DEFAULT (_EBI_ROUTE_ALEPEN_DEFAULT << 5) /**< Shifted mode DEFAULT for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 415 #define EBI_ROUTE_ARDYPEN (0x1UL << 6) /**< EBI_ARDY Pin Enable */
bogdanm 0:9b334a45a8ff 416 #define _EBI_ROUTE_ARDYPEN_SHIFT 6 /**< Shift value for EBI_ARDYPEN */
bogdanm 0:9b334a45a8ff 417 #define _EBI_ROUTE_ARDYPEN_MASK 0x40UL /**< Bit mask for EBI_ARDYPEN */
bogdanm 0:9b334a45a8ff 418 #define _EBI_ROUTE_ARDYPEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 419 #define EBI_ROUTE_ARDYPEN_DEFAULT (_EBI_ROUTE_ARDYPEN_DEFAULT << 6) /**< Shifted mode DEFAULT for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 420 #define EBI_ROUTE_BLPEN (0x1UL << 7) /**< EBI_BL[1:0] Pin Enable */
bogdanm 0:9b334a45a8ff 421 #define _EBI_ROUTE_BLPEN_SHIFT 7 /**< Shift value for EBI_BLPEN */
bogdanm 0:9b334a45a8ff 422 #define _EBI_ROUTE_BLPEN_MASK 0x80UL /**< Bit mask for EBI_BLPEN */
bogdanm 0:9b334a45a8ff 423 #define _EBI_ROUTE_BLPEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 424 #define EBI_ROUTE_BLPEN_DEFAULT (_EBI_ROUTE_BLPEN_DEFAULT << 7) /**< Shifted mode DEFAULT for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 425 #define EBI_ROUTE_NANDPEN (0x1UL << 12) /**< NANDRE and NANDWE Pin Enable */
bogdanm 0:9b334a45a8ff 426 #define _EBI_ROUTE_NANDPEN_SHIFT 12 /**< Shift value for EBI_NANDPEN */
bogdanm 0:9b334a45a8ff 427 #define _EBI_ROUTE_NANDPEN_MASK 0x1000UL /**< Bit mask for EBI_NANDPEN */
bogdanm 0:9b334a45a8ff 428 #define _EBI_ROUTE_NANDPEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 429 #define EBI_ROUTE_NANDPEN_DEFAULT (_EBI_ROUTE_NANDPEN_DEFAULT << 12) /**< Shifted mode DEFAULT for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 430 #define _EBI_ROUTE_ALB_SHIFT 16 /**< Shift value for EBI_ALB */
bogdanm 0:9b334a45a8ff 431 #define _EBI_ROUTE_ALB_MASK 0x30000UL /**< Bit mask for EBI_ALB */
bogdanm 0:9b334a45a8ff 432 #define _EBI_ROUTE_ALB_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 433 #define _EBI_ROUTE_ALB_A0 0x00000000UL /**< Mode A0 for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 434 #define _EBI_ROUTE_ALB_A8 0x00000001UL /**< Mode A8 for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 435 #define _EBI_ROUTE_ALB_A16 0x00000002UL /**< Mode A16 for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 436 #define _EBI_ROUTE_ALB_A24 0x00000003UL /**< Mode A24 for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 437 #define EBI_ROUTE_ALB_DEFAULT (_EBI_ROUTE_ALB_DEFAULT << 16) /**< Shifted mode DEFAULT for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 438 #define EBI_ROUTE_ALB_A0 (_EBI_ROUTE_ALB_A0 << 16) /**< Shifted mode A0 for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 439 #define EBI_ROUTE_ALB_A8 (_EBI_ROUTE_ALB_A8 << 16) /**< Shifted mode A8 for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 440 #define EBI_ROUTE_ALB_A16 (_EBI_ROUTE_ALB_A16 << 16) /**< Shifted mode A16 for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 441 #define EBI_ROUTE_ALB_A24 (_EBI_ROUTE_ALB_A24 << 16) /**< Shifted mode A24 for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 442 #define _EBI_ROUTE_APEN_SHIFT 18 /**< Shift value for EBI_APEN */
bogdanm 0:9b334a45a8ff 443 #define _EBI_ROUTE_APEN_MASK 0x7C0000UL /**< Bit mask for EBI_APEN */
bogdanm 0:9b334a45a8ff 444 #define _EBI_ROUTE_APEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 445 #define _EBI_ROUTE_APEN_A0 0x00000000UL /**< Mode A0 for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 446 #define _EBI_ROUTE_APEN_A5 0x00000005UL /**< Mode A5 for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 447 #define _EBI_ROUTE_APEN_A6 0x00000006UL /**< Mode A6 for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 448 #define _EBI_ROUTE_APEN_A7 0x00000007UL /**< Mode A7 for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 449 #define _EBI_ROUTE_APEN_A8 0x00000008UL /**< Mode A8 for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 450 #define _EBI_ROUTE_APEN_A9 0x00000009UL /**< Mode A9 for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 451 #define _EBI_ROUTE_APEN_A10 0x0000000AUL /**< Mode A10 for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 452 #define _EBI_ROUTE_APEN_A11 0x0000000BUL /**< Mode A11 for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 453 #define _EBI_ROUTE_APEN_A12 0x0000000CUL /**< Mode A12 for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 454 #define _EBI_ROUTE_APEN_A13 0x0000000DUL /**< Mode A13 for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 455 #define _EBI_ROUTE_APEN_A14 0x0000000EUL /**< Mode A14 for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 456 #define _EBI_ROUTE_APEN_A15 0x0000000FUL /**< Mode A15 for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 457 #define _EBI_ROUTE_APEN_A16 0x00000010UL /**< Mode A16 for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 458 #define _EBI_ROUTE_APEN_A17 0x00000011UL /**< Mode A17 for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 459 #define _EBI_ROUTE_APEN_A18 0x00000012UL /**< Mode A18 for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 460 #define _EBI_ROUTE_APEN_A19 0x00000013UL /**< Mode A19 for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 461 #define _EBI_ROUTE_APEN_A20 0x00000014UL /**< Mode A20 for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 462 #define _EBI_ROUTE_APEN_A21 0x00000015UL /**< Mode A21 for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 463 #define _EBI_ROUTE_APEN_A22 0x00000016UL /**< Mode A22 for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 464 #define _EBI_ROUTE_APEN_A23 0x00000017UL /**< Mode A23 for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 465 #define _EBI_ROUTE_APEN_A24 0x00000018UL /**< Mode A24 for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 466 #define _EBI_ROUTE_APEN_A25 0x00000019UL /**< Mode A25 for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 467 #define _EBI_ROUTE_APEN_A26 0x0000001AUL /**< Mode A26 for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 468 #define _EBI_ROUTE_APEN_A27 0x0000001BUL /**< Mode A27 for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 469 #define _EBI_ROUTE_APEN_A28 0x0000001CUL /**< Mode A28 for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 470 #define EBI_ROUTE_APEN_DEFAULT (_EBI_ROUTE_APEN_DEFAULT << 18) /**< Shifted mode DEFAULT for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 471 #define EBI_ROUTE_APEN_A0 (_EBI_ROUTE_APEN_A0 << 18) /**< Shifted mode A0 for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 472 #define EBI_ROUTE_APEN_A5 (_EBI_ROUTE_APEN_A5 << 18) /**< Shifted mode A5 for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 473 #define EBI_ROUTE_APEN_A6 (_EBI_ROUTE_APEN_A6 << 18) /**< Shifted mode A6 for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 474 #define EBI_ROUTE_APEN_A7 (_EBI_ROUTE_APEN_A7 << 18) /**< Shifted mode A7 for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 475 #define EBI_ROUTE_APEN_A8 (_EBI_ROUTE_APEN_A8 << 18) /**< Shifted mode A8 for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 476 #define EBI_ROUTE_APEN_A9 (_EBI_ROUTE_APEN_A9 << 18) /**< Shifted mode A9 for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 477 #define EBI_ROUTE_APEN_A10 (_EBI_ROUTE_APEN_A10 << 18) /**< Shifted mode A10 for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 478 #define EBI_ROUTE_APEN_A11 (_EBI_ROUTE_APEN_A11 << 18) /**< Shifted mode A11 for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 479 #define EBI_ROUTE_APEN_A12 (_EBI_ROUTE_APEN_A12 << 18) /**< Shifted mode A12 for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 480 #define EBI_ROUTE_APEN_A13 (_EBI_ROUTE_APEN_A13 << 18) /**< Shifted mode A13 for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 481 #define EBI_ROUTE_APEN_A14 (_EBI_ROUTE_APEN_A14 << 18) /**< Shifted mode A14 for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 482 #define EBI_ROUTE_APEN_A15 (_EBI_ROUTE_APEN_A15 << 18) /**< Shifted mode A15 for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 483 #define EBI_ROUTE_APEN_A16 (_EBI_ROUTE_APEN_A16 << 18) /**< Shifted mode A16 for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 484 #define EBI_ROUTE_APEN_A17 (_EBI_ROUTE_APEN_A17 << 18) /**< Shifted mode A17 for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 485 #define EBI_ROUTE_APEN_A18 (_EBI_ROUTE_APEN_A18 << 18) /**< Shifted mode A18 for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 486 #define EBI_ROUTE_APEN_A19 (_EBI_ROUTE_APEN_A19 << 18) /**< Shifted mode A19 for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 487 #define EBI_ROUTE_APEN_A20 (_EBI_ROUTE_APEN_A20 << 18) /**< Shifted mode A20 for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 488 #define EBI_ROUTE_APEN_A21 (_EBI_ROUTE_APEN_A21 << 18) /**< Shifted mode A21 for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 489 #define EBI_ROUTE_APEN_A22 (_EBI_ROUTE_APEN_A22 << 18) /**< Shifted mode A22 for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 490 #define EBI_ROUTE_APEN_A23 (_EBI_ROUTE_APEN_A23 << 18) /**< Shifted mode A23 for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 491 #define EBI_ROUTE_APEN_A24 (_EBI_ROUTE_APEN_A24 << 18) /**< Shifted mode A24 for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 492 #define EBI_ROUTE_APEN_A25 (_EBI_ROUTE_APEN_A25 << 18) /**< Shifted mode A25 for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 493 #define EBI_ROUTE_APEN_A26 (_EBI_ROUTE_APEN_A26 << 18) /**< Shifted mode A26 for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 494 #define EBI_ROUTE_APEN_A27 (_EBI_ROUTE_APEN_A27 << 18) /**< Shifted mode A27 for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 495 #define EBI_ROUTE_APEN_A28 (_EBI_ROUTE_APEN_A28 << 18) /**< Shifted mode A28 for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 496 #define EBI_ROUTE_TFTPEN (0x1UL << 24) /**< EBI_TFT Pin Enable */
bogdanm 0:9b334a45a8ff 497 #define _EBI_ROUTE_TFTPEN_SHIFT 24 /**< Shift value for EBI_TFTPEN */
bogdanm 0:9b334a45a8ff 498 #define _EBI_ROUTE_TFTPEN_MASK 0x1000000UL /**< Bit mask for EBI_TFTPEN */
bogdanm 0:9b334a45a8ff 499 #define _EBI_ROUTE_TFTPEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 500 #define EBI_ROUTE_TFTPEN_DEFAULT (_EBI_ROUTE_TFTPEN_DEFAULT << 24) /**< Shifted mode DEFAULT for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 501 #define EBI_ROUTE_DATAENPEN (0x1UL << 25) /**< EBI_TFT Pin Enable */
bogdanm 0:9b334a45a8ff 502 #define _EBI_ROUTE_DATAENPEN_SHIFT 25 /**< Shift value for EBI_DATAENPEN */
bogdanm 0:9b334a45a8ff 503 #define _EBI_ROUTE_DATAENPEN_MASK 0x2000000UL /**< Bit mask for EBI_DATAENPEN */
bogdanm 0:9b334a45a8ff 504 #define _EBI_ROUTE_DATAENPEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 505 #define EBI_ROUTE_DATAENPEN_DEFAULT (_EBI_ROUTE_DATAENPEN_DEFAULT << 25) /**< Shifted mode DEFAULT for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 506 #define EBI_ROUTE_CSTFTPEN (0x1UL << 26) /**< EBI_CSTFT Pin Enable */
bogdanm 0:9b334a45a8ff 507 #define _EBI_ROUTE_CSTFTPEN_SHIFT 26 /**< Shift value for EBI_CSTFTPEN */
bogdanm 0:9b334a45a8ff 508 #define _EBI_ROUTE_CSTFTPEN_MASK 0x4000000UL /**< Bit mask for EBI_CSTFTPEN */
bogdanm 0:9b334a45a8ff 509 #define _EBI_ROUTE_CSTFTPEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 510 #define EBI_ROUTE_CSTFTPEN_DEFAULT (_EBI_ROUTE_CSTFTPEN_DEFAULT << 26) /**< Shifted mode DEFAULT for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 511 #define _EBI_ROUTE_LOCATION_SHIFT 28 /**< Shift value for EBI_LOCATION */
bogdanm 0:9b334a45a8ff 512 #define _EBI_ROUTE_LOCATION_MASK 0x70000000UL /**< Bit mask for EBI_LOCATION */
bogdanm 0:9b334a45a8ff 513 #define _EBI_ROUTE_LOCATION_LOC0 0x00000000UL /**< Mode LOC0 for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 514 #define _EBI_ROUTE_LOCATION_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 515 #define _EBI_ROUTE_LOCATION_LOC1 0x00000001UL /**< Mode LOC1 for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 516 #define _EBI_ROUTE_LOCATION_LOC2 0x00000002UL /**< Mode LOC2 for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 517 #define EBI_ROUTE_LOCATION_LOC0 (_EBI_ROUTE_LOCATION_LOC0 << 28) /**< Shifted mode LOC0 for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 518 #define EBI_ROUTE_LOCATION_DEFAULT (_EBI_ROUTE_LOCATION_DEFAULT << 28) /**< Shifted mode DEFAULT for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 519 #define EBI_ROUTE_LOCATION_LOC1 (_EBI_ROUTE_LOCATION_LOC1 << 28) /**< Shifted mode LOC1 for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 520 #define EBI_ROUTE_LOCATION_LOC2 (_EBI_ROUTE_LOCATION_LOC2 << 28) /**< Shifted mode LOC2 for EBI_ROUTE */
bogdanm 0:9b334a45a8ff 521
bogdanm 0:9b334a45a8ff 522 /* Bit fields for EBI ADDRTIMING1 */
bogdanm 0:9b334a45a8ff 523 #define _EBI_ADDRTIMING1_RESETVALUE 0x00000303UL /**< Default value for EBI_ADDRTIMING1 */
bogdanm 0:9b334a45a8ff 524 #define _EBI_ADDRTIMING1_MASK 0x10000303UL /**< Mask for EBI_ADDRTIMING1 */
bogdanm 0:9b334a45a8ff 525 #define _EBI_ADDRTIMING1_ADDRSETUP_SHIFT 0 /**< Shift value for EBI_ADDRSETUP */
bogdanm 0:9b334a45a8ff 526 #define _EBI_ADDRTIMING1_ADDRSETUP_MASK 0x3UL /**< Bit mask for EBI_ADDRSETUP */
bogdanm 0:9b334a45a8ff 527 #define _EBI_ADDRTIMING1_ADDRSETUP_DEFAULT 0x00000003UL /**< Mode DEFAULT for EBI_ADDRTIMING1 */
bogdanm 0:9b334a45a8ff 528 #define EBI_ADDRTIMING1_ADDRSETUP_DEFAULT (_EBI_ADDRTIMING1_ADDRSETUP_DEFAULT << 0) /**< Shifted mode DEFAULT for EBI_ADDRTIMING1 */
bogdanm 0:9b334a45a8ff 529 #define _EBI_ADDRTIMING1_ADDRHOLD_SHIFT 8 /**< Shift value for EBI_ADDRHOLD */
bogdanm 0:9b334a45a8ff 530 #define _EBI_ADDRTIMING1_ADDRHOLD_MASK 0x300UL /**< Bit mask for EBI_ADDRHOLD */
bogdanm 0:9b334a45a8ff 531 #define _EBI_ADDRTIMING1_ADDRHOLD_DEFAULT 0x00000003UL /**< Mode DEFAULT for EBI_ADDRTIMING1 */
bogdanm 0:9b334a45a8ff 532 #define EBI_ADDRTIMING1_ADDRHOLD_DEFAULT (_EBI_ADDRTIMING1_ADDRHOLD_DEFAULT << 8) /**< Shifted mode DEFAULT for EBI_ADDRTIMING1 */
bogdanm 0:9b334a45a8ff 533 #define EBI_ADDRTIMING1_HALFALE (0x1UL << 28) /**< Half Cycle ALE Strobe Duration Enable */
bogdanm 0:9b334a45a8ff 534 #define _EBI_ADDRTIMING1_HALFALE_SHIFT 28 /**< Shift value for EBI_HALFALE */
bogdanm 0:9b334a45a8ff 535 #define _EBI_ADDRTIMING1_HALFALE_MASK 0x10000000UL /**< Bit mask for EBI_HALFALE */
bogdanm 0:9b334a45a8ff 536 #define _EBI_ADDRTIMING1_HALFALE_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_ADDRTIMING1 */
bogdanm 0:9b334a45a8ff 537 #define EBI_ADDRTIMING1_HALFALE_DEFAULT (_EBI_ADDRTIMING1_HALFALE_DEFAULT << 28) /**< Shifted mode DEFAULT for EBI_ADDRTIMING1 */
bogdanm 0:9b334a45a8ff 538
bogdanm 0:9b334a45a8ff 539 /* Bit fields for EBI RDTIMING1 */
bogdanm 0:9b334a45a8ff 540 #define _EBI_RDTIMING1_RESETVALUE 0x00033F03UL /**< Default value for EBI_RDTIMING1 */
bogdanm 0:9b334a45a8ff 541 #define _EBI_RDTIMING1_MASK 0x70033F03UL /**< Mask for EBI_RDTIMING1 */
bogdanm 0:9b334a45a8ff 542 #define _EBI_RDTIMING1_RDSETUP_SHIFT 0 /**< Shift value for EBI_RDSETUP */
bogdanm 0:9b334a45a8ff 543 #define _EBI_RDTIMING1_RDSETUP_MASK 0x3UL /**< Bit mask for EBI_RDSETUP */
bogdanm 0:9b334a45a8ff 544 #define _EBI_RDTIMING1_RDSETUP_DEFAULT 0x00000003UL /**< Mode DEFAULT for EBI_RDTIMING1 */
bogdanm 0:9b334a45a8ff 545 #define EBI_RDTIMING1_RDSETUP_DEFAULT (_EBI_RDTIMING1_RDSETUP_DEFAULT << 0) /**< Shifted mode DEFAULT for EBI_RDTIMING1 */
bogdanm 0:9b334a45a8ff 546 #define _EBI_RDTIMING1_RDSTRB_SHIFT 8 /**< Shift value for EBI_RDSTRB */
bogdanm 0:9b334a45a8ff 547 #define _EBI_RDTIMING1_RDSTRB_MASK 0x3F00UL /**< Bit mask for EBI_RDSTRB */
bogdanm 0:9b334a45a8ff 548 #define _EBI_RDTIMING1_RDSTRB_DEFAULT 0x0000003FUL /**< Mode DEFAULT for EBI_RDTIMING1 */
bogdanm 0:9b334a45a8ff 549 #define EBI_RDTIMING1_RDSTRB_DEFAULT (_EBI_RDTIMING1_RDSTRB_DEFAULT << 8) /**< Shifted mode DEFAULT for EBI_RDTIMING1 */
bogdanm 0:9b334a45a8ff 550 #define _EBI_RDTIMING1_RDHOLD_SHIFT 16 /**< Shift value for EBI_RDHOLD */
bogdanm 0:9b334a45a8ff 551 #define _EBI_RDTIMING1_RDHOLD_MASK 0x30000UL /**< Bit mask for EBI_RDHOLD */
bogdanm 0:9b334a45a8ff 552 #define _EBI_RDTIMING1_RDHOLD_DEFAULT 0x00000003UL /**< Mode DEFAULT for EBI_RDTIMING1 */
bogdanm 0:9b334a45a8ff 553 #define EBI_RDTIMING1_RDHOLD_DEFAULT (_EBI_RDTIMING1_RDHOLD_DEFAULT << 16) /**< Shifted mode DEFAULT for EBI_RDTIMING1 */
bogdanm 0:9b334a45a8ff 554 #define EBI_RDTIMING1_HALFRE (0x1UL << 28) /**< Half Cycle REn Strobe Duration Enable */
bogdanm 0:9b334a45a8ff 555 #define _EBI_RDTIMING1_HALFRE_SHIFT 28 /**< Shift value for EBI_HALFRE */
bogdanm 0:9b334a45a8ff 556 #define _EBI_RDTIMING1_HALFRE_MASK 0x10000000UL /**< Bit mask for EBI_HALFRE */
bogdanm 0:9b334a45a8ff 557 #define _EBI_RDTIMING1_HALFRE_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_RDTIMING1 */
bogdanm 0:9b334a45a8ff 558 #define EBI_RDTIMING1_HALFRE_DEFAULT (_EBI_RDTIMING1_HALFRE_DEFAULT << 28) /**< Shifted mode DEFAULT for EBI_RDTIMING1 */
bogdanm 0:9b334a45a8ff 559 #define EBI_RDTIMING1_PREFETCH (0x1UL << 29) /**< Prefetch Enable */
bogdanm 0:9b334a45a8ff 560 #define _EBI_RDTIMING1_PREFETCH_SHIFT 29 /**< Shift value for EBI_PREFETCH */
bogdanm 0:9b334a45a8ff 561 #define _EBI_RDTIMING1_PREFETCH_MASK 0x20000000UL /**< Bit mask for EBI_PREFETCH */
bogdanm 0:9b334a45a8ff 562 #define _EBI_RDTIMING1_PREFETCH_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_RDTIMING1 */
bogdanm 0:9b334a45a8ff 563 #define EBI_RDTIMING1_PREFETCH_DEFAULT (_EBI_RDTIMING1_PREFETCH_DEFAULT << 29) /**< Shifted mode DEFAULT for EBI_RDTIMING1 */
bogdanm 0:9b334a45a8ff 564 #define EBI_RDTIMING1_PAGEMODE (0x1UL << 30) /**< Page Mode Access Enable */
bogdanm 0:9b334a45a8ff 565 #define _EBI_RDTIMING1_PAGEMODE_SHIFT 30 /**< Shift value for EBI_PAGEMODE */
bogdanm 0:9b334a45a8ff 566 #define _EBI_RDTIMING1_PAGEMODE_MASK 0x40000000UL /**< Bit mask for EBI_PAGEMODE */
bogdanm 0:9b334a45a8ff 567 #define _EBI_RDTIMING1_PAGEMODE_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_RDTIMING1 */
bogdanm 0:9b334a45a8ff 568 #define EBI_RDTIMING1_PAGEMODE_DEFAULT (_EBI_RDTIMING1_PAGEMODE_DEFAULT << 30) /**< Shifted mode DEFAULT for EBI_RDTIMING1 */
bogdanm 0:9b334a45a8ff 569
bogdanm 0:9b334a45a8ff 570 /* Bit fields for EBI WRTIMING1 */
bogdanm 0:9b334a45a8ff 571 #define _EBI_WRTIMING1_RESETVALUE 0x00033F03UL /**< Default value for EBI_WRTIMING1 */
bogdanm 0:9b334a45a8ff 572 #define _EBI_WRTIMING1_MASK 0x30033F03UL /**< Mask for EBI_WRTIMING1 */
bogdanm 0:9b334a45a8ff 573 #define _EBI_WRTIMING1_WRSETUP_SHIFT 0 /**< Shift value for EBI_WRSETUP */
bogdanm 0:9b334a45a8ff 574 #define _EBI_WRTIMING1_WRSETUP_MASK 0x3UL /**< Bit mask for EBI_WRSETUP */
bogdanm 0:9b334a45a8ff 575 #define _EBI_WRTIMING1_WRSETUP_DEFAULT 0x00000003UL /**< Mode DEFAULT for EBI_WRTIMING1 */
bogdanm 0:9b334a45a8ff 576 #define EBI_WRTIMING1_WRSETUP_DEFAULT (_EBI_WRTIMING1_WRSETUP_DEFAULT << 0) /**< Shifted mode DEFAULT for EBI_WRTIMING1 */
bogdanm 0:9b334a45a8ff 577 #define _EBI_WRTIMING1_WRSTRB_SHIFT 8 /**< Shift value for EBI_WRSTRB */
bogdanm 0:9b334a45a8ff 578 #define _EBI_WRTIMING1_WRSTRB_MASK 0x3F00UL /**< Bit mask for EBI_WRSTRB */
bogdanm 0:9b334a45a8ff 579 #define _EBI_WRTIMING1_WRSTRB_DEFAULT 0x0000003FUL /**< Mode DEFAULT for EBI_WRTIMING1 */
bogdanm 0:9b334a45a8ff 580 #define EBI_WRTIMING1_WRSTRB_DEFAULT (_EBI_WRTIMING1_WRSTRB_DEFAULT << 8) /**< Shifted mode DEFAULT for EBI_WRTIMING1 */
bogdanm 0:9b334a45a8ff 581 #define _EBI_WRTIMING1_WRHOLD_SHIFT 16 /**< Shift value for EBI_WRHOLD */
bogdanm 0:9b334a45a8ff 582 #define _EBI_WRTIMING1_WRHOLD_MASK 0x30000UL /**< Bit mask for EBI_WRHOLD */
bogdanm 0:9b334a45a8ff 583 #define _EBI_WRTIMING1_WRHOLD_DEFAULT 0x00000003UL /**< Mode DEFAULT for EBI_WRTIMING1 */
bogdanm 0:9b334a45a8ff 584 #define EBI_WRTIMING1_WRHOLD_DEFAULT (_EBI_WRTIMING1_WRHOLD_DEFAULT << 16) /**< Shifted mode DEFAULT for EBI_WRTIMING1 */
bogdanm 0:9b334a45a8ff 585 #define EBI_WRTIMING1_HALFWE (0x1UL << 28) /**< Half Cycle WEn Strobe Duration Enable */
bogdanm 0:9b334a45a8ff 586 #define _EBI_WRTIMING1_HALFWE_SHIFT 28 /**< Shift value for EBI_HALFWE */
bogdanm 0:9b334a45a8ff 587 #define _EBI_WRTIMING1_HALFWE_MASK 0x10000000UL /**< Bit mask for EBI_HALFWE */
bogdanm 0:9b334a45a8ff 588 #define _EBI_WRTIMING1_HALFWE_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_WRTIMING1 */
bogdanm 0:9b334a45a8ff 589 #define EBI_WRTIMING1_HALFWE_DEFAULT (_EBI_WRTIMING1_HALFWE_DEFAULT << 28) /**< Shifted mode DEFAULT for EBI_WRTIMING1 */
bogdanm 0:9b334a45a8ff 590 #define EBI_WRTIMING1_WBUFDIS (0x1UL << 29) /**< Write Buffer Disable */
bogdanm 0:9b334a45a8ff 591 #define _EBI_WRTIMING1_WBUFDIS_SHIFT 29 /**< Shift value for EBI_WBUFDIS */
bogdanm 0:9b334a45a8ff 592 #define _EBI_WRTIMING1_WBUFDIS_MASK 0x20000000UL /**< Bit mask for EBI_WBUFDIS */
bogdanm 0:9b334a45a8ff 593 #define _EBI_WRTIMING1_WBUFDIS_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_WRTIMING1 */
bogdanm 0:9b334a45a8ff 594 #define EBI_WRTIMING1_WBUFDIS_DEFAULT (_EBI_WRTIMING1_WBUFDIS_DEFAULT << 29) /**< Shifted mode DEFAULT for EBI_WRTIMING1 */
bogdanm 0:9b334a45a8ff 595
bogdanm 0:9b334a45a8ff 596 /* Bit fields for EBI POLARITY1 */
bogdanm 0:9b334a45a8ff 597 #define _EBI_POLARITY1_RESETVALUE 0x00000000UL /**< Default value for EBI_POLARITY1 */
bogdanm 0:9b334a45a8ff 598 #define _EBI_POLARITY1_MASK 0x0000003FUL /**< Mask for EBI_POLARITY1 */
bogdanm 0:9b334a45a8ff 599 #define EBI_POLARITY1_CSPOL (0x1UL << 0) /**< Chip Select Polarity */
bogdanm 0:9b334a45a8ff 600 #define _EBI_POLARITY1_CSPOL_SHIFT 0 /**< Shift value for EBI_CSPOL */
bogdanm 0:9b334a45a8ff 601 #define _EBI_POLARITY1_CSPOL_MASK 0x1UL /**< Bit mask for EBI_CSPOL */
bogdanm 0:9b334a45a8ff 602 #define _EBI_POLARITY1_CSPOL_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_POLARITY1 */
bogdanm 0:9b334a45a8ff 603 #define _EBI_POLARITY1_CSPOL_ACTIVELOW 0x00000000UL /**< Mode ACTIVELOW for EBI_POLARITY1 */
bogdanm 0:9b334a45a8ff 604 #define _EBI_POLARITY1_CSPOL_ACTIVEHIGH 0x00000001UL /**< Mode ACTIVEHIGH for EBI_POLARITY1 */
bogdanm 0:9b334a45a8ff 605 #define EBI_POLARITY1_CSPOL_DEFAULT (_EBI_POLARITY1_CSPOL_DEFAULT << 0) /**< Shifted mode DEFAULT for EBI_POLARITY1 */
bogdanm 0:9b334a45a8ff 606 #define EBI_POLARITY1_CSPOL_ACTIVELOW (_EBI_POLARITY1_CSPOL_ACTIVELOW << 0) /**< Shifted mode ACTIVELOW for EBI_POLARITY1 */
bogdanm 0:9b334a45a8ff 607 #define EBI_POLARITY1_CSPOL_ACTIVEHIGH (_EBI_POLARITY1_CSPOL_ACTIVEHIGH << 0) /**< Shifted mode ACTIVEHIGH for EBI_POLARITY1 */
bogdanm 0:9b334a45a8ff 608 #define EBI_POLARITY1_REPOL (0x1UL << 1) /**< Read Enable Polarity */
bogdanm 0:9b334a45a8ff 609 #define _EBI_POLARITY1_REPOL_SHIFT 1 /**< Shift value for EBI_REPOL */
bogdanm 0:9b334a45a8ff 610 #define _EBI_POLARITY1_REPOL_MASK 0x2UL /**< Bit mask for EBI_REPOL */
bogdanm 0:9b334a45a8ff 611 #define _EBI_POLARITY1_REPOL_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_POLARITY1 */
bogdanm 0:9b334a45a8ff 612 #define _EBI_POLARITY1_REPOL_ACTIVELOW 0x00000000UL /**< Mode ACTIVELOW for EBI_POLARITY1 */
bogdanm 0:9b334a45a8ff 613 #define _EBI_POLARITY1_REPOL_ACTIVEHIGH 0x00000001UL /**< Mode ACTIVEHIGH for EBI_POLARITY1 */
bogdanm 0:9b334a45a8ff 614 #define EBI_POLARITY1_REPOL_DEFAULT (_EBI_POLARITY1_REPOL_DEFAULT << 1) /**< Shifted mode DEFAULT for EBI_POLARITY1 */
bogdanm 0:9b334a45a8ff 615 #define EBI_POLARITY1_REPOL_ACTIVELOW (_EBI_POLARITY1_REPOL_ACTIVELOW << 1) /**< Shifted mode ACTIVELOW for EBI_POLARITY1 */
bogdanm 0:9b334a45a8ff 616 #define EBI_POLARITY1_REPOL_ACTIVEHIGH (_EBI_POLARITY1_REPOL_ACTIVEHIGH << 1) /**< Shifted mode ACTIVEHIGH for EBI_POLARITY1 */
bogdanm 0:9b334a45a8ff 617 #define EBI_POLARITY1_WEPOL (0x1UL << 2) /**< Write Enable Polarity */
bogdanm 0:9b334a45a8ff 618 #define _EBI_POLARITY1_WEPOL_SHIFT 2 /**< Shift value for EBI_WEPOL */
bogdanm 0:9b334a45a8ff 619 #define _EBI_POLARITY1_WEPOL_MASK 0x4UL /**< Bit mask for EBI_WEPOL */
bogdanm 0:9b334a45a8ff 620 #define _EBI_POLARITY1_WEPOL_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_POLARITY1 */
bogdanm 0:9b334a45a8ff 621 #define _EBI_POLARITY1_WEPOL_ACTIVELOW 0x00000000UL /**< Mode ACTIVELOW for EBI_POLARITY1 */
bogdanm 0:9b334a45a8ff 622 #define _EBI_POLARITY1_WEPOL_ACTIVEHIGH 0x00000001UL /**< Mode ACTIVEHIGH for EBI_POLARITY1 */
bogdanm 0:9b334a45a8ff 623 #define EBI_POLARITY1_WEPOL_DEFAULT (_EBI_POLARITY1_WEPOL_DEFAULT << 2) /**< Shifted mode DEFAULT for EBI_POLARITY1 */
bogdanm 0:9b334a45a8ff 624 #define EBI_POLARITY1_WEPOL_ACTIVELOW (_EBI_POLARITY1_WEPOL_ACTIVELOW << 2) /**< Shifted mode ACTIVELOW for EBI_POLARITY1 */
bogdanm 0:9b334a45a8ff 625 #define EBI_POLARITY1_WEPOL_ACTIVEHIGH (_EBI_POLARITY1_WEPOL_ACTIVEHIGH << 2) /**< Shifted mode ACTIVEHIGH for EBI_POLARITY1 */
bogdanm 0:9b334a45a8ff 626 #define EBI_POLARITY1_ALEPOL (0x1UL << 3) /**< Address Latch Polarity */
bogdanm 0:9b334a45a8ff 627 #define _EBI_POLARITY1_ALEPOL_SHIFT 3 /**< Shift value for EBI_ALEPOL */
bogdanm 0:9b334a45a8ff 628 #define _EBI_POLARITY1_ALEPOL_MASK 0x8UL /**< Bit mask for EBI_ALEPOL */
bogdanm 0:9b334a45a8ff 629 #define _EBI_POLARITY1_ALEPOL_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_POLARITY1 */
bogdanm 0:9b334a45a8ff 630 #define _EBI_POLARITY1_ALEPOL_ACTIVELOW 0x00000000UL /**< Mode ACTIVELOW for EBI_POLARITY1 */
bogdanm 0:9b334a45a8ff 631 #define _EBI_POLARITY1_ALEPOL_ACTIVEHIGH 0x00000001UL /**< Mode ACTIVEHIGH for EBI_POLARITY1 */
bogdanm 0:9b334a45a8ff 632 #define EBI_POLARITY1_ALEPOL_DEFAULT (_EBI_POLARITY1_ALEPOL_DEFAULT << 3) /**< Shifted mode DEFAULT for EBI_POLARITY1 */
bogdanm 0:9b334a45a8ff 633 #define EBI_POLARITY1_ALEPOL_ACTIVELOW (_EBI_POLARITY1_ALEPOL_ACTIVELOW << 3) /**< Shifted mode ACTIVELOW for EBI_POLARITY1 */
bogdanm 0:9b334a45a8ff 634 #define EBI_POLARITY1_ALEPOL_ACTIVEHIGH (_EBI_POLARITY1_ALEPOL_ACTIVEHIGH << 3) /**< Shifted mode ACTIVEHIGH for EBI_POLARITY1 */
bogdanm 0:9b334a45a8ff 635 #define EBI_POLARITY1_ARDYPOL (0x1UL << 4) /**< ARDY Polarity */
bogdanm 0:9b334a45a8ff 636 #define _EBI_POLARITY1_ARDYPOL_SHIFT 4 /**< Shift value for EBI_ARDYPOL */
bogdanm 0:9b334a45a8ff 637 #define _EBI_POLARITY1_ARDYPOL_MASK 0x10UL /**< Bit mask for EBI_ARDYPOL */
bogdanm 0:9b334a45a8ff 638 #define _EBI_POLARITY1_ARDYPOL_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_POLARITY1 */
bogdanm 0:9b334a45a8ff 639 #define _EBI_POLARITY1_ARDYPOL_ACTIVELOW 0x00000000UL /**< Mode ACTIVELOW for EBI_POLARITY1 */
bogdanm 0:9b334a45a8ff 640 #define _EBI_POLARITY1_ARDYPOL_ACTIVEHIGH 0x00000001UL /**< Mode ACTIVEHIGH for EBI_POLARITY1 */
bogdanm 0:9b334a45a8ff 641 #define EBI_POLARITY1_ARDYPOL_DEFAULT (_EBI_POLARITY1_ARDYPOL_DEFAULT << 4) /**< Shifted mode DEFAULT for EBI_POLARITY1 */
bogdanm 0:9b334a45a8ff 642 #define EBI_POLARITY1_ARDYPOL_ACTIVELOW (_EBI_POLARITY1_ARDYPOL_ACTIVELOW << 4) /**< Shifted mode ACTIVELOW for EBI_POLARITY1 */
bogdanm 0:9b334a45a8ff 643 #define EBI_POLARITY1_ARDYPOL_ACTIVEHIGH (_EBI_POLARITY1_ARDYPOL_ACTIVEHIGH << 4) /**< Shifted mode ACTIVEHIGH for EBI_POLARITY1 */
bogdanm 0:9b334a45a8ff 644 #define EBI_POLARITY1_BLPOL (0x1UL << 5) /**< BL Polarity */
bogdanm 0:9b334a45a8ff 645 #define _EBI_POLARITY1_BLPOL_SHIFT 5 /**< Shift value for EBI_BLPOL */
bogdanm 0:9b334a45a8ff 646 #define _EBI_POLARITY1_BLPOL_MASK 0x20UL /**< Bit mask for EBI_BLPOL */
bogdanm 0:9b334a45a8ff 647 #define _EBI_POLARITY1_BLPOL_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_POLARITY1 */
bogdanm 0:9b334a45a8ff 648 #define _EBI_POLARITY1_BLPOL_ACTIVELOW 0x00000000UL /**< Mode ACTIVELOW for EBI_POLARITY1 */
bogdanm 0:9b334a45a8ff 649 #define _EBI_POLARITY1_BLPOL_ACTIVEHIGH 0x00000001UL /**< Mode ACTIVEHIGH for EBI_POLARITY1 */
bogdanm 0:9b334a45a8ff 650 #define EBI_POLARITY1_BLPOL_DEFAULT (_EBI_POLARITY1_BLPOL_DEFAULT << 5) /**< Shifted mode DEFAULT for EBI_POLARITY1 */
bogdanm 0:9b334a45a8ff 651 #define EBI_POLARITY1_BLPOL_ACTIVELOW (_EBI_POLARITY1_BLPOL_ACTIVELOW << 5) /**< Shifted mode ACTIVELOW for EBI_POLARITY1 */
bogdanm 0:9b334a45a8ff 652 #define EBI_POLARITY1_BLPOL_ACTIVEHIGH (_EBI_POLARITY1_BLPOL_ACTIVEHIGH << 5) /**< Shifted mode ACTIVEHIGH for EBI_POLARITY1 */
bogdanm 0:9b334a45a8ff 653
bogdanm 0:9b334a45a8ff 654 /* Bit fields for EBI ADDRTIMING2 */
bogdanm 0:9b334a45a8ff 655 #define _EBI_ADDRTIMING2_RESETVALUE 0x00000303UL /**< Default value for EBI_ADDRTIMING2 */
bogdanm 0:9b334a45a8ff 656 #define _EBI_ADDRTIMING2_MASK 0x10000303UL /**< Mask for EBI_ADDRTIMING2 */
bogdanm 0:9b334a45a8ff 657 #define _EBI_ADDRTIMING2_ADDRSETUP_SHIFT 0 /**< Shift value for EBI_ADDRSETUP */
bogdanm 0:9b334a45a8ff 658 #define _EBI_ADDRTIMING2_ADDRSETUP_MASK 0x3UL /**< Bit mask for EBI_ADDRSETUP */
bogdanm 0:9b334a45a8ff 659 #define _EBI_ADDRTIMING2_ADDRSETUP_DEFAULT 0x00000003UL /**< Mode DEFAULT for EBI_ADDRTIMING2 */
bogdanm 0:9b334a45a8ff 660 #define EBI_ADDRTIMING2_ADDRSETUP_DEFAULT (_EBI_ADDRTIMING2_ADDRSETUP_DEFAULT << 0) /**< Shifted mode DEFAULT for EBI_ADDRTIMING2 */
bogdanm 0:9b334a45a8ff 661 #define _EBI_ADDRTIMING2_ADDRHOLD_SHIFT 8 /**< Shift value for EBI_ADDRHOLD */
bogdanm 0:9b334a45a8ff 662 #define _EBI_ADDRTIMING2_ADDRHOLD_MASK 0x300UL /**< Bit mask for EBI_ADDRHOLD */
bogdanm 0:9b334a45a8ff 663 #define _EBI_ADDRTIMING2_ADDRHOLD_DEFAULT 0x00000003UL /**< Mode DEFAULT for EBI_ADDRTIMING2 */
bogdanm 0:9b334a45a8ff 664 #define EBI_ADDRTIMING2_ADDRHOLD_DEFAULT (_EBI_ADDRTIMING2_ADDRHOLD_DEFAULT << 8) /**< Shifted mode DEFAULT for EBI_ADDRTIMING2 */
bogdanm 0:9b334a45a8ff 665 #define EBI_ADDRTIMING2_HALFALE (0x1UL << 28) /**< Half Cycle ALE Strobe Duration Enable */
bogdanm 0:9b334a45a8ff 666 #define _EBI_ADDRTIMING2_HALFALE_SHIFT 28 /**< Shift value for EBI_HALFALE */
bogdanm 0:9b334a45a8ff 667 #define _EBI_ADDRTIMING2_HALFALE_MASK 0x10000000UL /**< Bit mask for EBI_HALFALE */
bogdanm 0:9b334a45a8ff 668 #define _EBI_ADDRTIMING2_HALFALE_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_ADDRTIMING2 */
bogdanm 0:9b334a45a8ff 669 #define EBI_ADDRTIMING2_HALFALE_DEFAULT (_EBI_ADDRTIMING2_HALFALE_DEFAULT << 28) /**< Shifted mode DEFAULT for EBI_ADDRTIMING2 */
bogdanm 0:9b334a45a8ff 670
bogdanm 0:9b334a45a8ff 671 /* Bit fields for EBI RDTIMING2 */
bogdanm 0:9b334a45a8ff 672 #define _EBI_RDTIMING2_RESETVALUE 0x00033F03UL /**< Default value for EBI_RDTIMING2 */
bogdanm 0:9b334a45a8ff 673 #define _EBI_RDTIMING2_MASK 0x70033F03UL /**< Mask for EBI_RDTIMING2 */
bogdanm 0:9b334a45a8ff 674 #define _EBI_RDTIMING2_RDSETUP_SHIFT 0 /**< Shift value for EBI_RDSETUP */
bogdanm 0:9b334a45a8ff 675 #define _EBI_RDTIMING2_RDSETUP_MASK 0x3UL /**< Bit mask for EBI_RDSETUP */
bogdanm 0:9b334a45a8ff 676 #define _EBI_RDTIMING2_RDSETUP_DEFAULT 0x00000003UL /**< Mode DEFAULT for EBI_RDTIMING2 */
bogdanm 0:9b334a45a8ff 677 #define EBI_RDTIMING2_RDSETUP_DEFAULT (_EBI_RDTIMING2_RDSETUP_DEFAULT << 0) /**< Shifted mode DEFAULT for EBI_RDTIMING2 */
bogdanm 0:9b334a45a8ff 678 #define _EBI_RDTIMING2_RDSTRB_SHIFT 8 /**< Shift value for EBI_RDSTRB */
bogdanm 0:9b334a45a8ff 679 #define _EBI_RDTIMING2_RDSTRB_MASK 0x3F00UL /**< Bit mask for EBI_RDSTRB */
bogdanm 0:9b334a45a8ff 680 #define _EBI_RDTIMING2_RDSTRB_DEFAULT 0x0000003FUL /**< Mode DEFAULT for EBI_RDTIMING2 */
bogdanm 0:9b334a45a8ff 681 #define EBI_RDTIMING2_RDSTRB_DEFAULT (_EBI_RDTIMING2_RDSTRB_DEFAULT << 8) /**< Shifted mode DEFAULT for EBI_RDTIMING2 */
bogdanm 0:9b334a45a8ff 682 #define _EBI_RDTIMING2_RDHOLD_SHIFT 16 /**< Shift value for EBI_RDHOLD */
bogdanm 0:9b334a45a8ff 683 #define _EBI_RDTIMING2_RDHOLD_MASK 0x30000UL /**< Bit mask for EBI_RDHOLD */
bogdanm 0:9b334a45a8ff 684 #define _EBI_RDTIMING2_RDHOLD_DEFAULT 0x00000003UL /**< Mode DEFAULT for EBI_RDTIMING2 */
bogdanm 0:9b334a45a8ff 685 #define EBI_RDTIMING2_RDHOLD_DEFAULT (_EBI_RDTIMING2_RDHOLD_DEFAULT << 16) /**< Shifted mode DEFAULT for EBI_RDTIMING2 */
bogdanm 0:9b334a45a8ff 686 #define EBI_RDTIMING2_HALFRE (0x1UL << 28) /**< Half Cycle REn Strobe Duration Enable */
bogdanm 0:9b334a45a8ff 687 #define _EBI_RDTIMING2_HALFRE_SHIFT 28 /**< Shift value for EBI_HALFRE */
bogdanm 0:9b334a45a8ff 688 #define _EBI_RDTIMING2_HALFRE_MASK 0x10000000UL /**< Bit mask for EBI_HALFRE */
bogdanm 0:9b334a45a8ff 689 #define _EBI_RDTIMING2_HALFRE_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_RDTIMING2 */
bogdanm 0:9b334a45a8ff 690 #define EBI_RDTIMING2_HALFRE_DEFAULT (_EBI_RDTIMING2_HALFRE_DEFAULT << 28) /**< Shifted mode DEFAULT for EBI_RDTIMING2 */
bogdanm 0:9b334a45a8ff 691 #define EBI_RDTIMING2_PREFETCH (0x1UL << 29) /**< Prefetch Enable */
bogdanm 0:9b334a45a8ff 692 #define _EBI_RDTIMING2_PREFETCH_SHIFT 29 /**< Shift value for EBI_PREFETCH */
bogdanm 0:9b334a45a8ff 693 #define _EBI_RDTIMING2_PREFETCH_MASK 0x20000000UL /**< Bit mask for EBI_PREFETCH */
bogdanm 0:9b334a45a8ff 694 #define _EBI_RDTIMING2_PREFETCH_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_RDTIMING2 */
bogdanm 0:9b334a45a8ff 695 #define EBI_RDTIMING2_PREFETCH_DEFAULT (_EBI_RDTIMING2_PREFETCH_DEFAULT << 29) /**< Shifted mode DEFAULT for EBI_RDTIMING2 */
bogdanm 0:9b334a45a8ff 696 #define EBI_RDTIMING2_PAGEMODE (0x1UL << 30) /**< Page Mode Access Enable */
bogdanm 0:9b334a45a8ff 697 #define _EBI_RDTIMING2_PAGEMODE_SHIFT 30 /**< Shift value for EBI_PAGEMODE */
bogdanm 0:9b334a45a8ff 698 #define _EBI_RDTIMING2_PAGEMODE_MASK 0x40000000UL /**< Bit mask for EBI_PAGEMODE */
bogdanm 0:9b334a45a8ff 699 #define _EBI_RDTIMING2_PAGEMODE_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_RDTIMING2 */
bogdanm 0:9b334a45a8ff 700 #define EBI_RDTIMING2_PAGEMODE_DEFAULT (_EBI_RDTIMING2_PAGEMODE_DEFAULT << 30) /**< Shifted mode DEFAULT for EBI_RDTIMING2 */
bogdanm 0:9b334a45a8ff 701
bogdanm 0:9b334a45a8ff 702 /* Bit fields for EBI WRTIMING2 */
bogdanm 0:9b334a45a8ff 703 #define _EBI_WRTIMING2_RESETVALUE 0x00033F03UL /**< Default value for EBI_WRTIMING2 */
bogdanm 0:9b334a45a8ff 704 #define _EBI_WRTIMING2_MASK 0x30033F03UL /**< Mask for EBI_WRTIMING2 */
bogdanm 0:9b334a45a8ff 705 #define _EBI_WRTIMING2_WRSETUP_SHIFT 0 /**< Shift value for EBI_WRSETUP */
bogdanm 0:9b334a45a8ff 706 #define _EBI_WRTIMING2_WRSETUP_MASK 0x3UL /**< Bit mask for EBI_WRSETUP */
bogdanm 0:9b334a45a8ff 707 #define _EBI_WRTIMING2_WRSETUP_DEFAULT 0x00000003UL /**< Mode DEFAULT for EBI_WRTIMING2 */
bogdanm 0:9b334a45a8ff 708 #define EBI_WRTIMING2_WRSETUP_DEFAULT (_EBI_WRTIMING2_WRSETUP_DEFAULT << 0) /**< Shifted mode DEFAULT for EBI_WRTIMING2 */
bogdanm 0:9b334a45a8ff 709 #define _EBI_WRTIMING2_WRSTRB_SHIFT 8 /**< Shift value for EBI_WRSTRB */
bogdanm 0:9b334a45a8ff 710 #define _EBI_WRTIMING2_WRSTRB_MASK 0x3F00UL /**< Bit mask for EBI_WRSTRB */
bogdanm 0:9b334a45a8ff 711 #define _EBI_WRTIMING2_WRSTRB_DEFAULT 0x0000003FUL /**< Mode DEFAULT for EBI_WRTIMING2 */
bogdanm 0:9b334a45a8ff 712 #define EBI_WRTIMING2_WRSTRB_DEFAULT (_EBI_WRTIMING2_WRSTRB_DEFAULT << 8) /**< Shifted mode DEFAULT for EBI_WRTIMING2 */
bogdanm 0:9b334a45a8ff 713 #define _EBI_WRTIMING2_WRHOLD_SHIFT 16 /**< Shift value for EBI_WRHOLD */
bogdanm 0:9b334a45a8ff 714 #define _EBI_WRTIMING2_WRHOLD_MASK 0x30000UL /**< Bit mask for EBI_WRHOLD */
bogdanm 0:9b334a45a8ff 715 #define _EBI_WRTIMING2_WRHOLD_DEFAULT 0x00000003UL /**< Mode DEFAULT for EBI_WRTIMING2 */
bogdanm 0:9b334a45a8ff 716 #define EBI_WRTIMING2_WRHOLD_DEFAULT (_EBI_WRTIMING2_WRHOLD_DEFAULT << 16) /**< Shifted mode DEFAULT for EBI_WRTIMING2 */
bogdanm 0:9b334a45a8ff 717 #define EBI_WRTIMING2_HALFWE (0x1UL << 28) /**< Half Cycle WEn Strobe Duration Enable */
bogdanm 0:9b334a45a8ff 718 #define _EBI_WRTIMING2_HALFWE_SHIFT 28 /**< Shift value for EBI_HALFWE */
bogdanm 0:9b334a45a8ff 719 #define _EBI_WRTIMING2_HALFWE_MASK 0x10000000UL /**< Bit mask for EBI_HALFWE */
bogdanm 0:9b334a45a8ff 720 #define _EBI_WRTIMING2_HALFWE_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_WRTIMING2 */
bogdanm 0:9b334a45a8ff 721 #define EBI_WRTIMING2_HALFWE_DEFAULT (_EBI_WRTIMING2_HALFWE_DEFAULT << 28) /**< Shifted mode DEFAULT for EBI_WRTIMING2 */
bogdanm 0:9b334a45a8ff 722 #define EBI_WRTIMING2_WBUFDIS (0x1UL << 29) /**< Write Buffer Disable */
bogdanm 0:9b334a45a8ff 723 #define _EBI_WRTIMING2_WBUFDIS_SHIFT 29 /**< Shift value for EBI_WBUFDIS */
bogdanm 0:9b334a45a8ff 724 #define _EBI_WRTIMING2_WBUFDIS_MASK 0x20000000UL /**< Bit mask for EBI_WBUFDIS */
bogdanm 0:9b334a45a8ff 725 #define _EBI_WRTIMING2_WBUFDIS_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_WRTIMING2 */
bogdanm 0:9b334a45a8ff 726 #define EBI_WRTIMING2_WBUFDIS_DEFAULT (_EBI_WRTIMING2_WBUFDIS_DEFAULT << 29) /**< Shifted mode DEFAULT for EBI_WRTIMING2 */
bogdanm 0:9b334a45a8ff 727
bogdanm 0:9b334a45a8ff 728 /* Bit fields for EBI POLARITY2 */
bogdanm 0:9b334a45a8ff 729 #define _EBI_POLARITY2_RESETVALUE 0x00000000UL /**< Default value for EBI_POLARITY2 */
bogdanm 0:9b334a45a8ff 730 #define _EBI_POLARITY2_MASK 0x0000003FUL /**< Mask for EBI_POLARITY2 */
bogdanm 0:9b334a45a8ff 731 #define EBI_POLARITY2_CSPOL (0x1UL << 0) /**< Chip Select Polarity */
bogdanm 0:9b334a45a8ff 732 #define _EBI_POLARITY2_CSPOL_SHIFT 0 /**< Shift value for EBI_CSPOL */
bogdanm 0:9b334a45a8ff 733 #define _EBI_POLARITY2_CSPOL_MASK 0x1UL /**< Bit mask for EBI_CSPOL */
bogdanm 0:9b334a45a8ff 734 #define _EBI_POLARITY2_CSPOL_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_POLARITY2 */
bogdanm 0:9b334a45a8ff 735 #define _EBI_POLARITY2_CSPOL_ACTIVELOW 0x00000000UL /**< Mode ACTIVELOW for EBI_POLARITY2 */
bogdanm 0:9b334a45a8ff 736 #define _EBI_POLARITY2_CSPOL_ACTIVEHIGH 0x00000001UL /**< Mode ACTIVEHIGH for EBI_POLARITY2 */
bogdanm 0:9b334a45a8ff 737 #define EBI_POLARITY2_CSPOL_DEFAULT (_EBI_POLARITY2_CSPOL_DEFAULT << 0) /**< Shifted mode DEFAULT for EBI_POLARITY2 */
bogdanm 0:9b334a45a8ff 738 #define EBI_POLARITY2_CSPOL_ACTIVELOW (_EBI_POLARITY2_CSPOL_ACTIVELOW << 0) /**< Shifted mode ACTIVELOW for EBI_POLARITY2 */
bogdanm 0:9b334a45a8ff 739 #define EBI_POLARITY2_CSPOL_ACTIVEHIGH (_EBI_POLARITY2_CSPOL_ACTIVEHIGH << 0) /**< Shifted mode ACTIVEHIGH for EBI_POLARITY2 */
bogdanm 0:9b334a45a8ff 740 #define EBI_POLARITY2_REPOL (0x1UL << 1) /**< Read Enable Polarity */
bogdanm 0:9b334a45a8ff 741 #define _EBI_POLARITY2_REPOL_SHIFT 1 /**< Shift value for EBI_REPOL */
bogdanm 0:9b334a45a8ff 742 #define _EBI_POLARITY2_REPOL_MASK 0x2UL /**< Bit mask for EBI_REPOL */
bogdanm 0:9b334a45a8ff 743 #define _EBI_POLARITY2_REPOL_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_POLARITY2 */
bogdanm 0:9b334a45a8ff 744 #define _EBI_POLARITY2_REPOL_ACTIVELOW 0x00000000UL /**< Mode ACTIVELOW for EBI_POLARITY2 */
bogdanm 0:9b334a45a8ff 745 #define _EBI_POLARITY2_REPOL_ACTIVEHIGH 0x00000001UL /**< Mode ACTIVEHIGH for EBI_POLARITY2 */
bogdanm 0:9b334a45a8ff 746 #define EBI_POLARITY2_REPOL_DEFAULT (_EBI_POLARITY2_REPOL_DEFAULT << 1) /**< Shifted mode DEFAULT for EBI_POLARITY2 */
bogdanm 0:9b334a45a8ff 747 #define EBI_POLARITY2_REPOL_ACTIVELOW (_EBI_POLARITY2_REPOL_ACTIVELOW << 1) /**< Shifted mode ACTIVELOW for EBI_POLARITY2 */
bogdanm 0:9b334a45a8ff 748 #define EBI_POLARITY2_REPOL_ACTIVEHIGH (_EBI_POLARITY2_REPOL_ACTIVEHIGH << 1) /**< Shifted mode ACTIVEHIGH for EBI_POLARITY2 */
bogdanm 0:9b334a45a8ff 749 #define EBI_POLARITY2_WEPOL (0x1UL << 2) /**< Write Enable Polarity */
bogdanm 0:9b334a45a8ff 750 #define _EBI_POLARITY2_WEPOL_SHIFT 2 /**< Shift value for EBI_WEPOL */
bogdanm 0:9b334a45a8ff 751 #define _EBI_POLARITY2_WEPOL_MASK 0x4UL /**< Bit mask for EBI_WEPOL */
bogdanm 0:9b334a45a8ff 752 #define _EBI_POLARITY2_WEPOL_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_POLARITY2 */
bogdanm 0:9b334a45a8ff 753 #define _EBI_POLARITY2_WEPOL_ACTIVELOW 0x00000000UL /**< Mode ACTIVELOW for EBI_POLARITY2 */
bogdanm 0:9b334a45a8ff 754 #define _EBI_POLARITY2_WEPOL_ACTIVEHIGH 0x00000001UL /**< Mode ACTIVEHIGH for EBI_POLARITY2 */
bogdanm 0:9b334a45a8ff 755 #define EBI_POLARITY2_WEPOL_DEFAULT (_EBI_POLARITY2_WEPOL_DEFAULT << 2) /**< Shifted mode DEFAULT for EBI_POLARITY2 */
bogdanm 0:9b334a45a8ff 756 #define EBI_POLARITY2_WEPOL_ACTIVELOW (_EBI_POLARITY2_WEPOL_ACTIVELOW << 2) /**< Shifted mode ACTIVELOW for EBI_POLARITY2 */
bogdanm 0:9b334a45a8ff 757 #define EBI_POLARITY2_WEPOL_ACTIVEHIGH (_EBI_POLARITY2_WEPOL_ACTIVEHIGH << 2) /**< Shifted mode ACTIVEHIGH for EBI_POLARITY2 */
bogdanm 0:9b334a45a8ff 758 #define EBI_POLARITY2_ALEPOL (0x1UL << 3) /**< Address Latch Polarity */
bogdanm 0:9b334a45a8ff 759 #define _EBI_POLARITY2_ALEPOL_SHIFT 3 /**< Shift value for EBI_ALEPOL */
bogdanm 0:9b334a45a8ff 760 #define _EBI_POLARITY2_ALEPOL_MASK 0x8UL /**< Bit mask for EBI_ALEPOL */
bogdanm 0:9b334a45a8ff 761 #define _EBI_POLARITY2_ALEPOL_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_POLARITY2 */
bogdanm 0:9b334a45a8ff 762 #define _EBI_POLARITY2_ALEPOL_ACTIVELOW 0x00000000UL /**< Mode ACTIVELOW for EBI_POLARITY2 */
bogdanm 0:9b334a45a8ff 763 #define _EBI_POLARITY2_ALEPOL_ACTIVEHIGH 0x00000001UL /**< Mode ACTIVEHIGH for EBI_POLARITY2 */
bogdanm 0:9b334a45a8ff 764 #define EBI_POLARITY2_ALEPOL_DEFAULT (_EBI_POLARITY2_ALEPOL_DEFAULT << 3) /**< Shifted mode DEFAULT for EBI_POLARITY2 */
bogdanm 0:9b334a45a8ff 765 #define EBI_POLARITY2_ALEPOL_ACTIVELOW (_EBI_POLARITY2_ALEPOL_ACTIVELOW << 3) /**< Shifted mode ACTIVELOW for EBI_POLARITY2 */
bogdanm 0:9b334a45a8ff 766 #define EBI_POLARITY2_ALEPOL_ACTIVEHIGH (_EBI_POLARITY2_ALEPOL_ACTIVEHIGH << 3) /**< Shifted mode ACTIVEHIGH for EBI_POLARITY2 */
bogdanm 0:9b334a45a8ff 767 #define EBI_POLARITY2_ARDYPOL (0x1UL << 4) /**< ARDY Polarity */
bogdanm 0:9b334a45a8ff 768 #define _EBI_POLARITY2_ARDYPOL_SHIFT 4 /**< Shift value for EBI_ARDYPOL */
bogdanm 0:9b334a45a8ff 769 #define _EBI_POLARITY2_ARDYPOL_MASK 0x10UL /**< Bit mask for EBI_ARDYPOL */
bogdanm 0:9b334a45a8ff 770 #define _EBI_POLARITY2_ARDYPOL_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_POLARITY2 */
bogdanm 0:9b334a45a8ff 771 #define _EBI_POLARITY2_ARDYPOL_ACTIVELOW 0x00000000UL /**< Mode ACTIVELOW for EBI_POLARITY2 */
bogdanm 0:9b334a45a8ff 772 #define _EBI_POLARITY2_ARDYPOL_ACTIVEHIGH 0x00000001UL /**< Mode ACTIVEHIGH for EBI_POLARITY2 */
bogdanm 0:9b334a45a8ff 773 #define EBI_POLARITY2_ARDYPOL_DEFAULT (_EBI_POLARITY2_ARDYPOL_DEFAULT << 4) /**< Shifted mode DEFAULT for EBI_POLARITY2 */
bogdanm 0:9b334a45a8ff 774 #define EBI_POLARITY2_ARDYPOL_ACTIVELOW (_EBI_POLARITY2_ARDYPOL_ACTIVELOW << 4) /**< Shifted mode ACTIVELOW for EBI_POLARITY2 */
bogdanm 0:9b334a45a8ff 775 #define EBI_POLARITY2_ARDYPOL_ACTIVEHIGH (_EBI_POLARITY2_ARDYPOL_ACTIVEHIGH << 4) /**< Shifted mode ACTIVEHIGH for EBI_POLARITY2 */
bogdanm 0:9b334a45a8ff 776 #define EBI_POLARITY2_BLPOL (0x1UL << 5) /**< BL Polarity */
bogdanm 0:9b334a45a8ff 777 #define _EBI_POLARITY2_BLPOL_SHIFT 5 /**< Shift value for EBI_BLPOL */
bogdanm 0:9b334a45a8ff 778 #define _EBI_POLARITY2_BLPOL_MASK 0x20UL /**< Bit mask for EBI_BLPOL */
bogdanm 0:9b334a45a8ff 779 #define _EBI_POLARITY2_BLPOL_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_POLARITY2 */
bogdanm 0:9b334a45a8ff 780 #define _EBI_POLARITY2_BLPOL_ACTIVELOW 0x00000000UL /**< Mode ACTIVELOW for EBI_POLARITY2 */
bogdanm 0:9b334a45a8ff 781 #define _EBI_POLARITY2_BLPOL_ACTIVEHIGH 0x00000001UL /**< Mode ACTIVEHIGH for EBI_POLARITY2 */
bogdanm 0:9b334a45a8ff 782 #define EBI_POLARITY2_BLPOL_DEFAULT (_EBI_POLARITY2_BLPOL_DEFAULT << 5) /**< Shifted mode DEFAULT for EBI_POLARITY2 */
bogdanm 0:9b334a45a8ff 783 #define EBI_POLARITY2_BLPOL_ACTIVELOW (_EBI_POLARITY2_BLPOL_ACTIVELOW << 5) /**< Shifted mode ACTIVELOW for EBI_POLARITY2 */
bogdanm 0:9b334a45a8ff 784 #define EBI_POLARITY2_BLPOL_ACTIVEHIGH (_EBI_POLARITY2_BLPOL_ACTIVEHIGH << 5) /**< Shifted mode ACTIVEHIGH for EBI_POLARITY2 */
bogdanm 0:9b334a45a8ff 785
bogdanm 0:9b334a45a8ff 786 /* Bit fields for EBI ADDRTIMING3 */
bogdanm 0:9b334a45a8ff 787 #define _EBI_ADDRTIMING3_RESETVALUE 0x00000303UL /**< Default value for EBI_ADDRTIMING3 */
bogdanm 0:9b334a45a8ff 788 #define _EBI_ADDRTIMING3_MASK 0x10000303UL /**< Mask for EBI_ADDRTIMING3 */
bogdanm 0:9b334a45a8ff 789 #define _EBI_ADDRTIMING3_ADDRSETUP_SHIFT 0 /**< Shift value for EBI_ADDRSETUP */
bogdanm 0:9b334a45a8ff 790 #define _EBI_ADDRTIMING3_ADDRSETUP_MASK 0x3UL /**< Bit mask for EBI_ADDRSETUP */
bogdanm 0:9b334a45a8ff 791 #define _EBI_ADDRTIMING3_ADDRSETUP_DEFAULT 0x00000003UL /**< Mode DEFAULT for EBI_ADDRTIMING3 */
bogdanm 0:9b334a45a8ff 792 #define EBI_ADDRTIMING3_ADDRSETUP_DEFAULT (_EBI_ADDRTIMING3_ADDRSETUP_DEFAULT << 0) /**< Shifted mode DEFAULT for EBI_ADDRTIMING3 */
bogdanm 0:9b334a45a8ff 793 #define _EBI_ADDRTIMING3_ADDRHOLD_SHIFT 8 /**< Shift value for EBI_ADDRHOLD */
bogdanm 0:9b334a45a8ff 794 #define _EBI_ADDRTIMING3_ADDRHOLD_MASK 0x300UL /**< Bit mask for EBI_ADDRHOLD */
bogdanm 0:9b334a45a8ff 795 #define _EBI_ADDRTIMING3_ADDRHOLD_DEFAULT 0x00000003UL /**< Mode DEFAULT for EBI_ADDRTIMING3 */
bogdanm 0:9b334a45a8ff 796 #define EBI_ADDRTIMING3_ADDRHOLD_DEFAULT (_EBI_ADDRTIMING3_ADDRHOLD_DEFAULT << 8) /**< Shifted mode DEFAULT for EBI_ADDRTIMING3 */
bogdanm 0:9b334a45a8ff 797 #define EBI_ADDRTIMING3_HALFALE (0x1UL << 28) /**< Half Cycle ALE Strobe Duration Enable */
bogdanm 0:9b334a45a8ff 798 #define _EBI_ADDRTIMING3_HALFALE_SHIFT 28 /**< Shift value for EBI_HALFALE */
bogdanm 0:9b334a45a8ff 799 #define _EBI_ADDRTIMING3_HALFALE_MASK 0x10000000UL /**< Bit mask for EBI_HALFALE */
bogdanm 0:9b334a45a8ff 800 #define _EBI_ADDRTIMING3_HALFALE_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_ADDRTIMING3 */
bogdanm 0:9b334a45a8ff 801 #define EBI_ADDRTIMING3_HALFALE_DEFAULT (_EBI_ADDRTIMING3_HALFALE_DEFAULT << 28) /**< Shifted mode DEFAULT for EBI_ADDRTIMING3 */
bogdanm 0:9b334a45a8ff 802
bogdanm 0:9b334a45a8ff 803 /* Bit fields for EBI RDTIMING3 */
bogdanm 0:9b334a45a8ff 804 #define _EBI_RDTIMING3_RESETVALUE 0x00033F03UL /**< Default value for EBI_RDTIMING3 */
bogdanm 0:9b334a45a8ff 805 #define _EBI_RDTIMING3_MASK 0x70033F03UL /**< Mask for EBI_RDTIMING3 */
bogdanm 0:9b334a45a8ff 806 #define _EBI_RDTIMING3_RDSETUP_SHIFT 0 /**< Shift value for EBI_RDSETUP */
bogdanm 0:9b334a45a8ff 807 #define _EBI_RDTIMING3_RDSETUP_MASK 0x3UL /**< Bit mask for EBI_RDSETUP */
bogdanm 0:9b334a45a8ff 808 #define _EBI_RDTIMING3_RDSETUP_DEFAULT 0x00000003UL /**< Mode DEFAULT for EBI_RDTIMING3 */
bogdanm 0:9b334a45a8ff 809 #define EBI_RDTIMING3_RDSETUP_DEFAULT (_EBI_RDTIMING3_RDSETUP_DEFAULT << 0) /**< Shifted mode DEFAULT for EBI_RDTIMING3 */
bogdanm 0:9b334a45a8ff 810 #define _EBI_RDTIMING3_RDSTRB_SHIFT 8 /**< Shift value for EBI_RDSTRB */
bogdanm 0:9b334a45a8ff 811 #define _EBI_RDTIMING3_RDSTRB_MASK 0x3F00UL /**< Bit mask for EBI_RDSTRB */
bogdanm 0:9b334a45a8ff 812 #define _EBI_RDTIMING3_RDSTRB_DEFAULT 0x0000003FUL /**< Mode DEFAULT for EBI_RDTIMING3 */
bogdanm 0:9b334a45a8ff 813 #define EBI_RDTIMING3_RDSTRB_DEFAULT (_EBI_RDTIMING3_RDSTRB_DEFAULT << 8) /**< Shifted mode DEFAULT for EBI_RDTIMING3 */
bogdanm 0:9b334a45a8ff 814 #define _EBI_RDTIMING3_RDHOLD_SHIFT 16 /**< Shift value for EBI_RDHOLD */
bogdanm 0:9b334a45a8ff 815 #define _EBI_RDTIMING3_RDHOLD_MASK 0x30000UL /**< Bit mask for EBI_RDHOLD */
bogdanm 0:9b334a45a8ff 816 #define _EBI_RDTIMING3_RDHOLD_DEFAULT 0x00000003UL /**< Mode DEFAULT for EBI_RDTIMING3 */
bogdanm 0:9b334a45a8ff 817 #define EBI_RDTIMING3_RDHOLD_DEFAULT (_EBI_RDTIMING3_RDHOLD_DEFAULT << 16) /**< Shifted mode DEFAULT for EBI_RDTIMING3 */
bogdanm 0:9b334a45a8ff 818 #define EBI_RDTIMING3_HALFRE (0x1UL << 28) /**< Half Cycle REn Strobe Duration Enable */
bogdanm 0:9b334a45a8ff 819 #define _EBI_RDTIMING3_HALFRE_SHIFT 28 /**< Shift value for EBI_HALFRE */
bogdanm 0:9b334a45a8ff 820 #define _EBI_RDTIMING3_HALFRE_MASK 0x10000000UL /**< Bit mask for EBI_HALFRE */
bogdanm 0:9b334a45a8ff 821 #define _EBI_RDTIMING3_HALFRE_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_RDTIMING3 */
bogdanm 0:9b334a45a8ff 822 #define EBI_RDTIMING3_HALFRE_DEFAULT (_EBI_RDTIMING3_HALFRE_DEFAULT << 28) /**< Shifted mode DEFAULT for EBI_RDTIMING3 */
bogdanm 0:9b334a45a8ff 823 #define EBI_RDTIMING3_PREFETCH (0x1UL << 29) /**< Prefetch Enable */
bogdanm 0:9b334a45a8ff 824 #define _EBI_RDTIMING3_PREFETCH_SHIFT 29 /**< Shift value for EBI_PREFETCH */
bogdanm 0:9b334a45a8ff 825 #define _EBI_RDTIMING3_PREFETCH_MASK 0x20000000UL /**< Bit mask for EBI_PREFETCH */
bogdanm 0:9b334a45a8ff 826 #define _EBI_RDTIMING3_PREFETCH_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_RDTIMING3 */
bogdanm 0:9b334a45a8ff 827 #define EBI_RDTIMING3_PREFETCH_DEFAULT (_EBI_RDTIMING3_PREFETCH_DEFAULT << 29) /**< Shifted mode DEFAULT for EBI_RDTIMING3 */
bogdanm 0:9b334a45a8ff 828 #define EBI_RDTIMING3_PAGEMODE (0x1UL << 30) /**< Page Mode Access Enable */
bogdanm 0:9b334a45a8ff 829 #define _EBI_RDTIMING3_PAGEMODE_SHIFT 30 /**< Shift value for EBI_PAGEMODE */
bogdanm 0:9b334a45a8ff 830 #define _EBI_RDTIMING3_PAGEMODE_MASK 0x40000000UL /**< Bit mask for EBI_PAGEMODE */
bogdanm 0:9b334a45a8ff 831 #define _EBI_RDTIMING3_PAGEMODE_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_RDTIMING3 */
bogdanm 0:9b334a45a8ff 832 #define EBI_RDTIMING3_PAGEMODE_DEFAULT (_EBI_RDTIMING3_PAGEMODE_DEFAULT << 30) /**< Shifted mode DEFAULT for EBI_RDTIMING3 */
bogdanm 0:9b334a45a8ff 833
bogdanm 0:9b334a45a8ff 834 /* Bit fields for EBI WRTIMING3 */
bogdanm 0:9b334a45a8ff 835 #define _EBI_WRTIMING3_RESETVALUE 0x00033F03UL /**< Default value for EBI_WRTIMING3 */
bogdanm 0:9b334a45a8ff 836 #define _EBI_WRTIMING3_MASK 0x30033F03UL /**< Mask for EBI_WRTIMING3 */
bogdanm 0:9b334a45a8ff 837 #define _EBI_WRTIMING3_WRSETUP_SHIFT 0 /**< Shift value for EBI_WRSETUP */
bogdanm 0:9b334a45a8ff 838 #define _EBI_WRTIMING3_WRSETUP_MASK 0x3UL /**< Bit mask for EBI_WRSETUP */
bogdanm 0:9b334a45a8ff 839 #define _EBI_WRTIMING3_WRSETUP_DEFAULT 0x00000003UL /**< Mode DEFAULT for EBI_WRTIMING3 */
bogdanm 0:9b334a45a8ff 840 #define EBI_WRTIMING3_WRSETUP_DEFAULT (_EBI_WRTIMING3_WRSETUP_DEFAULT << 0) /**< Shifted mode DEFAULT for EBI_WRTIMING3 */
bogdanm 0:9b334a45a8ff 841 #define _EBI_WRTIMING3_WRSTRB_SHIFT 8 /**< Shift value for EBI_WRSTRB */
bogdanm 0:9b334a45a8ff 842 #define _EBI_WRTIMING3_WRSTRB_MASK 0x3F00UL /**< Bit mask for EBI_WRSTRB */
bogdanm 0:9b334a45a8ff 843 #define _EBI_WRTIMING3_WRSTRB_DEFAULT 0x0000003FUL /**< Mode DEFAULT for EBI_WRTIMING3 */
bogdanm 0:9b334a45a8ff 844 #define EBI_WRTIMING3_WRSTRB_DEFAULT (_EBI_WRTIMING3_WRSTRB_DEFAULT << 8) /**< Shifted mode DEFAULT for EBI_WRTIMING3 */
bogdanm 0:9b334a45a8ff 845 #define _EBI_WRTIMING3_WRHOLD_SHIFT 16 /**< Shift value for EBI_WRHOLD */
bogdanm 0:9b334a45a8ff 846 #define _EBI_WRTIMING3_WRHOLD_MASK 0x30000UL /**< Bit mask for EBI_WRHOLD */
bogdanm 0:9b334a45a8ff 847 #define _EBI_WRTIMING3_WRHOLD_DEFAULT 0x00000003UL /**< Mode DEFAULT for EBI_WRTIMING3 */
bogdanm 0:9b334a45a8ff 848 #define EBI_WRTIMING3_WRHOLD_DEFAULT (_EBI_WRTIMING3_WRHOLD_DEFAULT << 16) /**< Shifted mode DEFAULT for EBI_WRTIMING3 */
bogdanm 0:9b334a45a8ff 849 #define EBI_WRTIMING3_HALFWE (0x1UL << 28) /**< Half Cycle WEn Strobe Duration Enable */
bogdanm 0:9b334a45a8ff 850 #define _EBI_WRTIMING3_HALFWE_SHIFT 28 /**< Shift value for EBI_HALFWE */
bogdanm 0:9b334a45a8ff 851 #define _EBI_WRTIMING3_HALFWE_MASK 0x10000000UL /**< Bit mask for EBI_HALFWE */
bogdanm 0:9b334a45a8ff 852 #define _EBI_WRTIMING3_HALFWE_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_WRTIMING3 */
bogdanm 0:9b334a45a8ff 853 #define EBI_WRTIMING3_HALFWE_DEFAULT (_EBI_WRTIMING3_HALFWE_DEFAULT << 28) /**< Shifted mode DEFAULT for EBI_WRTIMING3 */
bogdanm 0:9b334a45a8ff 854 #define EBI_WRTIMING3_WBUFDIS (0x1UL << 29) /**< Write Buffer Disable */
bogdanm 0:9b334a45a8ff 855 #define _EBI_WRTIMING3_WBUFDIS_SHIFT 29 /**< Shift value for EBI_WBUFDIS */
bogdanm 0:9b334a45a8ff 856 #define _EBI_WRTIMING3_WBUFDIS_MASK 0x20000000UL /**< Bit mask for EBI_WBUFDIS */
bogdanm 0:9b334a45a8ff 857 #define _EBI_WRTIMING3_WBUFDIS_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_WRTIMING3 */
bogdanm 0:9b334a45a8ff 858 #define EBI_WRTIMING3_WBUFDIS_DEFAULT (_EBI_WRTIMING3_WBUFDIS_DEFAULT << 29) /**< Shifted mode DEFAULT for EBI_WRTIMING3 */
bogdanm 0:9b334a45a8ff 859
bogdanm 0:9b334a45a8ff 860 /* Bit fields for EBI POLARITY3 */
bogdanm 0:9b334a45a8ff 861 #define _EBI_POLARITY3_RESETVALUE 0x00000000UL /**< Default value for EBI_POLARITY3 */
bogdanm 0:9b334a45a8ff 862 #define _EBI_POLARITY3_MASK 0x0000003FUL /**< Mask for EBI_POLARITY3 */
bogdanm 0:9b334a45a8ff 863 #define EBI_POLARITY3_CSPOL (0x1UL << 0) /**< Chip Select Polarity */
bogdanm 0:9b334a45a8ff 864 #define _EBI_POLARITY3_CSPOL_SHIFT 0 /**< Shift value for EBI_CSPOL */
bogdanm 0:9b334a45a8ff 865 #define _EBI_POLARITY3_CSPOL_MASK 0x1UL /**< Bit mask for EBI_CSPOL */
bogdanm 0:9b334a45a8ff 866 #define _EBI_POLARITY3_CSPOL_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_POLARITY3 */
bogdanm 0:9b334a45a8ff 867 #define _EBI_POLARITY3_CSPOL_ACTIVELOW 0x00000000UL /**< Mode ACTIVELOW for EBI_POLARITY3 */
bogdanm 0:9b334a45a8ff 868 #define _EBI_POLARITY3_CSPOL_ACTIVEHIGH 0x00000001UL /**< Mode ACTIVEHIGH for EBI_POLARITY3 */
bogdanm 0:9b334a45a8ff 869 #define EBI_POLARITY3_CSPOL_DEFAULT (_EBI_POLARITY3_CSPOL_DEFAULT << 0) /**< Shifted mode DEFAULT for EBI_POLARITY3 */
bogdanm 0:9b334a45a8ff 870 #define EBI_POLARITY3_CSPOL_ACTIVELOW (_EBI_POLARITY3_CSPOL_ACTIVELOW << 0) /**< Shifted mode ACTIVELOW for EBI_POLARITY3 */
bogdanm 0:9b334a45a8ff 871 #define EBI_POLARITY3_CSPOL_ACTIVEHIGH (_EBI_POLARITY3_CSPOL_ACTIVEHIGH << 0) /**< Shifted mode ACTIVEHIGH for EBI_POLARITY3 */
bogdanm 0:9b334a45a8ff 872 #define EBI_POLARITY3_REPOL (0x1UL << 1) /**< Read Enable Polarity */
bogdanm 0:9b334a45a8ff 873 #define _EBI_POLARITY3_REPOL_SHIFT 1 /**< Shift value for EBI_REPOL */
bogdanm 0:9b334a45a8ff 874 #define _EBI_POLARITY3_REPOL_MASK 0x2UL /**< Bit mask for EBI_REPOL */
bogdanm 0:9b334a45a8ff 875 #define _EBI_POLARITY3_REPOL_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_POLARITY3 */
bogdanm 0:9b334a45a8ff 876 #define _EBI_POLARITY3_REPOL_ACTIVELOW 0x00000000UL /**< Mode ACTIVELOW for EBI_POLARITY3 */
bogdanm 0:9b334a45a8ff 877 #define _EBI_POLARITY3_REPOL_ACTIVEHIGH 0x00000001UL /**< Mode ACTIVEHIGH for EBI_POLARITY3 */
bogdanm 0:9b334a45a8ff 878 #define EBI_POLARITY3_REPOL_DEFAULT (_EBI_POLARITY3_REPOL_DEFAULT << 1) /**< Shifted mode DEFAULT for EBI_POLARITY3 */
bogdanm 0:9b334a45a8ff 879 #define EBI_POLARITY3_REPOL_ACTIVELOW (_EBI_POLARITY3_REPOL_ACTIVELOW << 1) /**< Shifted mode ACTIVELOW for EBI_POLARITY3 */
bogdanm 0:9b334a45a8ff 880 #define EBI_POLARITY3_REPOL_ACTIVEHIGH (_EBI_POLARITY3_REPOL_ACTIVEHIGH << 1) /**< Shifted mode ACTIVEHIGH for EBI_POLARITY3 */
bogdanm 0:9b334a45a8ff 881 #define EBI_POLARITY3_WEPOL (0x1UL << 2) /**< Write Enable Polarity */
bogdanm 0:9b334a45a8ff 882 #define _EBI_POLARITY3_WEPOL_SHIFT 2 /**< Shift value for EBI_WEPOL */
bogdanm 0:9b334a45a8ff 883 #define _EBI_POLARITY3_WEPOL_MASK 0x4UL /**< Bit mask for EBI_WEPOL */
bogdanm 0:9b334a45a8ff 884 #define _EBI_POLARITY3_WEPOL_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_POLARITY3 */
bogdanm 0:9b334a45a8ff 885 #define _EBI_POLARITY3_WEPOL_ACTIVELOW 0x00000000UL /**< Mode ACTIVELOW for EBI_POLARITY3 */
bogdanm 0:9b334a45a8ff 886 #define _EBI_POLARITY3_WEPOL_ACTIVEHIGH 0x00000001UL /**< Mode ACTIVEHIGH for EBI_POLARITY3 */
bogdanm 0:9b334a45a8ff 887 #define EBI_POLARITY3_WEPOL_DEFAULT (_EBI_POLARITY3_WEPOL_DEFAULT << 2) /**< Shifted mode DEFAULT for EBI_POLARITY3 */
bogdanm 0:9b334a45a8ff 888 #define EBI_POLARITY3_WEPOL_ACTIVELOW (_EBI_POLARITY3_WEPOL_ACTIVELOW << 2) /**< Shifted mode ACTIVELOW for EBI_POLARITY3 */
bogdanm 0:9b334a45a8ff 889 #define EBI_POLARITY3_WEPOL_ACTIVEHIGH (_EBI_POLARITY3_WEPOL_ACTIVEHIGH << 2) /**< Shifted mode ACTIVEHIGH for EBI_POLARITY3 */
bogdanm 0:9b334a45a8ff 890 #define EBI_POLARITY3_ALEPOL (0x1UL << 3) /**< Address Latch Polarity */
bogdanm 0:9b334a45a8ff 891 #define _EBI_POLARITY3_ALEPOL_SHIFT 3 /**< Shift value for EBI_ALEPOL */
bogdanm 0:9b334a45a8ff 892 #define _EBI_POLARITY3_ALEPOL_MASK 0x8UL /**< Bit mask for EBI_ALEPOL */
bogdanm 0:9b334a45a8ff 893 #define _EBI_POLARITY3_ALEPOL_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_POLARITY3 */
bogdanm 0:9b334a45a8ff 894 #define _EBI_POLARITY3_ALEPOL_ACTIVELOW 0x00000000UL /**< Mode ACTIVELOW for EBI_POLARITY3 */
bogdanm 0:9b334a45a8ff 895 #define _EBI_POLARITY3_ALEPOL_ACTIVEHIGH 0x00000001UL /**< Mode ACTIVEHIGH for EBI_POLARITY3 */
bogdanm 0:9b334a45a8ff 896 #define EBI_POLARITY3_ALEPOL_DEFAULT (_EBI_POLARITY3_ALEPOL_DEFAULT << 3) /**< Shifted mode DEFAULT for EBI_POLARITY3 */
bogdanm 0:9b334a45a8ff 897 #define EBI_POLARITY3_ALEPOL_ACTIVELOW (_EBI_POLARITY3_ALEPOL_ACTIVELOW << 3) /**< Shifted mode ACTIVELOW for EBI_POLARITY3 */
bogdanm 0:9b334a45a8ff 898 #define EBI_POLARITY3_ALEPOL_ACTIVEHIGH (_EBI_POLARITY3_ALEPOL_ACTIVEHIGH << 3) /**< Shifted mode ACTIVEHIGH for EBI_POLARITY3 */
bogdanm 0:9b334a45a8ff 899 #define EBI_POLARITY3_ARDYPOL (0x1UL << 4) /**< ARDY Polarity */
bogdanm 0:9b334a45a8ff 900 #define _EBI_POLARITY3_ARDYPOL_SHIFT 4 /**< Shift value for EBI_ARDYPOL */
bogdanm 0:9b334a45a8ff 901 #define _EBI_POLARITY3_ARDYPOL_MASK 0x10UL /**< Bit mask for EBI_ARDYPOL */
bogdanm 0:9b334a45a8ff 902 #define _EBI_POLARITY3_ARDYPOL_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_POLARITY3 */
bogdanm 0:9b334a45a8ff 903 #define _EBI_POLARITY3_ARDYPOL_ACTIVELOW 0x00000000UL /**< Mode ACTIVELOW for EBI_POLARITY3 */
bogdanm 0:9b334a45a8ff 904 #define _EBI_POLARITY3_ARDYPOL_ACTIVEHIGH 0x00000001UL /**< Mode ACTIVEHIGH for EBI_POLARITY3 */
bogdanm 0:9b334a45a8ff 905 #define EBI_POLARITY3_ARDYPOL_DEFAULT (_EBI_POLARITY3_ARDYPOL_DEFAULT << 4) /**< Shifted mode DEFAULT for EBI_POLARITY3 */
bogdanm 0:9b334a45a8ff 906 #define EBI_POLARITY3_ARDYPOL_ACTIVELOW (_EBI_POLARITY3_ARDYPOL_ACTIVELOW << 4) /**< Shifted mode ACTIVELOW for EBI_POLARITY3 */
bogdanm 0:9b334a45a8ff 907 #define EBI_POLARITY3_ARDYPOL_ACTIVEHIGH (_EBI_POLARITY3_ARDYPOL_ACTIVEHIGH << 4) /**< Shifted mode ACTIVEHIGH for EBI_POLARITY3 */
bogdanm 0:9b334a45a8ff 908 #define EBI_POLARITY3_BLPOL (0x1UL << 5) /**< BL Polarity */
bogdanm 0:9b334a45a8ff 909 #define _EBI_POLARITY3_BLPOL_SHIFT 5 /**< Shift value for EBI_BLPOL */
bogdanm 0:9b334a45a8ff 910 #define _EBI_POLARITY3_BLPOL_MASK 0x20UL /**< Bit mask for EBI_BLPOL */
bogdanm 0:9b334a45a8ff 911 #define _EBI_POLARITY3_BLPOL_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_POLARITY3 */
bogdanm 0:9b334a45a8ff 912 #define _EBI_POLARITY3_BLPOL_ACTIVELOW 0x00000000UL /**< Mode ACTIVELOW for EBI_POLARITY3 */
bogdanm 0:9b334a45a8ff 913 #define _EBI_POLARITY3_BLPOL_ACTIVEHIGH 0x00000001UL /**< Mode ACTIVEHIGH for EBI_POLARITY3 */
bogdanm 0:9b334a45a8ff 914 #define EBI_POLARITY3_BLPOL_DEFAULT (_EBI_POLARITY3_BLPOL_DEFAULT << 5) /**< Shifted mode DEFAULT for EBI_POLARITY3 */
bogdanm 0:9b334a45a8ff 915 #define EBI_POLARITY3_BLPOL_ACTIVELOW (_EBI_POLARITY3_BLPOL_ACTIVELOW << 5) /**< Shifted mode ACTIVELOW for EBI_POLARITY3 */
bogdanm 0:9b334a45a8ff 916 #define EBI_POLARITY3_BLPOL_ACTIVEHIGH (_EBI_POLARITY3_BLPOL_ACTIVEHIGH << 5) /**< Shifted mode ACTIVEHIGH for EBI_POLARITY3 */
bogdanm 0:9b334a45a8ff 917
bogdanm 0:9b334a45a8ff 918 /* Bit fields for EBI PAGECTRL */
bogdanm 0:9b334a45a8ff 919 #define _EBI_PAGECTRL_RESETVALUE 0x00000700UL /**< Default value for EBI_PAGECTRL */
bogdanm 0:9b334a45a8ff 920 #define _EBI_PAGECTRL_MASK 0x07F00713UL /**< Mask for EBI_PAGECTRL */
bogdanm 0:9b334a45a8ff 921 #define _EBI_PAGECTRL_PAGELEN_SHIFT 0 /**< Shift value for EBI_PAGELEN */
bogdanm 0:9b334a45a8ff 922 #define _EBI_PAGECTRL_PAGELEN_MASK 0x3UL /**< Bit mask for EBI_PAGELEN */
bogdanm 0:9b334a45a8ff 923 #define _EBI_PAGECTRL_PAGELEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_PAGECTRL */
bogdanm 0:9b334a45a8ff 924 #define _EBI_PAGECTRL_PAGELEN_MEMBER4 0x00000000UL /**< Mode MEMBER4 for EBI_PAGECTRL */
bogdanm 0:9b334a45a8ff 925 #define _EBI_PAGECTRL_PAGELEN_MEMBER8 0x00000001UL /**< Mode MEMBER8 for EBI_PAGECTRL */
bogdanm 0:9b334a45a8ff 926 #define _EBI_PAGECTRL_PAGELEN_MEMBER16 0x00000002UL /**< Mode MEMBER16 for EBI_PAGECTRL */
bogdanm 0:9b334a45a8ff 927 #define _EBI_PAGECTRL_PAGELEN_MEMBER32 0x00000003UL /**< Mode MEMBER32 for EBI_PAGECTRL */
bogdanm 0:9b334a45a8ff 928 #define EBI_PAGECTRL_PAGELEN_DEFAULT (_EBI_PAGECTRL_PAGELEN_DEFAULT << 0) /**< Shifted mode DEFAULT for EBI_PAGECTRL */
bogdanm 0:9b334a45a8ff 929 #define EBI_PAGECTRL_PAGELEN_MEMBER4 (_EBI_PAGECTRL_PAGELEN_MEMBER4 << 0) /**< Shifted mode MEMBER4 for EBI_PAGECTRL */
bogdanm 0:9b334a45a8ff 930 #define EBI_PAGECTRL_PAGELEN_MEMBER8 (_EBI_PAGECTRL_PAGELEN_MEMBER8 << 0) /**< Shifted mode MEMBER8 for EBI_PAGECTRL */
bogdanm 0:9b334a45a8ff 931 #define EBI_PAGECTRL_PAGELEN_MEMBER16 (_EBI_PAGECTRL_PAGELEN_MEMBER16 << 0) /**< Shifted mode MEMBER16 for EBI_PAGECTRL */
bogdanm 0:9b334a45a8ff 932 #define EBI_PAGECTRL_PAGELEN_MEMBER32 (_EBI_PAGECTRL_PAGELEN_MEMBER32 << 0) /**< Shifted mode MEMBER32 for EBI_PAGECTRL */
bogdanm 0:9b334a45a8ff 933 #define EBI_PAGECTRL_INCHIT (0x1UL << 4) /**< Intrapage hit only on incremental addresses */
bogdanm 0:9b334a45a8ff 934 #define _EBI_PAGECTRL_INCHIT_SHIFT 4 /**< Shift value for EBI_INCHIT */
bogdanm 0:9b334a45a8ff 935 #define _EBI_PAGECTRL_INCHIT_MASK 0x10UL /**< Bit mask for EBI_INCHIT */
bogdanm 0:9b334a45a8ff 936 #define _EBI_PAGECTRL_INCHIT_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_PAGECTRL */
bogdanm 0:9b334a45a8ff 937 #define EBI_PAGECTRL_INCHIT_DEFAULT (_EBI_PAGECTRL_INCHIT_DEFAULT << 4) /**< Shifted mode DEFAULT for EBI_PAGECTRL */
bogdanm 0:9b334a45a8ff 938 #define _EBI_PAGECTRL_RDPA_SHIFT 8 /**< Shift value for EBI_RDPA */
bogdanm 0:9b334a45a8ff 939 #define _EBI_PAGECTRL_RDPA_MASK 0x700UL /**< Bit mask for EBI_RDPA */
bogdanm 0:9b334a45a8ff 940 #define _EBI_PAGECTRL_RDPA_DEFAULT 0x00000007UL /**< Mode DEFAULT for EBI_PAGECTRL */
bogdanm 0:9b334a45a8ff 941 #define EBI_PAGECTRL_RDPA_DEFAULT (_EBI_PAGECTRL_RDPA_DEFAULT << 8) /**< Shifted mode DEFAULT for EBI_PAGECTRL */
bogdanm 0:9b334a45a8ff 942 #define _EBI_PAGECTRL_KEEPOPEN_SHIFT 20 /**< Shift value for EBI_KEEPOPEN */
bogdanm 0:9b334a45a8ff 943 #define _EBI_PAGECTRL_KEEPOPEN_MASK 0x7F00000UL /**< Bit mask for EBI_KEEPOPEN */
bogdanm 0:9b334a45a8ff 944 #define _EBI_PAGECTRL_KEEPOPEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_PAGECTRL */
bogdanm 0:9b334a45a8ff 945 #define EBI_PAGECTRL_KEEPOPEN_DEFAULT (_EBI_PAGECTRL_KEEPOPEN_DEFAULT << 20) /**< Shifted mode DEFAULT for EBI_PAGECTRL */
bogdanm 0:9b334a45a8ff 946
bogdanm 0:9b334a45a8ff 947 /* Bit fields for EBI NANDCTRL */
bogdanm 0:9b334a45a8ff 948 #define _EBI_NANDCTRL_RESETVALUE 0x00000000UL /**< Default value for EBI_NANDCTRL */
bogdanm 0:9b334a45a8ff 949 #define _EBI_NANDCTRL_MASK 0x00000031UL /**< Mask for EBI_NANDCTRL */
bogdanm 0:9b334a45a8ff 950 #define EBI_NANDCTRL_EN (0x1UL << 0) /**< NAND Flash control enable */
bogdanm 0:9b334a45a8ff 951 #define _EBI_NANDCTRL_EN_SHIFT 0 /**< Shift value for EBI_EN */
bogdanm 0:9b334a45a8ff 952 #define _EBI_NANDCTRL_EN_MASK 0x1UL /**< Bit mask for EBI_EN */
bogdanm 0:9b334a45a8ff 953 #define _EBI_NANDCTRL_EN_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_NANDCTRL */
bogdanm 0:9b334a45a8ff 954 #define EBI_NANDCTRL_EN_DEFAULT (_EBI_NANDCTRL_EN_DEFAULT << 0) /**< Shifted mode DEFAULT for EBI_NANDCTRL */
bogdanm 0:9b334a45a8ff 955 #define _EBI_NANDCTRL_BANKSEL_SHIFT 4 /**< Shift value for EBI_BANKSEL */
bogdanm 0:9b334a45a8ff 956 #define _EBI_NANDCTRL_BANKSEL_MASK 0x30UL /**< Bit mask for EBI_BANKSEL */
bogdanm 0:9b334a45a8ff 957 #define _EBI_NANDCTRL_BANKSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_NANDCTRL */
bogdanm 0:9b334a45a8ff 958 #define _EBI_NANDCTRL_BANKSEL_BANK0 0x00000000UL /**< Mode BANK0 for EBI_NANDCTRL */
bogdanm 0:9b334a45a8ff 959 #define _EBI_NANDCTRL_BANKSEL_BANK1 0x00000001UL /**< Mode BANK1 for EBI_NANDCTRL */
bogdanm 0:9b334a45a8ff 960 #define _EBI_NANDCTRL_BANKSEL_BANK2 0x00000002UL /**< Mode BANK2 for EBI_NANDCTRL */
bogdanm 0:9b334a45a8ff 961 #define _EBI_NANDCTRL_BANKSEL_BANK3 0x00000003UL /**< Mode BANK3 for EBI_NANDCTRL */
bogdanm 0:9b334a45a8ff 962 #define EBI_NANDCTRL_BANKSEL_DEFAULT (_EBI_NANDCTRL_BANKSEL_DEFAULT << 4) /**< Shifted mode DEFAULT for EBI_NANDCTRL */
bogdanm 0:9b334a45a8ff 963 #define EBI_NANDCTRL_BANKSEL_BANK0 (_EBI_NANDCTRL_BANKSEL_BANK0 << 4) /**< Shifted mode BANK0 for EBI_NANDCTRL */
bogdanm 0:9b334a45a8ff 964 #define EBI_NANDCTRL_BANKSEL_BANK1 (_EBI_NANDCTRL_BANKSEL_BANK1 << 4) /**< Shifted mode BANK1 for EBI_NANDCTRL */
bogdanm 0:9b334a45a8ff 965 #define EBI_NANDCTRL_BANKSEL_BANK2 (_EBI_NANDCTRL_BANKSEL_BANK2 << 4) /**< Shifted mode BANK2 for EBI_NANDCTRL */
bogdanm 0:9b334a45a8ff 966 #define EBI_NANDCTRL_BANKSEL_BANK3 (_EBI_NANDCTRL_BANKSEL_BANK3 << 4) /**< Shifted mode BANK3 for EBI_NANDCTRL */
bogdanm 0:9b334a45a8ff 967
bogdanm 0:9b334a45a8ff 968 /* Bit fields for EBI CMD */
bogdanm 0:9b334a45a8ff 969 #define _EBI_CMD_RESETVALUE 0x00000000UL /**< Default value for EBI_CMD */
bogdanm 0:9b334a45a8ff 970 #define _EBI_CMD_MASK 0x00000007UL /**< Mask for EBI_CMD */
bogdanm 0:9b334a45a8ff 971 #define EBI_CMD_ECCSTART (0x1UL << 0) /**< Error Correction Code Generation Start */
bogdanm 0:9b334a45a8ff 972 #define _EBI_CMD_ECCSTART_SHIFT 0 /**< Shift value for EBI_ECCSTART */
bogdanm 0:9b334a45a8ff 973 #define _EBI_CMD_ECCSTART_MASK 0x1UL /**< Bit mask for EBI_ECCSTART */
bogdanm 0:9b334a45a8ff 974 #define _EBI_CMD_ECCSTART_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_CMD */
bogdanm 0:9b334a45a8ff 975 #define EBI_CMD_ECCSTART_DEFAULT (_EBI_CMD_ECCSTART_DEFAULT << 0) /**< Shifted mode DEFAULT for EBI_CMD */
bogdanm 0:9b334a45a8ff 976 #define EBI_CMD_ECCSTOP (0x1UL << 1) /**< Error Correction Code Generation Stop */
bogdanm 0:9b334a45a8ff 977 #define _EBI_CMD_ECCSTOP_SHIFT 1 /**< Shift value for EBI_ECCSTOP */
bogdanm 0:9b334a45a8ff 978 #define _EBI_CMD_ECCSTOP_MASK 0x2UL /**< Bit mask for EBI_ECCSTOP */
bogdanm 0:9b334a45a8ff 979 #define _EBI_CMD_ECCSTOP_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_CMD */
bogdanm 0:9b334a45a8ff 980 #define EBI_CMD_ECCSTOP_DEFAULT (_EBI_CMD_ECCSTOP_DEFAULT << 1) /**< Shifted mode DEFAULT for EBI_CMD */
bogdanm 0:9b334a45a8ff 981 #define EBI_CMD_ECCCLEAR (0x1UL << 2) /**< Error Correction Code Clear */
bogdanm 0:9b334a45a8ff 982 #define _EBI_CMD_ECCCLEAR_SHIFT 2 /**< Shift value for EBI_ECCCLEAR */
bogdanm 0:9b334a45a8ff 983 #define _EBI_CMD_ECCCLEAR_MASK 0x4UL /**< Bit mask for EBI_ECCCLEAR */
bogdanm 0:9b334a45a8ff 984 #define _EBI_CMD_ECCCLEAR_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_CMD */
bogdanm 0:9b334a45a8ff 985 #define EBI_CMD_ECCCLEAR_DEFAULT (_EBI_CMD_ECCCLEAR_DEFAULT << 2) /**< Shifted mode DEFAULT for EBI_CMD */
bogdanm 0:9b334a45a8ff 986
bogdanm 0:9b334a45a8ff 987 /* Bit fields for EBI STATUS */
bogdanm 0:9b334a45a8ff 988 #define _EBI_STATUS_RESETVALUE 0x00000000UL /**< Default value for EBI_STATUS */
bogdanm 0:9b334a45a8ff 989 #define _EBI_STATUS_MASK 0x00003711UL /**< Mask for EBI_STATUS */
bogdanm 0:9b334a45a8ff 990 #define EBI_STATUS_AHBACT (0x1UL << 0) /**< EBI Busy with AHB Transaction. */
bogdanm 0:9b334a45a8ff 991 #define _EBI_STATUS_AHBACT_SHIFT 0 /**< Shift value for EBI_AHBACT */
bogdanm 0:9b334a45a8ff 992 #define _EBI_STATUS_AHBACT_MASK 0x1UL /**< Bit mask for EBI_AHBACT */
bogdanm 0:9b334a45a8ff 993 #define _EBI_STATUS_AHBACT_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_STATUS */
bogdanm 0:9b334a45a8ff 994 #define EBI_STATUS_AHBACT_DEFAULT (_EBI_STATUS_AHBACT_DEFAULT << 0) /**< Shifted mode DEFAULT for EBI_STATUS */
bogdanm 0:9b334a45a8ff 995 #define EBI_STATUS_ECCACT (0x1UL << 4) /**< EBI ECC Generation Active. */
bogdanm 0:9b334a45a8ff 996 #define _EBI_STATUS_ECCACT_SHIFT 4 /**< Shift value for EBI_ECCACT */
bogdanm 0:9b334a45a8ff 997 #define _EBI_STATUS_ECCACT_MASK 0x10UL /**< Bit mask for EBI_ECCACT */
bogdanm 0:9b334a45a8ff 998 #define _EBI_STATUS_ECCACT_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_STATUS */
bogdanm 0:9b334a45a8ff 999 #define EBI_STATUS_ECCACT_DEFAULT (_EBI_STATUS_ECCACT_DEFAULT << 4) /**< Shifted mode DEFAULT for EBI_STATUS */
bogdanm 0:9b334a45a8ff 1000 #define EBI_STATUS_TFTPIXEL0EMPTY (0x1UL << 8) /**< EBI_TFTPIXEL0 is empty. */
bogdanm 0:9b334a45a8ff 1001 #define _EBI_STATUS_TFTPIXEL0EMPTY_SHIFT 8 /**< Shift value for EBI_TFTPIXEL0EMPTY */
bogdanm 0:9b334a45a8ff 1002 #define _EBI_STATUS_TFTPIXEL0EMPTY_MASK 0x100UL /**< Bit mask for EBI_TFTPIXEL0EMPTY */
bogdanm 0:9b334a45a8ff 1003 #define _EBI_STATUS_TFTPIXEL0EMPTY_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_STATUS */
bogdanm 0:9b334a45a8ff 1004 #define EBI_STATUS_TFTPIXEL0EMPTY_DEFAULT (_EBI_STATUS_TFTPIXEL0EMPTY_DEFAULT << 8) /**< Shifted mode DEFAULT for EBI_STATUS */
bogdanm 0:9b334a45a8ff 1005 #define EBI_STATUS_TFTPIXEL1EMPTY (0x1UL << 9) /**< EBI_TFTPIXEL1 is empty. */
bogdanm 0:9b334a45a8ff 1006 #define _EBI_STATUS_TFTPIXEL1EMPTY_SHIFT 9 /**< Shift value for EBI_TFTPIXEL1EMPTY */
bogdanm 0:9b334a45a8ff 1007 #define _EBI_STATUS_TFTPIXEL1EMPTY_MASK 0x200UL /**< Bit mask for EBI_TFTPIXEL1EMPTY */
bogdanm 0:9b334a45a8ff 1008 #define _EBI_STATUS_TFTPIXEL1EMPTY_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_STATUS */
bogdanm 0:9b334a45a8ff 1009 #define EBI_STATUS_TFTPIXEL1EMPTY_DEFAULT (_EBI_STATUS_TFTPIXEL1EMPTY_DEFAULT << 9) /**< Shifted mode DEFAULT for EBI_STATUS */
bogdanm 0:9b334a45a8ff 1010 #define EBI_STATUS_TFTPIXELFULL (0x1UL << 10) /**< EBI_TFTPIXEL0 is full. */
bogdanm 0:9b334a45a8ff 1011 #define _EBI_STATUS_TFTPIXELFULL_SHIFT 10 /**< Shift value for EBI_TFTPIXELFULL */
bogdanm 0:9b334a45a8ff 1012 #define _EBI_STATUS_TFTPIXELFULL_MASK 0x400UL /**< Bit mask for EBI_TFTPIXELFULL */
bogdanm 0:9b334a45a8ff 1013 #define _EBI_STATUS_TFTPIXELFULL_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_STATUS */
bogdanm 0:9b334a45a8ff 1014 #define EBI_STATUS_TFTPIXELFULL_DEFAULT (_EBI_STATUS_TFTPIXELFULL_DEFAULT << 10) /**< Shifted mode DEFAULT for EBI_STATUS */
bogdanm 0:9b334a45a8ff 1015 #define EBI_STATUS_DDACT (0x1UL << 12) /**< EBI Busy with Direct Drive Transactions. */
bogdanm 0:9b334a45a8ff 1016 #define _EBI_STATUS_DDACT_SHIFT 12 /**< Shift value for EBI_DDACT */
bogdanm 0:9b334a45a8ff 1017 #define _EBI_STATUS_DDACT_MASK 0x1000UL /**< Bit mask for EBI_DDACT */
bogdanm 0:9b334a45a8ff 1018 #define _EBI_STATUS_DDACT_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_STATUS */
bogdanm 0:9b334a45a8ff 1019 #define EBI_STATUS_DDACT_DEFAULT (_EBI_STATUS_DDACT_DEFAULT << 12) /**< Shifted mode DEFAULT for EBI_STATUS */
bogdanm 0:9b334a45a8ff 1020 #define EBI_STATUS_TFTDDEMPTY (0x1UL << 13) /**< EBI_TFTDD register is empty. */
bogdanm 0:9b334a45a8ff 1021 #define _EBI_STATUS_TFTDDEMPTY_SHIFT 13 /**< Shift value for EBI_TFTDDEMPTY */
bogdanm 0:9b334a45a8ff 1022 #define _EBI_STATUS_TFTDDEMPTY_MASK 0x2000UL /**< Bit mask for EBI_TFTDDEMPTY */
bogdanm 0:9b334a45a8ff 1023 #define _EBI_STATUS_TFTDDEMPTY_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_STATUS */
bogdanm 0:9b334a45a8ff 1024 #define EBI_STATUS_TFTDDEMPTY_DEFAULT (_EBI_STATUS_TFTDDEMPTY_DEFAULT << 13) /**< Shifted mode DEFAULT for EBI_STATUS */
bogdanm 0:9b334a45a8ff 1025
bogdanm 0:9b334a45a8ff 1026 /* Bit fields for EBI ECCPARITY */
bogdanm 0:9b334a45a8ff 1027 #define _EBI_ECCPARITY_RESETVALUE 0x00000000UL /**< Default value for EBI_ECCPARITY */
bogdanm 0:9b334a45a8ff 1028 #define _EBI_ECCPARITY_MASK 0xFFFFFFFFUL /**< Mask for EBI_ECCPARITY */
bogdanm 0:9b334a45a8ff 1029 #define _EBI_ECCPARITY_ECCPARITY_SHIFT 0 /**< Shift value for EBI_ECCPARITY */
bogdanm 0:9b334a45a8ff 1030 #define _EBI_ECCPARITY_ECCPARITY_MASK 0xFFFFFFFFUL /**< Bit mask for EBI_ECCPARITY */
bogdanm 0:9b334a45a8ff 1031 #define _EBI_ECCPARITY_ECCPARITY_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_ECCPARITY */
bogdanm 0:9b334a45a8ff 1032 #define EBI_ECCPARITY_ECCPARITY_DEFAULT (_EBI_ECCPARITY_ECCPARITY_DEFAULT << 0) /**< Shifted mode DEFAULT for EBI_ECCPARITY */
bogdanm 0:9b334a45a8ff 1033
bogdanm 0:9b334a45a8ff 1034 /* Bit fields for EBI TFTCTRL */
bogdanm 0:9b334a45a8ff 1035 #define _EBI_TFTCTRL_RESETVALUE 0x00000000UL /**< Default value for EBI_TFTCTRL */
bogdanm 0:9b334a45a8ff 1036 #define _EBI_TFTCTRL_MASK 0x01311F1FUL /**< Mask for EBI_TFTCTRL */
bogdanm 0:9b334a45a8ff 1037 #define _EBI_TFTCTRL_DD_SHIFT 0 /**< Shift value for EBI_DD */
bogdanm 0:9b334a45a8ff 1038 #define _EBI_TFTCTRL_DD_MASK 0x3UL /**< Bit mask for EBI_DD */
bogdanm 0:9b334a45a8ff 1039 #define _EBI_TFTCTRL_DD_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_TFTCTRL */
bogdanm 0:9b334a45a8ff 1040 #define _EBI_TFTCTRL_DD_DISABLED 0x00000000UL /**< Mode DISABLED for EBI_TFTCTRL */
bogdanm 0:9b334a45a8ff 1041 #define _EBI_TFTCTRL_DD_INTERNAL 0x00000001UL /**< Mode INTERNAL for EBI_TFTCTRL */
bogdanm 0:9b334a45a8ff 1042 #define _EBI_TFTCTRL_DD_EXTERNAL 0x00000002UL /**< Mode EXTERNAL for EBI_TFTCTRL */
bogdanm 0:9b334a45a8ff 1043 #define EBI_TFTCTRL_DD_DEFAULT (_EBI_TFTCTRL_DD_DEFAULT << 0) /**< Shifted mode DEFAULT for EBI_TFTCTRL */
bogdanm 0:9b334a45a8ff 1044 #define EBI_TFTCTRL_DD_DISABLED (_EBI_TFTCTRL_DD_DISABLED << 0) /**< Shifted mode DISABLED for EBI_TFTCTRL */
bogdanm 0:9b334a45a8ff 1045 #define EBI_TFTCTRL_DD_INTERNAL (_EBI_TFTCTRL_DD_INTERNAL << 0) /**< Shifted mode INTERNAL for EBI_TFTCTRL */
bogdanm 0:9b334a45a8ff 1046 #define EBI_TFTCTRL_DD_EXTERNAL (_EBI_TFTCTRL_DD_EXTERNAL << 0) /**< Shifted mode EXTERNAL for EBI_TFTCTRL */
bogdanm 0:9b334a45a8ff 1047 #define _EBI_TFTCTRL_MASKBLEND_SHIFT 2 /**< Shift value for EBI_MASKBLEND */
bogdanm 0:9b334a45a8ff 1048 #define _EBI_TFTCTRL_MASKBLEND_MASK 0x1CUL /**< Bit mask for EBI_MASKBLEND */
bogdanm 0:9b334a45a8ff 1049 #define _EBI_TFTCTRL_MASKBLEND_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_TFTCTRL */
bogdanm 0:9b334a45a8ff 1050 #define _EBI_TFTCTRL_MASKBLEND_DISABLED 0x00000000UL /**< Mode DISABLED for EBI_TFTCTRL */
bogdanm 0:9b334a45a8ff 1051 #define _EBI_TFTCTRL_MASKBLEND_IMASK 0x00000001UL /**< Mode IMASK for EBI_TFTCTRL */
bogdanm 0:9b334a45a8ff 1052 #define _EBI_TFTCTRL_MASKBLEND_IALPHA 0x00000002UL /**< Mode IALPHA for EBI_TFTCTRL */
bogdanm 0:9b334a45a8ff 1053 #define _EBI_TFTCTRL_MASKBLEND_IMASKIALPHA 0x00000003UL /**< Mode IMASKIALPHA for EBI_TFTCTRL */
bogdanm 0:9b334a45a8ff 1054 #define _EBI_TFTCTRL_MASKBLEND_EMASK 0x00000005UL /**< Mode EMASK for EBI_TFTCTRL */
bogdanm 0:9b334a45a8ff 1055 #define _EBI_TFTCTRL_MASKBLEND_EALPHA 0x00000006UL /**< Mode EALPHA for EBI_TFTCTRL */
bogdanm 0:9b334a45a8ff 1056 #define _EBI_TFTCTRL_MASKBLEND_EMASKEALPHA 0x00000007UL /**< Mode EMASKEALPHA for EBI_TFTCTRL */
bogdanm 0:9b334a45a8ff 1057 #define EBI_TFTCTRL_MASKBLEND_DEFAULT (_EBI_TFTCTRL_MASKBLEND_DEFAULT << 2) /**< Shifted mode DEFAULT for EBI_TFTCTRL */
bogdanm 0:9b334a45a8ff 1058 #define EBI_TFTCTRL_MASKBLEND_DISABLED (_EBI_TFTCTRL_MASKBLEND_DISABLED << 2) /**< Shifted mode DISABLED for EBI_TFTCTRL */
bogdanm 0:9b334a45a8ff 1059 #define EBI_TFTCTRL_MASKBLEND_IMASK (_EBI_TFTCTRL_MASKBLEND_IMASK << 2) /**< Shifted mode IMASK for EBI_TFTCTRL */
bogdanm 0:9b334a45a8ff 1060 #define EBI_TFTCTRL_MASKBLEND_IALPHA (_EBI_TFTCTRL_MASKBLEND_IALPHA << 2) /**< Shifted mode IALPHA for EBI_TFTCTRL */
bogdanm 0:9b334a45a8ff 1061 #define EBI_TFTCTRL_MASKBLEND_IMASKIALPHA (_EBI_TFTCTRL_MASKBLEND_IMASKIALPHA << 2) /**< Shifted mode IMASKIALPHA for EBI_TFTCTRL */
bogdanm 0:9b334a45a8ff 1062 #define EBI_TFTCTRL_MASKBLEND_EMASK (_EBI_TFTCTRL_MASKBLEND_EMASK << 2) /**< Shifted mode EMASK for EBI_TFTCTRL */
bogdanm 0:9b334a45a8ff 1063 #define EBI_TFTCTRL_MASKBLEND_EALPHA (_EBI_TFTCTRL_MASKBLEND_EALPHA << 2) /**< Shifted mode EALPHA for EBI_TFTCTRL */
bogdanm 0:9b334a45a8ff 1064 #define EBI_TFTCTRL_MASKBLEND_EMASKEALPHA (_EBI_TFTCTRL_MASKBLEND_EMASKEALPHA << 2) /**< Shifted mode EMASKEALPHA for EBI_TFTCTRL */
bogdanm 0:9b334a45a8ff 1065 #define EBI_TFTCTRL_SHIFTDCLKEN (0x1UL << 8) /**< TFT EBI_DCLK Shift Enable */
bogdanm 0:9b334a45a8ff 1066 #define _EBI_TFTCTRL_SHIFTDCLKEN_SHIFT 8 /**< Shift value for EBI_SHIFTDCLKEN */
bogdanm 0:9b334a45a8ff 1067 #define _EBI_TFTCTRL_SHIFTDCLKEN_MASK 0x100UL /**< Bit mask for EBI_SHIFTDCLKEN */
bogdanm 0:9b334a45a8ff 1068 #define _EBI_TFTCTRL_SHIFTDCLKEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_TFTCTRL */
bogdanm 0:9b334a45a8ff 1069 #define EBI_TFTCTRL_SHIFTDCLKEN_DEFAULT (_EBI_TFTCTRL_SHIFTDCLKEN_DEFAULT << 8) /**< Shifted mode DEFAULT for EBI_TFTCTRL */
bogdanm 0:9b334a45a8ff 1070 #define EBI_TFTCTRL_FBCTRIG (0x1UL << 9) /**< TFT Frame Base Copy Trigger */
bogdanm 0:9b334a45a8ff 1071 #define _EBI_TFTCTRL_FBCTRIG_SHIFT 9 /**< Shift value for EBI_FBCTRIG */
bogdanm 0:9b334a45a8ff 1072 #define _EBI_TFTCTRL_FBCTRIG_MASK 0x200UL /**< Bit mask for EBI_FBCTRIG */
bogdanm 0:9b334a45a8ff 1073 #define _EBI_TFTCTRL_FBCTRIG_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_TFTCTRL */
bogdanm 0:9b334a45a8ff 1074 #define _EBI_TFTCTRL_FBCTRIG_VSYNC 0x00000000UL /**< Mode VSYNC for EBI_TFTCTRL */
bogdanm 0:9b334a45a8ff 1075 #define _EBI_TFTCTRL_FBCTRIG_HSYNC 0x00000001UL /**< Mode HSYNC for EBI_TFTCTRL */
bogdanm 0:9b334a45a8ff 1076 #define EBI_TFTCTRL_FBCTRIG_DEFAULT (_EBI_TFTCTRL_FBCTRIG_DEFAULT << 9) /**< Shifted mode DEFAULT for EBI_TFTCTRL */
bogdanm 0:9b334a45a8ff 1077 #define EBI_TFTCTRL_FBCTRIG_VSYNC (_EBI_TFTCTRL_FBCTRIG_VSYNC << 9) /**< Shifted mode VSYNC for EBI_TFTCTRL */
bogdanm 0:9b334a45a8ff 1078 #define EBI_TFTCTRL_FBCTRIG_HSYNC (_EBI_TFTCTRL_FBCTRIG_HSYNC << 9) /**< Shifted mode HSYNC for EBI_TFTCTRL */
bogdanm 0:9b334a45a8ff 1079 #define _EBI_TFTCTRL_INTERLEAVE_SHIFT 10 /**< Shift value for EBI_INTERLEAVE */
bogdanm 0:9b334a45a8ff 1080 #define _EBI_TFTCTRL_INTERLEAVE_MASK 0xC00UL /**< Bit mask for EBI_INTERLEAVE */
bogdanm 0:9b334a45a8ff 1081 #define _EBI_TFTCTRL_INTERLEAVE_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_TFTCTRL */
bogdanm 0:9b334a45a8ff 1082 #define _EBI_TFTCTRL_INTERLEAVE_UNLIMITED 0x00000000UL /**< Mode UNLIMITED for EBI_TFTCTRL */
bogdanm 0:9b334a45a8ff 1083 #define _EBI_TFTCTRL_INTERLEAVE_ONEPERDCLK 0x00000001UL /**< Mode ONEPERDCLK for EBI_TFTCTRL */
bogdanm 0:9b334a45a8ff 1084 #define _EBI_TFTCTRL_INTERLEAVE_PORCH 0x00000002UL /**< Mode PORCH for EBI_TFTCTRL */
bogdanm 0:9b334a45a8ff 1085 #define EBI_TFTCTRL_INTERLEAVE_DEFAULT (_EBI_TFTCTRL_INTERLEAVE_DEFAULT << 10) /**< Shifted mode DEFAULT for EBI_TFTCTRL */
bogdanm 0:9b334a45a8ff 1086 #define EBI_TFTCTRL_INTERLEAVE_UNLIMITED (_EBI_TFTCTRL_INTERLEAVE_UNLIMITED << 10) /**< Shifted mode UNLIMITED for EBI_TFTCTRL */
bogdanm 0:9b334a45a8ff 1087 #define EBI_TFTCTRL_INTERLEAVE_ONEPERDCLK (_EBI_TFTCTRL_INTERLEAVE_ONEPERDCLK << 10) /**< Shifted mode ONEPERDCLK for EBI_TFTCTRL */
bogdanm 0:9b334a45a8ff 1088 #define EBI_TFTCTRL_INTERLEAVE_PORCH (_EBI_TFTCTRL_INTERLEAVE_PORCH << 10) /**< Shifted mode PORCH for EBI_TFTCTRL */
bogdanm 0:9b334a45a8ff 1089 #define EBI_TFTCTRL_COLOR1SRC (0x1UL << 12) /**< Masking/Alpha Blending Color1 Source */
bogdanm 0:9b334a45a8ff 1090 #define _EBI_TFTCTRL_COLOR1SRC_SHIFT 12 /**< Shift value for EBI_COLOR1SRC */
bogdanm 0:9b334a45a8ff 1091 #define _EBI_TFTCTRL_COLOR1SRC_MASK 0x1000UL /**< Bit mask for EBI_COLOR1SRC */
bogdanm 0:9b334a45a8ff 1092 #define _EBI_TFTCTRL_COLOR1SRC_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_TFTCTRL */
bogdanm 0:9b334a45a8ff 1093 #define _EBI_TFTCTRL_COLOR1SRC_MEM 0x00000000UL /**< Mode MEM for EBI_TFTCTRL */
bogdanm 0:9b334a45a8ff 1094 #define _EBI_TFTCTRL_COLOR1SRC_PIXEL1 0x00000001UL /**< Mode PIXEL1 for EBI_TFTCTRL */
bogdanm 0:9b334a45a8ff 1095 #define EBI_TFTCTRL_COLOR1SRC_DEFAULT (_EBI_TFTCTRL_COLOR1SRC_DEFAULT << 12) /**< Shifted mode DEFAULT for EBI_TFTCTRL */
bogdanm 0:9b334a45a8ff 1096 #define EBI_TFTCTRL_COLOR1SRC_MEM (_EBI_TFTCTRL_COLOR1SRC_MEM << 12) /**< Shifted mode MEM for EBI_TFTCTRL */
bogdanm 0:9b334a45a8ff 1097 #define EBI_TFTCTRL_COLOR1SRC_PIXEL1 (_EBI_TFTCTRL_COLOR1SRC_PIXEL1 << 12) /**< Shifted mode PIXEL1 for EBI_TFTCTRL */
bogdanm 0:9b334a45a8ff 1098 #define EBI_TFTCTRL_WIDTH (0x1UL << 16) /**< TFT Transaction Width */
bogdanm 0:9b334a45a8ff 1099 #define _EBI_TFTCTRL_WIDTH_SHIFT 16 /**< Shift value for EBI_WIDTH */
bogdanm 0:9b334a45a8ff 1100 #define _EBI_TFTCTRL_WIDTH_MASK 0x10000UL /**< Bit mask for EBI_WIDTH */
bogdanm 0:9b334a45a8ff 1101 #define _EBI_TFTCTRL_WIDTH_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_TFTCTRL */
bogdanm 0:9b334a45a8ff 1102 #define _EBI_TFTCTRL_WIDTH_BYTE 0x00000000UL /**< Mode BYTE for EBI_TFTCTRL */
bogdanm 0:9b334a45a8ff 1103 #define _EBI_TFTCTRL_WIDTH_HALFWORD 0x00000001UL /**< Mode HALFWORD for EBI_TFTCTRL */
bogdanm 0:9b334a45a8ff 1104 #define EBI_TFTCTRL_WIDTH_DEFAULT (_EBI_TFTCTRL_WIDTH_DEFAULT << 16) /**< Shifted mode DEFAULT for EBI_TFTCTRL */
bogdanm 0:9b334a45a8ff 1105 #define EBI_TFTCTRL_WIDTH_BYTE (_EBI_TFTCTRL_WIDTH_BYTE << 16) /**< Shifted mode BYTE for EBI_TFTCTRL */
bogdanm 0:9b334a45a8ff 1106 #define EBI_TFTCTRL_WIDTH_HALFWORD (_EBI_TFTCTRL_WIDTH_HALFWORD << 16) /**< Shifted mode HALFWORD for EBI_TFTCTRL */
bogdanm 0:9b334a45a8ff 1107 #define _EBI_TFTCTRL_BANKSEL_SHIFT 20 /**< Shift value for EBI_BANKSEL */
bogdanm 0:9b334a45a8ff 1108 #define _EBI_TFTCTRL_BANKSEL_MASK 0x300000UL /**< Bit mask for EBI_BANKSEL */
bogdanm 0:9b334a45a8ff 1109 #define _EBI_TFTCTRL_BANKSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_TFTCTRL */
bogdanm 0:9b334a45a8ff 1110 #define _EBI_TFTCTRL_BANKSEL_BANK0 0x00000000UL /**< Mode BANK0 for EBI_TFTCTRL */
bogdanm 0:9b334a45a8ff 1111 #define _EBI_TFTCTRL_BANKSEL_BANK1 0x00000001UL /**< Mode BANK1 for EBI_TFTCTRL */
bogdanm 0:9b334a45a8ff 1112 #define _EBI_TFTCTRL_BANKSEL_BANK2 0x00000002UL /**< Mode BANK2 for EBI_TFTCTRL */
bogdanm 0:9b334a45a8ff 1113 #define _EBI_TFTCTRL_BANKSEL_BANK3 0x00000003UL /**< Mode BANK3 for EBI_TFTCTRL */
bogdanm 0:9b334a45a8ff 1114 #define EBI_TFTCTRL_BANKSEL_DEFAULT (_EBI_TFTCTRL_BANKSEL_DEFAULT << 20) /**< Shifted mode DEFAULT for EBI_TFTCTRL */
bogdanm 0:9b334a45a8ff 1115 #define EBI_TFTCTRL_BANKSEL_BANK0 (_EBI_TFTCTRL_BANKSEL_BANK0 << 20) /**< Shifted mode BANK0 for EBI_TFTCTRL */
bogdanm 0:9b334a45a8ff 1116 #define EBI_TFTCTRL_BANKSEL_BANK1 (_EBI_TFTCTRL_BANKSEL_BANK1 << 20) /**< Shifted mode BANK1 for EBI_TFTCTRL */
bogdanm 0:9b334a45a8ff 1117 #define EBI_TFTCTRL_BANKSEL_BANK2 (_EBI_TFTCTRL_BANKSEL_BANK2 << 20) /**< Shifted mode BANK2 for EBI_TFTCTRL */
bogdanm 0:9b334a45a8ff 1118 #define EBI_TFTCTRL_BANKSEL_BANK3 (_EBI_TFTCTRL_BANKSEL_BANK3 << 20) /**< Shifted mode BANK3 for EBI_TFTCTRL */
bogdanm 0:9b334a45a8ff 1119 #define EBI_TFTCTRL_RGBMODE (0x1UL << 24) /**< TFT RGB Mode */
bogdanm 0:9b334a45a8ff 1120 #define _EBI_TFTCTRL_RGBMODE_SHIFT 24 /**< Shift value for EBI_RGBMODE */
bogdanm 0:9b334a45a8ff 1121 #define _EBI_TFTCTRL_RGBMODE_MASK 0x1000000UL /**< Bit mask for EBI_RGBMODE */
bogdanm 0:9b334a45a8ff 1122 #define _EBI_TFTCTRL_RGBMODE_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_TFTCTRL */
bogdanm 0:9b334a45a8ff 1123 #define _EBI_TFTCTRL_RGBMODE_RGB565 0x00000000UL /**< Mode RGB565 for EBI_TFTCTRL */
bogdanm 0:9b334a45a8ff 1124 #define _EBI_TFTCTRL_RGBMODE_RGB555 0x00000001UL /**< Mode RGB555 for EBI_TFTCTRL */
bogdanm 0:9b334a45a8ff 1125 #define EBI_TFTCTRL_RGBMODE_DEFAULT (_EBI_TFTCTRL_RGBMODE_DEFAULT << 24) /**< Shifted mode DEFAULT for EBI_TFTCTRL */
bogdanm 0:9b334a45a8ff 1126 #define EBI_TFTCTRL_RGBMODE_RGB565 (_EBI_TFTCTRL_RGBMODE_RGB565 << 24) /**< Shifted mode RGB565 for EBI_TFTCTRL */
bogdanm 0:9b334a45a8ff 1127 #define EBI_TFTCTRL_RGBMODE_RGB555 (_EBI_TFTCTRL_RGBMODE_RGB555 << 24) /**< Shifted mode RGB555 for EBI_TFTCTRL */
bogdanm 0:9b334a45a8ff 1128
bogdanm 0:9b334a45a8ff 1129 /* Bit fields for EBI TFTSTATUS */
bogdanm 0:9b334a45a8ff 1130 #define _EBI_TFTSTATUS_RESETVALUE 0x00000000UL /**< Default value for EBI_TFTSTATUS */
bogdanm 0:9b334a45a8ff 1131 #define _EBI_TFTSTATUS_MASK 0x07FF07FFUL /**< Mask for EBI_TFTSTATUS */
bogdanm 0:9b334a45a8ff 1132 #define _EBI_TFTSTATUS_HCNT_SHIFT 0 /**< Shift value for EBI_HCNT */
bogdanm 0:9b334a45a8ff 1133 #define _EBI_TFTSTATUS_HCNT_MASK 0x7FFUL /**< Bit mask for EBI_HCNT */
bogdanm 0:9b334a45a8ff 1134 #define _EBI_TFTSTATUS_HCNT_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_TFTSTATUS */
bogdanm 0:9b334a45a8ff 1135 #define EBI_TFTSTATUS_HCNT_DEFAULT (_EBI_TFTSTATUS_HCNT_DEFAULT << 0) /**< Shifted mode DEFAULT for EBI_TFTSTATUS */
bogdanm 0:9b334a45a8ff 1136 #define _EBI_TFTSTATUS_VCNT_SHIFT 16 /**< Shift value for EBI_VCNT */
bogdanm 0:9b334a45a8ff 1137 #define _EBI_TFTSTATUS_VCNT_MASK 0x7FF0000UL /**< Bit mask for EBI_VCNT */
bogdanm 0:9b334a45a8ff 1138 #define _EBI_TFTSTATUS_VCNT_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_TFTSTATUS */
bogdanm 0:9b334a45a8ff 1139 #define EBI_TFTSTATUS_VCNT_DEFAULT (_EBI_TFTSTATUS_VCNT_DEFAULT << 16) /**< Shifted mode DEFAULT for EBI_TFTSTATUS */
bogdanm 0:9b334a45a8ff 1140
bogdanm 0:9b334a45a8ff 1141 /* Bit fields for EBI TFTFRAMEBASE */
bogdanm 0:9b334a45a8ff 1142 #define _EBI_TFTFRAMEBASE_RESETVALUE 0x00000000UL /**< Default value for EBI_TFTFRAMEBASE */
bogdanm 0:9b334a45a8ff 1143 #define _EBI_TFTFRAMEBASE_MASK 0x0FFFFFFFUL /**< Mask for EBI_TFTFRAMEBASE */
bogdanm 0:9b334a45a8ff 1144 #define _EBI_TFTFRAMEBASE_FRAMEBASE_SHIFT 0 /**< Shift value for EBI_FRAMEBASE */
bogdanm 0:9b334a45a8ff 1145 #define _EBI_TFTFRAMEBASE_FRAMEBASE_MASK 0xFFFFFFFUL /**< Bit mask for EBI_FRAMEBASE */
bogdanm 0:9b334a45a8ff 1146 #define _EBI_TFTFRAMEBASE_FRAMEBASE_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_TFTFRAMEBASE */
bogdanm 0:9b334a45a8ff 1147 #define EBI_TFTFRAMEBASE_FRAMEBASE_DEFAULT (_EBI_TFTFRAMEBASE_FRAMEBASE_DEFAULT << 0) /**< Shifted mode DEFAULT for EBI_TFTFRAMEBASE */
bogdanm 0:9b334a45a8ff 1148
bogdanm 0:9b334a45a8ff 1149 /* Bit fields for EBI TFTSTRIDE */
bogdanm 0:9b334a45a8ff 1150 #define _EBI_TFTSTRIDE_RESETVALUE 0x00000000UL /**< Default value for EBI_TFTSTRIDE */
bogdanm 0:9b334a45a8ff 1151 #define _EBI_TFTSTRIDE_MASK 0x00000FFFUL /**< Mask for EBI_TFTSTRIDE */
bogdanm 0:9b334a45a8ff 1152 #define _EBI_TFTSTRIDE_HSTRIDE_SHIFT 0 /**< Shift value for EBI_HSTRIDE */
bogdanm 0:9b334a45a8ff 1153 #define _EBI_TFTSTRIDE_HSTRIDE_MASK 0xFFFUL /**< Bit mask for EBI_HSTRIDE */
bogdanm 0:9b334a45a8ff 1154 #define _EBI_TFTSTRIDE_HSTRIDE_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_TFTSTRIDE */
bogdanm 0:9b334a45a8ff 1155 #define EBI_TFTSTRIDE_HSTRIDE_DEFAULT (_EBI_TFTSTRIDE_HSTRIDE_DEFAULT << 0) /**< Shifted mode DEFAULT for EBI_TFTSTRIDE */
bogdanm 0:9b334a45a8ff 1156
bogdanm 0:9b334a45a8ff 1157 /* Bit fields for EBI TFTSIZE */
bogdanm 0:9b334a45a8ff 1158 #define _EBI_TFTSIZE_RESETVALUE 0x00000000UL /**< Default value for EBI_TFTSIZE */
bogdanm 0:9b334a45a8ff 1159 #define _EBI_TFTSIZE_MASK 0x03FF03FFUL /**< Mask for EBI_TFTSIZE */
bogdanm 0:9b334a45a8ff 1160 #define _EBI_TFTSIZE_HSZ_SHIFT 0 /**< Shift value for EBI_HSZ */
bogdanm 0:9b334a45a8ff 1161 #define _EBI_TFTSIZE_HSZ_MASK 0x3FFUL /**< Bit mask for EBI_HSZ */
bogdanm 0:9b334a45a8ff 1162 #define _EBI_TFTSIZE_HSZ_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_TFTSIZE */
bogdanm 0:9b334a45a8ff 1163 #define EBI_TFTSIZE_HSZ_DEFAULT (_EBI_TFTSIZE_HSZ_DEFAULT << 0) /**< Shifted mode DEFAULT for EBI_TFTSIZE */
bogdanm 0:9b334a45a8ff 1164 #define _EBI_TFTSIZE_VSZ_SHIFT 16 /**< Shift value for EBI_VSZ */
bogdanm 0:9b334a45a8ff 1165 #define _EBI_TFTSIZE_VSZ_MASK 0x3FF0000UL /**< Bit mask for EBI_VSZ */
bogdanm 0:9b334a45a8ff 1166 #define _EBI_TFTSIZE_VSZ_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_TFTSIZE */
bogdanm 0:9b334a45a8ff 1167 #define EBI_TFTSIZE_VSZ_DEFAULT (_EBI_TFTSIZE_VSZ_DEFAULT << 16) /**< Shifted mode DEFAULT for EBI_TFTSIZE */
bogdanm 0:9b334a45a8ff 1168
bogdanm 0:9b334a45a8ff 1169 /* Bit fields for EBI TFTHPORCH */
bogdanm 0:9b334a45a8ff 1170 #define _EBI_TFTHPORCH_RESETVALUE 0x00000000UL /**< Default value for EBI_TFTHPORCH */
bogdanm 0:9b334a45a8ff 1171 #define _EBI_TFTHPORCH_MASK 0x33FCFF7FUL /**< Mask for EBI_TFTHPORCH */
bogdanm 0:9b334a45a8ff 1172 #define _EBI_TFTHPORCH_HSYNC_SHIFT 0 /**< Shift value for EBI_HSYNC */
bogdanm 0:9b334a45a8ff 1173 #define _EBI_TFTHPORCH_HSYNC_MASK 0x7FUL /**< Bit mask for EBI_HSYNC */
bogdanm 0:9b334a45a8ff 1174 #define _EBI_TFTHPORCH_HSYNC_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_TFTHPORCH */
bogdanm 0:9b334a45a8ff 1175 #define EBI_TFTHPORCH_HSYNC_DEFAULT (_EBI_TFTHPORCH_HSYNC_DEFAULT << 0) /**< Shifted mode DEFAULT for EBI_TFTHPORCH */
bogdanm 0:9b334a45a8ff 1176 #define _EBI_TFTHPORCH_HFPORCH_SHIFT 8 /**< Shift value for EBI_HFPORCH */
bogdanm 0:9b334a45a8ff 1177 #define _EBI_TFTHPORCH_HFPORCH_MASK 0xFF00UL /**< Bit mask for EBI_HFPORCH */
bogdanm 0:9b334a45a8ff 1178 #define _EBI_TFTHPORCH_HFPORCH_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_TFTHPORCH */
bogdanm 0:9b334a45a8ff 1179 #define EBI_TFTHPORCH_HFPORCH_DEFAULT (_EBI_TFTHPORCH_HFPORCH_DEFAULT << 8) /**< Shifted mode DEFAULT for EBI_TFTHPORCH */
bogdanm 0:9b334a45a8ff 1180 #define _EBI_TFTHPORCH_HBPORCH_SHIFT 18 /**< Shift value for EBI_HBPORCH */
bogdanm 0:9b334a45a8ff 1181 #define _EBI_TFTHPORCH_HBPORCH_MASK 0x3FC0000UL /**< Bit mask for EBI_HBPORCH */
bogdanm 0:9b334a45a8ff 1182 #define _EBI_TFTHPORCH_HBPORCH_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_TFTHPORCH */
bogdanm 0:9b334a45a8ff 1183 #define EBI_TFTHPORCH_HBPORCH_DEFAULT (_EBI_TFTHPORCH_HBPORCH_DEFAULT << 18) /**< Shifted mode DEFAULT for EBI_TFTHPORCH */
bogdanm 0:9b334a45a8ff 1184 #define _EBI_TFTHPORCH_HSYNCSTART_SHIFT 28 /**< Shift value for EBI_HSYNCSTART */
bogdanm 0:9b334a45a8ff 1185 #define _EBI_TFTHPORCH_HSYNCSTART_MASK 0x30000000UL /**< Bit mask for EBI_HSYNCSTART */
bogdanm 0:9b334a45a8ff 1186 #define _EBI_TFTHPORCH_HSYNCSTART_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_TFTHPORCH */
bogdanm 0:9b334a45a8ff 1187 #define EBI_TFTHPORCH_HSYNCSTART_DEFAULT (_EBI_TFTHPORCH_HSYNCSTART_DEFAULT << 28) /**< Shifted mode DEFAULT for EBI_TFTHPORCH */
bogdanm 0:9b334a45a8ff 1188
bogdanm 0:9b334a45a8ff 1189 /* Bit fields for EBI TFTVPORCH */
bogdanm 0:9b334a45a8ff 1190 #define _EBI_TFTVPORCH_RESETVALUE 0x00000000UL /**< Default value for EBI_TFTVPORCH */
bogdanm 0:9b334a45a8ff 1191 #define _EBI_TFTVPORCH_MASK 0x03FCFF7FUL /**< Mask for EBI_TFTVPORCH */
bogdanm 0:9b334a45a8ff 1192 #define _EBI_TFTVPORCH_VSYNC_SHIFT 0 /**< Shift value for EBI_VSYNC */
bogdanm 0:9b334a45a8ff 1193 #define _EBI_TFTVPORCH_VSYNC_MASK 0x7FUL /**< Bit mask for EBI_VSYNC */
bogdanm 0:9b334a45a8ff 1194 #define _EBI_TFTVPORCH_VSYNC_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_TFTVPORCH */
bogdanm 0:9b334a45a8ff 1195 #define EBI_TFTVPORCH_VSYNC_DEFAULT (_EBI_TFTVPORCH_VSYNC_DEFAULT << 0) /**< Shifted mode DEFAULT for EBI_TFTVPORCH */
bogdanm 0:9b334a45a8ff 1196 #define _EBI_TFTVPORCH_VFPORCH_SHIFT 8 /**< Shift value for EBI_VFPORCH */
bogdanm 0:9b334a45a8ff 1197 #define _EBI_TFTVPORCH_VFPORCH_MASK 0xFF00UL /**< Bit mask for EBI_VFPORCH */
bogdanm 0:9b334a45a8ff 1198 #define _EBI_TFTVPORCH_VFPORCH_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_TFTVPORCH */
bogdanm 0:9b334a45a8ff 1199 #define EBI_TFTVPORCH_VFPORCH_DEFAULT (_EBI_TFTVPORCH_VFPORCH_DEFAULT << 8) /**< Shifted mode DEFAULT for EBI_TFTVPORCH */
bogdanm 0:9b334a45a8ff 1200 #define _EBI_TFTVPORCH_VBPORCH_SHIFT 18 /**< Shift value for EBI_VBPORCH */
bogdanm 0:9b334a45a8ff 1201 #define _EBI_TFTVPORCH_VBPORCH_MASK 0x3FC0000UL /**< Bit mask for EBI_VBPORCH */
bogdanm 0:9b334a45a8ff 1202 #define _EBI_TFTVPORCH_VBPORCH_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_TFTVPORCH */
bogdanm 0:9b334a45a8ff 1203 #define EBI_TFTVPORCH_VBPORCH_DEFAULT (_EBI_TFTVPORCH_VBPORCH_DEFAULT << 18) /**< Shifted mode DEFAULT for EBI_TFTVPORCH */
bogdanm 0:9b334a45a8ff 1204
bogdanm 0:9b334a45a8ff 1205 /* Bit fields for EBI TFTTIMING */
bogdanm 0:9b334a45a8ff 1206 #define _EBI_TFTTIMING_RESETVALUE 0x00000000UL /**< Default value for EBI_TFTTIMING */
bogdanm 0:9b334a45a8ff 1207 #define _EBI_TFTTIMING_MASK 0x337FF7FFUL /**< Mask for EBI_TFTTIMING */
bogdanm 0:9b334a45a8ff 1208 #define _EBI_TFTTIMING_DCLKPERIOD_SHIFT 0 /**< Shift value for EBI_DCLKPERIOD */
bogdanm 0:9b334a45a8ff 1209 #define _EBI_TFTTIMING_DCLKPERIOD_MASK 0x7FFUL /**< Bit mask for EBI_DCLKPERIOD */
bogdanm 0:9b334a45a8ff 1210 #define _EBI_TFTTIMING_DCLKPERIOD_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_TFTTIMING */
bogdanm 0:9b334a45a8ff 1211 #define EBI_TFTTIMING_DCLKPERIOD_DEFAULT (_EBI_TFTTIMING_DCLKPERIOD_DEFAULT << 0) /**< Shifted mode DEFAULT for EBI_TFTTIMING */
bogdanm 0:9b334a45a8ff 1212 #define _EBI_TFTTIMING_TFTSTART_SHIFT 12 /**< Shift value for EBI_TFTSTART */
bogdanm 0:9b334a45a8ff 1213 #define _EBI_TFTTIMING_TFTSTART_MASK 0x7FF000UL /**< Bit mask for EBI_TFTSTART */
bogdanm 0:9b334a45a8ff 1214 #define _EBI_TFTTIMING_TFTSTART_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_TFTTIMING */
bogdanm 0:9b334a45a8ff 1215 #define EBI_TFTTIMING_TFTSTART_DEFAULT (_EBI_TFTTIMING_TFTSTART_DEFAULT << 12) /**< Shifted mode DEFAULT for EBI_TFTTIMING */
bogdanm 0:9b334a45a8ff 1216 #define _EBI_TFTTIMING_TFTSETUP_SHIFT 24 /**< Shift value for EBI_TFTSETUP */
bogdanm 0:9b334a45a8ff 1217 #define _EBI_TFTTIMING_TFTSETUP_MASK 0x3000000UL /**< Bit mask for EBI_TFTSETUP */
bogdanm 0:9b334a45a8ff 1218 #define _EBI_TFTTIMING_TFTSETUP_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_TFTTIMING */
bogdanm 0:9b334a45a8ff 1219 #define EBI_TFTTIMING_TFTSETUP_DEFAULT (_EBI_TFTTIMING_TFTSETUP_DEFAULT << 24) /**< Shifted mode DEFAULT for EBI_TFTTIMING */
bogdanm 0:9b334a45a8ff 1220 #define _EBI_TFTTIMING_TFTHOLD_SHIFT 28 /**< Shift value for EBI_TFTHOLD */
bogdanm 0:9b334a45a8ff 1221 #define _EBI_TFTTIMING_TFTHOLD_MASK 0x30000000UL /**< Bit mask for EBI_TFTHOLD */
bogdanm 0:9b334a45a8ff 1222 #define _EBI_TFTTIMING_TFTHOLD_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_TFTTIMING */
bogdanm 0:9b334a45a8ff 1223 #define EBI_TFTTIMING_TFTHOLD_DEFAULT (_EBI_TFTTIMING_TFTHOLD_DEFAULT << 28) /**< Shifted mode DEFAULT for EBI_TFTTIMING */
bogdanm 0:9b334a45a8ff 1224
bogdanm 0:9b334a45a8ff 1225 /* Bit fields for EBI TFTPOLARITY */
bogdanm 0:9b334a45a8ff 1226 #define _EBI_TFTPOLARITY_RESETVALUE 0x00000000UL /**< Default value for EBI_TFTPOLARITY */
bogdanm 0:9b334a45a8ff 1227 #define _EBI_TFTPOLARITY_MASK 0x0000001FUL /**< Mask for EBI_TFTPOLARITY */
bogdanm 0:9b334a45a8ff 1228 #define EBI_TFTPOLARITY_CSPOL (0x1UL << 0) /**< TFT Chip Select Polarity */
bogdanm 0:9b334a45a8ff 1229 #define _EBI_TFTPOLARITY_CSPOL_SHIFT 0 /**< Shift value for EBI_CSPOL */
bogdanm 0:9b334a45a8ff 1230 #define _EBI_TFTPOLARITY_CSPOL_MASK 0x1UL /**< Bit mask for EBI_CSPOL */
bogdanm 0:9b334a45a8ff 1231 #define _EBI_TFTPOLARITY_CSPOL_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_TFTPOLARITY */
bogdanm 0:9b334a45a8ff 1232 #define _EBI_TFTPOLARITY_CSPOL_ACTIVELOW 0x00000000UL /**< Mode ACTIVELOW for EBI_TFTPOLARITY */
bogdanm 0:9b334a45a8ff 1233 #define _EBI_TFTPOLARITY_CSPOL_ACTIVEHIGH 0x00000001UL /**< Mode ACTIVEHIGH for EBI_TFTPOLARITY */
bogdanm 0:9b334a45a8ff 1234 #define EBI_TFTPOLARITY_CSPOL_DEFAULT (_EBI_TFTPOLARITY_CSPOL_DEFAULT << 0) /**< Shifted mode DEFAULT for EBI_TFTPOLARITY */
bogdanm 0:9b334a45a8ff 1235 #define EBI_TFTPOLARITY_CSPOL_ACTIVELOW (_EBI_TFTPOLARITY_CSPOL_ACTIVELOW << 0) /**< Shifted mode ACTIVELOW for EBI_TFTPOLARITY */
bogdanm 0:9b334a45a8ff 1236 #define EBI_TFTPOLARITY_CSPOL_ACTIVEHIGH (_EBI_TFTPOLARITY_CSPOL_ACTIVEHIGH << 0) /**< Shifted mode ACTIVEHIGH for EBI_TFTPOLARITY */
bogdanm 0:9b334a45a8ff 1237 #define EBI_TFTPOLARITY_DCLKPOL (0x1UL << 1) /**< TFT DCLK Polarity */
bogdanm 0:9b334a45a8ff 1238 #define _EBI_TFTPOLARITY_DCLKPOL_SHIFT 1 /**< Shift value for EBI_DCLKPOL */
bogdanm 0:9b334a45a8ff 1239 #define _EBI_TFTPOLARITY_DCLKPOL_MASK 0x2UL /**< Bit mask for EBI_DCLKPOL */
bogdanm 0:9b334a45a8ff 1240 #define _EBI_TFTPOLARITY_DCLKPOL_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_TFTPOLARITY */
bogdanm 0:9b334a45a8ff 1241 #define _EBI_TFTPOLARITY_DCLKPOL_ACTIVEFALLING 0x00000000UL /**< Mode ACTIVEFALLING for EBI_TFTPOLARITY */
bogdanm 0:9b334a45a8ff 1242 #define _EBI_TFTPOLARITY_DCLKPOL_ACTIVERISING 0x00000001UL /**< Mode ACTIVERISING for EBI_TFTPOLARITY */
bogdanm 0:9b334a45a8ff 1243 #define EBI_TFTPOLARITY_DCLKPOL_DEFAULT (_EBI_TFTPOLARITY_DCLKPOL_DEFAULT << 1) /**< Shifted mode DEFAULT for EBI_TFTPOLARITY */
bogdanm 0:9b334a45a8ff 1244 #define EBI_TFTPOLARITY_DCLKPOL_ACTIVEFALLING (_EBI_TFTPOLARITY_DCLKPOL_ACTIVEFALLING << 1) /**< Shifted mode ACTIVEFALLING for EBI_TFTPOLARITY */
bogdanm 0:9b334a45a8ff 1245 #define EBI_TFTPOLARITY_DCLKPOL_ACTIVERISING (_EBI_TFTPOLARITY_DCLKPOL_ACTIVERISING << 1) /**< Shifted mode ACTIVERISING for EBI_TFTPOLARITY */
bogdanm 0:9b334a45a8ff 1246 #define EBI_TFTPOLARITY_DATAENPOL (0x1UL << 2) /**< TFT DATAEN Polarity */
bogdanm 0:9b334a45a8ff 1247 #define _EBI_TFTPOLARITY_DATAENPOL_SHIFT 2 /**< Shift value for EBI_DATAENPOL */
bogdanm 0:9b334a45a8ff 1248 #define _EBI_TFTPOLARITY_DATAENPOL_MASK 0x4UL /**< Bit mask for EBI_DATAENPOL */
bogdanm 0:9b334a45a8ff 1249 #define _EBI_TFTPOLARITY_DATAENPOL_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_TFTPOLARITY */
bogdanm 0:9b334a45a8ff 1250 #define _EBI_TFTPOLARITY_DATAENPOL_ACTIVELOW 0x00000000UL /**< Mode ACTIVELOW for EBI_TFTPOLARITY */
bogdanm 0:9b334a45a8ff 1251 #define _EBI_TFTPOLARITY_DATAENPOL_ACTIVEHIGH 0x00000001UL /**< Mode ACTIVEHIGH for EBI_TFTPOLARITY */
bogdanm 0:9b334a45a8ff 1252 #define EBI_TFTPOLARITY_DATAENPOL_DEFAULT (_EBI_TFTPOLARITY_DATAENPOL_DEFAULT << 2) /**< Shifted mode DEFAULT for EBI_TFTPOLARITY */
bogdanm 0:9b334a45a8ff 1253 #define EBI_TFTPOLARITY_DATAENPOL_ACTIVELOW (_EBI_TFTPOLARITY_DATAENPOL_ACTIVELOW << 2) /**< Shifted mode ACTIVELOW for EBI_TFTPOLARITY */
bogdanm 0:9b334a45a8ff 1254 #define EBI_TFTPOLARITY_DATAENPOL_ACTIVEHIGH (_EBI_TFTPOLARITY_DATAENPOL_ACTIVEHIGH << 2) /**< Shifted mode ACTIVEHIGH for EBI_TFTPOLARITY */
bogdanm 0:9b334a45a8ff 1255 #define EBI_TFTPOLARITY_HSYNCPOL (0x1UL << 3) /**< Address Latch Polarity */
bogdanm 0:9b334a45a8ff 1256 #define _EBI_TFTPOLARITY_HSYNCPOL_SHIFT 3 /**< Shift value for EBI_HSYNCPOL */
bogdanm 0:9b334a45a8ff 1257 #define _EBI_TFTPOLARITY_HSYNCPOL_MASK 0x8UL /**< Bit mask for EBI_HSYNCPOL */
bogdanm 0:9b334a45a8ff 1258 #define _EBI_TFTPOLARITY_HSYNCPOL_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_TFTPOLARITY */
bogdanm 0:9b334a45a8ff 1259 #define _EBI_TFTPOLARITY_HSYNCPOL_ACTIVELOW 0x00000000UL /**< Mode ACTIVELOW for EBI_TFTPOLARITY */
bogdanm 0:9b334a45a8ff 1260 #define _EBI_TFTPOLARITY_HSYNCPOL_ACTIVEHIGH 0x00000001UL /**< Mode ACTIVEHIGH for EBI_TFTPOLARITY */
bogdanm 0:9b334a45a8ff 1261 #define EBI_TFTPOLARITY_HSYNCPOL_DEFAULT (_EBI_TFTPOLARITY_HSYNCPOL_DEFAULT << 3) /**< Shifted mode DEFAULT for EBI_TFTPOLARITY */
bogdanm 0:9b334a45a8ff 1262 #define EBI_TFTPOLARITY_HSYNCPOL_ACTIVELOW (_EBI_TFTPOLARITY_HSYNCPOL_ACTIVELOW << 3) /**< Shifted mode ACTIVELOW for EBI_TFTPOLARITY */
bogdanm 0:9b334a45a8ff 1263 #define EBI_TFTPOLARITY_HSYNCPOL_ACTIVEHIGH (_EBI_TFTPOLARITY_HSYNCPOL_ACTIVEHIGH << 3) /**< Shifted mode ACTIVEHIGH for EBI_TFTPOLARITY */
bogdanm 0:9b334a45a8ff 1264 #define EBI_TFTPOLARITY_VSYNCPOL (0x1UL << 4) /**< VSYNC Polarity */
bogdanm 0:9b334a45a8ff 1265 #define _EBI_TFTPOLARITY_VSYNCPOL_SHIFT 4 /**< Shift value for EBI_VSYNCPOL */
bogdanm 0:9b334a45a8ff 1266 #define _EBI_TFTPOLARITY_VSYNCPOL_MASK 0x10UL /**< Bit mask for EBI_VSYNCPOL */
bogdanm 0:9b334a45a8ff 1267 #define _EBI_TFTPOLARITY_VSYNCPOL_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_TFTPOLARITY */
bogdanm 0:9b334a45a8ff 1268 #define _EBI_TFTPOLARITY_VSYNCPOL_ACTIVELOW 0x00000000UL /**< Mode ACTIVELOW for EBI_TFTPOLARITY */
bogdanm 0:9b334a45a8ff 1269 #define _EBI_TFTPOLARITY_VSYNCPOL_ACTIVEHIGH 0x00000001UL /**< Mode ACTIVEHIGH for EBI_TFTPOLARITY */
bogdanm 0:9b334a45a8ff 1270 #define EBI_TFTPOLARITY_VSYNCPOL_DEFAULT (_EBI_TFTPOLARITY_VSYNCPOL_DEFAULT << 4) /**< Shifted mode DEFAULT for EBI_TFTPOLARITY */
bogdanm 0:9b334a45a8ff 1271 #define EBI_TFTPOLARITY_VSYNCPOL_ACTIVELOW (_EBI_TFTPOLARITY_VSYNCPOL_ACTIVELOW << 4) /**< Shifted mode ACTIVELOW for EBI_TFTPOLARITY */
bogdanm 0:9b334a45a8ff 1272 #define EBI_TFTPOLARITY_VSYNCPOL_ACTIVEHIGH (_EBI_TFTPOLARITY_VSYNCPOL_ACTIVEHIGH << 4) /**< Shifted mode ACTIVEHIGH for EBI_TFTPOLARITY */
bogdanm 0:9b334a45a8ff 1273
bogdanm 0:9b334a45a8ff 1274 /* Bit fields for EBI TFTDD */
bogdanm 0:9b334a45a8ff 1275 #define _EBI_TFTDD_RESETVALUE 0x00000000UL /**< Default value for EBI_TFTDD */
bogdanm 0:9b334a45a8ff 1276 #define _EBI_TFTDD_MASK 0x0000FFFFUL /**< Mask for EBI_TFTDD */
bogdanm 0:9b334a45a8ff 1277 #define _EBI_TFTDD_DATA_SHIFT 0 /**< Shift value for EBI_DATA */
bogdanm 0:9b334a45a8ff 1278 #define _EBI_TFTDD_DATA_MASK 0xFFFFUL /**< Bit mask for EBI_DATA */
bogdanm 0:9b334a45a8ff 1279 #define _EBI_TFTDD_DATA_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_TFTDD */
bogdanm 0:9b334a45a8ff 1280 #define EBI_TFTDD_DATA_DEFAULT (_EBI_TFTDD_DATA_DEFAULT << 0) /**< Shifted mode DEFAULT for EBI_TFTDD */
bogdanm 0:9b334a45a8ff 1281
bogdanm 0:9b334a45a8ff 1282 /* Bit fields for EBI TFTALPHA */
bogdanm 0:9b334a45a8ff 1283 #define _EBI_TFTALPHA_RESETVALUE 0x00000000UL /**< Default value for EBI_TFTALPHA */
bogdanm 0:9b334a45a8ff 1284 #define _EBI_TFTALPHA_MASK 0x000001FFUL /**< Mask for EBI_TFTALPHA */
bogdanm 0:9b334a45a8ff 1285 #define _EBI_TFTALPHA_ALPHA_SHIFT 0 /**< Shift value for EBI_ALPHA */
bogdanm 0:9b334a45a8ff 1286 #define _EBI_TFTALPHA_ALPHA_MASK 0x1FFUL /**< Bit mask for EBI_ALPHA */
bogdanm 0:9b334a45a8ff 1287 #define _EBI_TFTALPHA_ALPHA_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_TFTALPHA */
bogdanm 0:9b334a45a8ff 1288 #define EBI_TFTALPHA_ALPHA_DEFAULT (_EBI_TFTALPHA_ALPHA_DEFAULT << 0) /**< Shifted mode DEFAULT for EBI_TFTALPHA */
bogdanm 0:9b334a45a8ff 1289
bogdanm 0:9b334a45a8ff 1290 /* Bit fields for EBI TFTPIXEL0 */
bogdanm 0:9b334a45a8ff 1291 #define _EBI_TFTPIXEL0_RESETVALUE 0x00000000UL /**< Default value for EBI_TFTPIXEL0 */
bogdanm 0:9b334a45a8ff 1292 #define _EBI_TFTPIXEL0_MASK 0x0000FFFFUL /**< Mask for EBI_TFTPIXEL0 */
bogdanm 0:9b334a45a8ff 1293 #define _EBI_TFTPIXEL0_DATA_SHIFT 0 /**< Shift value for EBI_DATA */
bogdanm 0:9b334a45a8ff 1294 #define _EBI_TFTPIXEL0_DATA_MASK 0xFFFFUL /**< Bit mask for EBI_DATA */
bogdanm 0:9b334a45a8ff 1295 #define _EBI_TFTPIXEL0_DATA_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_TFTPIXEL0 */
bogdanm 0:9b334a45a8ff 1296 #define EBI_TFTPIXEL0_DATA_DEFAULT (_EBI_TFTPIXEL0_DATA_DEFAULT << 0) /**< Shifted mode DEFAULT for EBI_TFTPIXEL0 */
bogdanm 0:9b334a45a8ff 1297
bogdanm 0:9b334a45a8ff 1298 /* Bit fields for EBI TFTPIXEL1 */
bogdanm 0:9b334a45a8ff 1299 #define _EBI_TFTPIXEL1_RESETVALUE 0x00000000UL /**< Default value for EBI_TFTPIXEL1 */
bogdanm 0:9b334a45a8ff 1300 #define _EBI_TFTPIXEL1_MASK 0x0000FFFFUL /**< Mask for EBI_TFTPIXEL1 */
bogdanm 0:9b334a45a8ff 1301 #define _EBI_TFTPIXEL1_DATA_SHIFT 0 /**< Shift value for EBI_DATA */
bogdanm 0:9b334a45a8ff 1302 #define _EBI_TFTPIXEL1_DATA_MASK 0xFFFFUL /**< Bit mask for EBI_DATA */
bogdanm 0:9b334a45a8ff 1303 #define _EBI_TFTPIXEL1_DATA_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_TFTPIXEL1 */
bogdanm 0:9b334a45a8ff 1304 #define EBI_TFTPIXEL1_DATA_DEFAULT (_EBI_TFTPIXEL1_DATA_DEFAULT << 0) /**< Shifted mode DEFAULT for EBI_TFTPIXEL1 */
bogdanm 0:9b334a45a8ff 1305
bogdanm 0:9b334a45a8ff 1306 /* Bit fields for EBI TFTPIXEL */
bogdanm 0:9b334a45a8ff 1307 #define _EBI_TFTPIXEL_RESETVALUE 0x00000000UL /**< Default value for EBI_TFTPIXEL */
bogdanm 0:9b334a45a8ff 1308 #define _EBI_TFTPIXEL_MASK 0x0000FFFFUL /**< Mask for EBI_TFTPIXEL */
bogdanm 0:9b334a45a8ff 1309 #define _EBI_TFTPIXEL_DATA_SHIFT 0 /**< Shift value for EBI_DATA */
bogdanm 0:9b334a45a8ff 1310 #define _EBI_TFTPIXEL_DATA_MASK 0xFFFFUL /**< Bit mask for EBI_DATA */
bogdanm 0:9b334a45a8ff 1311 #define _EBI_TFTPIXEL_DATA_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_TFTPIXEL */
bogdanm 0:9b334a45a8ff 1312 #define EBI_TFTPIXEL_DATA_DEFAULT (_EBI_TFTPIXEL_DATA_DEFAULT << 0) /**< Shifted mode DEFAULT for EBI_TFTPIXEL */
bogdanm 0:9b334a45a8ff 1313
bogdanm 0:9b334a45a8ff 1314 /* Bit fields for EBI TFTMASK */
bogdanm 0:9b334a45a8ff 1315 #define _EBI_TFTMASK_RESETVALUE 0x00000000UL /**< Default value for EBI_TFTMASK */
bogdanm 0:9b334a45a8ff 1316 #define _EBI_TFTMASK_MASK 0x0000FFFFUL /**< Mask for EBI_TFTMASK */
bogdanm 0:9b334a45a8ff 1317 #define _EBI_TFTMASK_TFTMASK_SHIFT 0 /**< Shift value for EBI_TFTMASK */
bogdanm 0:9b334a45a8ff 1318 #define _EBI_TFTMASK_TFTMASK_MASK 0xFFFFUL /**< Bit mask for EBI_TFTMASK */
bogdanm 0:9b334a45a8ff 1319 #define _EBI_TFTMASK_TFTMASK_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_TFTMASK */
bogdanm 0:9b334a45a8ff 1320 #define EBI_TFTMASK_TFTMASK_DEFAULT (_EBI_TFTMASK_TFTMASK_DEFAULT << 0) /**< Shifted mode DEFAULT for EBI_TFTMASK */
bogdanm 0:9b334a45a8ff 1321
bogdanm 0:9b334a45a8ff 1322 /* Bit fields for EBI IF */
bogdanm 0:9b334a45a8ff 1323 #define _EBI_IF_RESETVALUE 0x00000000UL /**< Default value for EBI_IF */
bogdanm 0:9b334a45a8ff 1324 #define _EBI_IF_MASK 0x0000003FUL /**< Mask for EBI_IF */
bogdanm 0:9b334a45a8ff 1325 #define EBI_IF_VSYNC (0x1UL << 0) /**< Vertical Sync Interrupt Flag */
bogdanm 0:9b334a45a8ff 1326 #define _EBI_IF_VSYNC_SHIFT 0 /**< Shift value for EBI_VSYNC */
bogdanm 0:9b334a45a8ff 1327 #define _EBI_IF_VSYNC_MASK 0x1UL /**< Bit mask for EBI_VSYNC */
bogdanm 0:9b334a45a8ff 1328 #define _EBI_IF_VSYNC_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_IF */
bogdanm 0:9b334a45a8ff 1329 #define EBI_IF_VSYNC_DEFAULT (_EBI_IF_VSYNC_DEFAULT << 0) /**< Shifted mode DEFAULT for EBI_IF */
bogdanm 0:9b334a45a8ff 1330 #define EBI_IF_HSYNC (0x1UL << 1) /**< Horizontal Sync Interrupt Flag */
bogdanm 0:9b334a45a8ff 1331 #define _EBI_IF_HSYNC_SHIFT 1 /**< Shift value for EBI_HSYNC */
bogdanm 0:9b334a45a8ff 1332 #define _EBI_IF_HSYNC_MASK 0x2UL /**< Bit mask for EBI_HSYNC */
bogdanm 0:9b334a45a8ff 1333 #define _EBI_IF_HSYNC_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_IF */
bogdanm 0:9b334a45a8ff 1334 #define EBI_IF_HSYNC_DEFAULT (_EBI_IF_HSYNC_DEFAULT << 1) /**< Shifted mode DEFAULT for EBI_IF */
bogdanm 0:9b334a45a8ff 1335 #define EBI_IF_VBPORCH (0x1UL << 2) /**< Vertical Back Porch Interrupt Flag */
bogdanm 0:9b334a45a8ff 1336 #define _EBI_IF_VBPORCH_SHIFT 2 /**< Shift value for EBI_VBPORCH */
bogdanm 0:9b334a45a8ff 1337 #define _EBI_IF_VBPORCH_MASK 0x4UL /**< Bit mask for EBI_VBPORCH */
bogdanm 0:9b334a45a8ff 1338 #define _EBI_IF_VBPORCH_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_IF */
bogdanm 0:9b334a45a8ff 1339 #define EBI_IF_VBPORCH_DEFAULT (_EBI_IF_VBPORCH_DEFAULT << 2) /**< Shifted mode DEFAULT for EBI_IF */
bogdanm 0:9b334a45a8ff 1340 #define EBI_IF_VFPORCH (0x1UL << 3) /**< Vertical Front Porch Interrupt Flag */
bogdanm 0:9b334a45a8ff 1341 #define _EBI_IF_VFPORCH_SHIFT 3 /**< Shift value for EBI_VFPORCH */
bogdanm 0:9b334a45a8ff 1342 #define _EBI_IF_VFPORCH_MASK 0x8UL /**< Bit mask for EBI_VFPORCH */
bogdanm 0:9b334a45a8ff 1343 #define _EBI_IF_VFPORCH_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_IF */
bogdanm 0:9b334a45a8ff 1344 #define EBI_IF_VFPORCH_DEFAULT (_EBI_IF_VFPORCH_DEFAULT << 3) /**< Shifted mode DEFAULT for EBI_IF */
bogdanm 0:9b334a45a8ff 1345 #define EBI_IF_DDEMPTY (0x1UL << 4) /**< Direct Drive Data Empty Interrupt Flag */
bogdanm 0:9b334a45a8ff 1346 #define _EBI_IF_DDEMPTY_SHIFT 4 /**< Shift value for EBI_DDEMPTY */
bogdanm 0:9b334a45a8ff 1347 #define _EBI_IF_DDEMPTY_MASK 0x10UL /**< Bit mask for EBI_DDEMPTY */
bogdanm 0:9b334a45a8ff 1348 #define _EBI_IF_DDEMPTY_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_IF */
bogdanm 0:9b334a45a8ff 1349 #define EBI_IF_DDEMPTY_DEFAULT (_EBI_IF_DDEMPTY_DEFAULT << 4) /**< Shifted mode DEFAULT for EBI_IF */
bogdanm 0:9b334a45a8ff 1350 #define EBI_IF_DDJIT (0x1UL << 5) /**< Direct Drive Jitter Interrupt Flag */
bogdanm 0:9b334a45a8ff 1351 #define _EBI_IF_DDJIT_SHIFT 5 /**< Shift value for EBI_DDJIT */
bogdanm 0:9b334a45a8ff 1352 #define _EBI_IF_DDJIT_MASK 0x20UL /**< Bit mask for EBI_DDJIT */
bogdanm 0:9b334a45a8ff 1353 #define _EBI_IF_DDJIT_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_IF */
bogdanm 0:9b334a45a8ff 1354 #define EBI_IF_DDJIT_DEFAULT (_EBI_IF_DDJIT_DEFAULT << 5) /**< Shifted mode DEFAULT for EBI_IF */
bogdanm 0:9b334a45a8ff 1355
bogdanm 0:9b334a45a8ff 1356 /* Bit fields for EBI IFS */
bogdanm 0:9b334a45a8ff 1357 #define _EBI_IFS_RESETVALUE 0x00000000UL /**< Default value for EBI_IFS */
bogdanm 0:9b334a45a8ff 1358 #define _EBI_IFS_MASK 0x0000003FUL /**< Mask for EBI_IFS */
bogdanm 0:9b334a45a8ff 1359 #define EBI_IFS_VSYNC (0x1UL << 0) /**< Vertical Sync Interrupt Flag Set */
bogdanm 0:9b334a45a8ff 1360 #define _EBI_IFS_VSYNC_SHIFT 0 /**< Shift value for EBI_VSYNC */
bogdanm 0:9b334a45a8ff 1361 #define _EBI_IFS_VSYNC_MASK 0x1UL /**< Bit mask for EBI_VSYNC */
bogdanm 0:9b334a45a8ff 1362 #define _EBI_IFS_VSYNC_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_IFS */
bogdanm 0:9b334a45a8ff 1363 #define EBI_IFS_VSYNC_DEFAULT (_EBI_IFS_VSYNC_DEFAULT << 0) /**< Shifted mode DEFAULT for EBI_IFS */
bogdanm 0:9b334a45a8ff 1364 #define EBI_IFS_HSYNC (0x1UL << 1) /**< Horizontal Sync Interrupt Flag Set */
bogdanm 0:9b334a45a8ff 1365 #define _EBI_IFS_HSYNC_SHIFT 1 /**< Shift value for EBI_HSYNC */
bogdanm 0:9b334a45a8ff 1366 #define _EBI_IFS_HSYNC_MASK 0x2UL /**< Bit mask for EBI_HSYNC */
bogdanm 0:9b334a45a8ff 1367 #define _EBI_IFS_HSYNC_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_IFS */
bogdanm 0:9b334a45a8ff 1368 #define EBI_IFS_HSYNC_DEFAULT (_EBI_IFS_HSYNC_DEFAULT << 1) /**< Shifted mode DEFAULT for EBI_IFS */
bogdanm 0:9b334a45a8ff 1369 #define EBI_IFS_VBPORCH (0x1UL << 2) /**< Vertical Back Porch Interrupt Flag Set */
bogdanm 0:9b334a45a8ff 1370 #define _EBI_IFS_VBPORCH_SHIFT 2 /**< Shift value for EBI_VBPORCH */
bogdanm 0:9b334a45a8ff 1371 #define _EBI_IFS_VBPORCH_MASK 0x4UL /**< Bit mask for EBI_VBPORCH */
bogdanm 0:9b334a45a8ff 1372 #define _EBI_IFS_VBPORCH_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_IFS */
bogdanm 0:9b334a45a8ff 1373 #define EBI_IFS_VBPORCH_DEFAULT (_EBI_IFS_VBPORCH_DEFAULT << 2) /**< Shifted mode DEFAULT for EBI_IFS */
bogdanm 0:9b334a45a8ff 1374 #define EBI_IFS_VFPORCH (0x1UL << 3) /**< Vertical Front Porch Interrupt Flag Set */
bogdanm 0:9b334a45a8ff 1375 #define _EBI_IFS_VFPORCH_SHIFT 3 /**< Shift value for EBI_VFPORCH */
bogdanm 0:9b334a45a8ff 1376 #define _EBI_IFS_VFPORCH_MASK 0x8UL /**< Bit mask for EBI_VFPORCH */
bogdanm 0:9b334a45a8ff 1377 #define _EBI_IFS_VFPORCH_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_IFS */
bogdanm 0:9b334a45a8ff 1378 #define EBI_IFS_VFPORCH_DEFAULT (_EBI_IFS_VFPORCH_DEFAULT << 3) /**< Shifted mode DEFAULT for EBI_IFS */
bogdanm 0:9b334a45a8ff 1379 #define EBI_IFS_DDEMPTY (0x1UL << 4) /**< Direct Drive Data Empty Interrupt Flag Set */
bogdanm 0:9b334a45a8ff 1380 #define _EBI_IFS_DDEMPTY_SHIFT 4 /**< Shift value for EBI_DDEMPTY */
bogdanm 0:9b334a45a8ff 1381 #define _EBI_IFS_DDEMPTY_MASK 0x10UL /**< Bit mask for EBI_DDEMPTY */
bogdanm 0:9b334a45a8ff 1382 #define _EBI_IFS_DDEMPTY_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_IFS */
bogdanm 0:9b334a45a8ff 1383 #define EBI_IFS_DDEMPTY_DEFAULT (_EBI_IFS_DDEMPTY_DEFAULT << 4) /**< Shifted mode DEFAULT for EBI_IFS */
bogdanm 0:9b334a45a8ff 1384 #define EBI_IFS_DDJIT (0x1UL << 5) /**< Direct Drive Jitter Interrupt Flag Set */
bogdanm 0:9b334a45a8ff 1385 #define _EBI_IFS_DDJIT_SHIFT 5 /**< Shift value for EBI_DDJIT */
bogdanm 0:9b334a45a8ff 1386 #define _EBI_IFS_DDJIT_MASK 0x20UL /**< Bit mask for EBI_DDJIT */
bogdanm 0:9b334a45a8ff 1387 #define _EBI_IFS_DDJIT_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_IFS */
bogdanm 0:9b334a45a8ff 1388 #define EBI_IFS_DDJIT_DEFAULT (_EBI_IFS_DDJIT_DEFAULT << 5) /**< Shifted mode DEFAULT for EBI_IFS */
bogdanm 0:9b334a45a8ff 1389
bogdanm 0:9b334a45a8ff 1390 /* Bit fields for EBI IFC */
bogdanm 0:9b334a45a8ff 1391 #define _EBI_IFC_RESETVALUE 0x00000000UL /**< Default value for EBI_IFC */
bogdanm 0:9b334a45a8ff 1392 #define _EBI_IFC_MASK 0x0000003FUL /**< Mask for EBI_IFC */
bogdanm 0:9b334a45a8ff 1393 #define EBI_IFC_VSYNC (0x1UL << 0) /**< Vertical Sync Interrupt Flag Clear */
bogdanm 0:9b334a45a8ff 1394 #define _EBI_IFC_VSYNC_SHIFT 0 /**< Shift value for EBI_VSYNC */
bogdanm 0:9b334a45a8ff 1395 #define _EBI_IFC_VSYNC_MASK 0x1UL /**< Bit mask for EBI_VSYNC */
bogdanm 0:9b334a45a8ff 1396 #define _EBI_IFC_VSYNC_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_IFC */
bogdanm 0:9b334a45a8ff 1397 #define EBI_IFC_VSYNC_DEFAULT (_EBI_IFC_VSYNC_DEFAULT << 0) /**< Shifted mode DEFAULT for EBI_IFC */
bogdanm 0:9b334a45a8ff 1398 #define EBI_IFC_HSYNC (0x1UL << 1) /**< Horizontal Sync Interrupt Flag Clear */
bogdanm 0:9b334a45a8ff 1399 #define _EBI_IFC_HSYNC_SHIFT 1 /**< Shift value for EBI_HSYNC */
bogdanm 0:9b334a45a8ff 1400 #define _EBI_IFC_HSYNC_MASK 0x2UL /**< Bit mask for EBI_HSYNC */
bogdanm 0:9b334a45a8ff 1401 #define _EBI_IFC_HSYNC_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_IFC */
bogdanm 0:9b334a45a8ff 1402 #define EBI_IFC_HSYNC_DEFAULT (_EBI_IFC_HSYNC_DEFAULT << 1) /**< Shifted mode DEFAULT for EBI_IFC */
bogdanm 0:9b334a45a8ff 1403 #define EBI_IFC_VBPORCH (0x1UL << 2) /**< Vertical Back Porch Interrupt Flag Clear */
bogdanm 0:9b334a45a8ff 1404 #define _EBI_IFC_VBPORCH_SHIFT 2 /**< Shift value for EBI_VBPORCH */
bogdanm 0:9b334a45a8ff 1405 #define _EBI_IFC_VBPORCH_MASK 0x4UL /**< Bit mask for EBI_VBPORCH */
bogdanm 0:9b334a45a8ff 1406 #define _EBI_IFC_VBPORCH_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_IFC */
bogdanm 0:9b334a45a8ff 1407 #define EBI_IFC_VBPORCH_DEFAULT (_EBI_IFC_VBPORCH_DEFAULT << 2) /**< Shifted mode DEFAULT for EBI_IFC */
bogdanm 0:9b334a45a8ff 1408 #define EBI_IFC_VFPORCH (0x1UL << 3) /**< Vertical Front Porch Interrupt Flag Clear */
bogdanm 0:9b334a45a8ff 1409 #define _EBI_IFC_VFPORCH_SHIFT 3 /**< Shift value for EBI_VFPORCH */
bogdanm 0:9b334a45a8ff 1410 #define _EBI_IFC_VFPORCH_MASK 0x8UL /**< Bit mask for EBI_VFPORCH */
bogdanm 0:9b334a45a8ff 1411 #define _EBI_IFC_VFPORCH_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_IFC */
bogdanm 0:9b334a45a8ff 1412 #define EBI_IFC_VFPORCH_DEFAULT (_EBI_IFC_VFPORCH_DEFAULT << 3) /**< Shifted mode DEFAULT for EBI_IFC */
bogdanm 0:9b334a45a8ff 1413 #define EBI_IFC_DDEMPTY (0x1UL << 4) /**< Direct Drive Data Empty Interrupt Flag Clear */
bogdanm 0:9b334a45a8ff 1414 #define _EBI_IFC_DDEMPTY_SHIFT 4 /**< Shift value for EBI_DDEMPTY */
bogdanm 0:9b334a45a8ff 1415 #define _EBI_IFC_DDEMPTY_MASK 0x10UL /**< Bit mask for EBI_DDEMPTY */
bogdanm 0:9b334a45a8ff 1416 #define _EBI_IFC_DDEMPTY_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_IFC */
bogdanm 0:9b334a45a8ff 1417 #define EBI_IFC_DDEMPTY_DEFAULT (_EBI_IFC_DDEMPTY_DEFAULT << 4) /**< Shifted mode DEFAULT for EBI_IFC */
bogdanm 0:9b334a45a8ff 1418 #define EBI_IFC_DDJIT (0x1UL << 5) /**< Direct Drive Jitter Interrupt Flag Clear */
bogdanm 0:9b334a45a8ff 1419 #define _EBI_IFC_DDJIT_SHIFT 5 /**< Shift value for EBI_DDJIT */
bogdanm 0:9b334a45a8ff 1420 #define _EBI_IFC_DDJIT_MASK 0x20UL /**< Bit mask for EBI_DDJIT */
bogdanm 0:9b334a45a8ff 1421 #define _EBI_IFC_DDJIT_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_IFC */
bogdanm 0:9b334a45a8ff 1422 #define EBI_IFC_DDJIT_DEFAULT (_EBI_IFC_DDJIT_DEFAULT << 5) /**< Shifted mode DEFAULT for EBI_IFC */
bogdanm 0:9b334a45a8ff 1423
bogdanm 0:9b334a45a8ff 1424 /* Bit fields for EBI IEN */
bogdanm 0:9b334a45a8ff 1425 #define _EBI_IEN_RESETVALUE 0x00000000UL /**< Default value for EBI_IEN */
bogdanm 0:9b334a45a8ff 1426 #define _EBI_IEN_MASK 0x0000003FUL /**< Mask for EBI_IEN */
bogdanm 0:9b334a45a8ff 1427 #define EBI_IEN_VSYNC (0x1UL << 0) /**< Vertical Sync Interrupt Enable */
bogdanm 0:9b334a45a8ff 1428 #define _EBI_IEN_VSYNC_SHIFT 0 /**< Shift value for EBI_VSYNC */
bogdanm 0:9b334a45a8ff 1429 #define _EBI_IEN_VSYNC_MASK 0x1UL /**< Bit mask for EBI_VSYNC */
bogdanm 0:9b334a45a8ff 1430 #define _EBI_IEN_VSYNC_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_IEN */
bogdanm 0:9b334a45a8ff 1431 #define EBI_IEN_VSYNC_DEFAULT (_EBI_IEN_VSYNC_DEFAULT << 0) /**< Shifted mode DEFAULT for EBI_IEN */
bogdanm 0:9b334a45a8ff 1432 #define EBI_IEN_HSYNC (0x1UL << 1) /**< Horizontal Sync Interrupt Enable */
bogdanm 0:9b334a45a8ff 1433 #define _EBI_IEN_HSYNC_SHIFT 1 /**< Shift value for EBI_HSYNC */
bogdanm 0:9b334a45a8ff 1434 #define _EBI_IEN_HSYNC_MASK 0x2UL /**< Bit mask for EBI_HSYNC */
bogdanm 0:9b334a45a8ff 1435 #define _EBI_IEN_HSYNC_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_IEN */
bogdanm 0:9b334a45a8ff 1436 #define EBI_IEN_HSYNC_DEFAULT (_EBI_IEN_HSYNC_DEFAULT << 1) /**< Shifted mode DEFAULT for EBI_IEN */
bogdanm 0:9b334a45a8ff 1437 #define EBI_IEN_VBPORCH (0x1UL << 2) /**< Vertical Back Porch Interrupt Enable */
bogdanm 0:9b334a45a8ff 1438 #define _EBI_IEN_VBPORCH_SHIFT 2 /**< Shift value for EBI_VBPORCH */
bogdanm 0:9b334a45a8ff 1439 #define _EBI_IEN_VBPORCH_MASK 0x4UL /**< Bit mask for EBI_VBPORCH */
bogdanm 0:9b334a45a8ff 1440 #define _EBI_IEN_VBPORCH_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_IEN */
bogdanm 0:9b334a45a8ff 1441 #define EBI_IEN_VBPORCH_DEFAULT (_EBI_IEN_VBPORCH_DEFAULT << 2) /**< Shifted mode DEFAULT for EBI_IEN */
bogdanm 0:9b334a45a8ff 1442 #define EBI_IEN_VFPORCH (0x1UL << 3) /**< Vertical Front Porch Interrupt Enable */
bogdanm 0:9b334a45a8ff 1443 #define _EBI_IEN_VFPORCH_SHIFT 3 /**< Shift value for EBI_VFPORCH */
bogdanm 0:9b334a45a8ff 1444 #define _EBI_IEN_VFPORCH_MASK 0x8UL /**< Bit mask for EBI_VFPORCH */
bogdanm 0:9b334a45a8ff 1445 #define _EBI_IEN_VFPORCH_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_IEN */
bogdanm 0:9b334a45a8ff 1446 #define EBI_IEN_VFPORCH_DEFAULT (_EBI_IEN_VFPORCH_DEFAULT << 3) /**< Shifted mode DEFAULT for EBI_IEN */
bogdanm 0:9b334a45a8ff 1447 #define EBI_IEN_DDEMPTY (0x1UL << 4) /**< Direct Drive Data Empty Interrupt Enable */
bogdanm 0:9b334a45a8ff 1448 #define _EBI_IEN_DDEMPTY_SHIFT 4 /**< Shift value for EBI_DDEMPTY */
bogdanm 0:9b334a45a8ff 1449 #define _EBI_IEN_DDEMPTY_MASK 0x10UL /**< Bit mask for EBI_DDEMPTY */
bogdanm 0:9b334a45a8ff 1450 #define _EBI_IEN_DDEMPTY_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_IEN */
bogdanm 0:9b334a45a8ff 1451 #define EBI_IEN_DDEMPTY_DEFAULT (_EBI_IEN_DDEMPTY_DEFAULT << 4) /**< Shifted mode DEFAULT for EBI_IEN */
bogdanm 0:9b334a45a8ff 1452 #define EBI_IEN_DDJIT (0x1UL << 5) /**< Direct Drive Jitter Interrupt Enable */
bogdanm 0:9b334a45a8ff 1453 #define _EBI_IEN_DDJIT_SHIFT 5 /**< Shift value for EBI_DDJIT */
bogdanm 0:9b334a45a8ff 1454 #define _EBI_IEN_DDJIT_MASK 0x20UL /**< Bit mask for EBI_DDJIT */
bogdanm 0:9b334a45a8ff 1455 #define _EBI_IEN_DDJIT_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_IEN */
bogdanm 0:9b334a45a8ff 1456 #define EBI_IEN_DDJIT_DEFAULT (_EBI_IEN_DDJIT_DEFAULT << 5) /**< Shifted mode DEFAULT for EBI_IEN */
bogdanm 0:9b334a45a8ff 1457
bogdanm 0:9b334a45a8ff 1458 /** @} End of group EFM32LG_EBI */
bogdanm 0:9b334a45a8ff 1459
bogdanm 0:9b334a45a8ff 1460