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targets/cmsis/TARGET_STM/TARGET_STM32F3XX/stm32f30x_i2c.c@0:9b334a45a8ff, 2015-10-01 (annotated)

Committer:
bogdanm
Date:
Thu Oct 01 15:25:22 2015 +0300
Revision:
0:9b334a45a8ff
Initial commit on mbed-dev



Replaces mbed-src (now inactive)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /**
bogdanm 0:9b334a45a8ff 2 ******************************************************************************
bogdanm 0:9b334a45a8ff 3 * @file stm32f30x_i2c.c
bogdanm 0:9b334a45a8ff 4 * @author MCD Application Team
bogdanm 0:9b334a45a8ff 5 * @version V1.1.0
bogdanm 0:9b334a45a8ff 6 * @date 27-February-2014
bogdanm 0:9b334a45a8ff 7 * @brief This file provides firmware functions to manage the following
bogdanm 0:9b334a45a8ff 8 * functionalities of the Inter-Integrated circuit (I2C):
bogdanm 0:9b334a45a8ff 9 * + Initialization and Configuration
bogdanm 0:9b334a45a8ff 10 * + Communications handling
bogdanm 0:9b334a45a8ff 11 * + SMBUS management
bogdanm 0:9b334a45a8ff 12 * + I2C registers management
bogdanm 0:9b334a45a8ff 13 * + Data transfers management
bogdanm 0:9b334a45a8ff 14 * + DMA transfers management
bogdanm 0:9b334a45a8ff 15 * + Interrupts and flags management
bogdanm 0:9b334a45a8ff 16 *
bogdanm 0:9b334a45a8ff 17 * @verbatim
bogdanm 0:9b334a45a8ff 18 ============================================================================
bogdanm 0:9b334a45a8ff 19 ##### How to use this driver #####
bogdanm 0:9b334a45a8ff 20 ============================================================================
bogdanm 0:9b334a45a8ff 21 [..]
bogdanm 0:9b334a45a8ff 22 (#) Enable peripheral clock using RCC_APB1PeriphClockCmd(RCC_APB1Periph_I2Cx, ENABLE)
bogdanm 0:9b334a45a8ff 23 function for I2C1 or I2C2.
bogdanm 0:9b334a45a8ff 24 (#) Enable SDA, SCL and SMBA (when used) GPIO clocks using
bogdanm 0:9b334a45a8ff 25 RCC_AHBPeriphClockCmd() function.
bogdanm 0:9b334a45a8ff 26 (#) Peripherals alternate function:
bogdanm 0:9b334a45a8ff 27 (++) Connect the pin to the desired peripherals' Alternate
bogdanm 0:9b334a45a8ff 28 Function (AF) using GPIO_PinAFConfig() function.
bogdanm 0:9b334a45a8ff 29 (++) Configure the desired pin in alternate function by:
bogdanm 0:9b334a45a8ff 30 GPIO_InitStruct->GPIO_Mode = GPIO_Mode_AF
bogdanm 0:9b334a45a8ff 31 (++) Select the type, OpenDrain and speed via
bogdanm 0:9b334a45a8ff 32 GPIO_PuPd, GPIO_OType and GPIO_Speed members
bogdanm 0:9b334a45a8ff 33 (++) Call GPIO_Init() function.
bogdanm 0:9b334a45a8ff 34 (#) Program the Mode, Timing , Own address, Ack and Acknowledged Address
bogdanm 0:9b334a45a8ff 35 using the I2C_Init() function.
bogdanm 0:9b334a45a8ff 36 (#) Optionally you can enable/configure the following parameters without
bogdanm 0:9b334a45a8ff 37 re-initialization (i.e there is no need to call again I2C_Init() function):
bogdanm 0:9b334a45a8ff 38 (++) Enable the acknowledge feature using I2C_AcknowledgeConfig() function.
bogdanm 0:9b334a45a8ff 39 (++) Enable the dual addressing mode using I2C_DualAddressCmd() function.
bogdanm 0:9b334a45a8ff 40 (++) Enable the general call using the I2C_GeneralCallCmd() function.
bogdanm 0:9b334a45a8ff 41 (++) Enable the clock stretching using I2C_StretchClockCmd() function.
bogdanm 0:9b334a45a8ff 42 (++) Enable the PEC Calculation using I2C_CalculatePEC() function.
bogdanm 0:9b334a45a8ff 43 (++) For SMBus Mode:
bogdanm 0:9b334a45a8ff 44 (+++) Enable the SMBusAlert pin using I2C_SMBusAlertCmd() function.
bogdanm 0:9b334a45a8ff 45 (#) Enable the NVIC and the corresponding interrupt using the function
bogdanm 0:9b334a45a8ff 46 I2C_ITConfig() if you need to use interrupt mode.
bogdanm 0:9b334a45a8ff 47 (#) When using the DMA mode
bogdanm 0:9b334a45a8ff 48 (++) Configure the DMA using DMA_Init() function.
bogdanm 0:9b334a45a8ff 49 (++) Active the needed channel Request using I2C_DMACmd() function.
bogdanm 0:9b334a45a8ff 50 (#) Enable the I2C using the I2C_Cmd() function.
bogdanm 0:9b334a45a8ff 51 (#) Enable the DMA using the DMA_Cmd() function when using DMA mode in the
bogdanm 0:9b334a45a8ff 52 transfers.
bogdanm 0:9b334a45a8ff 53 [..]
bogdanm 0:9b334a45a8ff 54 (@) When using I2C in Fast Mode Plus, SCL and SDA pin 20mA current drive capability
bogdanm 0:9b334a45a8ff 55 must be enabled by setting the driving capability control bit in SYSCFG.
bogdanm 0:9b334a45a8ff 56
bogdanm 0:9b334a45a8ff 57 @endverbatim
bogdanm 0:9b334a45a8ff 58 ******************************************************************************
bogdanm 0:9b334a45a8ff 59 * @attention
bogdanm 0:9b334a45a8ff 60 *
bogdanm 0:9b334a45a8ff 61 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
bogdanm 0:9b334a45a8ff 62 *
bogdanm 0:9b334a45a8ff 63 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 0:9b334a45a8ff 64 * are permitted provided that the following conditions are met:
bogdanm 0:9b334a45a8ff 65 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 0:9b334a45a8ff 66 * this list of conditions and the following disclaimer.
bogdanm 0:9b334a45a8ff 67 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 0:9b334a45a8ff 68 * this list of conditions and the following disclaimer in the documentation
bogdanm 0:9b334a45a8ff 69 * and/or other materials provided with the distribution.
bogdanm 0:9b334a45a8ff 70 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 0:9b334a45a8ff 71 * may be used to endorse or promote products derived from this software
bogdanm 0:9b334a45a8ff 72 * without specific prior written permission.
bogdanm 0:9b334a45a8ff 73 *
bogdanm 0:9b334a45a8ff 74 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 0:9b334a45a8ff 75 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 0:9b334a45a8ff 76 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 0:9b334a45a8ff 77 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 0:9b334a45a8ff 78 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 0:9b334a45a8ff 79 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 0:9b334a45a8ff 80 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 0:9b334a45a8ff 81 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 0:9b334a45a8ff 82 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 0:9b334a45a8ff 83 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 0:9b334a45a8ff 84 *
bogdanm 0:9b334a45a8ff 85 ******************************************************************************
bogdanm 0:9b334a45a8ff 86 */
bogdanm 0:9b334a45a8ff 87
bogdanm 0:9b334a45a8ff 88 /* Includes ------------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 89 #include "stm32f30x_i2c.h"
bogdanm 0:9b334a45a8ff 90 #include "stm32f30x_rcc.h"
bogdanm 0:9b334a45a8ff 91
bogdanm 0:9b334a45a8ff 92 /** @addtogroup STM32F30x_StdPeriph_Driver
bogdanm 0:9b334a45a8ff 93 * @{
bogdanm 0:9b334a45a8ff 94 */
bogdanm 0:9b334a45a8ff 95
bogdanm 0:9b334a45a8ff 96 /** @defgroup I2C
bogdanm 0:9b334a45a8ff 97 * @brief I2C driver modules
bogdanm 0:9b334a45a8ff 98 * @{
bogdanm 0:9b334a45a8ff 99 */
bogdanm 0:9b334a45a8ff 100
bogdanm 0:9b334a45a8ff 101 /* Private typedef -----------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 102 /* Private define ------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 103
bogdanm 0:9b334a45a8ff 104 #define CR1_CLEAR_MASK ((uint32_t)0x00CFE0FF) /*<! I2C CR1 clear register Mask */
bogdanm 0:9b334a45a8ff 105 #define CR2_CLEAR_MASK ((uint32_t)0x07FF7FFF) /*<! I2C CR2 clear register Mask */
bogdanm 0:9b334a45a8ff 106 #define TIMING_CLEAR_MASK ((uint32_t)0xF0FFFFFF) /*<! I2C TIMING clear register Mask */
bogdanm 0:9b334a45a8ff 107 #define ERROR_IT_MASK ((uint32_t)0x00003F00) /*<! I2C Error interrupt register Mask */
bogdanm 0:9b334a45a8ff 108 #define TC_IT_MASK ((uint32_t)0x000000C0) /*<! I2C TC interrupt register Mask */
bogdanm 0:9b334a45a8ff 109
bogdanm 0:9b334a45a8ff 110 /* Private macro -------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 111 /* Private variables ---------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 112 /* Private function prototypes -----------------------------------------------*/
bogdanm 0:9b334a45a8ff 113 /* Private functions ---------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 114
bogdanm 0:9b334a45a8ff 115 /** @defgroup I2C_Private_Functions
bogdanm 0:9b334a45a8ff 116 * @{
bogdanm 0:9b334a45a8ff 117 */
bogdanm 0:9b334a45a8ff 118
bogdanm 0:9b334a45a8ff 119
bogdanm 0:9b334a45a8ff 120 /** @defgroup I2C_Group1 Initialization and Configuration functions
bogdanm 0:9b334a45a8ff 121 * @brief Initialization and Configuration functions
bogdanm 0:9b334a45a8ff 122 *
bogdanm 0:9b334a45a8ff 123 @verbatim
bogdanm 0:9b334a45a8ff 124 ===============================================================================
bogdanm 0:9b334a45a8ff 125 ##### Initialization and Configuration functions #####
bogdanm 0:9b334a45a8ff 126 ===============================================================================
bogdanm 0:9b334a45a8ff 127 [..] This section provides a set of functions allowing to initialize the I2C Mode,
bogdanm 0:9b334a45a8ff 128 I2C Timing, I2C filters, I2C Addressing mode, I2C OwnAddress1.
bogdanm 0:9b334a45a8ff 129
bogdanm 0:9b334a45a8ff 130 [..] The I2C_Init() function follows the I2C configuration procedures (these procedures
bogdanm 0:9b334a45a8ff 131 are available in reference manual).
bogdanm 0:9b334a45a8ff 132
bogdanm 0:9b334a45a8ff 133 [..] When the Software Reset is performed using I2C_SoftwareResetCmd() function, the internal
bogdanm 0:9b334a45a8ff 134 states machines are reset and communication control bits, as well as status bits come
bogdanm 0:9b334a45a8ff 135 back to their reset value.
bogdanm 0:9b334a45a8ff 136
bogdanm 0:9b334a45a8ff 137 [..] Before enabling Stop mode using I2C_StopModeCmd() I2C Clock source must be set to
bogdanm 0:9b334a45a8ff 138 HSI and Digital filters must be disabled.
bogdanm 0:9b334a45a8ff 139
bogdanm 0:9b334a45a8ff 140 [..] Before enabling Own Address 2 via I2C_DualAddressCmd() function, OA2 and mask should be
bogdanm 0:9b334a45a8ff 141 configured using I2C_OwnAddress2Config() function.
bogdanm 0:9b334a45a8ff 142
bogdanm 0:9b334a45a8ff 143 [..] I2C_SlaveByteControlCmd() enable Slave byte control that allow user to get control of
bogdanm 0:9b334a45a8ff 144 each byte in slave mode when NBYTES is set to 0x01.
bogdanm 0:9b334a45a8ff 145
bogdanm 0:9b334a45a8ff 146 @endverbatim
bogdanm 0:9b334a45a8ff 147 * @{
bogdanm 0:9b334a45a8ff 148 */
bogdanm 0:9b334a45a8ff 149
bogdanm 0:9b334a45a8ff 150 /**
bogdanm 0:9b334a45a8ff 151 * @brief Deinitializes the I2Cx peripheral registers to their default reset values.
bogdanm 0:9b334a45a8ff 152 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
bogdanm 0:9b334a45a8ff 153 * @retval None
bogdanm 0:9b334a45a8ff 154 */
bogdanm 0:9b334a45a8ff 155 void I2C_DeInit(I2C_TypeDef* I2Cx)
bogdanm 0:9b334a45a8ff 156 {
bogdanm 0:9b334a45a8ff 157 /* Check the parameters */
bogdanm 0:9b334a45a8ff 158 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
bogdanm 0:9b334a45a8ff 159
bogdanm 0:9b334a45a8ff 160 if (I2Cx == I2C1)
bogdanm 0:9b334a45a8ff 161 {
bogdanm 0:9b334a45a8ff 162 /* Enable I2C1 reset state */
bogdanm 0:9b334a45a8ff 163 RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C1, ENABLE);
bogdanm 0:9b334a45a8ff 164 /* Release I2C1 from reset state */
bogdanm 0:9b334a45a8ff 165 RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C1, DISABLE);
bogdanm 0:9b334a45a8ff 166 }
bogdanm 0:9b334a45a8ff 167 else
bogdanm 0:9b334a45a8ff 168 {
bogdanm 0:9b334a45a8ff 169 /* Enable I2C2 reset state */
bogdanm 0:9b334a45a8ff 170 RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C2, ENABLE);
bogdanm 0:9b334a45a8ff 171 /* Release I2C2 from reset state */
bogdanm 0:9b334a45a8ff 172 RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C2, DISABLE);
bogdanm 0:9b334a45a8ff 173 }
bogdanm 0:9b334a45a8ff 174 }
bogdanm 0:9b334a45a8ff 175
bogdanm 0:9b334a45a8ff 176 /**
bogdanm 0:9b334a45a8ff 177 * @brief Initializes the I2Cx peripheral according to the specified
bogdanm 0:9b334a45a8ff 178 * parameters in the I2C_InitStruct.
bogdanm 0:9b334a45a8ff 179 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
bogdanm 0:9b334a45a8ff 180 * @param I2C_InitStruct: pointer to a I2C_InitTypeDef structure that
bogdanm 0:9b334a45a8ff 181 * contains the configuration information for the specified I2C peripheral.
bogdanm 0:9b334a45a8ff 182 * @retval None
bogdanm 0:9b334a45a8ff 183 */
bogdanm 0:9b334a45a8ff 184 void I2C_Init(I2C_TypeDef* I2Cx, I2C_InitTypeDef* I2C_InitStruct)
bogdanm 0:9b334a45a8ff 185 {
bogdanm 0:9b334a45a8ff 186 uint32_t tmpreg = 0;
bogdanm 0:9b334a45a8ff 187
bogdanm 0:9b334a45a8ff 188 /* Check the parameters */
bogdanm 0:9b334a45a8ff 189 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
bogdanm 0:9b334a45a8ff 190 assert_param(IS_I2C_ANALOG_FILTER(I2C_InitStruct->I2C_AnalogFilter));
bogdanm 0:9b334a45a8ff 191 assert_param(IS_I2C_DIGITAL_FILTER(I2C_InitStruct->I2C_DigitalFilter));
bogdanm 0:9b334a45a8ff 192 assert_param(IS_I2C_MODE(I2C_InitStruct->I2C_Mode));
bogdanm 0:9b334a45a8ff 193 assert_param(IS_I2C_OWN_ADDRESS1(I2C_InitStruct->I2C_OwnAddress1));
bogdanm 0:9b334a45a8ff 194 assert_param(IS_I2C_ACK(I2C_InitStruct->I2C_Ack));
bogdanm 0:9b334a45a8ff 195 assert_param(IS_I2C_ACKNOWLEDGE_ADDRESS(I2C_InitStruct->I2C_AcknowledgedAddress));
bogdanm 0:9b334a45a8ff 196
bogdanm 0:9b334a45a8ff 197 /* Disable I2Cx Peripheral */
bogdanm 0:9b334a45a8ff 198 I2Cx->CR1 &= (uint32_t)~((uint32_t)I2C_CR1_PE);
bogdanm 0:9b334a45a8ff 199
bogdanm 0:9b334a45a8ff 200 /*---------------------------- I2Cx FILTERS Configuration ------------------*/
bogdanm 0:9b334a45a8ff 201 /* Get the I2Cx CR1 value */
bogdanm 0:9b334a45a8ff 202 tmpreg = I2Cx->CR1;
bogdanm 0:9b334a45a8ff 203 /* Clear I2Cx CR1 register */
bogdanm 0:9b334a45a8ff 204 tmpreg &= CR1_CLEAR_MASK;
bogdanm 0:9b334a45a8ff 205 /* Configure I2Cx: analog and digital filter */
bogdanm 0:9b334a45a8ff 206 /* Set ANFOFF bit according to I2C_AnalogFilter value */
bogdanm 0:9b334a45a8ff 207 /* Set DFN bits according to I2C_DigitalFilter value */
bogdanm 0:9b334a45a8ff 208 tmpreg |= (uint32_t)I2C_InitStruct->I2C_AnalogFilter |(I2C_InitStruct->I2C_DigitalFilter << 8);
bogdanm 0:9b334a45a8ff 209
bogdanm 0:9b334a45a8ff 210 /* Write to I2Cx CR1 */
bogdanm 0:9b334a45a8ff 211 I2Cx->CR1 = tmpreg;
bogdanm 0:9b334a45a8ff 212
bogdanm 0:9b334a45a8ff 213 /*---------------------------- I2Cx TIMING Configuration -------------------*/
bogdanm 0:9b334a45a8ff 214 /* Configure I2Cx: Timing */
bogdanm 0:9b334a45a8ff 215 /* Set TIMINGR bits according to I2C_Timing */
bogdanm 0:9b334a45a8ff 216 /* Write to I2Cx TIMING */
bogdanm 0:9b334a45a8ff 217 I2Cx->TIMINGR = I2C_InitStruct->I2C_Timing & TIMING_CLEAR_MASK;
bogdanm 0:9b334a45a8ff 218
bogdanm 0:9b334a45a8ff 219 /* Enable I2Cx Peripheral */
bogdanm 0:9b334a45a8ff 220 I2Cx->CR1 |= I2C_CR1_PE;
bogdanm 0:9b334a45a8ff 221
bogdanm 0:9b334a45a8ff 222 /*---------------------------- I2Cx OAR1 Configuration ---------------------*/
bogdanm 0:9b334a45a8ff 223 /* Clear tmpreg local variable */
bogdanm 0:9b334a45a8ff 224 tmpreg = 0;
bogdanm 0:9b334a45a8ff 225 /* Clear OAR1 register */
bogdanm 0:9b334a45a8ff 226 I2Cx->OAR1 = (uint32_t)tmpreg;
bogdanm 0:9b334a45a8ff 227 /* Clear OAR2 register */
bogdanm 0:9b334a45a8ff 228 I2Cx->OAR2 = (uint32_t)tmpreg;
bogdanm 0:9b334a45a8ff 229 /* Configure I2Cx: Own Address1 and acknowledged address */
bogdanm 0:9b334a45a8ff 230 /* Set OA1MODE bit according to I2C_AcknowledgedAddress value */
bogdanm 0:9b334a45a8ff 231 /* Set OA1 bits according to I2C_OwnAddress1 value */
bogdanm 0:9b334a45a8ff 232 tmpreg = (uint32_t)((uint32_t)I2C_InitStruct->I2C_AcknowledgedAddress | \
bogdanm 0:9b334a45a8ff 233 (uint32_t)I2C_InitStruct->I2C_OwnAddress1);
bogdanm 0:9b334a45a8ff 234 /* Write to I2Cx OAR1 */
bogdanm 0:9b334a45a8ff 235 I2Cx->OAR1 = tmpreg;
bogdanm 0:9b334a45a8ff 236 /* Enable Own Address1 acknowledgement */
bogdanm 0:9b334a45a8ff 237 I2Cx->OAR1 |= I2C_OAR1_OA1EN;
bogdanm 0:9b334a45a8ff 238
bogdanm 0:9b334a45a8ff 239 /*---------------------------- I2Cx MODE Configuration ---------------------*/
bogdanm 0:9b334a45a8ff 240 /* Configure I2Cx: mode */
bogdanm 0:9b334a45a8ff 241 /* Set SMBDEN and SMBHEN bits according to I2C_Mode value */
bogdanm 0:9b334a45a8ff 242 tmpreg = I2C_InitStruct->I2C_Mode;
bogdanm 0:9b334a45a8ff 243 /* Write to I2Cx CR1 */
bogdanm 0:9b334a45a8ff 244 I2Cx->CR1 |= tmpreg;
bogdanm 0:9b334a45a8ff 245
bogdanm 0:9b334a45a8ff 246 /*---------------------------- I2Cx ACK Configuration ----------------------*/
bogdanm 0:9b334a45a8ff 247 /* Get the I2Cx CR2 value */
bogdanm 0:9b334a45a8ff 248 tmpreg = I2Cx->CR2;
bogdanm 0:9b334a45a8ff 249 /* Clear I2Cx CR2 register */
bogdanm 0:9b334a45a8ff 250 tmpreg &= CR2_CLEAR_MASK;
bogdanm 0:9b334a45a8ff 251 /* Configure I2Cx: acknowledgement */
bogdanm 0:9b334a45a8ff 252 /* Set NACK bit according to I2C_Ack value */
bogdanm 0:9b334a45a8ff 253 tmpreg |= I2C_InitStruct->I2C_Ack;
bogdanm 0:9b334a45a8ff 254 /* Write to I2Cx CR2 */
bogdanm 0:9b334a45a8ff 255 I2Cx->CR2 = tmpreg;
bogdanm 0:9b334a45a8ff 256 }
bogdanm 0:9b334a45a8ff 257
bogdanm 0:9b334a45a8ff 258 /**
bogdanm 0:9b334a45a8ff 259 * @brief Fills each I2C_InitStruct member with its default value.
bogdanm 0:9b334a45a8ff 260 * @param I2C_InitStruct: pointer to an I2C_InitTypeDef structure which will be initialized.
bogdanm 0:9b334a45a8ff 261 * @retval None
bogdanm 0:9b334a45a8ff 262 */
bogdanm 0:9b334a45a8ff 263 void I2C_StructInit(I2C_InitTypeDef* I2C_InitStruct)
bogdanm 0:9b334a45a8ff 264 {
bogdanm 0:9b334a45a8ff 265 /*---------------- Reset I2C init structure parameters values --------------*/
bogdanm 0:9b334a45a8ff 266 /* Initialize the I2C_Timing member */
bogdanm 0:9b334a45a8ff 267 I2C_InitStruct->I2C_Timing = 0;
bogdanm 0:9b334a45a8ff 268 /* Initialize the I2C_AnalogFilter member */
bogdanm 0:9b334a45a8ff 269 I2C_InitStruct->I2C_AnalogFilter = I2C_AnalogFilter_Enable;
bogdanm 0:9b334a45a8ff 270 /* Initialize the I2C_DigitalFilter member */
bogdanm 0:9b334a45a8ff 271 I2C_InitStruct->I2C_DigitalFilter = 0;
bogdanm 0:9b334a45a8ff 272 /* Initialize the I2C_Mode member */
bogdanm 0:9b334a45a8ff 273 I2C_InitStruct->I2C_Mode = I2C_Mode_I2C;
bogdanm 0:9b334a45a8ff 274 /* Initialize the I2C_OwnAddress1 member */
bogdanm 0:9b334a45a8ff 275 I2C_InitStruct->I2C_OwnAddress1 = 0;
bogdanm 0:9b334a45a8ff 276 /* Initialize the I2C_Ack member */
bogdanm 0:9b334a45a8ff 277 I2C_InitStruct->I2C_Ack = I2C_Ack_Disable;
bogdanm 0:9b334a45a8ff 278 /* Initialize the I2C_AcknowledgedAddress member */
bogdanm 0:9b334a45a8ff 279 I2C_InitStruct->I2C_AcknowledgedAddress = I2C_AcknowledgedAddress_7bit;
bogdanm 0:9b334a45a8ff 280 }
bogdanm 0:9b334a45a8ff 281
bogdanm 0:9b334a45a8ff 282 /**
bogdanm 0:9b334a45a8ff 283 * @brief Enables or disables the specified I2C peripheral.
bogdanm 0:9b334a45a8ff 284 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
bogdanm 0:9b334a45a8ff 285 * @param NewState: new state of the I2Cx peripheral.
bogdanm 0:9b334a45a8ff 286 * This parameter can be: ENABLE or DISABLE.
bogdanm 0:9b334a45a8ff 287 * @retval None
bogdanm 0:9b334a45a8ff 288 */
bogdanm 0:9b334a45a8ff 289 void I2C_Cmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
bogdanm 0:9b334a45a8ff 290 {
bogdanm 0:9b334a45a8ff 291 /* Check the parameters */
bogdanm 0:9b334a45a8ff 292 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
bogdanm 0:9b334a45a8ff 293 assert_param(IS_FUNCTIONAL_STATE(NewState));
bogdanm 0:9b334a45a8ff 294 if (NewState != DISABLE)
bogdanm 0:9b334a45a8ff 295 {
bogdanm 0:9b334a45a8ff 296 /* Enable the selected I2C peripheral */
bogdanm 0:9b334a45a8ff 297 I2Cx->CR1 |= I2C_CR1_PE;
bogdanm 0:9b334a45a8ff 298 }
bogdanm 0:9b334a45a8ff 299 else
bogdanm 0:9b334a45a8ff 300 {
bogdanm 0:9b334a45a8ff 301 /* Disable the selected I2C peripheral */
bogdanm 0:9b334a45a8ff 302 I2Cx->CR1 &= (uint32_t)~((uint32_t)I2C_CR1_PE);
bogdanm 0:9b334a45a8ff 303 }
bogdanm 0:9b334a45a8ff 304 }
bogdanm 0:9b334a45a8ff 305
bogdanm 0:9b334a45a8ff 306
bogdanm 0:9b334a45a8ff 307 /**
bogdanm 0:9b334a45a8ff 308 * @brief Enables or disables the specified I2C software reset.
bogdanm 0:9b334a45a8ff 309 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
bogdanm 0:9b334a45a8ff 310 * @retval None
bogdanm 0:9b334a45a8ff 311 */
bogdanm 0:9b334a45a8ff 312 void I2C_SoftwareResetCmd(I2C_TypeDef* I2Cx)
bogdanm 0:9b334a45a8ff 313 {
bogdanm 0:9b334a45a8ff 314 /* Check the parameters */
bogdanm 0:9b334a45a8ff 315 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
bogdanm 0:9b334a45a8ff 316
bogdanm 0:9b334a45a8ff 317 /* Disable peripheral */
bogdanm 0:9b334a45a8ff 318 I2Cx->CR1 &= (uint32_t)~((uint32_t)I2C_CR1_PE);
bogdanm 0:9b334a45a8ff 319
bogdanm 0:9b334a45a8ff 320 /* Perform a dummy read to delay the disable of peripheral for minimum
bogdanm 0:9b334a45a8ff 321 3 APB clock cycles to perform the software reset functionality */
bogdanm 0:9b334a45a8ff 322 *(__IO uint32_t *)(uint32_t)I2Cx;
bogdanm 0:9b334a45a8ff 323
bogdanm 0:9b334a45a8ff 324 /* Enable peripheral */
bogdanm 0:9b334a45a8ff 325 I2Cx->CR1 |= I2C_CR1_PE;
bogdanm 0:9b334a45a8ff 326 }
bogdanm 0:9b334a45a8ff 327
bogdanm 0:9b334a45a8ff 328 /**
bogdanm 0:9b334a45a8ff 329 * @brief Enables or disables the specified I2C interrupts.
bogdanm 0:9b334a45a8ff 330 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
bogdanm 0:9b334a45a8ff 331 * @param I2C_IT: specifies the I2C interrupts sources to be enabled or disabled.
bogdanm 0:9b334a45a8ff 332 * This parameter can be any combination of the following values:
bogdanm 0:9b334a45a8ff 333 * @arg I2C_IT_ERRI: Error interrupt mask
bogdanm 0:9b334a45a8ff 334 * @arg I2C_IT_TCI: Transfer Complete interrupt mask
bogdanm 0:9b334a45a8ff 335 * @arg I2C_IT_STOPI: Stop Detection interrupt mask
bogdanm 0:9b334a45a8ff 336 * @arg I2C_IT_NACKI: Not Acknowledge received interrupt mask
bogdanm 0:9b334a45a8ff 337 * @arg I2C_IT_ADDRI: Address Match interrupt mask
bogdanm 0:9b334a45a8ff 338 * @arg I2C_IT_RXI: RX interrupt mask
bogdanm 0:9b334a45a8ff 339 * @arg I2C_IT_TXI: TX interrupt mask
bogdanm 0:9b334a45a8ff 340 * @param NewState: new state of the specified I2C interrupts.
bogdanm 0:9b334a45a8ff 341 * This parameter can be: ENABLE or DISABLE.
bogdanm 0:9b334a45a8ff 342 * @retval None
bogdanm 0:9b334a45a8ff 343 */
bogdanm 0:9b334a45a8ff 344 void I2C_ITConfig(I2C_TypeDef* I2Cx, uint32_t I2C_IT, FunctionalState NewState)
bogdanm 0:9b334a45a8ff 345 {
bogdanm 0:9b334a45a8ff 346 /* Check the parameters */
bogdanm 0:9b334a45a8ff 347 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
bogdanm 0:9b334a45a8ff 348 assert_param(IS_FUNCTIONAL_STATE(NewState));
bogdanm 0:9b334a45a8ff 349 assert_param(IS_I2C_CONFIG_IT(I2C_IT));
bogdanm 0:9b334a45a8ff 350
bogdanm 0:9b334a45a8ff 351 if (NewState != DISABLE)
bogdanm 0:9b334a45a8ff 352 {
bogdanm 0:9b334a45a8ff 353 /* Enable the selected I2C interrupts */
bogdanm 0:9b334a45a8ff 354 I2Cx->CR1 |= I2C_IT;
bogdanm 0:9b334a45a8ff 355 }
bogdanm 0:9b334a45a8ff 356 else
bogdanm 0:9b334a45a8ff 357 {
bogdanm 0:9b334a45a8ff 358 /* Disable the selected I2C interrupts */
bogdanm 0:9b334a45a8ff 359 I2Cx->CR1 &= (uint32_t)~((uint32_t)I2C_IT);
bogdanm 0:9b334a45a8ff 360 }
bogdanm 0:9b334a45a8ff 361 }
bogdanm 0:9b334a45a8ff 362
bogdanm 0:9b334a45a8ff 363 /**
bogdanm 0:9b334a45a8ff 364 * @brief Enables or disables the I2C Clock stretching.
bogdanm 0:9b334a45a8ff 365 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
bogdanm 0:9b334a45a8ff 366 * @param NewState: new state of the I2Cx Clock stretching.
bogdanm 0:9b334a45a8ff 367 * This parameter can be: ENABLE or DISABLE.
bogdanm 0:9b334a45a8ff 368 * @retval None
bogdanm 0:9b334a45a8ff 369 */
bogdanm 0:9b334a45a8ff 370 void I2C_StretchClockCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
bogdanm 0:9b334a45a8ff 371 {
bogdanm 0:9b334a45a8ff 372 /* Check the parameters */
bogdanm 0:9b334a45a8ff 373 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
bogdanm 0:9b334a45a8ff 374 assert_param(IS_FUNCTIONAL_STATE(NewState));
bogdanm 0:9b334a45a8ff 375
bogdanm 0:9b334a45a8ff 376 if (NewState != DISABLE)
bogdanm 0:9b334a45a8ff 377 {
bogdanm 0:9b334a45a8ff 378 /* Enable clock stretching */
bogdanm 0:9b334a45a8ff 379 I2Cx->CR1 &= (uint32_t)~((uint32_t)I2C_CR1_NOSTRETCH);
bogdanm 0:9b334a45a8ff 380 }
bogdanm 0:9b334a45a8ff 381 else
bogdanm 0:9b334a45a8ff 382 {
bogdanm 0:9b334a45a8ff 383 /* Disable clock stretching */
bogdanm 0:9b334a45a8ff 384 I2Cx->CR1 |= I2C_CR1_NOSTRETCH;
bogdanm 0:9b334a45a8ff 385 }
bogdanm 0:9b334a45a8ff 386 }
bogdanm 0:9b334a45a8ff 387
bogdanm 0:9b334a45a8ff 388 /**
bogdanm 0:9b334a45a8ff 389 * @brief Enables or disables I2C wakeup from stop mode.
bogdanm 0:9b334a45a8ff 390 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
bogdanm 0:9b334a45a8ff 391 * @param NewState: new state of the I2Cx stop mode.
bogdanm 0:9b334a45a8ff 392 * This parameter can be: ENABLE or DISABLE.
bogdanm 0:9b334a45a8ff 393 * @retval None
bogdanm 0:9b334a45a8ff 394 */
bogdanm 0:9b334a45a8ff 395 void I2C_StopModeCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
bogdanm 0:9b334a45a8ff 396 {
bogdanm 0:9b334a45a8ff 397 /* Check the parameters */
bogdanm 0:9b334a45a8ff 398 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
bogdanm 0:9b334a45a8ff 399 assert_param(IS_FUNCTIONAL_STATE(NewState));
bogdanm 0:9b334a45a8ff 400
bogdanm 0:9b334a45a8ff 401 if (NewState != DISABLE)
bogdanm 0:9b334a45a8ff 402 {
bogdanm 0:9b334a45a8ff 403 /* Enable wakeup from stop mode */
bogdanm 0:9b334a45a8ff 404 I2Cx->CR1 |= I2C_CR1_WUPEN;
bogdanm 0:9b334a45a8ff 405 }
bogdanm 0:9b334a45a8ff 406 else
bogdanm 0:9b334a45a8ff 407 {
bogdanm 0:9b334a45a8ff 408 /* Disable wakeup from stop mode */
bogdanm 0:9b334a45a8ff 409 I2Cx->CR1 &= (uint32_t)~((uint32_t)I2C_CR1_WUPEN);
bogdanm 0:9b334a45a8ff 410 }
bogdanm 0:9b334a45a8ff 411 }
bogdanm 0:9b334a45a8ff 412
bogdanm 0:9b334a45a8ff 413 /**
bogdanm 0:9b334a45a8ff 414 * @brief Enables or disables the I2C own address 2.
bogdanm 0:9b334a45a8ff 415 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
bogdanm 0:9b334a45a8ff 416 * @param NewState: new state of the I2C own address 2.
bogdanm 0:9b334a45a8ff 417 * This parameter can be: ENABLE or DISABLE.
bogdanm 0:9b334a45a8ff 418 * @retval None
bogdanm 0:9b334a45a8ff 419 */
bogdanm 0:9b334a45a8ff 420 void I2C_DualAddressCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
bogdanm 0:9b334a45a8ff 421 {
bogdanm 0:9b334a45a8ff 422 /* Check the parameters */
bogdanm 0:9b334a45a8ff 423 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
bogdanm 0:9b334a45a8ff 424 assert_param(IS_FUNCTIONAL_STATE(NewState));
bogdanm 0:9b334a45a8ff 425
bogdanm 0:9b334a45a8ff 426 if (NewState != DISABLE)
bogdanm 0:9b334a45a8ff 427 {
bogdanm 0:9b334a45a8ff 428 /* Enable own address 2 */
bogdanm 0:9b334a45a8ff 429 I2Cx->OAR2 |= I2C_OAR2_OA2EN;
bogdanm 0:9b334a45a8ff 430 }
bogdanm 0:9b334a45a8ff 431 else
bogdanm 0:9b334a45a8ff 432 {
bogdanm 0:9b334a45a8ff 433 /* Disable own address 2 */
bogdanm 0:9b334a45a8ff 434 I2Cx->OAR2 &= (uint32_t)~((uint32_t)I2C_OAR2_OA2EN);
bogdanm 0:9b334a45a8ff 435 }
bogdanm 0:9b334a45a8ff 436 }
bogdanm 0:9b334a45a8ff 437
bogdanm 0:9b334a45a8ff 438 /**
bogdanm 0:9b334a45a8ff 439 * @brief Configures the I2C slave own address 2 and mask.
bogdanm 0:9b334a45a8ff 440 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
bogdanm 0:9b334a45a8ff 441 * @param Address: specifies the slave address to be programmed.
bogdanm 0:9b334a45a8ff 442 * @param Mask: specifies own address 2 mask to be programmed.
bogdanm 0:9b334a45a8ff 443 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 444 * @arg I2C_OA2_NoMask: no mask.
bogdanm 0:9b334a45a8ff 445 * @arg I2C_OA2_Mask01: OA2[1] is masked and don't care.
bogdanm 0:9b334a45a8ff 446 * @arg I2C_OA2_Mask02: OA2[2:1] are masked and don't care.
bogdanm 0:9b334a45a8ff 447 * @arg I2C_OA2_Mask03: OA2[3:1] are masked and don't care.
bogdanm 0:9b334a45a8ff 448 * @arg I2C_OA2_Mask04: OA2[4:1] are masked and don't care.
bogdanm 0:9b334a45a8ff 449 * @arg I2C_OA2_Mask05: OA2[5:1] are masked and don't care.
bogdanm 0:9b334a45a8ff 450 * @arg I2C_OA2_Mask06: OA2[6:1] are masked and don't care.
bogdanm 0:9b334a45a8ff 451 * @arg I2C_OA2_Mask07: OA2[7:1] are masked and don't care.
bogdanm 0:9b334a45a8ff 452 * @retval None
bogdanm 0:9b334a45a8ff 453 */
bogdanm 0:9b334a45a8ff 454 void I2C_OwnAddress2Config(I2C_TypeDef* I2Cx, uint16_t Address, uint8_t Mask)
bogdanm 0:9b334a45a8ff 455 {
bogdanm 0:9b334a45a8ff 456 uint32_t tmpreg = 0;
bogdanm 0:9b334a45a8ff 457
bogdanm 0:9b334a45a8ff 458 /* Check the parameters */
bogdanm 0:9b334a45a8ff 459 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
bogdanm 0:9b334a45a8ff 460 assert_param(IS_I2C_OWN_ADDRESS2(Address));
bogdanm 0:9b334a45a8ff 461 assert_param(IS_I2C_OWN_ADDRESS2_MASK(Mask));
bogdanm 0:9b334a45a8ff 462
bogdanm 0:9b334a45a8ff 463 /* Get the old register value */
bogdanm 0:9b334a45a8ff 464 tmpreg = I2Cx->OAR2;
bogdanm 0:9b334a45a8ff 465
bogdanm 0:9b334a45a8ff 466 /* Reset I2Cx OA2 bit [7:1] and OA2MSK bit [1:0] */
bogdanm 0:9b334a45a8ff 467 tmpreg &= (uint32_t)~((uint32_t)(I2C_OAR2_OA2 | I2C_OAR2_OA2MSK));
bogdanm 0:9b334a45a8ff 468
bogdanm 0:9b334a45a8ff 469 /* Set I2Cx SADD */
bogdanm 0:9b334a45a8ff 470 tmpreg |= (uint32_t)(((uint32_t)Address & I2C_OAR2_OA2) | \
bogdanm 0:9b334a45a8ff 471 (((uint32_t)Mask << 8) & I2C_OAR2_OA2MSK)) ;
bogdanm 0:9b334a45a8ff 472
bogdanm 0:9b334a45a8ff 473 /* Store the new register value */
bogdanm 0:9b334a45a8ff 474 I2Cx->OAR2 = tmpreg;
bogdanm 0:9b334a45a8ff 475 }
bogdanm 0:9b334a45a8ff 476
bogdanm 0:9b334a45a8ff 477 /**
bogdanm 0:9b334a45a8ff 478 * @brief Enables or disables the I2C general call mode.
bogdanm 0:9b334a45a8ff 479 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
bogdanm 0:9b334a45a8ff 480 * @param NewState: new state of the I2C general call mode.
bogdanm 0:9b334a45a8ff 481 * This parameter can be: ENABLE or DISABLE.
bogdanm 0:9b334a45a8ff 482 * @retval None
bogdanm 0:9b334a45a8ff 483 */
bogdanm 0:9b334a45a8ff 484 void I2C_GeneralCallCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
bogdanm 0:9b334a45a8ff 485 {
bogdanm 0:9b334a45a8ff 486 /* Check the parameters */
bogdanm 0:9b334a45a8ff 487 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
bogdanm 0:9b334a45a8ff 488 assert_param(IS_FUNCTIONAL_STATE(NewState));
bogdanm 0:9b334a45a8ff 489
bogdanm 0:9b334a45a8ff 490 if (NewState != DISABLE)
bogdanm 0:9b334a45a8ff 491 {
bogdanm 0:9b334a45a8ff 492 /* Enable general call mode */
bogdanm 0:9b334a45a8ff 493 I2Cx->CR1 |= I2C_CR1_GCEN;
bogdanm 0:9b334a45a8ff 494 }
bogdanm 0:9b334a45a8ff 495 else
bogdanm 0:9b334a45a8ff 496 {
bogdanm 0:9b334a45a8ff 497 /* Disable general call mode */
bogdanm 0:9b334a45a8ff 498 I2Cx->CR1 &= (uint32_t)~((uint32_t)I2C_CR1_GCEN);
bogdanm 0:9b334a45a8ff 499 }
bogdanm 0:9b334a45a8ff 500 }
bogdanm 0:9b334a45a8ff 501
bogdanm 0:9b334a45a8ff 502 /**
bogdanm 0:9b334a45a8ff 503 * @brief Enables or disables the I2C slave byte control.
bogdanm 0:9b334a45a8ff 504 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
bogdanm 0:9b334a45a8ff 505 * @param NewState: new state of the I2C slave byte control.
bogdanm 0:9b334a45a8ff 506 * This parameter can be: ENABLE or DISABLE.
bogdanm 0:9b334a45a8ff 507 * @retval None
bogdanm 0:9b334a45a8ff 508 */
bogdanm 0:9b334a45a8ff 509 void I2C_SlaveByteControlCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
bogdanm 0:9b334a45a8ff 510 {
bogdanm 0:9b334a45a8ff 511 /* Check the parameters */
bogdanm 0:9b334a45a8ff 512 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
bogdanm 0:9b334a45a8ff 513 assert_param(IS_FUNCTIONAL_STATE(NewState));
bogdanm 0:9b334a45a8ff 514
bogdanm 0:9b334a45a8ff 515 if (NewState != DISABLE)
bogdanm 0:9b334a45a8ff 516 {
bogdanm 0:9b334a45a8ff 517 /* Enable slave byte control */
bogdanm 0:9b334a45a8ff 518 I2Cx->CR1 |= I2C_CR1_SBC;
bogdanm 0:9b334a45a8ff 519 }
bogdanm 0:9b334a45a8ff 520 else
bogdanm 0:9b334a45a8ff 521 {
bogdanm 0:9b334a45a8ff 522 /* Disable slave byte control */
bogdanm 0:9b334a45a8ff 523 I2Cx->CR1 &= (uint32_t)~((uint32_t)I2C_CR1_SBC);
bogdanm 0:9b334a45a8ff 524 }
bogdanm 0:9b334a45a8ff 525 }
bogdanm 0:9b334a45a8ff 526
bogdanm 0:9b334a45a8ff 527 /**
bogdanm 0:9b334a45a8ff 528 * @brief Configures the slave address to be transmitted after start generation.
bogdanm 0:9b334a45a8ff 529 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
bogdanm 0:9b334a45a8ff 530 * @param Address: specifies the slave address to be programmed.
bogdanm 0:9b334a45a8ff 531 * @note This function should be called before generating start condition.
bogdanm 0:9b334a45a8ff 532 * @retval None
bogdanm 0:9b334a45a8ff 533 */
bogdanm 0:9b334a45a8ff 534 void I2C_SlaveAddressConfig(I2C_TypeDef* I2Cx, uint16_t Address)
bogdanm 0:9b334a45a8ff 535 {
bogdanm 0:9b334a45a8ff 536 uint32_t tmpreg = 0;
bogdanm 0:9b334a45a8ff 537
bogdanm 0:9b334a45a8ff 538 /* Check the parameters */
bogdanm 0:9b334a45a8ff 539 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
bogdanm 0:9b334a45a8ff 540 assert_param(IS_I2C_SLAVE_ADDRESS(Address));
bogdanm 0:9b334a45a8ff 541
bogdanm 0:9b334a45a8ff 542 /* Get the old register value */
bogdanm 0:9b334a45a8ff 543 tmpreg = I2Cx->CR2;
bogdanm 0:9b334a45a8ff 544
bogdanm 0:9b334a45a8ff 545 /* Reset I2Cx SADD bit [9:0] */
bogdanm 0:9b334a45a8ff 546 tmpreg &= (uint32_t)~((uint32_t)I2C_CR2_SADD);
bogdanm 0:9b334a45a8ff 547
bogdanm 0:9b334a45a8ff 548 /* Set I2Cx SADD */
bogdanm 0:9b334a45a8ff 549 tmpreg |= (uint32_t)((uint32_t)Address & I2C_CR2_SADD);
bogdanm 0:9b334a45a8ff 550
bogdanm 0:9b334a45a8ff 551 /* Store the new register value */
bogdanm 0:9b334a45a8ff 552 I2Cx->CR2 = tmpreg;
bogdanm 0:9b334a45a8ff 553 }
bogdanm 0:9b334a45a8ff 554
bogdanm 0:9b334a45a8ff 555 /**
bogdanm 0:9b334a45a8ff 556 * @brief Enables or disables the I2C 10-bit addressing mode for the master.
bogdanm 0:9b334a45a8ff 557 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
bogdanm 0:9b334a45a8ff 558 * @param NewState: new state of the I2C 10-bit addressing mode.
bogdanm 0:9b334a45a8ff 559 * This parameter can be: ENABLE or DISABLE.
bogdanm 0:9b334a45a8ff 560 * @note This function should be called before generating start condition.
bogdanm 0:9b334a45a8ff 561 * @retval None
bogdanm 0:9b334a45a8ff 562 */
bogdanm 0:9b334a45a8ff 563 void I2C_10BitAddressingModeCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
bogdanm 0:9b334a45a8ff 564 {
bogdanm 0:9b334a45a8ff 565 /* Check the parameters */
bogdanm 0:9b334a45a8ff 566 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
bogdanm 0:9b334a45a8ff 567 assert_param(IS_FUNCTIONAL_STATE(NewState));
bogdanm 0:9b334a45a8ff 568
bogdanm 0:9b334a45a8ff 569 if (NewState != DISABLE)
bogdanm 0:9b334a45a8ff 570 {
bogdanm 0:9b334a45a8ff 571 /* Enable 10-bit addressing mode */
bogdanm 0:9b334a45a8ff 572 I2Cx->CR2 |= I2C_CR2_ADD10;
bogdanm 0:9b334a45a8ff 573 }
bogdanm 0:9b334a45a8ff 574 else
bogdanm 0:9b334a45a8ff 575 {
bogdanm 0:9b334a45a8ff 576 /* Disable 10-bit addressing mode */
bogdanm 0:9b334a45a8ff 577 I2Cx->CR2 &= (uint32_t)~((uint32_t)I2C_CR2_ADD10);
bogdanm 0:9b334a45a8ff 578 }
bogdanm 0:9b334a45a8ff 579 }
bogdanm 0:9b334a45a8ff 580
bogdanm 0:9b334a45a8ff 581 /**
bogdanm 0:9b334a45a8ff 582 * @}
bogdanm 0:9b334a45a8ff 583 */
bogdanm 0:9b334a45a8ff 584
bogdanm 0:9b334a45a8ff 585
bogdanm 0:9b334a45a8ff 586 /** @defgroup I2C_Group2 Communications handling functions
bogdanm 0:9b334a45a8ff 587 * @brief Communications handling functions
bogdanm 0:9b334a45a8ff 588 *
bogdanm 0:9b334a45a8ff 589 @verbatim
bogdanm 0:9b334a45a8ff 590 ===============================================================================
bogdanm 0:9b334a45a8ff 591 ##### Communications handling functions #####
bogdanm 0:9b334a45a8ff 592 ===============================================================================
bogdanm 0:9b334a45a8ff 593 [..] This section provides a set of functions that handles I2C communication.
bogdanm 0:9b334a45a8ff 594
bogdanm 0:9b334a45a8ff 595 [..] Automatic End mode is enabled using I2C_AutoEndCmd() function. When Reload
bogdanm 0:9b334a45a8ff 596 mode is enabled via I2C_ReloadCmd() AutoEnd bit has no effect.
bogdanm 0:9b334a45a8ff 597
bogdanm 0:9b334a45a8ff 598 [..] I2C_NumberOfBytesConfig() function set the number of bytes to be transferred,
bogdanm 0:9b334a45a8ff 599 this configuration should be done before generating start condition in master
bogdanm 0:9b334a45a8ff 600 mode.
bogdanm 0:9b334a45a8ff 601
bogdanm 0:9b334a45a8ff 602 [..] When switching from master write operation to read operation in 10Bit addressing
bogdanm 0:9b334a45a8ff 603 mode, master can only sends the 1st 7 bits of the 10 bit address, followed by
bogdanm 0:9b334a45a8ff 604 Read direction by enabling HEADR bit using I2C_10BitAddressHeader() function.
bogdanm 0:9b334a45a8ff 605
bogdanm 0:9b334a45a8ff 606 [..] In master mode, when transferring more than 255 bytes Reload mode should be used
bogdanm 0:9b334a45a8ff 607 to handle communication. In the first phase of transfer, Nbytes should be set to
bogdanm 0:9b334a45a8ff 608 255. After transferring these bytes TCR flag is set and I2C_TransferHandling()
bogdanm 0:9b334a45a8ff 609 function should be called to handle remaining communication.
bogdanm 0:9b334a45a8ff 610
bogdanm 0:9b334a45a8ff 611 [..] In master mode, when software end mode is selected when all data is transferred
bogdanm 0:9b334a45a8ff 612 TC flag is set I2C_TransferHandling() function should be called to generate STOP
bogdanm 0:9b334a45a8ff 613 or generate ReStart.
bogdanm 0:9b334a45a8ff 614
bogdanm 0:9b334a45a8ff 615 @endverbatim
bogdanm 0:9b334a45a8ff 616 * @{
bogdanm 0:9b334a45a8ff 617 */
bogdanm 0:9b334a45a8ff 618
bogdanm 0:9b334a45a8ff 619 /**
bogdanm 0:9b334a45a8ff 620 * @brief Enables or disables the I2C automatic end mode (stop condition is
bogdanm 0:9b334a45a8ff 621 * automatically sent when nbytes data are transferred).
bogdanm 0:9b334a45a8ff 622 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
bogdanm 0:9b334a45a8ff 623 * @param NewState: new state of the I2C automatic end mode.
bogdanm 0:9b334a45a8ff 624 * This parameter can be: ENABLE or DISABLE.
bogdanm 0:9b334a45a8ff 625 * @note This function has effect if Reload mode is disabled.
bogdanm 0:9b334a45a8ff 626 * @retval None
bogdanm 0:9b334a45a8ff 627 */
bogdanm 0:9b334a45a8ff 628 void I2C_AutoEndCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
bogdanm 0:9b334a45a8ff 629 {
bogdanm 0:9b334a45a8ff 630 /* Check the parameters */
bogdanm 0:9b334a45a8ff 631 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
bogdanm 0:9b334a45a8ff 632 assert_param(IS_FUNCTIONAL_STATE(NewState));
bogdanm 0:9b334a45a8ff 633
bogdanm 0:9b334a45a8ff 634 if (NewState != DISABLE)
bogdanm 0:9b334a45a8ff 635 {
bogdanm 0:9b334a45a8ff 636 /* Enable Auto end mode */
bogdanm 0:9b334a45a8ff 637 I2Cx->CR2 |= I2C_CR2_AUTOEND;
bogdanm 0:9b334a45a8ff 638 }
bogdanm 0:9b334a45a8ff 639 else
bogdanm 0:9b334a45a8ff 640 {
bogdanm 0:9b334a45a8ff 641 /* Disable Auto end mode */
bogdanm 0:9b334a45a8ff 642 I2Cx->CR2 &= (uint32_t)~((uint32_t)I2C_CR2_AUTOEND);
bogdanm 0:9b334a45a8ff 643 }
bogdanm 0:9b334a45a8ff 644 }
bogdanm 0:9b334a45a8ff 645
bogdanm 0:9b334a45a8ff 646 /**
bogdanm 0:9b334a45a8ff 647 * @brief Enables or disables the I2C nbytes reload mode.
bogdanm 0:9b334a45a8ff 648 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
bogdanm 0:9b334a45a8ff 649 * @param NewState: new state of the nbytes reload mode.
bogdanm 0:9b334a45a8ff 650 * This parameter can be: ENABLE or DISABLE.
bogdanm 0:9b334a45a8ff 651 * @retval None
bogdanm 0:9b334a45a8ff 652 */
bogdanm 0:9b334a45a8ff 653 void I2C_ReloadCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
bogdanm 0:9b334a45a8ff 654 {
bogdanm 0:9b334a45a8ff 655 /* Check the parameters */
bogdanm 0:9b334a45a8ff 656 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
bogdanm 0:9b334a45a8ff 657 assert_param(IS_FUNCTIONAL_STATE(NewState));
bogdanm 0:9b334a45a8ff 658
bogdanm 0:9b334a45a8ff 659 if (NewState != DISABLE)
bogdanm 0:9b334a45a8ff 660 {
bogdanm 0:9b334a45a8ff 661 /* Enable Auto Reload mode */
bogdanm 0:9b334a45a8ff 662 I2Cx->CR2 |= I2C_CR2_RELOAD;
bogdanm 0:9b334a45a8ff 663 }
bogdanm 0:9b334a45a8ff 664 else
bogdanm 0:9b334a45a8ff 665 {
bogdanm 0:9b334a45a8ff 666 /* Disable Auto Reload mode */
bogdanm 0:9b334a45a8ff 667 I2Cx->CR2 &= (uint32_t)~((uint32_t)I2C_CR2_RELOAD);
bogdanm 0:9b334a45a8ff 668 }
bogdanm 0:9b334a45a8ff 669 }
bogdanm 0:9b334a45a8ff 670
bogdanm 0:9b334a45a8ff 671 /**
bogdanm 0:9b334a45a8ff 672 * @brief Configures the number of bytes to be transmitted/received.
bogdanm 0:9b334a45a8ff 673 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
bogdanm 0:9b334a45a8ff 674 * @param Number_Bytes: specifies the number of bytes to be programmed.
bogdanm 0:9b334a45a8ff 675 * @retval None
bogdanm 0:9b334a45a8ff 676 */
bogdanm 0:9b334a45a8ff 677 void I2C_NumberOfBytesConfig(I2C_TypeDef* I2Cx, uint8_t Number_Bytes)
bogdanm 0:9b334a45a8ff 678 {
bogdanm 0:9b334a45a8ff 679 uint32_t tmpreg = 0;
bogdanm 0:9b334a45a8ff 680
bogdanm 0:9b334a45a8ff 681 /* Check the parameters */
bogdanm 0:9b334a45a8ff 682 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
bogdanm 0:9b334a45a8ff 683
bogdanm 0:9b334a45a8ff 684 /* Get the old register value */
bogdanm 0:9b334a45a8ff 685 tmpreg = I2Cx->CR2;
bogdanm 0:9b334a45a8ff 686
bogdanm 0:9b334a45a8ff 687 /* Reset I2Cx Nbytes bit [7:0] */
bogdanm 0:9b334a45a8ff 688 tmpreg &= (uint32_t)~((uint32_t)I2C_CR2_NBYTES);
bogdanm 0:9b334a45a8ff 689
bogdanm 0:9b334a45a8ff 690 /* Set I2Cx Nbytes */
bogdanm 0:9b334a45a8ff 691 tmpreg |= (uint32_t)(((uint32_t)Number_Bytes << 16 ) & I2C_CR2_NBYTES);
bogdanm 0:9b334a45a8ff 692
bogdanm 0:9b334a45a8ff 693 /* Store the new register value */
bogdanm 0:9b334a45a8ff 694 I2Cx->CR2 = tmpreg;
bogdanm 0:9b334a45a8ff 695 }
bogdanm 0:9b334a45a8ff 696
bogdanm 0:9b334a45a8ff 697 /**
bogdanm 0:9b334a45a8ff 698 * @brief Configures the type of transfer request for the master.
bogdanm 0:9b334a45a8ff 699 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
bogdanm 0:9b334a45a8ff 700 * @param I2C_Direction: specifies the transfer request direction to be programmed.
bogdanm 0:9b334a45a8ff 701 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 702 * @arg I2C_Direction_Transmitter: Master request a write transfer
bogdanm 0:9b334a45a8ff 703 * @arg I2C_Direction_Receiver: Master request a read transfer
bogdanm 0:9b334a45a8ff 704 * @retval None
bogdanm 0:9b334a45a8ff 705 */
bogdanm 0:9b334a45a8ff 706 void I2C_MasterRequestConfig(I2C_TypeDef* I2Cx, uint16_t I2C_Direction)
bogdanm 0:9b334a45a8ff 707 {
bogdanm 0:9b334a45a8ff 708 /* Check the parameters */
bogdanm 0:9b334a45a8ff 709 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
bogdanm 0:9b334a45a8ff 710 assert_param(IS_I2C_DIRECTION(I2C_Direction));
bogdanm 0:9b334a45a8ff 711
bogdanm 0:9b334a45a8ff 712 /* Test on the direction to set/reset the read/write bit */
bogdanm 0:9b334a45a8ff 713 if (I2C_Direction == I2C_Direction_Transmitter)
bogdanm 0:9b334a45a8ff 714 {
bogdanm 0:9b334a45a8ff 715 /* Request a write Transfer */
bogdanm 0:9b334a45a8ff 716 I2Cx->CR2 &= (uint32_t)~((uint32_t)I2C_CR2_RD_WRN);
bogdanm 0:9b334a45a8ff 717 }
bogdanm 0:9b334a45a8ff 718 else
bogdanm 0:9b334a45a8ff 719 {
bogdanm 0:9b334a45a8ff 720 /* Request a read Transfer */
bogdanm 0:9b334a45a8ff 721 I2Cx->CR2 |= I2C_CR2_RD_WRN;
bogdanm 0:9b334a45a8ff 722 }
bogdanm 0:9b334a45a8ff 723 }
bogdanm 0:9b334a45a8ff 724
bogdanm 0:9b334a45a8ff 725 /**
bogdanm 0:9b334a45a8ff 726 * @brief Generates I2Cx communication START condition.
bogdanm 0:9b334a45a8ff 727 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
bogdanm 0:9b334a45a8ff 728 * @param NewState: new state of the I2C START condition generation.
bogdanm 0:9b334a45a8ff 729 * This parameter can be: ENABLE or DISABLE.
bogdanm 0:9b334a45a8ff 730 * @retval None
bogdanm 0:9b334a45a8ff 731 */
bogdanm 0:9b334a45a8ff 732 void I2C_GenerateSTART(I2C_TypeDef* I2Cx, FunctionalState NewState)
bogdanm 0:9b334a45a8ff 733 {
bogdanm 0:9b334a45a8ff 734 /* Check the parameters */
bogdanm 0:9b334a45a8ff 735 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
bogdanm 0:9b334a45a8ff 736 assert_param(IS_FUNCTIONAL_STATE(NewState));
bogdanm 0:9b334a45a8ff 737
bogdanm 0:9b334a45a8ff 738 if (NewState != DISABLE)
bogdanm 0:9b334a45a8ff 739 {
bogdanm 0:9b334a45a8ff 740 /* Generate a START condition */
bogdanm 0:9b334a45a8ff 741 I2Cx->CR2 |= I2C_CR2_START;
bogdanm 0:9b334a45a8ff 742 }
bogdanm 0:9b334a45a8ff 743 else
bogdanm 0:9b334a45a8ff 744 {
bogdanm 0:9b334a45a8ff 745 /* Disable the START condition generation */
bogdanm 0:9b334a45a8ff 746 I2Cx->CR2 &= (uint32_t)~((uint32_t)I2C_CR2_START);
bogdanm 0:9b334a45a8ff 747 }
bogdanm 0:9b334a45a8ff 748 }
bogdanm 0:9b334a45a8ff 749
bogdanm 0:9b334a45a8ff 750 /**
bogdanm 0:9b334a45a8ff 751 * @brief Generates I2Cx communication STOP condition.
bogdanm 0:9b334a45a8ff 752 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
bogdanm 0:9b334a45a8ff 753 * @param NewState: new state of the I2C STOP condition generation.
bogdanm 0:9b334a45a8ff 754 * This parameter can be: ENABLE or DISABLE.
bogdanm 0:9b334a45a8ff 755 * @retval None
bogdanm 0:9b334a45a8ff 756 */
bogdanm 0:9b334a45a8ff 757 void I2C_GenerateSTOP(I2C_TypeDef* I2Cx, FunctionalState NewState)
bogdanm 0:9b334a45a8ff 758 {
bogdanm 0:9b334a45a8ff 759 /* Check the parameters */
bogdanm 0:9b334a45a8ff 760 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
bogdanm 0:9b334a45a8ff 761 assert_param(IS_FUNCTIONAL_STATE(NewState));
bogdanm 0:9b334a45a8ff 762
bogdanm 0:9b334a45a8ff 763 if (NewState != DISABLE)
bogdanm 0:9b334a45a8ff 764 {
bogdanm 0:9b334a45a8ff 765 /* Generate a STOP condition */
bogdanm 0:9b334a45a8ff 766 I2Cx->CR2 |= I2C_CR2_STOP;
bogdanm 0:9b334a45a8ff 767 }
bogdanm 0:9b334a45a8ff 768 else
bogdanm 0:9b334a45a8ff 769 {
bogdanm 0:9b334a45a8ff 770 /* Disable the STOP condition generation */
bogdanm 0:9b334a45a8ff 771 I2Cx->CR2 &= (uint32_t)~((uint32_t)I2C_CR2_STOP);
bogdanm 0:9b334a45a8ff 772 }
bogdanm 0:9b334a45a8ff 773 }
bogdanm 0:9b334a45a8ff 774
bogdanm 0:9b334a45a8ff 775 /**
bogdanm 0:9b334a45a8ff 776 * @brief Enables or disables the I2C 10-bit header only mode with read direction.
bogdanm 0:9b334a45a8ff 777 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
bogdanm 0:9b334a45a8ff 778 * @param NewState: new state of the I2C 10-bit header only mode.
bogdanm 0:9b334a45a8ff 779 * This parameter can be: ENABLE or DISABLE.
bogdanm 0:9b334a45a8ff 780 * @note This mode can be used only when switching from master transmitter mode
bogdanm 0:9b334a45a8ff 781 * to master receiver mode.
bogdanm 0:9b334a45a8ff 782 * @retval None
bogdanm 0:9b334a45a8ff 783 */
bogdanm 0:9b334a45a8ff 784 void I2C_10BitAddressHeaderCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
bogdanm 0:9b334a45a8ff 785 {
bogdanm 0:9b334a45a8ff 786 /* Check the parameters */
bogdanm 0:9b334a45a8ff 787 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
bogdanm 0:9b334a45a8ff 788 assert_param(IS_FUNCTIONAL_STATE(NewState));
bogdanm 0:9b334a45a8ff 789
bogdanm 0:9b334a45a8ff 790 if (NewState != DISABLE)
bogdanm 0:9b334a45a8ff 791 {
bogdanm 0:9b334a45a8ff 792 /* Enable 10-bit header only mode */
bogdanm 0:9b334a45a8ff 793 I2Cx->CR2 |= I2C_CR2_HEAD10R;
bogdanm 0:9b334a45a8ff 794 }
bogdanm 0:9b334a45a8ff 795 else
bogdanm 0:9b334a45a8ff 796 {
bogdanm 0:9b334a45a8ff 797 /* Disable 10-bit header only mode */
bogdanm 0:9b334a45a8ff 798 I2Cx->CR2 &= (uint32_t)~((uint32_t)I2C_CR2_HEAD10R);
bogdanm 0:9b334a45a8ff 799 }
bogdanm 0:9b334a45a8ff 800 }
bogdanm 0:9b334a45a8ff 801
bogdanm 0:9b334a45a8ff 802 /**
bogdanm 0:9b334a45a8ff 803 * @brief Generates I2C communication Acknowledge.
bogdanm 0:9b334a45a8ff 804 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
bogdanm 0:9b334a45a8ff 805 * @param NewState: new state of the Acknowledge.
bogdanm 0:9b334a45a8ff 806 * This parameter can be: ENABLE or DISABLE.
bogdanm 0:9b334a45a8ff 807 * @retval None
bogdanm 0:9b334a45a8ff 808 */
bogdanm 0:9b334a45a8ff 809 void I2C_AcknowledgeConfig(I2C_TypeDef* I2Cx, FunctionalState NewState)
bogdanm 0:9b334a45a8ff 810 {
bogdanm 0:9b334a45a8ff 811 /* Check the parameters */
bogdanm 0:9b334a45a8ff 812 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
bogdanm 0:9b334a45a8ff 813 assert_param(IS_FUNCTIONAL_STATE(NewState));
bogdanm 0:9b334a45a8ff 814
bogdanm 0:9b334a45a8ff 815 if (NewState != DISABLE)
bogdanm 0:9b334a45a8ff 816 {
bogdanm 0:9b334a45a8ff 817 /* Enable ACK generation */
bogdanm 0:9b334a45a8ff 818 I2Cx->CR2 &= (uint32_t)~((uint32_t)I2C_CR2_NACK);
bogdanm 0:9b334a45a8ff 819 }
bogdanm 0:9b334a45a8ff 820 else
bogdanm 0:9b334a45a8ff 821 {
bogdanm 0:9b334a45a8ff 822 /* Enable NACK generation */
bogdanm 0:9b334a45a8ff 823 I2Cx->CR2 |= I2C_CR2_NACK;
bogdanm 0:9b334a45a8ff 824 }
bogdanm 0:9b334a45a8ff 825 }
bogdanm 0:9b334a45a8ff 826
bogdanm 0:9b334a45a8ff 827 /**
bogdanm 0:9b334a45a8ff 828 * @brief Returns the I2C slave matched address .
bogdanm 0:9b334a45a8ff 829 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
bogdanm 0:9b334a45a8ff 830 * @retval The value of the slave matched address .
bogdanm 0:9b334a45a8ff 831 */
bogdanm 0:9b334a45a8ff 832 uint8_t I2C_GetAddressMatched(I2C_TypeDef* I2Cx)
bogdanm 0:9b334a45a8ff 833 {
bogdanm 0:9b334a45a8ff 834 /* Check the parameters */
bogdanm 0:9b334a45a8ff 835 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
bogdanm 0:9b334a45a8ff 836
bogdanm 0:9b334a45a8ff 837 /* Return the slave matched address in the SR1 register */
bogdanm 0:9b334a45a8ff 838 return (uint8_t)(((uint32_t)I2Cx->ISR & I2C_ISR_ADDCODE) >> 16) ;
bogdanm 0:9b334a45a8ff 839 }
bogdanm 0:9b334a45a8ff 840
bogdanm 0:9b334a45a8ff 841 /**
bogdanm 0:9b334a45a8ff 842 * @brief Returns the I2C slave received request.
bogdanm 0:9b334a45a8ff 843 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
bogdanm 0:9b334a45a8ff 844 * @retval The value of the received request.
bogdanm 0:9b334a45a8ff 845 */
bogdanm 0:9b334a45a8ff 846 uint16_t I2C_GetTransferDirection(I2C_TypeDef* I2Cx)
bogdanm 0:9b334a45a8ff 847 {
bogdanm 0:9b334a45a8ff 848 uint32_t tmpreg = 0;
bogdanm 0:9b334a45a8ff 849 uint16_t direction = 0;
bogdanm 0:9b334a45a8ff 850
bogdanm 0:9b334a45a8ff 851 /* Check the parameters */
bogdanm 0:9b334a45a8ff 852 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
bogdanm 0:9b334a45a8ff 853
bogdanm 0:9b334a45a8ff 854 /* Return the slave matched address in the SR1 register */
bogdanm 0:9b334a45a8ff 855 tmpreg = (uint32_t)(I2Cx->ISR & I2C_ISR_DIR);
bogdanm 0:9b334a45a8ff 856
bogdanm 0:9b334a45a8ff 857 /* If write transfer is requested */
bogdanm 0:9b334a45a8ff 858 if (tmpreg == 0)
bogdanm 0:9b334a45a8ff 859 {
bogdanm 0:9b334a45a8ff 860 /* write transfer is requested */
bogdanm 0:9b334a45a8ff 861 direction = I2C_Direction_Transmitter;
bogdanm 0:9b334a45a8ff 862 }
bogdanm 0:9b334a45a8ff 863 else
bogdanm 0:9b334a45a8ff 864 {
bogdanm 0:9b334a45a8ff 865 /* Read transfer is requested */
bogdanm 0:9b334a45a8ff 866 direction = I2C_Direction_Receiver;
bogdanm 0:9b334a45a8ff 867 }
bogdanm 0:9b334a45a8ff 868 return direction;
bogdanm 0:9b334a45a8ff 869 }
bogdanm 0:9b334a45a8ff 870
bogdanm 0:9b334a45a8ff 871 /**
bogdanm 0:9b334a45a8ff 872 * @brief Handles I2Cx communication when starting transfer or during transfer (TC or TCR flag are set).
bogdanm 0:9b334a45a8ff 873 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
bogdanm 0:9b334a45a8ff 874 * @param Address: specifies the slave address to be programmed.
bogdanm 0:9b334a45a8ff 875 * @param Number_Bytes: specifies the number of bytes to be programmed.
bogdanm 0:9b334a45a8ff 876 * This parameter must be a value between 0 and 255.
bogdanm 0:9b334a45a8ff 877 * @param ReloadEndMode: new state of the I2C START condition generation.
bogdanm 0:9b334a45a8ff 878 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 879 * @arg I2C_Reload_Mode: Enable Reload mode .
bogdanm 0:9b334a45a8ff 880 * @arg I2C_AutoEnd_Mode: Enable Automatic end mode.
bogdanm 0:9b334a45a8ff 881 * @arg I2C_SoftEnd_Mode: Enable Software end mode.
bogdanm 0:9b334a45a8ff 882 * @param StartStopMode: new state of the I2C START condition generation.
bogdanm 0:9b334a45a8ff 883 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 884 * @arg I2C_No_StartStop: Don't Generate stop and start condition.
bogdanm 0:9b334a45a8ff 885 * @arg I2C_Generate_Stop: Generate stop condition (Number_Bytes should be set to 0).
bogdanm 0:9b334a45a8ff 886 * @arg I2C_Generate_Start_Read: Generate Restart for read request.
bogdanm 0:9b334a45a8ff 887 * @arg I2C_Generate_Start_Write: Generate Restart for write request.
bogdanm 0:9b334a45a8ff 888 * @retval None
bogdanm 0:9b334a45a8ff 889 */
bogdanm 0:9b334a45a8ff 890 void I2C_TransferHandling(I2C_TypeDef* I2Cx, uint16_t Address, uint8_t Number_Bytes, uint32_t ReloadEndMode, uint32_t StartStopMode)
bogdanm 0:9b334a45a8ff 891 {
bogdanm 0:9b334a45a8ff 892 uint32_t tmpreg = 0;
bogdanm 0:9b334a45a8ff 893
bogdanm 0:9b334a45a8ff 894 /* Check the parameters */
bogdanm 0:9b334a45a8ff 895 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
bogdanm 0:9b334a45a8ff 896 assert_param(IS_I2C_SLAVE_ADDRESS(Address));
bogdanm 0:9b334a45a8ff 897 assert_param(IS_RELOAD_END_MODE(ReloadEndMode));
bogdanm 0:9b334a45a8ff 898 assert_param(IS_START_STOP_MODE(StartStopMode));
bogdanm 0:9b334a45a8ff 899
bogdanm 0:9b334a45a8ff 900 /* Get the CR2 register value */
bogdanm 0:9b334a45a8ff 901 tmpreg = I2Cx->CR2;
bogdanm 0:9b334a45a8ff 902
bogdanm 0:9b334a45a8ff 903 /* clear tmpreg specific bits */
bogdanm 0:9b334a45a8ff 904 tmpreg &= (uint32_t)~((uint32_t)(I2C_CR2_SADD | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_AUTOEND | I2C_CR2_RD_WRN | I2C_CR2_START | I2C_CR2_STOP));
bogdanm 0:9b334a45a8ff 905
bogdanm 0:9b334a45a8ff 906 /* update tmpreg */
bogdanm 0:9b334a45a8ff 907 tmpreg |= (uint32_t)(((uint32_t)Address & I2C_CR2_SADD) | (((uint32_t)Number_Bytes << 16 ) & I2C_CR2_NBYTES) | \
bogdanm 0:9b334a45a8ff 908 (uint32_t)ReloadEndMode | (uint32_t)StartStopMode);
bogdanm 0:9b334a45a8ff 909
bogdanm 0:9b334a45a8ff 910 /* update CR2 register */
bogdanm 0:9b334a45a8ff 911 I2Cx->CR2 = tmpreg;
bogdanm 0:9b334a45a8ff 912 }
bogdanm 0:9b334a45a8ff 913
bogdanm 0:9b334a45a8ff 914 /**
bogdanm 0:9b334a45a8ff 915 * @}
bogdanm 0:9b334a45a8ff 916 */
bogdanm 0:9b334a45a8ff 917
bogdanm 0:9b334a45a8ff 918
bogdanm 0:9b334a45a8ff 919 /** @defgroup I2C_Group3 SMBUS management functions
bogdanm 0:9b334a45a8ff 920 * @brief SMBUS management functions
bogdanm 0:9b334a45a8ff 921 *
bogdanm 0:9b334a45a8ff 922 @verbatim
bogdanm 0:9b334a45a8ff 923 ===============================================================================
bogdanm 0:9b334a45a8ff 924 ##### SMBUS management functions #####
bogdanm 0:9b334a45a8ff 925 ===============================================================================
bogdanm 0:9b334a45a8ff 926 [..] This section provides a set of functions that handles SMBus communication
bogdanm 0:9b334a45a8ff 927 and timeouts detection.
bogdanm 0:9b334a45a8ff 928
bogdanm 0:9b334a45a8ff 929 [..] The SMBus Device default address (0b1100 001) is enabled by calling I2C_Init()
bogdanm 0:9b334a45a8ff 930 function and setting I2C_Mode member of I2C_InitTypeDef() structure to
bogdanm 0:9b334a45a8ff 931 I2C_Mode_SMBusDevice.
bogdanm 0:9b334a45a8ff 932
bogdanm 0:9b334a45a8ff 933 [..] The SMBus Host address (0b0001 000) is enabled by calling I2C_Init()
bogdanm 0:9b334a45a8ff 934 function and setting I2C_Mode member of I2C_InitTypeDef() structure to
bogdanm 0:9b334a45a8ff 935 I2C_Mode_SMBusHost.
bogdanm 0:9b334a45a8ff 936
bogdanm 0:9b334a45a8ff 937 [..] The Alert Response Address (0b0001 100) is enabled using I2C_SMBusAlertCmd()
bogdanm 0:9b334a45a8ff 938 function.
bogdanm 0:9b334a45a8ff 939
bogdanm 0:9b334a45a8ff 940 [..] To detect cumulative SCL stretch in master and slave mode, TIMEOUTB should be
bogdanm 0:9b334a45a8ff 941 configured (in accordance to SMBus specification) using I2C_TimeoutBConfig()
bogdanm 0:9b334a45a8ff 942 function then I2C_ExtendedClockTimeoutCmd() function should be called to enable
bogdanm 0:9b334a45a8ff 943 the detection.
bogdanm 0:9b334a45a8ff 944
bogdanm 0:9b334a45a8ff 945 [..] SCL low timeout is detected by configuring TIMEOUTB using I2C_TimeoutBConfig()
bogdanm 0:9b334a45a8ff 946 function followed by the call of I2C_ClockTimeoutCmd(). When adding to this
bogdanm 0:9b334a45a8ff 947 procedure the call of I2C_IdleClockTimeoutCmd() function, Bus Idle condition
bogdanm 0:9b334a45a8ff 948 (both SCL and SDA high) is detected also.
bogdanm 0:9b334a45a8ff 949
bogdanm 0:9b334a45a8ff 950 @endverbatim
bogdanm 0:9b334a45a8ff 951 * @{
bogdanm 0:9b334a45a8ff 952 */
bogdanm 0:9b334a45a8ff 953
bogdanm 0:9b334a45a8ff 954 /**
bogdanm 0:9b334a45a8ff 955 * @brief Enables or disables I2C SMBus alert.
bogdanm 0:9b334a45a8ff 956 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
bogdanm 0:9b334a45a8ff 957 * @param NewState: new state of the I2Cx SMBus alert.
bogdanm 0:9b334a45a8ff 958 * This parameter can be: ENABLE or DISABLE.
bogdanm 0:9b334a45a8ff 959 * @retval None
bogdanm 0:9b334a45a8ff 960 */
bogdanm 0:9b334a45a8ff 961 void I2C_SMBusAlertCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
bogdanm 0:9b334a45a8ff 962 {
bogdanm 0:9b334a45a8ff 963 /* Check the parameters */
bogdanm 0:9b334a45a8ff 964 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
bogdanm 0:9b334a45a8ff 965 assert_param(IS_FUNCTIONAL_STATE(NewState));
bogdanm 0:9b334a45a8ff 966
bogdanm 0:9b334a45a8ff 967 if (NewState != DISABLE)
bogdanm 0:9b334a45a8ff 968 {
bogdanm 0:9b334a45a8ff 969 /* Enable SMBus alert */
bogdanm 0:9b334a45a8ff 970 I2Cx->CR1 |= I2C_CR1_ALERTEN;
bogdanm 0:9b334a45a8ff 971 }
bogdanm 0:9b334a45a8ff 972 else
bogdanm 0:9b334a45a8ff 973 {
bogdanm 0:9b334a45a8ff 974 /* Disable SMBus alert */
bogdanm 0:9b334a45a8ff 975 I2Cx->CR1 &= (uint32_t)~((uint32_t)I2C_CR1_ALERTEN);
bogdanm 0:9b334a45a8ff 976 }
bogdanm 0:9b334a45a8ff 977 }
bogdanm 0:9b334a45a8ff 978
bogdanm 0:9b334a45a8ff 979 /**
bogdanm 0:9b334a45a8ff 980 * @brief Enables or disables I2C Clock Timeout (SCL Timeout detection).
bogdanm 0:9b334a45a8ff 981 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
bogdanm 0:9b334a45a8ff 982 * @param NewState: new state of the I2Cx clock Timeout.
bogdanm 0:9b334a45a8ff 983 * This parameter can be: ENABLE or DISABLE.
bogdanm 0:9b334a45a8ff 984 * @retval None
bogdanm 0:9b334a45a8ff 985 */
bogdanm 0:9b334a45a8ff 986 void I2C_ClockTimeoutCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
bogdanm 0:9b334a45a8ff 987 {
bogdanm 0:9b334a45a8ff 988 /* Check the parameters */
bogdanm 0:9b334a45a8ff 989 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
bogdanm 0:9b334a45a8ff 990 assert_param(IS_FUNCTIONAL_STATE(NewState));
bogdanm 0:9b334a45a8ff 991
bogdanm 0:9b334a45a8ff 992 if (NewState != DISABLE)
bogdanm 0:9b334a45a8ff 993 {
bogdanm 0:9b334a45a8ff 994 /* Enable Clock Timeout */
bogdanm 0:9b334a45a8ff 995 I2Cx->TIMEOUTR |= I2C_TIMEOUTR_TIMOUTEN;
bogdanm 0:9b334a45a8ff 996 }
bogdanm 0:9b334a45a8ff 997 else
bogdanm 0:9b334a45a8ff 998 {
bogdanm 0:9b334a45a8ff 999 /* Disable Clock Timeout */
bogdanm 0:9b334a45a8ff 1000 I2Cx->TIMEOUTR &= (uint32_t)~((uint32_t)I2C_TIMEOUTR_TIMOUTEN);
bogdanm 0:9b334a45a8ff 1001 }
bogdanm 0:9b334a45a8ff 1002 }
bogdanm 0:9b334a45a8ff 1003
bogdanm 0:9b334a45a8ff 1004 /**
bogdanm 0:9b334a45a8ff 1005 * @brief Enables or disables I2C Extended Clock Timeout (SCL cumulative Timeout detection).
bogdanm 0:9b334a45a8ff 1006 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
bogdanm 0:9b334a45a8ff 1007 * @param NewState: new state of the I2Cx Extended clock Timeout.
bogdanm 0:9b334a45a8ff 1008 * This parameter can be: ENABLE or DISABLE.
bogdanm 0:9b334a45a8ff 1009 * @retval None
bogdanm 0:9b334a45a8ff 1010 */
bogdanm 0:9b334a45a8ff 1011 void I2C_ExtendedClockTimeoutCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
bogdanm 0:9b334a45a8ff 1012 {
bogdanm 0:9b334a45a8ff 1013 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1014 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
bogdanm 0:9b334a45a8ff 1015 assert_param(IS_FUNCTIONAL_STATE(NewState));
bogdanm 0:9b334a45a8ff 1016
bogdanm 0:9b334a45a8ff 1017 if (NewState != DISABLE)
bogdanm 0:9b334a45a8ff 1018 {
bogdanm 0:9b334a45a8ff 1019 /* Enable Clock Timeout */
bogdanm 0:9b334a45a8ff 1020 I2Cx->TIMEOUTR |= I2C_TIMEOUTR_TEXTEN;
bogdanm 0:9b334a45a8ff 1021 }
bogdanm 0:9b334a45a8ff 1022 else
bogdanm 0:9b334a45a8ff 1023 {
bogdanm 0:9b334a45a8ff 1024 /* Disable Clock Timeout */
bogdanm 0:9b334a45a8ff 1025 I2Cx->TIMEOUTR &= (uint32_t)~((uint32_t)I2C_TIMEOUTR_TEXTEN);
bogdanm 0:9b334a45a8ff 1026 }
bogdanm 0:9b334a45a8ff 1027 }
bogdanm 0:9b334a45a8ff 1028
bogdanm 0:9b334a45a8ff 1029 /**
bogdanm 0:9b334a45a8ff 1030 * @brief Enables or disables I2C Idle Clock Timeout (Bus idle SCL and SDA
bogdanm 0:9b334a45a8ff 1031 * high detection).
bogdanm 0:9b334a45a8ff 1032 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
bogdanm 0:9b334a45a8ff 1033 * @param NewState: new state of the I2Cx Idle clock Timeout.
bogdanm 0:9b334a45a8ff 1034 * This parameter can be: ENABLE or DISABLE.
bogdanm 0:9b334a45a8ff 1035 * @retval None
bogdanm 0:9b334a45a8ff 1036 */
bogdanm 0:9b334a45a8ff 1037 void I2C_IdleClockTimeoutCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
bogdanm 0:9b334a45a8ff 1038 {
bogdanm 0:9b334a45a8ff 1039 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1040 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
bogdanm 0:9b334a45a8ff 1041 assert_param(IS_FUNCTIONAL_STATE(NewState));
bogdanm 0:9b334a45a8ff 1042
bogdanm 0:9b334a45a8ff 1043 if (NewState != DISABLE)
bogdanm 0:9b334a45a8ff 1044 {
bogdanm 0:9b334a45a8ff 1045 /* Enable Clock Timeout */
bogdanm 0:9b334a45a8ff 1046 I2Cx->TIMEOUTR |= I2C_TIMEOUTR_TIDLE;
bogdanm 0:9b334a45a8ff 1047 }
bogdanm 0:9b334a45a8ff 1048 else
bogdanm 0:9b334a45a8ff 1049 {
bogdanm 0:9b334a45a8ff 1050 /* Disable Clock Timeout */
bogdanm 0:9b334a45a8ff 1051 I2Cx->TIMEOUTR &= (uint32_t)~((uint32_t)I2C_TIMEOUTR_TIDLE);
bogdanm 0:9b334a45a8ff 1052 }
bogdanm 0:9b334a45a8ff 1053 }
bogdanm 0:9b334a45a8ff 1054
bogdanm 0:9b334a45a8ff 1055 /**
bogdanm 0:9b334a45a8ff 1056 * @brief Configures the I2C Bus Timeout A (SCL Timeout when TIDLE = 0 or Bus
bogdanm 0:9b334a45a8ff 1057 * idle SCL and SDA high when TIDLE = 1).
bogdanm 0:9b334a45a8ff 1058 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
bogdanm 0:9b334a45a8ff 1059 * @param Timeout: specifies the TimeoutA to be programmed.
bogdanm 0:9b334a45a8ff 1060 * @retval None
bogdanm 0:9b334a45a8ff 1061 */
bogdanm 0:9b334a45a8ff 1062 void I2C_TimeoutAConfig(I2C_TypeDef* I2Cx, uint16_t Timeout)
bogdanm 0:9b334a45a8ff 1063 {
bogdanm 0:9b334a45a8ff 1064 uint32_t tmpreg = 0;
bogdanm 0:9b334a45a8ff 1065
bogdanm 0:9b334a45a8ff 1066 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1067 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
bogdanm 0:9b334a45a8ff 1068 assert_param(IS_I2C_TIMEOUT(Timeout));
bogdanm 0:9b334a45a8ff 1069
bogdanm 0:9b334a45a8ff 1070 /* Get the old register value */
bogdanm 0:9b334a45a8ff 1071 tmpreg = I2Cx->TIMEOUTR;
bogdanm 0:9b334a45a8ff 1072
bogdanm 0:9b334a45a8ff 1073 /* Reset I2Cx TIMEOUTA bit [11:0] */
bogdanm 0:9b334a45a8ff 1074 tmpreg &= (uint32_t)~((uint32_t)I2C_TIMEOUTR_TIMEOUTA);
bogdanm 0:9b334a45a8ff 1075
bogdanm 0:9b334a45a8ff 1076 /* Set I2Cx TIMEOUTA */
bogdanm 0:9b334a45a8ff 1077 tmpreg |= (uint32_t)((uint32_t)Timeout & I2C_TIMEOUTR_TIMEOUTA) ;
bogdanm 0:9b334a45a8ff 1078
bogdanm 0:9b334a45a8ff 1079 /* Store the new register value */
bogdanm 0:9b334a45a8ff 1080 I2Cx->TIMEOUTR = tmpreg;
bogdanm 0:9b334a45a8ff 1081 }
bogdanm 0:9b334a45a8ff 1082
bogdanm 0:9b334a45a8ff 1083 /**
bogdanm 0:9b334a45a8ff 1084 * @brief Configures the I2C Bus Timeout B (SCL cumulative Timeout).
bogdanm 0:9b334a45a8ff 1085 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
bogdanm 0:9b334a45a8ff 1086 * @param Timeout: specifies the TimeoutB to be programmed.
bogdanm 0:9b334a45a8ff 1087 * @retval None
bogdanm 0:9b334a45a8ff 1088 */
bogdanm 0:9b334a45a8ff 1089 void I2C_TimeoutBConfig(I2C_TypeDef* I2Cx, uint16_t Timeout)
bogdanm 0:9b334a45a8ff 1090 {
bogdanm 0:9b334a45a8ff 1091 uint32_t tmpreg = 0;
bogdanm 0:9b334a45a8ff 1092
bogdanm 0:9b334a45a8ff 1093 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1094 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
bogdanm 0:9b334a45a8ff 1095 assert_param(IS_I2C_TIMEOUT(Timeout));
bogdanm 0:9b334a45a8ff 1096
bogdanm 0:9b334a45a8ff 1097 /* Get the old register value */
bogdanm 0:9b334a45a8ff 1098 tmpreg = I2Cx->TIMEOUTR;
bogdanm 0:9b334a45a8ff 1099
bogdanm 0:9b334a45a8ff 1100 /* Reset I2Cx TIMEOUTB bit [11:0] */
bogdanm 0:9b334a45a8ff 1101 tmpreg &= (uint32_t)~((uint32_t)I2C_TIMEOUTR_TIMEOUTB);
bogdanm 0:9b334a45a8ff 1102
bogdanm 0:9b334a45a8ff 1103 /* Set I2Cx TIMEOUTB */
bogdanm 0:9b334a45a8ff 1104 tmpreg |= (uint32_t)(((uint32_t)Timeout << 16) & I2C_TIMEOUTR_TIMEOUTB) ;
bogdanm 0:9b334a45a8ff 1105
bogdanm 0:9b334a45a8ff 1106 /* Store the new register value */
bogdanm 0:9b334a45a8ff 1107 I2Cx->TIMEOUTR = tmpreg;
bogdanm 0:9b334a45a8ff 1108 }
bogdanm 0:9b334a45a8ff 1109
bogdanm 0:9b334a45a8ff 1110 /**
bogdanm 0:9b334a45a8ff 1111 * @brief Enables or disables I2C PEC calculation.
bogdanm 0:9b334a45a8ff 1112 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
bogdanm 0:9b334a45a8ff 1113 * @param NewState: new state of the I2Cx PEC calculation.
bogdanm 0:9b334a45a8ff 1114 * This parameter can be: ENABLE or DISABLE.
bogdanm 0:9b334a45a8ff 1115 * @retval None
bogdanm 0:9b334a45a8ff 1116 */
bogdanm 0:9b334a45a8ff 1117 void I2C_CalculatePEC(I2C_TypeDef* I2Cx, FunctionalState NewState)
bogdanm 0:9b334a45a8ff 1118 {
bogdanm 0:9b334a45a8ff 1119 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1120 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
bogdanm 0:9b334a45a8ff 1121 assert_param(IS_FUNCTIONAL_STATE(NewState));
bogdanm 0:9b334a45a8ff 1122
bogdanm 0:9b334a45a8ff 1123 if (NewState != DISABLE)
bogdanm 0:9b334a45a8ff 1124 {
bogdanm 0:9b334a45a8ff 1125 /* Enable PEC calculation */
bogdanm 0:9b334a45a8ff 1126 I2Cx->CR1 |= I2C_CR1_PECEN;
bogdanm 0:9b334a45a8ff 1127 }
bogdanm 0:9b334a45a8ff 1128 else
bogdanm 0:9b334a45a8ff 1129 {
bogdanm 0:9b334a45a8ff 1130 /* Disable PEC calculation */
bogdanm 0:9b334a45a8ff 1131 I2Cx->CR1 &= (uint32_t)~((uint32_t)I2C_CR1_PECEN);
bogdanm 0:9b334a45a8ff 1132 }
bogdanm 0:9b334a45a8ff 1133 }
bogdanm 0:9b334a45a8ff 1134
bogdanm 0:9b334a45a8ff 1135 /**
bogdanm 0:9b334a45a8ff 1136 * @brief Enables or disables I2C PEC transmission/reception request.
bogdanm 0:9b334a45a8ff 1137 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
bogdanm 0:9b334a45a8ff 1138 * @param NewState: new state of the I2Cx PEC request.
bogdanm 0:9b334a45a8ff 1139 * This parameter can be: ENABLE or DISABLE.
bogdanm 0:9b334a45a8ff 1140 * @retval None
bogdanm 0:9b334a45a8ff 1141 */
bogdanm 0:9b334a45a8ff 1142 void I2C_PECRequestCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
bogdanm 0:9b334a45a8ff 1143 {
bogdanm 0:9b334a45a8ff 1144 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1145 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
bogdanm 0:9b334a45a8ff 1146 assert_param(IS_FUNCTIONAL_STATE(NewState));
bogdanm 0:9b334a45a8ff 1147
bogdanm 0:9b334a45a8ff 1148 if (NewState != DISABLE)
bogdanm 0:9b334a45a8ff 1149 {
bogdanm 0:9b334a45a8ff 1150 /* Enable PEC transmission/reception request */
bogdanm 0:9b334a45a8ff 1151 I2Cx->CR1 |= I2C_CR2_PECBYTE;
bogdanm 0:9b334a45a8ff 1152 }
bogdanm 0:9b334a45a8ff 1153 else
bogdanm 0:9b334a45a8ff 1154 {
bogdanm 0:9b334a45a8ff 1155 /* Disable PEC transmission/reception request */
bogdanm 0:9b334a45a8ff 1156 I2Cx->CR1 &= (uint32_t)~((uint32_t)I2C_CR2_PECBYTE);
bogdanm 0:9b334a45a8ff 1157 }
bogdanm 0:9b334a45a8ff 1158 }
bogdanm 0:9b334a45a8ff 1159
bogdanm 0:9b334a45a8ff 1160 /**
bogdanm 0:9b334a45a8ff 1161 * @brief Returns the I2C PEC.
bogdanm 0:9b334a45a8ff 1162 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
bogdanm 0:9b334a45a8ff 1163 * @retval The value of the PEC .
bogdanm 0:9b334a45a8ff 1164 */
bogdanm 0:9b334a45a8ff 1165 uint8_t I2C_GetPEC(I2C_TypeDef* I2Cx)
bogdanm 0:9b334a45a8ff 1166 {
bogdanm 0:9b334a45a8ff 1167 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1168 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
bogdanm 0:9b334a45a8ff 1169
bogdanm 0:9b334a45a8ff 1170 /* Return the slave matched address in the SR1 register */
bogdanm 0:9b334a45a8ff 1171 return (uint8_t)((uint32_t)I2Cx->PECR & I2C_PECR_PEC);
bogdanm 0:9b334a45a8ff 1172 }
bogdanm 0:9b334a45a8ff 1173
bogdanm 0:9b334a45a8ff 1174 /**
bogdanm 0:9b334a45a8ff 1175 * @}
bogdanm 0:9b334a45a8ff 1176 */
bogdanm 0:9b334a45a8ff 1177
bogdanm 0:9b334a45a8ff 1178
bogdanm 0:9b334a45a8ff 1179 /** @defgroup I2C_Group4 I2C registers management functions
bogdanm 0:9b334a45a8ff 1180 * @brief I2C registers management functions
bogdanm 0:9b334a45a8ff 1181 *
bogdanm 0:9b334a45a8ff 1182 @verbatim
bogdanm 0:9b334a45a8ff 1183 ===============================================================================
bogdanm 0:9b334a45a8ff 1184 ##### I2C registers management functions #####
bogdanm 0:9b334a45a8ff 1185 ===============================================================================
bogdanm 0:9b334a45a8ff 1186 [..] This section provides a functions that allow user the management of
bogdanm 0:9b334a45a8ff 1187 I2C registers.
bogdanm 0:9b334a45a8ff 1188
bogdanm 0:9b334a45a8ff 1189 @endverbatim
bogdanm 0:9b334a45a8ff 1190 * @{
bogdanm 0:9b334a45a8ff 1191 */
bogdanm 0:9b334a45a8ff 1192
bogdanm 0:9b334a45a8ff 1193 /**
bogdanm 0:9b334a45a8ff 1194 * @brief Reads the specified I2C register and returns its value.
bogdanm 0:9b334a45a8ff 1195 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
bogdanm 0:9b334a45a8ff 1196 * @param I2C_Register: specifies the register to read.
bogdanm 0:9b334a45a8ff 1197 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 1198 * @arg I2C_Register_CR1: CR1 register.
bogdanm 0:9b334a45a8ff 1199 * @arg I2C_Register_CR2: CR2 register.
bogdanm 0:9b334a45a8ff 1200 * @arg I2C_Register_OAR1: OAR1 register.
bogdanm 0:9b334a45a8ff 1201 * @arg I2C_Register_OAR2: OAR2 register.
bogdanm 0:9b334a45a8ff 1202 * @arg I2C_Register_TIMINGR: TIMING register.
bogdanm 0:9b334a45a8ff 1203 * @arg I2C_Register_TIMEOUTR: TIMEOUTR register.
bogdanm 0:9b334a45a8ff 1204 * @arg I2C_Register_ISR: ISR register.
bogdanm 0:9b334a45a8ff 1205 * @arg I2C_Register_ICR: ICR register.
bogdanm 0:9b334a45a8ff 1206 * @arg I2C_Register_PECR: PECR register.
bogdanm 0:9b334a45a8ff 1207 * @arg I2C_Register_RXDR: RXDR register.
bogdanm 0:9b334a45a8ff 1208 * @arg I2C_Register_TXDR: TXDR register.
bogdanm 0:9b334a45a8ff 1209 * @retval The value of the read register.
bogdanm 0:9b334a45a8ff 1210 */
bogdanm 0:9b334a45a8ff 1211 uint32_t I2C_ReadRegister(I2C_TypeDef* I2Cx, uint8_t I2C_Register)
bogdanm 0:9b334a45a8ff 1212 {
bogdanm 0:9b334a45a8ff 1213 __IO uint32_t tmp = 0;
bogdanm 0:9b334a45a8ff 1214
bogdanm 0:9b334a45a8ff 1215 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1216 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
bogdanm 0:9b334a45a8ff 1217 assert_param(IS_I2C_REGISTER(I2C_Register));
bogdanm 0:9b334a45a8ff 1218
bogdanm 0:9b334a45a8ff 1219 tmp = (uint32_t)I2Cx;
bogdanm 0:9b334a45a8ff 1220 tmp += I2C_Register;
bogdanm 0:9b334a45a8ff 1221
bogdanm 0:9b334a45a8ff 1222 /* Return the selected register value */
bogdanm 0:9b334a45a8ff 1223 return (*(__IO uint32_t *) tmp);
bogdanm 0:9b334a45a8ff 1224 }
bogdanm 0:9b334a45a8ff 1225
bogdanm 0:9b334a45a8ff 1226 /**
bogdanm 0:9b334a45a8ff 1227 * @}
bogdanm 0:9b334a45a8ff 1228 */
bogdanm 0:9b334a45a8ff 1229
bogdanm 0:9b334a45a8ff 1230 /** @defgroup I2C_Group5 Data transfers management functions
bogdanm 0:9b334a45a8ff 1231 * @brief Data transfers management functions
bogdanm 0:9b334a45a8ff 1232 *
bogdanm 0:9b334a45a8ff 1233 @verbatim
bogdanm 0:9b334a45a8ff 1234 ===============================================================================
bogdanm 0:9b334a45a8ff 1235 ##### Data transfers management functions #####
bogdanm 0:9b334a45a8ff 1236 ===============================================================================
bogdanm 0:9b334a45a8ff 1237 [..] This subsection provides a set of functions allowing to manage
bogdanm 0:9b334a45a8ff 1238 the I2C data transfers.
bogdanm 0:9b334a45a8ff 1239
bogdanm 0:9b334a45a8ff 1240 [..] The read access of the I2C_RXDR register can be done using
bogdanm 0:9b334a45a8ff 1241 the I2C_ReceiveData() function and returns the received value.
bogdanm 0:9b334a45a8ff 1242 Whereas a write access to the I2C_TXDR can be done using I2C_SendData()
bogdanm 0:9b334a45a8ff 1243 function and stores the written data into TXDR.
bogdanm 0:9b334a45a8ff 1244 @endverbatim
bogdanm 0:9b334a45a8ff 1245 * @{
bogdanm 0:9b334a45a8ff 1246 */
bogdanm 0:9b334a45a8ff 1247
bogdanm 0:9b334a45a8ff 1248 /**
bogdanm 0:9b334a45a8ff 1249 * @brief Sends a data byte through the I2Cx peripheral.
bogdanm 0:9b334a45a8ff 1250 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
bogdanm 0:9b334a45a8ff 1251 * @param Data: Byte to be transmitted..
bogdanm 0:9b334a45a8ff 1252 * @retval None
bogdanm 0:9b334a45a8ff 1253 */
bogdanm 0:9b334a45a8ff 1254 void I2C_SendData(I2C_TypeDef* I2Cx, uint8_t Data)
bogdanm 0:9b334a45a8ff 1255 {
bogdanm 0:9b334a45a8ff 1256 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1257 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
bogdanm 0:9b334a45a8ff 1258
bogdanm 0:9b334a45a8ff 1259 /* Write in the DR register the data to be sent */
bogdanm 0:9b334a45a8ff 1260 I2Cx->TXDR = (uint8_t)Data;
bogdanm 0:9b334a45a8ff 1261 }
bogdanm 0:9b334a45a8ff 1262
bogdanm 0:9b334a45a8ff 1263 /**
bogdanm 0:9b334a45a8ff 1264 * @brief Returns the most recent received data by the I2Cx peripheral.
bogdanm 0:9b334a45a8ff 1265 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
bogdanm 0:9b334a45a8ff 1266 * @retval The value of the received data.
bogdanm 0:9b334a45a8ff 1267 */
bogdanm 0:9b334a45a8ff 1268 uint8_t I2C_ReceiveData(I2C_TypeDef* I2Cx)
bogdanm 0:9b334a45a8ff 1269 {
bogdanm 0:9b334a45a8ff 1270 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1271 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
bogdanm 0:9b334a45a8ff 1272
bogdanm 0:9b334a45a8ff 1273 /* Return the data in the DR register */
bogdanm 0:9b334a45a8ff 1274 return (uint8_t)I2Cx->RXDR;
bogdanm 0:9b334a45a8ff 1275 }
bogdanm 0:9b334a45a8ff 1276
bogdanm 0:9b334a45a8ff 1277 /**
bogdanm 0:9b334a45a8ff 1278 * @}
bogdanm 0:9b334a45a8ff 1279 */
bogdanm 0:9b334a45a8ff 1280
bogdanm 0:9b334a45a8ff 1281
bogdanm 0:9b334a45a8ff 1282 /** @defgroup I2C_Group6 DMA transfers management functions
bogdanm 0:9b334a45a8ff 1283 * @brief DMA transfers management functions
bogdanm 0:9b334a45a8ff 1284 *
bogdanm 0:9b334a45a8ff 1285 @verbatim
bogdanm 0:9b334a45a8ff 1286 ===============================================================================
bogdanm 0:9b334a45a8ff 1287 ##### DMA transfers management functions #####
bogdanm 0:9b334a45a8ff 1288 ===============================================================================
bogdanm 0:9b334a45a8ff 1289 [..] This section provides two functions that can be used only in DMA mode.
bogdanm 0:9b334a45a8ff 1290 [..] In DMA Mode, the I2C communication can be managed by 2 DMA Channel
bogdanm 0:9b334a45a8ff 1291 requests:
bogdanm 0:9b334a45a8ff 1292 (#) I2C_DMAReq_Tx: specifies the Tx buffer DMA transfer request.
bogdanm 0:9b334a45a8ff 1293 (#) I2C_DMAReq_Rx: specifies the Rx buffer DMA transfer request.
bogdanm 0:9b334a45a8ff 1294 [..] In this Mode it is advised to use the following function:
bogdanm 0:9b334a45a8ff 1295 (+) I2C_DMACmd(I2C_TypeDef* I2Cx, uint32_t I2C_DMAReq, FunctionalState NewState);
bogdanm 0:9b334a45a8ff 1296 @endverbatim
bogdanm 0:9b334a45a8ff 1297 * @{
bogdanm 0:9b334a45a8ff 1298 */
bogdanm 0:9b334a45a8ff 1299
bogdanm 0:9b334a45a8ff 1300 /**
bogdanm 0:9b334a45a8ff 1301 * @brief Enables or disables the I2C DMA interface.
bogdanm 0:9b334a45a8ff 1302 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
bogdanm 0:9b334a45a8ff 1303 * @param I2C_DMAReq: specifies the I2C DMA transfer request to be enabled or disabled.
bogdanm 0:9b334a45a8ff 1304 * This parameter can be any combination of the following values:
bogdanm 0:9b334a45a8ff 1305 * @arg I2C_DMAReq_Tx: Tx DMA transfer request
bogdanm 0:9b334a45a8ff 1306 * @arg I2C_DMAReq_Rx: Rx DMA transfer request
bogdanm 0:9b334a45a8ff 1307 * @param NewState: new state of the selected I2C DMA transfer request.
bogdanm 0:9b334a45a8ff 1308 * This parameter can be: ENABLE or DISABLE.
bogdanm 0:9b334a45a8ff 1309 * @retval None
bogdanm 0:9b334a45a8ff 1310 */
bogdanm 0:9b334a45a8ff 1311 void I2C_DMACmd(I2C_TypeDef* I2Cx, uint32_t I2C_DMAReq, FunctionalState NewState)
bogdanm 0:9b334a45a8ff 1312 {
bogdanm 0:9b334a45a8ff 1313 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1314 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
bogdanm 0:9b334a45a8ff 1315 assert_param(IS_FUNCTIONAL_STATE(NewState));
bogdanm 0:9b334a45a8ff 1316 assert_param(IS_I2C_DMA_REQ(I2C_DMAReq));
bogdanm 0:9b334a45a8ff 1317
bogdanm 0:9b334a45a8ff 1318 if (NewState != DISABLE)
bogdanm 0:9b334a45a8ff 1319 {
bogdanm 0:9b334a45a8ff 1320 /* Enable the selected I2C DMA requests */
bogdanm 0:9b334a45a8ff 1321 I2Cx->CR1 |= I2C_DMAReq;
bogdanm 0:9b334a45a8ff 1322 }
bogdanm 0:9b334a45a8ff 1323 else
bogdanm 0:9b334a45a8ff 1324 {
bogdanm 0:9b334a45a8ff 1325 /* Disable the selected I2C DMA requests */
bogdanm 0:9b334a45a8ff 1326 I2Cx->CR1 &= (uint32_t)~I2C_DMAReq;
bogdanm 0:9b334a45a8ff 1327 }
bogdanm 0:9b334a45a8ff 1328 }
bogdanm 0:9b334a45a8ff 1329 /**
bogdanm 0:9b334a45a8ff 1330 * @}
bogdanm 0:9b334a45a8ff 1331 */
bogdanm 0:9b334a45a8ff 1332
bogdanm 0:9b334a45a8ff 1333
bogdanm 0:9b334a45a8ff 1334 /** @defgroup I2C_Group7 Interrupts and flags management functions
bogdanm 0:9b334a45a8ff 1335 * @brief Interrupts and flags management functions
bogdanm 0:9b334a45a8ff 1336 *
bogdanm 0:9b334a45a8ff 1337 @verbatim
bogdanm 0:9b334a45a8ff 1338 ===============================================================================
bogdanm 0:9b334a45a8ff 1339 ##### Interrupts and flags management functions #####
bogdanm 0:9b334a45a8ff 1340 ===============================================================================
bogdanm 0:9b334a45a8ff 1341 [..] This section provides functions allowing to configure the I2C Interrupts
bogdanm 0:9b334a45a8ff 1342 sources and check or clear the flags or pending bits status.
bogdanm 0:9b334a45a8ff 1343 The user should identify which mode will be used in his application to manage
bogdanm 0:9b334a45a8ff 1344 the communication: Polling mode, Interrupt mode or DMA mode(refer I2C_Group6) .
bogdanm 0:9b334a45a8ff 1345
bogdanm 0:9b334a45a8ff 1346 *** Polling Mode ***
bogdanm 0:9b334a45a8ff 1347 ====================
bogdanm 0:9b334a45a8ff 1348 [..] In Polling Mode, the I2C communication can be managed by 15 flags:
bogdanm 0:9b334a45a8ff 1349 (#) I2C_FLAG_TXE: to indicate the status of Transmit data register empty flag.
bogdanm 0:9b334a45a8ff 1350 (#) I2C_FLAG_TXIS: to indicate the status of Transmit interrupt status flag .
bogdanm 0:9b334a45a8ff 1351 (#) I2C_FLAG_RXNE: to indicate the status of Receive data register not empty flag.
bogdanm 0:9b334a45a8ff 1352 (#) I2C_FLAG_ADDR: to indicate the status of Address matched flag (slave mode).
bogdanm 0:9b334a45a8ff 1353 (#) I2C_FLAG_NACKF: to indicate the status of NACK received flag.
bogdanm 0:9b334a45a8ff 1354 (#) I2C_FLAG_STOPF: to indicate the status of STOP detection flag.
bogdanm 0:9b334a45a8ff 1355 (#) I2C_FLAG_TC: to indicate the status of Transfer complete flag(master mode).
bogdanm 0:9b334a45a8ff 1356 (#) I2C_FLAG_TCR: to indicate the status of Transfer complete reload flag.
bogdanm 0:9b334a45a8ff 1357 (#) I2C_FLAG_BERR: to indicate the status of Bus error flag.
bogdanm 0:9b334a45a8ff 1358 (#) I2C_FLAG_ARLO: to indicate the status of Arbitration lost flag.
bogdanm 0:9b334a45a8ff 1359 (#) I2C_FLAG_OVR: to indicate the status of Overrun/Underrun flag.
bogdanm 0:9b334a45a8ff 1360 (#) I2C_FLAG_PECERR: to indicate the status of PEC error in reception flag.
bogdanm 0:9b334a45a8ff 1361 (#) I2C_FLAG_TIMEOUT: to indicate the status of Timeout or Tlow detection flag.
bogdanm 0:9b334a45a8ff 1362 (#) I2C_FLAG_ALERT: to indicate the status of SMBus Alert flag.
bogdanm 0:9b334a45a8ff 1363 (#) I2C_FLAG_BUSY: to indicate the status of Bus busy flag.
bogdanm 0:9b334a45a8ff 1364
bogdanm 0:9b334a45a8ff 1365 [..] In this Mode it is advised to use the following functions:
bogdanm 0:9b334a45a8ff 1366 (+) FlagStatus I2C_GetFlagStatus(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG);
bogdanm 0:9b334a45a8ff 1367 (+) void I2C_ClearFlag(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG);
bogdanm 0:9b334a45a8ff 1368
bogdanm 0:9b334a45a8ff 1369 [..]
bogdanm 0:9b334a45a8ff 1370 (@)Do not use the BUSY flag to handle each data transmission or reception.It is
bogdanm 0:9b334a45a8ff 1371 better to use the TXIS and RXNE flags instead.
bogdanm 0:9b334a45a8ff 1372
bogdanm 0:9b334a45a8ff 1373 *** Interrupt Mode ***
bogdanm 0:9b334a45a8ff 1374 ======================
bogdanm 0:9b334a45a8ff 1375 [..] In Interrupt Mode, the I2C communication can be managed by 7 interrupt sources
bogdanm 0:9b334a45a8ff 1376 and 15 pending bits:
bogdanm 0:9b334a45a8ff 1377 [..] Interrupt Source:
bogdanm 0:9b334a45a8ff 1378 (#) I2C_IT_ERRI: specifies the interrupt source for the Error interrupt.
bogdanm 0:9b334a45a8ff 1379 (#) I2C_IT_TCI: specifies the interrupt source for the Transfer Complete interrupt.
bogdanm 0:9b334a45a8ff 1380 (#) I2C_IT_STOPI: specifies the interrupt source for the Stop Detection interrupt.
bogdanm 0:9b334a45a8ff 1381 (#) I2C_IT_NACKI: specifies the interrupt source for the Not Acknowledge received interrupt.
bogdanm 0:9b334a45a8ff 1382 (#) I2C_IT_ADDRI: specifies the interrupt source for the Address Match interrupt.
bogdanm 0:9b334a45a8ff 1383 (#) I2C_IT_RXI: specifies the interrupt source for the RX interrupt.
bogdanm 0:9b334a45a8ff 1384 (#) I2C_IT_TXI: specifies the interrupt source for the TX interrupt.
bogdanm 0:9b334a45a8ff 1385
bogdanm 0:9b334a45a8ff 1386 [..] Pending Bits:
bogdanm 0:9b334a45a8ff 1387 (#) I2C_IT_TXIS: to indicate the status of Transmit interrupt status flag.
bogdanm 0:9b334a45a8ff 1388 (#) I2C_IT_RXNE: to indicate the status of Receive data register not empty flag.
bogdanm 0:9b334a45a8ff 1389 (#) I2C_IT_ADDR: to indicate the status of Address matched flag (slave mode).
bogdanm 0:9b334a45a8ff 1390 (#) I2C_IT_NACKF: to indicate the status of NACK received flag.
bogdanm 0:9b334a45a8ff 1391 (#) I2C_IT_STOPF: to indicate the status of STOP detection flag.
bogdanm 0:9b334a45a8ff 1392 (#) I2C_IT_TC: to indicate the status of Transfer complete flag (master mode).
bogdanm 0:9b334a45a8ff 1393 (#) I2C_IT_TCR: to indicate the status of Transfer complete reload flag.
bogdanm 0:9b334a45a8ff 1394 (#) I2C_IT_BERR: to indicate the status of Bus error flag.
bogdanm 0:9b334a45a8ff 1395 (#) I2C_IT_ARLO: to indicate the status of Arbitration lost flag.
bogdanm 0:9b334a45a8ff 1396 (#) I2C_IT_OVR: to indicate the status of Overrun/Underrun flag.
bogdanm 0:9b334a45a8ff 1397 (#) I2C_IT_PECERR: to indicate the status of PEC error in reception flag.
bogdanm 0:9b334a45a8ff 1398 (#) I2C_IT_TIMEOUT: to indicate the status of Timeout or Tlow detection flag.
bogdanm 0:9b334a45a8ff 1399 (#) I2C_IT_ALERT: to indicate the status of SMBus Alert flag.
bogdanm 0:9b334a45a8ff 1400
bogdanm 0:9b334a45a8ff 1401 [..] In this Mode it is advised to use the following functions:
bogdanm 0:9b334a45a8ff 1402 (+) void I2C_ClearITPendingBit(I2C_TypeDef* I2Cx, uint32_t I2C_IT);
bogdanm 0:9b334a45a8ff 1403 (+) ITStatus I2C_GetITStatus(I2C_TypeDef* I2Cx, uint32_t I2C_IT);
bogdanm 0:9b334a45a8ff 1404
bogdanm 0:9b334a45a8ff 1405 @endverbatim
bogdanm 0:9b334a45a8ff 1406 * @{
bogdanm 0:9b334a45a8ff 1407 */
bogdanm 0:9b334a45a8ff 1408
bogdanm 0:9b334a45a8ff 1409 /**
bogdanm 0:9b334a45a8ff 1410 * @brief Checks whether the specified I2C flag is set or not.
bogdanm 0:9b334a45a8ff 1411 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
bogdanm 0:9b334a45a8ff 1412 * @param I2C_FLAG: specifies the flag to check.
bogdanm 0:9b334a45a8ff 1413 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 1414 * @arg I2C_FLAG_TXE: Transmit data register empty
bogdanm 0:9b334a45a8ff 1415 * @arg I2C_FLAG_TXIS: Transmit interrupt status
bogdanm 0:9b334a45a8ff 1416 * @arg I2C_FLAG_RXNE: Receive data register not empty
bogdanm 0:9b334a45a8ff 1417 * @arg I2C_FLAG_ADDR: Address matched (slave mode)
bogdanm 0:9b334a45a8ff 1418 * @arg I2C_FLAG_NACKF: NACK received flag
bogdanm 0:9b334a45a8ff 1419 * @arg I2C_FLAG_STOPF: STOP detection flag
bogdanm 0:9b334a45a8ff 1420 * @arg I2C_FLAG_TC: Transfer complete (master mode)
bogdanm 0:9b334a45a8ff 1421 * @arg I2C_FLAG_TCR: Transfer complete reload
bogdanm 0:9b334a45a8ff 1422 * @arg I2C_FLAG_BERR: Bus error
bogdanm 0:9b334a45a8ff 1423 * @arg I2C_FLAG_ARLO: Arbitration lost
bogdanm 0:9b334a45a8ff 1424 * @arg I2C_FLAG_OVR: Overrun/Underrun
bogdanm 0:9b334a45a8ff 1425 * @arg I2C_FLAG_PECERR: PEC error in reception
bogdanm 0:9b334a45a8ff 1426 * @arg I2C_FLAG_TIMEOUT: Timeout or Tlow detection flag
bogdanm 0:9b334a45a8ff 1427 * @arg I2C_FLAG_ALERT: SMBus Alert
bogdanm 0:9b334a45a8ff 1428 * @arg I2C_FLAG_BUSY: Bus busy
bogdanm 0:9b334a45a8ff 1429 * @retval The new state of I2C_FLAG (SET or RESET).
bogdanm 0:9b334a45a8ff 1430 */
bogdanm 0:9b334a45a8ff 1431 FlagStatus I2C_GetFlagStatus(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG)
bogdanm 0:9b334a45a8ff 1432 {
bogdanm 0:9b334a45a8ff 1433 uint32_t tmpreg = 0;
bogdanm 0:9b334a45a8ff 1434 FlagStatus bitstatus = RESET;
bogdanm 0:9b334a45a8ff 1435
bogdanm 0:9b334a45a8ff 1436 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1437 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
bogdanm 0:9b334a45a8ff 1438 assert_param(IS_I2C_GET_FLAG(I2C_FLAG));
bogdanm 0:9b334a45a8ff 1439
bogdanm 0:9b334a45a8ff 1440 /* Get the ISR register value */
bogdanm 0:9b334a45a8ff 1441 tmpreg = I2Cx->ISR;
bogdanm 0:9b334a45a8ff 1442
bogdanm 0:9b334a45a8ff 1443 /* Get flag status */
bogdanm 0:9b334a45a8ff 1444 tmpreg &= I2C_FLAG;
bogdanm 0:9b334a45a8ff 1445
bogdanm 0:9b334a45a8ff 1446 if(tmpreg != 0)
bogdanm 0:9b334a45a8ff 1447 {
bogdanm 0:9b334a45a8ff 1448 /* I2C_FLAG is set */
bogdanm 0:9b334a45a8ff 1449 bitstatus = SET;
bogdanm 0:9b334a45a8ff 1450 }
bogdanm 0:9b334a45a8ff 1451 else
bogdanm 0:9b334a45a8ff 1452 {
bogdanm 0:9b334a45a8ff 1453 /* I2C_FLAG is reset */
bogdanm 0:9b334a45a8ff 1454 bitstatus = RESET;
bogdanm 0:9b334a45a8ff 1455 }
bogdanm 0:9b334a45a8ff 1456 return bitstatus;
bogdanm 0:9b334a45a8ff 1457 }
bogdanm 0:9b334a45a8ff 1458
bogdanm 0:9b334a45a8ff 1459 /**
bogdanm 0:9b334a45a8ff 1460 * @brief Clears the I2Cx's pending flags.
bogdanm 0:9b334a45a8ff 1461 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
bogdanm 0:9b334a45a8ff 1462 * @param I2C_FLAG: specifies the flag to clear.
bogdanm 0:9b334a45a8ff 1463 * This parameter can be any combination of the following values:
bogdanm 0:9b334a45a8ff 1464 * @arg I2C_FLAG_ADDR: Address matched (slave mode)
bogdanm 0:9b334a45a8ff 1465 * @arg I2C_FLAG_NACKF: NACK received flag
bogdanm 0:9b334a45a8ff 1466 * @arg I2C_FLAG_STOPF: STOP detection flag
bogdanm 0:9b334a45a8ff 1467 * @arg I2C_FLAG_BERR: Bus error
bogdanm 0:9b334a45a8ff 1468 * @arg I2C_FLAG_ARLO: Arbitration lost
bogdanm 0:9b334a45a8ff 1469 * @arg I2C_FLAG_OVR: Overrun/Underrun
bogdanm 0:9b334a45a8ff 1470 * @arg I2C_FLAG_PECERR: PEC error in reception
bogdanm 0:9b334a45a8ff 1471 * @arg I2C_FLAG_TIMEOUT: Timeout or Tlow detection flag
bogdanm 0:9b334a45a8ff 1472 * @arg I2C_FLAG_ALERT: SMBus Alert
bogdanm 0:9b334a45a8ff 1473 * @retval The new state of I2C_FLAG (SET or RESET).
bogdanm 0:9b334a45a8ff 1474 */
bogdanm 0:9b334a45a8ff 1475 void I2C_ClearFlag(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG)
bogdanm 0:9b334a45a8ff 1476 {
bogdanm 0:9b334a45a8ff 1477 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1478 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
bogdanm 0:9b334a45a8ff 1479 assert_param(IS_I2C_CLEAR_FLAG(I2C_FLAG));
bogdanm 0:9b334a45a8ff 1480
bogdanm 0:9b334a45a8ff 1481 /* Clear the selected flag */
bogdanm 0:9b334a45a8ff 1482 I2Cx->ICR = I2C_FLAG;
bogdanm 0:9b334a45a8ff 1483 }
bogdanm 0:9b334a45a8ff 1484
bogdanm 0:9b334a45a8ff 1485 /**
bogdanm 0:9b334a45a8ff 1486 * @brief Checks whether the specified I2C interrupt has occurred or not.
bogdanm 0:9b334a45a8ff 1487 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
bogdanm 0:9b334a45a8ff 1488 * @param I2C_IT: specifies the interrupt source to check.
bogdanm 0:9b334a45a8ff 1489 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 1490 * @arg I2C_IT_TXIS: Transmit interrupt status
bogdanm 0:9b334a45a8ff 1491 * @arg I2C_IT_RXNE: Receive data register not empty
bogdanm 0:9b334a45a8ff 1492 * @arg I2C_IT_ADDR: Address matched (slave mode)
bogdanm 0:9b334a45a8ff 1493 * @arg I2C_IT_NACKF: NACK received flag
bogdanm 0:9b334a45a8ff 1494 * @arg I2C_IT_STOPF: STOP detection flag
bogdanm 0:9b334a45a8ff 1495 * @arg I2C_IT_TC: Transfer complete (master mode)
bogdanm 0:9b334a45a8ff 1496 * @arg I2C_IT_TCR: Transfer complete reload
bogdanm 0:9b334a45a8ff 1497 * @arg I2C_IT_BERR: Bus error
bogdanm 0:9b334a45a8ff 1498 * @arg I2C_IT_ARLO: Arbitration lost
bogdanm 0:9b334a45a8ff 1499 * @arg I2C_IT_OVR: Overrun/Underrun
bogdanm 0:9b334a45a8ff 1500 * @arg I2C_IT_PECERR: PEC error in reception
bogdanm 0:9b334a45a8ff 1501 * @arg I2C_IT_TIMEOUT: Timeout or Tlow detection flag
bogdanm 0:9b334a45a8ff 1502 * @arg I2C_IT_ALERT: SMBus Alert
bogdanm 0:9b334a45a8ff 1503 * @retval The new state of I2C_IT (SET or RESET).
bogdanm 0:9b334a45a8ff 1504 */
bogdanm 0:9b334a45a8ff 1505 ITStatus I2C_GetITStatus(I2C_TypeDef* I2Cx, uint32_t I2C_IT)
bogdanm 0:9b334a45a8ff 1506 {
bogdanm 0:9b334a45a8ff 1507 uint32_t tmpreg = 0;
bogdanm 0:9b334a45a8ff 1508 ITStatus bitstatus = RESET;
bogdanm 0:9b334a45a8ff 1509 uint32_t enablestatus = 0;
bogdanm 0:9b334a45a8ff 1510
bogdanm 0:9b334a45a8ff 1511 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1512 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
bogdanm 0:9b334a45a8ff 1513 assert_param(IS_I2C_GET_IT(I2C_IT));
bogdanm 0:9b334a45a8ff 1514
bogdanm 0:9b334a45a8ff 1515 /* Check if the interrupt source is enabled or not */
bogdanm 0:9b334a45a8ff 1516 /* If Error interrupt */
bogdanm 0:9b334a45a8ff 1517 if((uint32_t)(I2C_IT & ERROR_IT_MASK))
bogdanm 0:9b334a45a8ff 1518 {
bogdanm 0:9b334a45a8ff 1519 enablestatus = (uint32_t)((I2C_CR1_ERRIE) & (I2Cx->CR1));
bogdanm 0:9b334a45a8ff 1520 }
bogdanm 0:9b334a45a8ff 1521 /* If TC interrupt */
bogdanm 0:9b334a45a8ff 1522 else if((uint32_t)(I2C_IT & TC_IT_MASK))
bogdanm 0:9b334a45a8ff 1523 {
bogdanm 0:9b334a45a8ff 1524 enablestatus = (uint32_t)((I2C_CR1_TCIE) & (I2Cx->CR1));
bogdanm 0:9b334a45a8ff 1525 }
bogdanm 0:9b334a45a8ff 1526 else
bogdanm 0:9b334a45a8ff 1527 {
bogdanm 0:9b334a45a8ff 1528 enablestatus = (uint32_t)((I2C_IT) & (I2Cx->CR1));
bogdanm 0:9b334a45a8ff 1529 }
bogdanm 0:9b334a45a8ff 1530
bogdanm 0:9b334a45a8ff 1531 /* Get the ISR register value */
bogdanm 0:9b334a45a8ff 1532 tmpreg = I2Cx->ISR;
bogdanm 0:9b334a45a8ff 1533
bogdanm 0:9b334a45a8ff 1534 /* Get flag status */
bogdanm 0:9b334a45a8ff 1535 tmpreg &= I2C_IT;
bogdanm 0:9b334a45a8ff 1536
bogdanm 0:9b334a45a8ff 1537 /* Check the status of the specified I2C flag */
bogdanm 0:9b334a45a8ff 1538 if((tmpreg != RESET) && enablestatus)
bogdanm 0:9b334a45a8ff 1539 {
bogdanm 0:9b334a45a8ff 1540 /* I2C_IT is set */
bogdanm 0:9b334a45a8ff 1541 bitstatus = SET;
bogdanm 0:9b334a45a8ff 1542 }
bogdanm 0:9b334a45a8ff 1543 else
bogdanm 0:9b334a45a8ff 1544 {
bogdanm 0:9b334a45a8ff 1545 /* I2C_IT is reset */
bogdanm 0:9b334a45a8ff 1546 bitstatus = RESET;
bogdanm 0:9b334a45a8ff 1547 }
bogdanm 0:9b334a45a8ff 1548
bogdanm 0:9b334a45a8ff 1549 /* Return the I2C_IT status */
bogdanm 0:9b334a45a8ff 1550 return bitstatus;
bogdanm 0:9b334a45a8ff 1551 }
bogdanm 0:9b334a45a8ff 1552
bogdanm 0:9b334a45a8ff 1553 /**
bogdanm 0:9b334a45a8ff 1554 * @brief Clears the I2Cx's interrupt pending bits.
bogdanm 0:9b334a45a8ff 1555 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
bogdanm 0:9b334a45a8ff 1556 * @param I2C_IT: specifies the interrupt pending bit to clear.
bogdanm 0:9b334a45a8ff 1557 * This parameter can be any combination of the following values:
bogdanm 0:9b334a45a8ff 1558 * @arg I2C_IT_ADDR: Address matched (slave mode)
bogdanm 0:9b334a45a8ff 1559 * @arg I2C_IT_NACKF: NACK received flag
bogdanm 0:9b334a45a8ff 1560 * @arg I2C_IT_STOPF: STOP detection flag
bogdanm 0:9b334a45a8ff 1561 * @arg I2C_IT_BERR: Bus error
bogdanm 0:9b334a45a8ff 1562 * @arg I2C_IT_ARLO: Arbitration lost
bogdanm 0:9b334a45a8ff 1563 * @arg I2C_IT_OVR: Overrun/Underrun
bogdanm 0:9b334a45a8ff 1564 * @arg I2C_IT_PECERR: PEC error in reception
bogdanm 0:9b334a45a8ff 1565 * @arg I2C_IT_TIMEOUT: Timeout or Tlow detection flag
bogdanm 0:9b334a45a8ff 1566 * @arg I2C_IT_ALERT: SMBus Alert
bogdanm 0:9b334a45a8ff 1567 * @retval The new state of I2C_IT (SET or RESET).
bogdanm 0:9b334a45a8ff 1568 */
bogdanm 0:9b334a45a8ff 1569 void I2C_ClearITPendingBit(I2C_TypeDef* I2Cx, uint32_t I2C_IT)
bogdanm 0:9b334a45a8ff 1570 {
bogdanm 0:9b334a45a8ff 1571 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1572 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
bogdanm 0:9b334a45a8ff 1573 assert_param(IS_I2C_CLEAR_IT(I2C_IT));
bogdanm 0:9b334a45a8ff 1574
bogdanm 0:9b334a45a8ff 1575 /* Clear the selected flag */
bogdanm 0:9b334a45a8ff 1576 I2Cx->ICR = I2C_IT;
bogdanm 0:9b334a45a8ff 1577 }
bogdanm 0:9b334a45a8ff 1578
bogdanm 0:9b334a45a8ff 1579 /**
bogdanm 0:9b334a45a8ff 1580 * @}
bogdanm 0:9b334a45a8ff 1581 */
bogdanm 0:9b334a45a8ff 1582
bogdanm 0:9b334a45a8ff 1583 /**
bogdanm 0:9b334a45a8ff 1584 * @}
bogdanm 0:9b334a45a8ff 1585 */
bogdanm 0:9b334a45a8ff 1586
bogdanm 0:9b334a45a8ff 1587 /**
bogdanm 0:9b334a45a8ff 1588 * @}
bogdanm 0:9b334a45a8ff 1589 */
bogdanm 0:9b334a45a8ff 1590
bogdanm 0:9b334a45a8ff 1591 /**
bogdanm 0:9b334a45a8ff 1592 * @}
bogdanm 0:9b334a45a8ff 1593 */
bogdanm 0:9b334a45a8ff 1594
bogdanm 0:9b334a45a8ff 1595 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/