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targets/cmsis/TARGET_STM/TARGET_STM32F3XX/stm32f30x_dac.c@0:9b334a45a8ff, 2015-10-01 (annotated)

Committer:
bogdanm
Date:
Thu Oct 01 15:25:22 2015 +0300
Revision:
0:9b334a45a8ff
Initial commit on mbed-dev



Replaces mbed-src (now inactive)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /**
bogdanm 0:9b334a45a8ff 2 ******************************************************************************
bogdanm 0:9b334a45a8ff 3 * @file stm32f30x_dac.c
bogdanm 0:9b334a45a8ff 4 * @author MCD Application Team
bogdanm 0:9b334a45a8ff 5 * @version V1.1.0
bogdanm 0:9b334a45a8ff 6 * @date 27-February-2014
bogdanm 0:9b334a45a8ff 7 * @brief This file provides firmware functions to manage the following
bogdanm 0:9b334a45a8ff 8 * functionalities of the Digital-to-Analog Converter (DAC) peripheral:
bogdanm 0:9b334a45a8ff 9 * + DAC channels configuration: trigger, output buffer, data format
bogdanm 0:9b334a45a8ff 10 * + DMA management
bogdanm 0:9b334a45a8ff 11 * + Interrupts and flags management
bogdanm 0:9b334a45a8ff 12 *
bogdanm 0:9b334a45a8ff 13 @verbatim
bogdanm 0:9b334a45a8ff 14
bogdanm 0:9b334a45a8ff 15 ===============================================================================
bogdanm 0:9b334a45a8ff 16 ##### DAC Peripheral features #####
bogdanm 0:9b334a45a8ff 17 ===============================================================================
bogdanm 0:9b334a45a8ff 18 [..] The device integrates two 12-bit Digital Analog Converters that can
bogdanm 0:9b334a45a8ff 19 be used independently or simultaneously (dual mode):
bogdanm 0:9b334a45a8ff 20 (#) DAC1 integrates two DAC channels:
bogdanm 0:9b334a45a8ff 21 (++) DAC1 channel 1 with DAC1_OUT1 as output
bogdanm 0:9b334a45a8ff 22 (++) DAC1 channel 2 with DAC1_OUT2 as output
bogdanm 0:9b334a45a8ff 23 (++) The two channels can be used independently or simultaneously (dual mode)
bogdanm 0:9b334a45a8ff 24
bogdanm 0:9b334a45a8ff 25 (#) DAC2 integrates only one channel DAC2 channel 1 with DAC2_OUT1 as output
bogdanm 0:9b334a45a8ff 26
bogdanm 0:9b334a45a8ff 27 [..] Digital to Analog conversion can be non-triggered using DAC_Trigger_None
bogdanm 0:9b334a45a8ff 28 and DAC_OUT1/DAC_OUT2 is available once writing to DHRx register using
bogdanm 0:9b334a45a8ff 29 DAC_SetChannel1Data()/DAC_SetChannel2Data.
bogdanm 0:9b334a45a8ff 30
bogdanm 0:9b334a45a8ff 31 [..] Digital to Analog conversion can be triggered by:
bogdanm 0:9b334a45a8ff 32 (#) External event: EXTI Line 9 (any GPIOx_Pin9) using DAC_Trigger_Ext_IT9.
bogdanm 0:9b334a45a8ff 33 The used pin (GPIOx_Pin9) must be configured in input mode.
bogdanm 0:9b334a45a8ff 34
bogdanm 0:9b334a45a8ff 35 (#) Timers TRGO: TIM2, TIM8/TIM3, TIM4, TIM6, TIM7, and TIM15
bogdanm 0:9b334a45a8ff 36 (DAC_Trigger_T2_TRGO, DAC_Trigger_T4_TRGO...)
bogdanm 0:9b334a45a8ff 37 The timer TRGO event should be selected using TIM_SelectOutputTrigger()
bogdanm 0:9b334a45a8ff 38 (++) To trigger DAC conversions by TIM3 instead of TIM8 follow
bogdanm 0:9b334a45a8ff 39 this sequence:
bogdanm 0:9b334a45a8ff 40 (+++) Enable SYSCFG APB clock by calling
bogdanm 0:9b334a45a8ff 41 RCC_APB2PeriphClockCmd(RCC_APB2Periph_SYSCFG, ENABLE);
bogdanm 0:9b334a45a8ff 42 (+++) Select DAC_Trigger_T3_TRGO when calling DAC_Init()
bogdanm 0:9b334a45a8ff 43 (+++) Remap the DAC trigger from TIM8 to TIM3 by calling
bogdanm 0:9b334a45a8ff 44 SYSCFG_TriggerRemapConfig(SYSCFG_TriggerRemap_DACTIM3, ENABLE)
bogdanm 0:9b334a45a8ff 45 (#) Software using DAC_Trigger_Software
bogdanm 0:9b334a45a8ff 46
bogdanm 0:9b334a45a8ff 47 [..] Each DAC channel integrates an output buffer that can be used to
bogdanm 0:9b334a45a8ff 48 reduce the output impedance, and to drive external loads directly
bogdanm 0:9b334a45a8ff 49 without having to add an external operational amplifier.
bogdanm 0:9b334a45a8ff 50 To enable, the output buffer use
bogdanm 0:9b334a45a8ff 51 DAC_InitStructure.DAC_OutputBuffer = DAC_OutputBuffer_Enable;
bogdanm 0:9b334a45a8ff 52
bogdanm 0:9b334a45a8ff 53 [..] Refer to the device datasheet for more details about output impedance
bogdanm 0:9b334a45a8ff 54 value with and without output buffer.
bogdanm 0:9b334a45a8ff 55
bogdanm 0:9b334a45a8ff 56 [..] Both DAC channels can be used to generate:
bogdanm 0:9b334a45a8ff 57 (+) Noise wave using DAC_WaveGeneration_Noise
bogdanm 0:9b334a45a8ff 58 (+) Triangle wave using DAC_WaveGeneration_Triangle
bogdanm 0:9b334a45a8ff 59
bogdanm 0:9b334a45a8ff 60 [..] Wave generation can be disabled using DAC_WaveGeneration_None
bogdanm 0:9b334a45a8ff 61
bogdanm 0:9b334a45a8ff 62 [..] The DAC data format can be:
bogdanm 0:9b334a45a8ff 63 (+) 8-bit right alignment using DAC_Align_8b_R
bogdanm 0:9b334a45a8ff 64 (+) 12-bit left alignment using DAC_Align_12b_L
bogdanm 0:9b334a45a8ff 65 (+) 12-bit right alignment using DAC_Align_12b_R
bogdanm 0:9b334a45a8ff 66
bogdanm 0:9b334a45a8ff 67 [..] The analog output voltage on each DAC channel pin is determined
bogdanm 0:9b334a45a8ff 68 by the following equation:
bogdanm 0:9b334a45a8ff 69 (+) DAC_OUTx = VREF+ * DOR / 4095 with DOR is the Data Output Register.
bogdanm 0:9b334a45a8ff 70 VREF+ is the input voltage reference (refer to the device datasheet)
bogdanm 0:9b334a45a8ff 71 e.g. To set DAC_OUT1 to 0.7V, use DAC_SetChannel1Data(DAC_Align_12b_R, 868);
bogdanm 0:9b334a45a8ff 72 Assuming that VREF+ = 3.3, DAC_OUT1 = (3.3 * 868) / 4095 = 0.7V
bogdanm 0:9b334a45a8ff 73
bogdanm 0:9b334a45a8ff 74 [..] A DMA1 request can be generated when an external trigger (but not
bogdanm 0:9b334a45a8ff 75 a software trigger) occurs if DMA1 requests are enabled using
bogdanm 0:9b334a45a8ff 76 DAC_DMACmd()
bogdanm 0:9b334a45a8ff 77 DMA1 requests are mapped as following:
bogdanm 0:9b334a45a8ff 78 (+) DAC channel1 is mapped on DMA1 channel3 which must be already
bogdanm 0:9b334a45a8ff 79 configured
bogdanm 0:9b334a45a8ff 80 (+) DAC channel2 is mapped on DMA1 channel4 which must be already
bogdanm 0:9b334a45a8ff 81 configured
bogdanm 0:9b334a45a8ff 82
bogdanm 0:9b334a45a8ff 83 ##### How to use this driver #####
bogdanm 0:9b334a45a8ff 84 ===============================================================================
bogdanm 0:9b334a45a8ff 85 [..]
bogdanm 0:9b334a45a8ff 86 (+) Enable DAC APB1 clock to get write access to DAC registers
bogdanm 0:9b334a45a8ff 87 using RCC_APB1PeriphClockCmd(RCC_APB1Periph_DAC, ENABLE)
bogdanm 0:9b334a45a8ff 88
bogdanm 0:9b334a45a8ff 89 (+) Configure DACx_OUTy (DAC1_OUT1: PA4, DAC1_OUT2: PA5, DAC2_OUT1: PA6)
bogdanm 0:9b334a45a8ff 90 in analog mode.
bogdanm 0:9b334a45a8ff 91
bogdanm 0:9b334a45a8ff 92 (+) Configure the DAC channel using DAC_Init()
bogdanm 0:9b334a45a8ff 93
bogdanm 0:9b334a45a8ff 94 (+) Enable the DAC channel using DAC_Cmd()
bogdanm 0:9b334a45a8ff 95
bogdanm 0:9b334a45a8ff 96 @endverbatim
bogdanm 0:9b334a45a8ff 97
bogdanm 0:9b334a45a8ff 98 ******************************************************************************
bogdanm 0:9b334a45a8ff 99 * @attention
bogdanm 0:9b334a45a8ff 100 *
bogdanm 0:9b334a45a8ff 101 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
bogdanm 0:9b334a45a8ff 102 *
bogdanm 0:9b334a45a8ff 103 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 0:9b334a45a8ff 104 * are permitted provided that the following conditions are met:
bogdanm 0:9b334a45a8ff 105 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 0:9b334a45a8ff 106 * this list of conditions and the following disclaimer.
bogdanm 0:9b334a45a8ff 107 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 0:9b334a45a8ff 108 * this list of conditions and the following disclaimer in the documentation
bogdanm 0:9b334a45a8ff 109 * and/or other materials provided with the distribution.
bogdanm 0:9b334a45a8ff 110 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 0:9b334a45a8ff 111 * may be used to endorse or promote products derived from this software
bogdanm 0:9b334a45a8ff 112 * without specific prior written permission.
bogdanm 0:9b334a45a8ff 113 *
bogdanm 0:9b334a45a8ff 114 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 0:9b334a45a8ff 115 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 0:9b334a45a8ff 116 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 0:9b334a45a8ff 117 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 0:9b334a45a8ff 118 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 0:9b334a45a8ff 119 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 0:9b334a45a8ff 120 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 0:9b334a45a8ff 121 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 0:9b334a45a8ff 122 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 0:9b334a45a8ff 123 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 0:9b334a45a8ff 124 *
bogdanm 0:9b334a45a8ff 125 ******************************************************************************
bogdanm 0:9b334a45a8ff 126 */
bogdanm 0:9b334a45a8ff 127
bogdanm 0:9b334a45a8ff 128
bogdanm 0:9b334a45a8ff 129 /* Includes ------------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 130 #include "stm32f30x_dac.h"
bogdanm 0:9b334a45a8ff 131 #include "stm32f30x_rcc.h"
bogdanm 0:9b334a45a8ff 132
bogdanm 0:9b334a45a8ff 133 /** @addtogroup STM32F30x_StdPeriph_Driver
bogdanm 0:9b334a45a8ff 134 * @{
bogdanm 0:9b334a45a8ff 135 */
bogdanm 0:9b334a45a8ff 136
bogdanm 0:9b334a45a8ff 137 /** @defgroup DAC
bogdanm 0:9b334a45a8ff 138 * @brief DAC driver modules
bogdanm 0:9b334a45a8ff 139 * @{
bogdanm 0:9b334a45a8ff 140 */
bogdanm 0:9b334a45a8ff 141
bogdanm 0:9b334a45a8ff 142 /* Private typedef -----------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 143 /* Private define ------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 144
bogdanm 0:9b334a45a8ff 145 /* CR register Mask */
bogdanm 0:9b334a45a8ff 146 #define CR_CLEAR_MASK ((uint32_t)0x00000FFE)
bogdanm 0:9b334a45a8ff 147
bogdanm 0:9b334a45a8ff 148 /* DAC Dual Channels SWTRIG masks */
bogdanm 0:9b334a45a8ff 149 #define DUAL_SWTRIG_SET ((uint32_t)0x00000003)
bogdanm 0:9b334a45a8ff 150 #define DUAL_SWTRIG_RESET ((uint32_t)0xFFFFFFFC)
bogdanm 0:9b334a45a8ff 151
bogdanm 0:9b334a45a8ff 152 /* DHR registers offsets */
bogdanm 0:9b334a45a8ff 153 #define DHR12R1_OFFSET ((uint32_t)0x00000008)
bogdanm 0:9b334a45a8ff 154 #define DHR12R2_OFFSET ((uint32_t)0x00000014)
bogdanm 0:9b334a45a8ff 155 #define DHR12RD_OFFSET ((uint32_t)0x00000020)
bogdanm 0:9b334a45a8ff 156
bogdanm 0:9b334a45a8ff 157 /* DOR register offset */
bogdanm 0:9b334a45a8ff 158 #define DOR_OFFSET ((uint32_t)0x0000002C)
bogdanm 0:9b334a45a8ff 159
bogdanm 0:9b334a45a8ff 160 /* Private macro -------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 161 /* Private variables ---------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 162 /* Private function prototypes -----------------------------------------------*/
bogdanm 0:9b334a45a8ff 163 /* Private functions ---------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 164
bogdanm 0:9b334a45a8ff 165 /** @defgroup DAC_Private_Functions
bogdanm 0:9b334a45a8ff 166 * @{
bogdanm 0:9b334a45a8ff 167 */
bogdanm 0:9b334a45a8ff 168
bogdanm 0:9b334a45a8ff 169 /** @defgroup DAC_Group1 DAC channels configuration
bogdanm 0:9b334a45a8ff 170 * @brief DAC channels configuration: trigger, output buffer, data format
bogdanm 0:9b334a45a8ff 171 *
bogdanm 0:9b334a45a8ff 172 @verbatim
bogdanm 0:9b334a45a8ff 173 ===============================================================================
bogdanm 0:9b334a45a8ff 174 ##### DAC channels configuration: trigger, output buffer, data format #####
bogdanm 0:9b334a45a8ff 175 ===============================================================================
bogdanm 0:9b334a45a8ff 176
bogdanm 0:9b334a45a8ff 177 @endverbatim
bogdanm 0:9b334a45a8ff 178 * @{
bogdanm 0:9b334a45a8ff 179 */
bogdanm 0:9b334a45a8ff 180
bogdanm 0:9b334a45a8ff 181 /**
bogdanm 0:9b334a45a8ff 182 * @brief Deinitializes the DAC peripheral registers to their default reset values.
bogdanm 0:9b334a45a8ff 183 * @param DACx: where x can be 1 or 2 to select the DAC peripheral.
bogdanm 0:9b334a45a8ff 184 * @retval None
bogdanm 0:9b334a45a8ff 185 */
bogdanm 0:9b334a45a8ff 186 void DAC_DeInit(DAC_TypeDef* DACx)
bogdanm 0:9b334a45a8ff 187 {
bogdanm 0:9b334a45a8ff 188 /* Check the parameters */
bogdanm 0:9b334a45a8ff 189 assert_param(IS_DAC_ALL_PERIPH(DACx));
bogdanm 0:9b334a45a8ff 190
bogdanm 0:9b334a45a8ff 191 if (DACx == DAC1)
bogdanm 0:9b334a45a8ff 192 {
bogdanm 0:9b334a45a8ff 193 /* Enable DAC1 reset state */
bogdanm 0:9b334a45a8ff 194 RCC_APB1PeriphResetCmd(RCC_APB1Periph_DAC1, ENABLE);
bogdanm 0:9b334a45a8ff 195 /* Release DAC1 from reset state */
bogdanm 0:9b334a45a8ff 196 RCC_APB1PeriphResetCmd(RCC_APB1Periph_DAC1, DISABLE);
bogdanm 0:9b334a45a8ff 197 }
bogdanm 0:9b334a45a8ff 198 else
bogdanm 0:9b334a45a8ff 199 {
bogdanm 0:9b334a45a8ff 200 /* Enable DAC2 reset state */
bogdanm 0:9b334a45a8ff 201 RCC_APB1PeriphResetCmd(RCC_APB1Periph_DAC2, ENABLE);
bogdanm 0:9b334a45a8ff 202 /* Release DAC2 from reset state */
bogdanm 0:9b334a45a8ff 203 RCC_APB1PeriphResetCmd(RCC_APB1Periph_DAC2, DISABLE);
bogdanm 0:9b334a45a8ff 204 }
bogdanm 0:9b334a45a8ff 205 }
bogdanm 0:9b334a45a8ff 206
bogdanm 0:9b334a45a8ff 207 /**
bogdanm 0:9b334a45a8ff 208 * @brief Initializes the DAC peripheral according to the specified
bogdanm 0:9b334a45a8ff 209 * parameters in the DAC_InitStruct.
bogdanm 0:9b334a45a8ff 210 * @param DACx: where x can be 1 or 2 to select the DAC peripheral.
bogdanm 0:9b334a45a8ff 211 * @param DAC_Channel: the selected DAC channel.
bogdanm 0:9b334a45a8ff 212 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 213 * @arg DAC_Channel_1: DAC Channel1 selected
bogdanm 0:9b334a45a8ff 214 * @arg DAC_Channel_2: DAC Channel2 selected
bogdanm 0:9b334a45a8ff 215 * @param DAC_InitStruct: pointer to a DAC_InitTypeDef structure that
bogdanm 0:9b334a45a8ff 216 * contains the configuration information for the specified DAC channel.
bogdanm 0:9b334a45a8ff 217 * @retval None
bogdanm 0:9b334a45a8ff 218 */
bogdanm 0:9b334a45a8ff 219 void DAC_Init(DAC_TypeDef* DACx, uint32_t DAC_Channel, DAC_InitTypeDef* DAC_InitStruct)
bogdanm 0:9b334a45a8ff 220 {
bogdanm 0:9b334a45a8ff 221 uint32_t tmpreg1 = 0, tmpreg2 = 0;
bogdanm 0:9b334a45a8ff 222
bogdanm 0:9b334a45a8ff 223 /* Check the DAC parameters */
bogdanm 0:9b334a45a8ff 224 assert_param(IS_DAC_ALL_PERIPH(DACx));
bogdanm 0:9b334a45a8ff 225 assert_param(IS_DAC_TRIGGER(DAC_InitStruct->DAC_Trigger));
bogdanm 0:9b334a45a8ff 226 assert_param(IS_DAC_GENERATE_WAVE(DAC_InitStruct->DAC_WaveGeneration));
bogdanm 0:9b334a45a8ff 227 assert_param(IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(DAC_InitStruct->DAC_LFSRUnmask_TriangleAmplitude));
bogdanm 0:9b334a45a8ff 228 assert_param(IS_DAC_BUFFER_SWITCH_STATE(DAC_InitStruct->DAC_Buffer_Switch));
bogdanm 0:9b334a45a8ff 229
bogdanm 0:9b334a45a8ff 230 /*---------------------------- DAC CR Configuration --------------------------*/
bogdanm 0:9b334a45a8ff 231 /* Get the DAC CR value */
bogdanm 0:9b334a45a8ff 232 tmpreg1 = DACx->CR;
bogdanm 0:9b334a45a8ff 233 /* Clear BOFFx, TENx, TSELx, WAVEx and MAMPx bits */
bogdanm 0:9b334a45a8ff 234 tmpreg1 &= ~(CR_CLEAR_MASK << DAC_Channel);
bogdanm 0:9b334a45a8ff 235 /* Configure for the selected DAC channel: buffer output, trigger, wave generation,
bogdanm 0:9b334a45a8ff 236 mask/amplitude for wave generation */
bogdanm 0:9b334a45a8ff 237
bogdanm 0:9b334a45a8ff 238 /* Set TSELx and TENx bits according to DAC_Trigger value */
bogdanm 0:9b334a45a8ff 239 /* Set WAVEx bits according to DAC_WaveGeneration value */
bogdanm 0:9b334a45a8ff 240 /* Set MAMPx bits according to DAC_LFSRUnmask_TriangleAmplitude value */
bogdanm 0:9b334a45a8ff 241 /* Set BOFFx OUTENx bit according to DAC_Buffer_Switch value */
bogdanm 0:9b334a45a8ff 242 tmpreg2 = (DAC_InitStruct->DAC_Trigger | DAC_InitStruct->DAC_WaveGeneration |
bogdanm 0:9b334a45a8ff 243 DAC_InitStruct->DAC_LFSRUnmask_TriangleAmplitude | DAC_InitStruct->DAC_Buffer_Switch);
bogdanm 0:9b334a45a8ff 244
bogdanm 0:9b334a45a8ff 245 /* Calculate CR register value depending on DAC_Channel */
bogdanm 0:9b334a45a8ff 246 tmpreg1 |= tmpreg2 << DAC_Channel;
bogdanm 0:9b334a45a8ff 247 /* Write to DAC CR */
bogdanm 0:9b334a45a8ff 248 DACx->CR = tmpreg1;
bogdanm 0:9b334a45a8ff 249 }
bogdanm 0:9b334a45a8ff 250
bogdanm 0:9b334a45a8ff 251 /**
bogdanm 0:9b334a45a8ff 252 * @brief Fills each DAC_InitStruct member with its default value.
bogdanm 0:9b334a45a8ff 253 * @param DAC_InitStruct: pointer to a DAC_InitTypeDef structure which will
bogdanm 0:9b334a45a8ff 254 * be initialized.
bogdanm 0:9b334a45a8ff 255 * @retval None
bogdanm 0:9b334a45a8ff 256 */
bogdanm 0:9b334a45a8ff 257 void DAC_StructInit(DAC_InitTypeDef* DAC_InitStruct)
bogdanm 0:9b334a45a8ff 258 {
bogdanm 0:9b334a45a8ff 259 /*--------------- Reset DAC init structure parameters values -----------------*/
bogdanm 0:9b334a45a8ff 260 /* Initialize the DAC_Trigger member */
bogdanm 0:9b334a45a8ff 261 DAC_InitStruct->DAC_Trigger = DAC_Trigger_None;
bogdanm 0:9b334a45a8ff 262 /* Initialize the DAC_WaveGeneration member */
bogdanm 0:9b334a45a8ff 263 DAC_InitStruct->DAC_WaveGeneration = DAC_WaveGeneration_None;
bogdanm 0:9b334a45a8ff 264 /* Initialize the DAC_LFSRUnmask_TriangleAmplitude member */
bogdanm 0:9b334a45a8ff 265 DAC_InitStruct->DAC_LFSRUnmask_TriangleAmplitude = DAC_LFSRUnmask_Bit0;
bogdanm 0:9b334a45a8ff 266 /* Initialize the DAC_Buffer_Switch member */
bogdanm 0:9b334a45a8ff 267 DAC_InitStruct->DAC_Buffer_Switch = DAC_BufferSwitch_Enable;
bogdanm 0:9b334a45a8ff 268 }
bogdanm 0:9b334a45a8ff 269
bogdanm 0:9b334a45a8ff 270 /**
bogdanm 0:9b334a45a8ff 271 * @brief Enables or disables the specified DAC channel.
bogdanm 0:9b334a45a8ff 272 * @param DACx: where x can be 1 or 2 to select the DAC peripheral.
bogdanm 0:9b334a45a8ff 273 * @param DAC_Channel: The selected DAC channel.
bogdanm 0:9b334a45a8ff 274 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 275 * @arg DAC_Channel_1: DAC Channel1 selected
bogdanm 0:9b334a45a8ff 276 * @arg DAC_Channel_2: DAC Channel2 selected
bogdanm 0:9b334a45a8ff 277 * @param NewState: new state of the DAC channel.
bogdanm 0:9b334a45a8ff 278 * This parameter can be: ENABLE or DISABLE.
bogdanm 0:9b334a45a8ff 279 * @note When the DAC channel is enabled the trigger source can no more
bogdanm 0:9b334a45a8ff 280 * be modified.
bogdanm 0:9b334a45a8ff 281 * @retval None
bogdanm 0:9b334a45a8ff 282 */
bogdanm 0:9b334a45a8ff 283 void DAC_Cmd(DAC_TypeDef* DACx, uint32_t DAC_Channel, FunctionalState NewState)
bogdanm 0:9b334a45a8ff 284 {
bogdanm 0:9b334a45a8ff 285 /* Check the parameters */
bogdanm 0:9b334a45a8ff 286 assert_param(IS_DAC_ALL_PERIPH(DACx));
bogdanm 0:9b334a45a8ff 287 assert_param(IS_DAC_CHANNEL(DAC_Channel));
bogdanm 0:9b334a45a8ff 288 assert_param(IS_FUNCTIONAL_STATE(NewState));
bogdanm 0:9b334a45a8ff 289
bogdanm 0:9b334a45a8ff 290 if (NewState != DISABLE)
bogdanm 0:9b334a45a8ff 291 {
bogdanm 0:9b334a45a8ff 292 /* Enable the selected DAC channel */
bogdanm 0:9b334a45a8ff 293 DACx->CR |= (DAC_CR_EN1 << DAC_Channel);
bogdanm 0:9b334a45a8ff 294 }
bogdanm 0:9b334a45a8ff 295 else
bogdanm 0:9b334a45a8ff 296 {
bogdanm 0:9b334a45a8ff 297 /* Disable the selected DAC channel */
bogdanm 0:9b334a45a8ff 298 DACx->CR &= (~(DAC_CR_EN1 << DAC_Channel));
bogdanm 0:9b334a45a8ff 299 }
bogdanm 0:9b334a45a8ff 300 }
bogdanm 0:9b334a45a8ff 301
bogdanm 0:9b334a45a8ff 302 /**
bogdanm 0:9b334a45a8ff 303 * @brief Enables or disables the selected DAC channel software trigger.
bogdanm 0:9b334a45a8ff 304 * @param DACx: where x can be 1 or 2 to select the DAC peripheral.
bogdanm 0:9b334a45a8ff 305 * @param DAC_Channel: the selected DAC channel.
bogdanm 0:9b334a45a8ff 306 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 307 * @arg DAC_Channel_1: DAC Channel1 selected
bogdanm 0:9b334a45a8ff 308 * @arg DAC_Channel_2: DAC Channel2 selected
bogdanm 0:9b334a45a8ff 309 * @param NewState: new state of the selected DAC channel software trigger.
bogdanm 0:9b334a45a8ff 310 * This parameter can be: ENABLE or DISABLE.
bogdanm 0:9b334a45a8ff 311 * @retval None
bogdanm 0:9b334a45a8ff 312 */
bogdanm 0:9b334a45a8ff 313 void DAC_SoftwareTriggerCmd(DAC_TypeDef* DACx, uint32_t DAC_Channel, FunctionalState NewState)
bogdanm 0:9b334a45a8ff 314 {
bogdanm 0:9b334a45a8ff 315 /* Check the parameters */
bogdanm 0:9b334a45a8ff 316 assert_param(IS_DAC_ALL_PERIPH(DACx));
bogdanm 0:9b334a45a8ff 317 assert_param(IS_DAC_CHANNEL(DAC_Channel));
bogdanm 0:9b334a45a8ff 318 assert_param(IS_FUNCTIONAL_STATE(NewState));
bogdanm 0:9b334a45a8ff 319
bogdanm 0:9b334a45a8ff 320 if (NewState != DISABLE)
bogdanm 0:9b334a45a8ff 321 {
bogdanm 0:9b334a45a8ff 322 /* Enable software trigger for the selected DAC channel */
bogdanm 0:9b334a45a8ff 323 DACx->SWTRIGR |= (uint32_t)DAC_SWTRIGR_SWTRIG1 << (DAC_Channel >> 4);
bogdanm 0:9b334a45a8ff 324 }
bogdanm 0:9b334a45a8ff 325 else
bogdanm 0:9b334a45a8ff 326 {
bogdanm 0:9b334a45a8ff 327 /* Disable software trigger for the selected DAC channel */
bogdanm 0:9b334a45a8ff 328 DACx->SWTRIGR &= ~((uint32_t)DAC_SWTRIGR_SWTRIG1 << (DAC_Channel >> 4));
bogdanm 0:9b334a45a8ff 329 }
bogdanm 0:9b334a45a8ff 330 }
bogdanm 0:9b334a45a8ff 331
bogdanm 0:9b334a45a8ff 332 /**
bogdanm 0:9b334a45a8ff 333 * @brief Enables or disables simultaneously the two DAC channels software
bogdanm 0:9b334a45a8ff 334 * triggers.
bogdanm 0:9b334a45a8ff 335 * @param DACx: where x can be 1 to select the DAC1 peripheral.
bogdanm 0:9b334a45a8ff 336 * @note Dual trigger is not applicable for DAC2 (DAC2 integrates one channel).
bogdanm 0:9b334a45a8ff 337 * @param NewState: new state of the DAC channels software triggers.
bogdanm 0:9b334a45a8ff 338 * This parameter can be: ENABLE or DISABLE.
bogdanm 0:9b334a45a8ff 339 * @retval None
bogdanm 0:9b334a45a8ff 340 */
bogdanm 0:9b334a45a8ff 341 void DAC_DualSoftwareTriggerCmd(DAC_TypeDef* DACx, FunctionalState NewState)
bogdanm 0:9b334a45a8ff 342 {
bogdanm 0:9b334a45a8ff 343 /* Check the parameters */
bogdanm 0:9b334a45a8ff 344 assert_param(IS_DAC_LIST1_PERIPH(DACx));
bogdanm 0:9b334a45a8ff 345 assert_param(IS_FUNCTIONAL_STATE(NewState));
bogdanm 0:9b334a45a8ff 346
bogdanm 0:9b334a45a8ff 347 if (NewState != DISABLE)
bogdanm 0:9b334a45a8ff 348 {
bogdanm 0:9b334a45a8ff 349 /* Enable software trigger for both DAC channels */
bogdanm 0:9b334a45a8ff 350 DACx->SWTRIGR |= DUAL_SWTRIG_SET;
bogdanm 0:9b334a45a8ff 351 }
bogdanm 0:9b334a45a8ff 352 else
bogdanm 0:9b334a45a8ff 353 {
bogdanm 0:9b334a45a8ff 354 /* Disable software trigger for both DAC channels */
bogdanm 0:9b334a45a8ff 355 DACx->SWTRIGR &= DUAL_SWTRIG_RESET;
bogdanm 0:9b334a45a8ff 356 }
bogdanm 0:9b334a45a8ff 357 }
bogdanm 0:9b334a45a8ff 358
bogdanm 0:9b334a45a8ff 359 /**
bogdanm 0:9b334a45a8ff 360 * @brief Enables or disables the selected DAC channel wave generation.
bogdanm 0:9b334a45a8ff 361 * @param DACx: where x can be 1 to select the DAC1 peripheral.
bogdanm 0:9b334a45a8ff 362 * @note Wave generation is not available in DAC2.
bogdanm 0:9b334a45a8ff 363 * @param DAC_Channel: the selected DAC channel.
bogdanm 0:9b334a45a8ff 364 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 365 * @arg DAC_Channel_1: DAC Channel1 selected
bogdanm 0:9b334a45a8ff 366 * @arg DAC_Channel_2: DAC Channel2 selected
bogdanm 0:9b334a45a8ff 367 * @param DAC_Wave: Specifies the wave type to enable or disable.
bogdanm 0:9b334a45a8ff 368 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 369 * @arg DAC_Wave_Noise: noise wave generation
bogdanm 0:9b334a45a8ff 370 * @arg DAC_Wave_Triangle: triangle wave generation
bogdanm 0:9b334a45a8ff 371 * @param NewState: new state of the selected DAC channel wave generation.
bogdanm 0:9b334a45a8ff 372 * This parameter can be: ENABLE or DISABLE.
bogdanm 0:9b334a45a8ff 373 * @note
bogdanm 0:9b334a45a8ff 374 * @retval None
bogdanm 0:9b334a45a8ff 375 */
bogdanm 0:9b334a45a8ff 376 void DAC_WaveGenerationCmd(DAC_TypeDef* DACx, uint32_t DAC_Channel, uint32_t DAC_Wave, FunctionalState NewState)
bogdanm 0:9b334a45a8ff 377 {
bogdanm 0:9b334a45a8ff 378 /* Check the parameters */
bogdanm 0:9b334a45a8ff 379 assert_param(IS_DAC_LIST1_PERIPH(DACx));
bogdanm 0:9b334a45a8ff 380 assert_param(IS_DAC_CHANNEL(DAC_Channel));
bogdanm 0:9b334a45a8ff 381 assert_param(IS_DAC_WAVE(DAC_Wave));
bogdanm 0:9b334a45a8ff 382 assert_param(IS_FUNCTIONAL_STATE(NewState));
bogdanm 0:9b334a45a8ff 383
bogdanm 0:9b334a45a8ff 384 if (NewState != DISABLE)
bogdanm 0:9b334a45a8ff 385 {
bogdanm 0:9b334a45a8ff 386 /* Enable the selected wave generation for the selected DAC channel */
bogdanm 0:9b334a45a8ff 387 DACx->CR |= DAC_Wave << DAC_Channel;
bogdanm 0:9b334a45a8ff 388 }
bogdanm 0:9b334a45a8ff 389 else
bogdanm 0:9b334a45a8ff 390 {
bogdanm 0:9b334a45a8ff 391 /* Disable the selected wave generation for the selected DAC channel */
bogdanm 0:9b334a45a8ff 392 DACx->CR &= ~(DAC_Wave << DAC_Channel);
bogdanm 0:9b334a45a8ff 393 }
bogdanm 0:9b334a45a8ff 394 }
bogdanm 0:9b334a45a8ff 395
bogdanm 0:9b334a45a8ff 396 /**
bogdanm 0:9b334a45a8ff 397 * @brief Set the specified data holding register value for DAC channel1.
bogdanm 0:9b334a45a8ff 398 * @param DACx: where x can be 1 or 2 to select the DAC peripheral.
bogdanm 0:9b334a45a8ff 399 * @param DAC_Align: Specifies the data alignment for DAC channel1.
bogdanm 0:9b334a45a8ff 400 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 401 * @arg DAC_Align_8b_R: 8bit right data alignment selected
bogdanm 0:9b334a45a8ff 402 * @arg DAC_Align_12b_L: 12bit left data alignment selected
bogdanm 0:9b334a45a8ff 403 * @arg DAC_Align_12b_R: 12bit right data alignment selected
bogdanm 0:9b334a45a8ff 404 * @param Data: Data to be loaded in the selected data holding register.
bogdanm 0:9b334a45a8ff 405 * @retval None
bogdanm 0:9b334a45a8ff 406 */
bogdanm 0:9b334a45a8ff 407 void DAC_SetChannel1Data(DAC_TypeDef* DACx, uint32_t DAC_Align, uint16_t Data)
bogdanm 0:9b334a45a8ff 408 {
bogdanm 0:9b334a45a8ff 409 __IO uint32_t tmp = 0;
bogdanm 0:9b334a45a8ff 410
bogdanm 0:9b334a45a8ff 411 /* Check the parameters */
bogdanm 0:9b334a45a8ff 412 assert_param(IS_DAC_ALL_PERIPH(DACx));
bogdanm 0:9b334a45a8ff 413 assert_param(IS_DAC_ALIGN(DAC_Align));
bogdanm 0:9b334a45a8ff 414 assert_param(IS_DAC_DATA(Data));
bogdanm 0:9b334a45a8ff 415
bogdanm 0:9b334a45a8ff 416 tmp = (uint32_t)DACx;
bogdanm 0:9b334a45a8ff 417 tmp += DHR12R1_OFFSET + DAC_Align;
bogdanm 0:9b334a45a8ff 418
bogdanm 0:9b334a45a8ff 419 /* Set the DAC channel1 selected data holding register */
bogdanm 0:9b334a45a8ff 420 *(__IO uint32_t *) tmp = Data;
bogdanm 0:9b334a45a8ff 421 }
bogdanm 0:9b334a45a8ff 422
bogdanm 0:9b334a45a8ff 423 /**
bogdanm 0:9b334a45a8ff 424 * @brief Set the specified data holding register value for DAC channel2.
bogdanm 0:9b334a45a8ff 425 * @param DACx: where x can be 1 to select the DAC peripheral.
bogdanm 0:9b334a45a8ff 426 * @note This function is available only for DAC1.
bogdanm 0:9b334a45a8ff 427 * @param DAC_Align: Specifies the data alignment for DAC channel2.
bogdanm 0:9b334a45a8ff 428 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 429 * @arg DAC_Align_8b_R: 8bit right data alignment selected
bogdanm 0:9b334a45a8ff 430 * @arg DAC_Align_12b_L: 12bit left data alignment selected
bogdanm 0:9b334a45a8ff 431 * @arg DAC_Align_12b_R: 12bit right data alignment selected
bogdanm 0:9b334a45a8ff 432 * @param Data : Data to be loaded in the selected data holding register.
bogdanm 0:9b334a45a8ff 433 * @retval None
bogdanm 0:9b334a45a8ff 434 */
bogdanm 0:9b334a45a8ff 435 void DAC_SetChannel2Data(DAC_TypeDef* DACx, uint32_t DAC_Align, uint16_t Data)
bogdanm 0:9b334a45a8ff 436 {
bogdanm 0:9b334a45a8ff 437 __IO uint32_t tmp = 0;
bogdanm 0:9b334a45a8ff 438
bogdanm 0:9b334a45a8ff 439 /* Check the parameters */
bogdanm 0:9b334a45a8ff 440 assert_param(IS_DAC_LIST1_PERIPH(DACx));
bogdanm 0:9b334a45a8ff 441 assert_param(IS_DAC_ALIGN(DAC_Align));
bogdanm 0:9b334a45a8ff 442 assert_param(IS_DAC_DATA(Data));
bogdanm 0:9b334a45a8ff 443
bogdanm 0:9b334a45a8ff 444 tmp = (uint32_t)DACx;
bogdanm 0:9b334a45a8ff 445 tmp += DHR12R2_OFFSET + DAC_Align;
bogdanm 0:9b334a45a8ff 446
bogdanm 0:9b334a45a8ff 447 /* Set the DAC channel2 selected data holding register */
bogdanm 0:9b334a45a8ff 448 *(__IO uint32_t *)tmp = Data;
bogdanm 0:9b334a45a8ff 449 }
bogdanm 0:9b334a45a8ff 450
bogdanm 0:9b334a45a8ff 451 /**
bogdanm 0:9b334a45a8ff 452 * @brief Set the specified data holding register value for dual channel DAC.
bogdanm 0:9b334a45a8ff 453 * @param DACx: where x can be 1 to select the DAC peripheral.
bogdanm 0:9b334a45a8ff 454 * @note This function isn't applicable for DAC2.
bogdanm 0:9b334a45a8ff 455 * @param DAC_Align: Specifies the data alignment for dual channel DAC.
bogdanm 0:9b334a45a8ff 456 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 457 * @arg DAC_Align_8b_R: 8bit right data alignment selected
bogdanm 0:9b334a45a8ff 458 * @arg DAC_Align_12b_L: 12bit left data alignment selected
bogdanm 0:9b334a45a8ff 459 * @arg DAC_Align_12b_R: 12bit right data alignment selected
bogdanm 0:9b334a45a8ff 460 * @param Data2: Data for DAC Channel2 to be loaded in the selected data
bogdanm 0:9b334a45a8ff 461 * holding register.
bogdanm 0:9b334a45a8ff 462 * @param Data1: Data for DAC Channel1 to be loaded in the selected data
bogdanm 0:9b334a45a8ff 463 * holding register.
bogdanm 0:9b334a45a8ff 464 * @note In dual mode, a unique register access is required to write in both
bogdanm 0:9b334a45a8ff 465 * DAC channels at the same time.
bogdanm 0:9b334a45a8ff 466 * @retval None
bogdanm 0:9b334a45a8ff 467 */
bogdanm 0:9b334a45a8ff 468 void DAC_SetDualChannelData(DAC_TypeDef* DACx, uint32_t DAC_Align, uint16_t Data2, uint16_t Data1)
bogdanm 0:9b334a45a8ff 469 {
bogdanm 0:9b334a45a8ff 470 uint32_t data = 0, tmp = 0;
bogdanm 0:9b334a45a8ff 471
bogdanm 0:9b334a45a8ff 472 /* Check the parameters */
bogdanm 0:9b334a45a8ff 473 assert_param(IS_DAC_LIST1_PERIPH(DACx));
bogdanm 0:9b334a45a8ff 474 assert_param(IS_DAC_ALIGN(DAC_Align));
bogdanm 0:9b334a45a8ff 475 assert_param(IS_DAC_DATA(Data1));
bogdanm 0:9b334a45a8ff 476 assert_param(IS_DAC_DATA(Data2));
bogdanm 0:9b334a45a8ff 477
bogdanm 0:9b334a45a8ff 478 /* Calculate and set dual DAC data holding register value */
bogdanm 0:9b334a45a8ff 479 if (DAC_Align == DAC_Align_8b_R)
bogdanm 0:9b334a45a8ff 480 {
bogdanm 0:9b334a45a8ff 481 data = ((uint32_t)Data2 << 8) | Data1;
bogdanm 0:9b334a45a8ff 482 }
bogdanm 0:9b334a45a8ff 483 else
bogdanm 0:9b334a45a8ff 484 {
bogdanm 0:9b334a45a8ff 485 data = ((uint32_t)Data2 << 16) | Data1;
bogdanm 0:9b334a45a8ff 486 }
bogdanm 0:9b334a45a8ff 487
bogdanm 0:9b334a45a8ff 488 tmp = (uint32_t)DACx;
bogdanm 0:9b334a45a8ff 489 tmp += DHR12RD_OFFSET + DAC_Align;
bogdanm 0:9b334a45a8ff 490
bogdanm 0:9b334a45a8ff 491 /* Set the dual DAC selected data holding register */
bogdanm 0:9b334a45a8ff 492 *(__IO uint32_t *)tmp = data;
bogdanm 0:9b334a45a8ff 493 }
bogdanm 0:9b334a45a8ff 494
bogdanm 0:9b334a45a8ff 495 /**
bogdanm 0:9b334a45a8ff 496 * @brief Returns the last data output value of the selected DAC channel.
bogdanm 0:9b334a45a8ff 497 * @param DACx: where x can be 1 or 2 to select the DAC peripheral.
bogdanm 0:9b334a45a8ff 498 * @param DAC_Channel: the selected DAC channel.
bogdanm 0:9b334a45a8ff 499 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 500 * @arg DAC_Channel_1: DAC Channel1 selected
bogdanm 0:9b334a45a8ff 501 * @arg DAC_Channel_2: DAC Channel2 selected
bogdanm 0:9b334a45a8ff 502 * @retval The selected DAC channel data output value.
bogdanm 0:9b334a45a8ff 503 */
bogdanm 0:9b334a45a8ff 504 uint16_t DAC_GetDataOutputValue(DAC_TypeDef* DACx, uint32_t DAC_Channel)
bogdanm 0:9b334a45a8ff 505 {
bogdanm 0:9b334a45a8ff 506 __IO uint32_t tmp = 0;
bogdanm 0:9b334a45a8ff 507
bogdanm 0:9b334a45a8ff 508 /* Check the parameters */
bogdanm 0:9b334a45a8ff 509 assert_param(IS_DAC_ALL_PERIPH(DACx));
bogdanm 0:9b334a45a8ff 510 assert_param(IS_DAC_CHANNEL(DAC_Channel));
bogdanm 0:9b334a45a8ff 511
bogdanm 0:9b334a45a8ff 512 tmp = (uint32_t) DACx;
bogdanm 0:9b334a45a8ff 513 tmp += DOR_OFFSET + ((uint32_t)DAC_Channel >> 2);
bogdanm 0:9b334a45a8ff 514
bogdanm 0:9b334a45a8ff 515 /* Returns the DAC channel data output register value */
bogdanm 0:9b334a45a8ff 516 return (uint16_t) (*(__IO uint32_t*) tmp);
bogdanm 0:9b334a45a8ff 517 }
bogdanm 0:9b334a45a8ff 518
bogdanm 0:9b334a45a8ff 519 /**
bogdanm 0:9b334a45a8ff 520 * @}
bogdanm 0:9b334a45a8ff 521 */
bogdanm 0:9b334a45a8ff 522
bogdanm 0:9b334a45a8ff 523 /** @defgroup DAC_Group2 DMA management functions
bogdanm 0:9b334a45a8ff 524 * @brief DMA management functions
bogdanm 0:9b334a45a8ff 525 *
bogdanm 0:9b334a45a8ff 526 @verbatim
bogdanm 0:9b334a45a8ff 527 ===============================================================================
bogdanm 0:9b334a45a8ff 528 ##### DMA management functions #####
bogdanm 0:9b334a45a8ff 529 ===============================================================================
bogdanm 0:9b334a45a8ff 530
bogdanm 0:9b334a45a8ff 531 @endverbatim
bogdanm 0:9b334a45a8ff 532 * @{
bogdanm 0:9b334a45a8ff 533 */
bogdanm 0:9b334a45a8ff 534
bogdanm 0:9b334a45a8ff 535 /**
bogdanm 0:9b334a45a8ff 536 * @brief Enables or disables the specified DAC channel DMA request.
bogdanm 0:9b334a45a8ff 537 * When enabled DMA1 is generated when an external trigger (EXTI Line9,
bogdanm 0:9b334a45a8ff 538 * TIM2, TIM4, TIM6, TIM7 or TIM9 but not a software trigger) occurs
bogdanm 0:9b334a45a8ff 539 * @param DACx: where x can be 1 or 2 to select the DAC peripheral.
bogdanm 0:9b334a45a8ff 540 * @param DAC_Channel: the selected DAC channel.
bogdanm 0:9b334a45a8ff 541 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 542 * @arg DAC_Channel_1: DAC Channel1 selected
bogdanm 0:9b334a45a8ff 543 * @arg DAC_Channel_2: DAC Channel2 selected
bogdanm 0:9b334a45a8ff 544 * @param NewState: new state of the selected DAC channel DMA request.
bogdanm 0:9b334a45a8ff 545 * This parameter can be: ENABLE or DISABLE.
bogdanm 0:9b334a45a8ff 546 * @note The DAC channel1 (channel2) is mapped on DMA1 channel3 (channel4) which
bogdanm 0:9b334a45a8ff 547 * must be already configured.
bogdanm 0:9b334a45a8ff 548 * @retval None
bogdanm 0:9b334a45a8ff 549 */
bogdanm 0:9b334a45a8ff 550 void DAC_DMACmd(DAC_TypeDef* DACx, uint32_t DAC_Channel, FunctionalState NewState)
bogdanm 0:9b334a45a8ff 551 {
bogdanm 0:9b334a45a8ff 552 /* Check the parameters */
bogdanm 0:9b334a45a8ff 553 assert_param(IS_DAC_ALL_PERIPH(DACx));
bogdanm 0:9b334a45a8ff 554 assert_param(IS_DAC_CHANNEL(DAC_Channel));
bogdanm 0:9b334a45a8ff 555 assert_param(IS_FUNCTIONAL_STATE(NewState));
bogdanm 0:9b334a45a8ff 556
bogdanm 0:9b334a45a8ff 557 if (NewState != DISABLE)
bogdanm 0:9b334a45a8ff 558 {
bogdanm 0:9b334a45a8ff 559 /* Enable the selected DAC channel DMA request */
bogdanm 0:9b334a45a8ff 560 DACx->CR |= (DAC_CR_DMAEN1 << DAC_Channel);
bogdanm 0:9b334a45a8ff 561 }
bogdanm 0:9b334a45a8ff 562 else
bogdanm 0:9b334a45a8ff 563 {
bogdanm 0:9b334a45a8ff 564 /* Disable the selected DAC channel DMA request */
bogdanm 0:9b334a45a8ff 565 DACx->CR &= (~(DAC_CR_DMAEN1 << DAC_Channel));
bogdanm 0:9b334a45a8ff 566 }
bogdanm 0:9b334a45a8ff 567 }
bogdanm 0:9b334a45a8ff 568
bogdanm 0:9b334a45a8ff 569 /**
bogdanm 0:9b334a45a8ff 570 * @}
bogdanm 0:9b334a45a8ff 571 */
bogdanm 0:9b334a45a8ff 572
bogdanm 0:9b334a45a8ff 573 /** @defgroup DAC_Group3 Interrupts and flags management functions
bogdanm 0:9b334a45a8ff 574 * @brief Interrupts and flags management functions
bogdanm 0:9b334a45a8ff 575 *
bogdanm 0:9b334a45a8ff 576 @verbatim
bogdanm 0:9b334a45a8ff 577 ===============================================================================
bogdanm 0:9b334a45a8ff 578 ##### Interrupts and flags management functions #####
bogdanm 0:9b334a45a8ff 579 ===============================================================================
bogdanm 0:9b334a45a8ff 580
bogdanm 0:9b334a45a8ff 581 @endverbatim
bogdanm 0:9b334a45a8ff 582 * @{
bogdanm 0:9b334a45a8ff 583 */
bogdanm 0:9b334a45a8ff 584
bogdanm 0:9b334a45a8ff 585 /**
bogdanm 0:9b334a45a8ff 586 * @brief Enables or disables the specified DAC interrupts.
bogdanm 0:9b334a45a8ff 587 * @param DACx: where x can be 1 or 2 to select the DAC peripheral.
bogdanm 0:9b334a45a8ff 588 * @param DAC_Channel: the selected DAC channel.
bogdanm 0:9b334a45a8ff 589 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 590 * @arg DAC_Channel_1: DAC Channel1 selected
bogdanm 0:9b334a45a8ff 591 * @arg DAC_Channel_2: DAC Channel2 selected
bogdanm 0:9b334a45a8ff 592 * @param DAC_IT: specifies the DAC interrupt sources to be enabled or disabled.
bogdanm 0:9b334a45a8ff 593 * This parameter can be:
bogdanm 0:9b334a45a8ff 594 * @arg DAC_IT_DMAUDR: DMA underrun interrupt mask
bogdanm 0:9b334a45a8ff 595 * @note The DMA underrun occurs when a second external trigger arrives before
bogdanm 0:9b334a45a8ff 596 * the acknowledgement for the first external trigger is received (first request).
bogdanm 0:9b334a45a8ff 597 * @param NewState: new state of the specified DAC interrupts.
bogdanm 0:9b334a45a8ff 598 * This parameter can be: ENABLE or DISABLE.
bogdanm 0:9b334a45a8ff 599 * @retval None
bogdanm 0:9b334a45a8ff 600 */
bogdanm 0:9b334a45a8ff 601 void DAC_ITConfig(DAC_TypeDef* DACx, uint32_t DAC_Channel, uint32_t DAC_IT, FunctionalState NewState)
bogdanm 0:9b334a45a8ff 602 {
bogdanm 0:9b334a45a8ff 603 /* Check the parameters */
bogdanm 0:9b334a45a8ff 604 assert_param(IS_DAC_ALL_PERIPH(DACx));
bogdanm 0:9b334a45a8ff 605 assert_param(IS_DAC_CHANNEL(DAC_Channel));
bogdanm 0:9b334a45a8ff 606 assert_param(IS_FUNCTIONAL_STATE(NewState));
bogdanm 0:9b334a45a8ff 607 assert_param(IS_DAC_IT(DAC_IT));
bogdanm 0:9b334a45a8ff 608
bogdanm 0:9b334a45a8ff 609 if (NewState != DISABLE)
bogdanm 0:9b334a45a8ff 610 {
bogdanm 0:9b334a45a8ff 611 /* Enable the selected DAC interrupts */
bogdanm 0:9b334a45a8ff 612 DACx->CR |= (DAC_IT << DAC_Channel);
bogdanm 0:9b334a45a8ff 613 }
bogdanm 0:9b334a45a8ff 614 else
bogdanm 0:9b334a45a8ff 615 {
bogdanm 0:9b334a45a8ff 616 /* Disable the selected DAC interrupts */
bogdanm 0:9b334a45a8ff 617 DACx->CR &= (~(uint32_t)(DAC_IT << DAC_Channel));
bogdanm 0:9b334a45a8ff 618 }
bogdanm 0:9b334a45a8ff 619 }
bogdanm 0:9b334a45a8ff 620
bogdanm 0:9b334a45a8ff 621 /**
bogdanm 0:9b334a45a8ff 622 * @brief Checks whether the specified DAC flag is set or not.
bogdanm 0:9b334a45a8ff 623 * @param DACx: where x can be 1 or 2 to select the DAC peripheral.
bogdanm 0:9b334a45a8ff 624 * @param DAC_Channel: thee selected DAC channel.
bogdanm 0:9b334a45a8ff 625 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 626 * @arg DAC_Channel_1: DAC Channel1 selected
bogdanm 0:9b334a45a8ff 627 * @arg DAC_Channel_2: DAC Channel2 selected
bogdanm 0:9b334a45a8ff 628 * @param DAC_FLAG: specifies the flag to check.
bogdanm 0:9b334a45a8ff 629 * This parameter can be:
bogdanm 0:9b334a45a8ff 630 * @arg DAC_FLAG_DMAUDR: DMA underrun flag
bogdanm 0:9b334a45a8ff 631 * @note The DMA underrun occurs when a second external trigger arrives before
bogdanm 0:9b334a45a8ff 632 * the acknowledgement for the first external trigger is received (first request).
bogdanm 0:9b334a45a8ff 633 * @retval The new state of DAC_FLAG (SET or RESET).
bogdanm 0:9b334a45a8ff 634 */
bogdanm 0:9b334a45a8ff 635 FlagStatus DAC_GetFlagStatus(DAC_TypeDef* DACx, uint32_t DAC_Channel, uint32_t DAC_FLAG)
bogdanm 0:9b334a45a8ff 636 {
bogdanm 0:9b334a45a8ff 637 FlagStatus bitstatus = RESET;
bogdanm 0:9b334a45a8ff 638
bogdanm 0:9b334a45a8ff 639 /* Check the parameters */
bogdanm 0:9b334a45a8ff 640 assert_param(IS_DAC_ALL_PERIPH(DACx));
bogdanm 0:9b334a45a8ff 641 assert_param(IS_DAC_CHANNEL(DAC_Channel));
bogdanm 0:9b334a45a8ff 642 assert_param(IS_DAC_FLAG(DAC_FLAG));
bogdanm 0:9b334a45a8ff 643
bogdanm 0:9b334a45a8ff 644 /* Check the status of the specified DAC flag */
bogdanm 0:9b334a45a8ff 645 if ((DACx->SR & (DAC_FLAG << DAC_Channel)) != (uint8_t)RESET)
bogdanm 0:9b334a45a8ff 646 {
bogdanm 0:9b334a45a8ff 647 /* DAC_FLAG is set */
bogdanm 0:9b334a45a8ff 648 bitstatus = SET;
bogdanm 0:9b334a45a8ff 649 }
bogdanm 0:9b334a45a8ff 650 else
bogdanm 0:9b334a45a8ff 651 {
bogdanm 0:9b334a45a8ff 652 /* DAC_FLAG is reset */
bogdanm 0:9b334a45a8ff 653 bitstatus = RESET;
bogdanm 0:9b334a45a8ff 654 }
bogdanm 0:9b334a45a8ff 655 /* Return the DAC_FLAG status */
bogdanm 0:9b334a45a8ff 656 return bitstatus;
bogdanm 0:9b334a45a8ff 657 }
bogdanm 0:9b334a45a8ff 658
bogdanm 0:9b334a45a8ff 659 /**
bogdanm 0:9b334a45a8ff 660 * @brief Clears the DAC channel's pending flags.
bogdanm 0:9b334a45a8ff 661 * @param DACx: where x can be 1 or 2 to select the DAC peripheral.
bogdanm 0:9b334a45a8ff 662 * @param DAC_Channel: the selected DAC channel.
bogdanm 0:9b334a45a8ff 663 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 664 * @arg DAC_Channel_1: DAC Channel1 selected
bogdanm 0:9b334a45a8ff 665 * @arg DAC_Channel_2: DAC Channel2 selected
bogdanm 0:9b334a45a8ff 666 * @param DAC_FLAG: specifies the flag to clear.
bogdanm 0:9b334a45a8ff 667 * This parameter can be:
bogdanm 0:9b334a45a8ff 668 * @arg DAC_FLAG_DMAUDR: DMA underrun flag
bogdanm 0:9b334a45a8ff 669 * @retval None
bogdanm 0:9b334a45a8ff 670 */
bogdanm 0:9b334a45a8ff 671 void DAC_ClearFlag(DAC_TypeDef* DACx, uint32_t DAC_Channel, uint32_t DAC_FLAG)
bogdanm 0:9b334a45a8ff 672 {
bogdanm 0:9b334a45a8ff 673 /* Check the parameters */
bogdanm 0:9b334a45a8ff 674 assert_param(IS_DAC_ALL_PERIPH(DACx));
bogdanm 0:9b334a45a8ff 675 assert_param(IS_DAC_CHANNEL(DAC_Channel));
bogdanm 0:9b334a45a8ff 676 assert_param(IS_DAC_FLAG(DAC_FLAG));
bogdanm 0:9b334a45a8ff 677
bogdanm 0:9b334a45a8ff 678 /* Clear the selected DAC flags */
bogdanm 0:9b334a45a8ff 679 DACx->SR = (DAC_FLAG << DAC_Channel);
bogdanm 0:9b334a45a8ff 680 }
bogdanm 0:9b334a45a8ff 681
bogdanm 0:9b334a45a8ff 682 /**
bogdanm 0:9b334a45a8ff 683 * @brief Checks whether the specified DAC interrupt has occurred or not.
bogdanm 0:9b334a45a8ff 684 * @param DACx: where x can be 1 or 2 to select the DAC peripheral.
bogdanm 0:9b334a45a8ff 685 * @param DAC_Channel: the selected DAC channel.
bogdanm 0:9b334a45a8ff 686 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 687 * @arg DAC_Channel_1: DAC Channel1 selected
bogdanm 0:9b334a45a8ff 688 * @arg DAC_Channel_2: DAC Channel2 selected
bogdanm 0:9b334a45a8ff 689 * @param DAC_IT: specifies the DAC interrupt source to check.
bogdanm 0:9b334a45a8ff 690 * This parameter can be:
bogdanm 0:9b334a45a8ff 691 * @arg DAC_IT_DMAUDR: DMA underrun interrupt mask
bogdanm 0:9b334a45a8ff 692 * @note The DMA underrun occurs when a second external trigger arrives before
bogdanm 0:9b334a45a8ff 693 * the acknowledgement for the first external trigger is received (first request).
bogdanm 0:9b334a45a8ff 694 * @retval The new state of DAC_IT (SET or RESET).
bogdanm 0:9b334a45a8ff 695 */
bogdanm 0:9b334a45a8ff 696 ITStatus DAC_GetITStatus(DAC_TypeDef* DACx, uint32_t DAC_Channel, uint32_t DAC_IT)
bogdanm 0:9b334a45a8ff 697 {
bogdanm 0:9b334a45a8ff 698 ITStatus bitstatus = RESET;
bogdanm 0:9b334a45a8ff 699 uint32_t enablestatus = 0;
bogdanm 0:9b334a45a8ff 700
bogdanm 0:9b334a45a8ff 701 /* Check the parameters */
bogdanm 0:9b334a45a8ff 702 assert_param(IS_DAC_ALL_PERIPH(DACx));
bogdanm 0:9b334a45a8ff 703 assert_param(IS_DAC_CHANNEL(DAC_Channel));
bogdanm 0:9b334a45a8ff 704 assert_param(IS_DAC_IT(DAC_IT));
bogdanm 0:9b334a45a8ff 705
bogdanm 0:9b334a45a8ff 706 /* Get the DAC_IT enable bit status */
bogdanm 0:9b334a45a8ff 707 enablestatus = (DACx->CR & (DAC_IT << DAC_Channel)) ;
bogdanm 0:9b334a45a8ff 708
bogdanm 0:9b334a45a8ff 709 /* Check the status of the specified DAC interrupt */
bogdanm 0:9b334a45a8ff 710 if (((DACx->SR & (DAC_IT << DAC_Channel)) != (uint32_t)RESET) && enablestatus)
bogdanm 0:9b334a45a8ff 711 {
bogdanm 0:9b334a45a8ff 712 /* DAC_IT is set */
bogdanm 0:9b334a45a8ff 713 bitstatus = SET;
bogdanm 0:9b334a45a8ff 714 }
bogdanm 0:9b334a45a8ff 715 else
bogdanm 0:9b334a45a8ff 716 {
bogdanm 0:9b334a45a8ff 717 /* DAC_IT is reset */
bogdanm 0:9b334a45a8ff 718 bitstatus = RESET;
bogdanm 0:9b334a45a8ff 719 }
bogdanm 0:9b334a45a8ff 720 /* Return the DAC_IT status */
bogdanm 0:9b334a45a8ff 721 return bitstatus;
bogdanm 0:9b334a45a8ff 722 }
bogdanm 0:9b334a45a8ff 723
bogdanm 0:9b334a45a8ff 724 /**
bogdanm 0:9b334a45a8ff 725 * @brief Clears the DAC channel's interrupt pending bits.
bogdanm 0:9b334a45a8ff 726 * @param DACx: where x can be 1 or 2 to select the DAC peripheral.
bogdanm 0:9b334a45a8ff 727 * @param DAC_Channel: the selected DAC channel.
bogdanm 0:9b334a45a8ff 728 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 729 * @arg DAC_Channel_1: DAC Channel1 selected
bogdanm 0:9b334a45a8ff 730 * @arg DAC_Channel_2: DAC Channel2 selected
bogdanm 0:9b334a45a8ff 731 * @param DAC_IT: specifies the DAC interrupt pending bit to clear.
bogdanm 0:9b334a45a8ff 732 * This parameter can be the following values:
bogdanm 0:9b334a45a8ff 733 * @arg DAC_IT_DMAUDR: DMA underrun interrupt mask
bogdanm 0:9b334a45a8ff 734 * @retval None
bogdanm 0:9b334a45a8ff 735 */
bogdanm 0:9b334a45a8ff 736 void DAC_ClearITPendingBit(DAC_TypeDef* DACx, uint32_t DAC_Channel, uint32_t DAC_IT)
bogdanm 0:9b334a45a8ff 737 {
bogdanm 0:9b334a45a8ff 738 /* Check the parameters */
bogdanm 0:9b334a45a8ff 739 assert_param(IS_DAC_ALL_PERIPH(DACx));
bogdanm 0:9b334a45a8ff 740 assert_param(IS_DAC_CHANNEL(DAC_Channel));
bogdanm 0:9b334a45a8ff 741 assert_param(IS_DAC_IT(DAC_IT));
bogdanm 0:9b334a45a8ff 742
bogdanm 0:9b334a45a8ff 743 /* Clear the selected DAC interrupt pending bits */
bogdanm 0:9b334a45a8ff 744 DACx->SR = (DAC_IT << DAC_Channel);
bogdanm 0:9b334a45a8ff 745 }
bogdanm 0:9b334a45a8ff 746
bogdanm 0:9b334a45a8ff 747 /**
bogdanm 0:9b334a45a8ff 748 * @}
bogdanm 0:9b334a45a8ff 749 */
bogdanm 0:9b334a45a8ff 750
bogdanm 0:9b334a45a8ff 751 /**
bogdanm 0:9b334a45a8ff 752 * @}
bogdanm 0:9b334a45a8ff 753 */
bogdanm 0:9b334a45a8ff 754
bogdanm 0:9b334a45a8ff 755 /**
bogdanm 0:9b334a45a8ff 756 * @}
bogdanm 0:9b334a45a8ff 757 */
bogdanm 0:9b334a45a8ff 758
bogdanm 0:9b334a45a8ff 759 /**
bogdanm 0:9b334a45a8ff 760 * @}
bogdanm 0:9b334a45a8ff 761 */
bogdanm 0:9b334a45a8ff 762
bogdanm 0:9b334a45a8ff 763 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
bogdanm 0:9b334a45a8ff 764