Toyomasa Watarai / mbed-dev

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targets/hal/TARGET_STM/TARGET_STM32F4/serial_api.c@60:6e6ed0527880, 2016-02-10 (annotated)

Committer:
mbed_official
Date:
Wed Feb 10 07:45:10 2016 +0000
Revision:
60:6e6ed0527880
Parent:
55:814265bf5462 
Synchronized with git revision 66c0620619055974998c52af1909fa7641cd34c9



Full URL: https://github.com/mbedmicro/mbed/commit/66c0620619055974998c52af1909fa7641cd34c9/



[STM B96B_F446VE] HW Control Flow for serial

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /* mbed Microcontroller Library
bogdanm 0:9b334a45a8ff 2 *******************************************************************************
bogdanm 0:9b334a45a8ff 3 * Copyright (c) 2015, STMicroelectronics
bogdanm 0:9b334a45a8ff 4 * All rights reserved.
bogdanm 0:9b334a45a8ff 5 *
bogdanm 0:9b334a45a8ff 6 * Redistribution and use in source and binary forms, with or without
bogdanm 0:9b334a45a8ff 7 * modification, are permitted provided that the following conditions are met:
bogdanm 0:9b334a45a8ff 8 *
bogdanm 0:9b334a45a8ff 9 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 0:9b334a45a8ff 10 * this list of conditions and the following disclaimer.
bogdanm 0:9b334a45a8ff 11 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 0:9b334a45a8ff 12 * this list of conditions and the following disclaimer in the documentation
bogdanm 0:9b334a45a8ff 13 * and/or other materials provided with the distribution.
bogdanm 0:9b334a45a8ff 14 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 0:9b334a45a8ff 15 * may be used to endorse or promote products derived from this software
bogdanm 0:9b334a45a8ff 16 * without specific prior written permission.
bogdanm 0:9b334a45a8ff 17 *
bogdanm 0:9b334a45a8ff 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 0:9b334a45a8ff 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 0:9b334a45a8ff 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 0:9b334a45a8ff 21 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 0:9b334a45a8ff 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 0:9b334a45a8ff 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 0:9b334a45a8ff 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 0:9b334a45a8ff 25 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 0:9b334a45a8ff 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 0:9b334a45a8ff 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 0:9b334a45a8ff 28 *******************************************************************************
bogdanm 0:9b334a45a8ff 29 */
bogdanm 0:9b334a45a8ff 30 #include "mbed_assert.h"
bogdanm 0:9b334a45a8ff 31 #include "serial_api.h"
bogdanm 0:9b334a45a8ff 32
bogdanm 0:9b334a45a8ff 33 #if DEVICE_SERIAL
bogdanm 0:9b334a45a8ff 34
bogdanm 0:9b334a45a8ff 35 #include "cmsis.h"
bogdanm 0:9b334a45a8ff 36 #include "pinmap.h"
bogdanm 0:9b334a45a8ff 37 #include <string.h>
bogdanm 0:9b334a45a8ff 38 #include "PeripheralPins.h"
bogdanm 0:9b334a45a8ff 39 #include "mbed_error.h"
bogdanm 0:9b334a45a8ff 40
bogdanm 0:9b334a45a8ff 41 #define UART_NUM (8)
mbed_official 55:814265bf5462 42 #define UART_STATE_RX_ACTIVE 0x20
mbed_official 55:814265bf5462 43 #define UART_STATE_TX_ACTIVE 0x10
bogdanm 0:9b334a45a8ff 44
bogdanm 0:9b334a45a8ff 45 static uint32_t serial_irq_ids[UART_NUM] = {0, 0, 0, 0, 0, 0, 0, 0};
bogdanm 0:9b334a45a8ff 46
mbed_official 55:814265bf5462 47 #if DEVICE_SERIAL_ASYNCH_DMA
mbed_official 55:814265bf5462 48 static const uint32_t DMA_UartRx_Channel[UART_NUM] = {DMA_CHANNEL_4, DMA_CHANNEL_4, DMA_CHANNEL_4, DMA_CHANNEL_4, DMA_CHANNEL_4, DMA_CHANNEL_5, DMA_CHANNEL_5, DMA_CHANNEL_5};
mbed_official 55:814265bf5462 49 static const uint32_t DMA_UartRx_Stream[UART_NUM] = {(uint32_t)DMA2_Stream5, (uint32_t) DMA1_Stream5, (uint32_t) DMA1_Stream1, (uint32_t) DMA1_Stream2, (uint32_t) DMA1_Stream0, (uint32_t) DMA2_Stream5, (uint32_t) DMA1_Stream3, (uint32_t) DMA1_Stream6};
mbed_official 55:814265bf5462 50 static const uint32_t DMA_UartTx_Channel[UART_NUM] = {DMA_CHANNEL_4, DMA_CHANNEL_4, DMA_CHANNEL_4, DMA_CHANNEL_4, DMA_CHANNEL_4, DMA_CHANNEL_5, DMA_CHANNEL_5, DMA_CHANNEL_5};
mbed_official 55:814265bf5462 51 static const uint32_t DMA_UartTx_Stream[UART_NUM] = {(uint32_t)DMA2_Stream7, (uint32_t) DMA1_Stream6, (uint32_t) DMA1_Stream3, (uint32_t) DMA1_Stream4, (uint32_t) DMA1_Stream7, (uint32_t) DMA2_Stream6, (uint32_t) DMA1_Stream1, (uint32_t) DMA1_Stream0};
mbed_official 55:814265bf5462 52
mbed_official 55:814265bf5462 53 #endif
bogdanm 0:9b334a45a8ff 54 static uart_irq_handler irq_handler;
bogdanm 0:9b334a45a8ff 55
mbed_official 55:814265bf5462 56 DMA_HandleTypeDef DmaHandle;
bogdanm 0:9b334a45a8ff 57 UART_HandleTypeDef UartHandle;
bogdanm 0:9b334a45a8ff 58
bogdanm 0:9b334a45a8ff 59 int stdio_uart_inited = 0;
bogdanm 0:9b334a45a8ff 60 serial_t stdio_uart;
bogdanm 0:9b334a45a8ff 61
mbed_official 55:814265bf5462 62 #if DEVICE_SERIAL_ASYNCH
mbed_official 55:814265bf5462 63 #define SERIAL_OBJ(X) (obj->serial.X)
mbed_official 55:814265bf5462 64 #else
mbed_official 55:814265bf5462 65 #define SERIAL_OBJ(X) (obj->X)
mbed_official 55:814265bf5462 66 #endif
mbed_official 55:814265bf5462 67
bogdanm 0:9b334a45a8ff 68 static void init_uart(serial_t *obj)
bogdanm 0:9b334a45a8ff 69 {
mbed_official 55:814265bf5462 70 #if DEVICE_SERIAL_ASYNCH_DMA
mbed_official 55:814265bf5462 71 static DMA_HandleTypeDef hdma_tx;
mbed_official 55:814265bf5462 72 static DMA_HandleTypeDef hdma_rx;
mbed_official 55:814265bf5462 73 #endif
mbed_official 55:814265bf5462 74
mbed_official 55:814265bf5462 75 UartHandle.Instance = (USART_TypeDef *)(SERIAL_OBJ(uart));
bogdanm 0:9b334a45a8ff 76
mbed_official 55:814265bf5462 77 UartHandle.Init.BaudRate = SERIAL_OBJ(baudrate);
mbed_official 55:814265bf5462 78 UartHandle.Init.WordLength = SERIAL_OBJ(databits);
mbed_official 55:814265bf5462 79 UartHandle.Init.StopBits = SERIAL_OBJ(stopbits);
mbed_official 55:814265bf5462 80 UartHandle.Init.Parity = SERIAL_OBJ(parity);
mbed_official 60:6e6ed0527880 81 #if DEVICE_SERIAL_FC
mbed_official 60:6e6ed0527880 82 UartHandle.Init.HwFlowCtl = SERIAL_OBJ(hw_flow_ctl);
mbed_official 60:6e6ed0527880 83 #else
mbed_official 60:6e6ed0527880 84 UartHandle.Init.HwFlowCtl = UART_HWCONTROL_NONE;
mbed_official 60:6e6ed0527880 85 #endif
mbed_official 55:814265bf5462 86 UartHandle.Init.OverSampling = UART_OVERSAMPLING_16;
bogdanm 0:9b334a45a8ff 87
mbed_official 55:814265bf5462 88 if (SERIAL_OBJ(pin_rx) == NC) {
bogdanm 0:9b334a45a8ff 89 UartHandle.Init.Mode = UART_MODE_TX;
mbed_official 55:814265bf5462 90 } else if (SERIAL_OBJ(pin_tx) == NC) {
bogdanm 0:9b334a45a8ff 91 UartHandle.Init.Mode = UART_MODE_RX;
bogdanm 0:9b334a45a8ff 92 } else {
bogdanm 0:9b334a45a8ff 93 UartHandle.Init.Mode = UART_MODE_TX_RX;
bogdanm 0:9b334a45a8ff 94 }
mbed_official 55:814265bf5462 95 #if DEVICE_SERIAL_ASYNCH_DMA
mbed_official 55:814265bf5462 96 if (SERIAL_OBJ(pin_tx) != NC) {
mbed_official 55:814265bf5462 97 // set DMA in the UartHandle
mbed_official 55:814265bf5462 98 /* Configure the DMA handler for Transmission process */
mbed_official 55:814265bf5462 99 hdma_tx.Instance = (DMA_Stream_TypeDef *)DMA_UartTx_Stream[SERIAL_OBJ(index)];
mbed_official 55:814265bf5462 100 hdma_tx.Init.Channel = DMA_UartTx_Channel[SERIAL_OBJ(index)];
mbed_official 55:814265bf5462 101 hdma_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
mbed_official 55:814265bf5462 102 hdma_tx.Init.PeriphInc = DMA_PINC_DISABLE;
mbed_official 55:814265bf5462 103 hdma_tx.Init.MemInc = DMA_MINC_ENABLE;
mbed_official 55:814265bf5462 104 hdma_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
mbed_official 55:814265bf5462 105 hdma_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
mbed_official 55:814265bf5462 106 hdma_tx.Init.Mode = DMA_NORMAL;
mbed_official 55:814265bf5462 107 hdma_tx.Init.Priority = DMA_PRIORITY_LOW;
mbed_official 55:814265bf5462 108 hdma_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
mbed_official 55:814265bf5462 109 hdma_tx.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL;
mbed_official 55:814265bf5462 110 hdma_tx.Init.MemBurst = DMA_MBURST_INC4;
mbed_official 55:814265bf5462 111 hdma_tx.Init.PeriphBurst = DMA_PBURST_INC4;
mbed_official 55:814265bf5462 112
mbed_official 55:814265bf5462 113 HAL_DMA_Init(&hdma_tx);
mbed_official 55:814265bf5462 114
mbed_official 55:814265bf5462 115 /* Associate the initialized DMA handle to the UART handle */
mbed_official 55:814265bf5462 116 __HAL_LINKDMA(&UartHandle, hdmatx, hdma_tx);
mbed_official 55:814265bf5462 117 }
mbed_official 55:814265bf5462 118
mbed_official 55:814265bf5462 119 if (SERIAL_OBJ(pin_rx) != NC) {
mbed_official 55:814265bf5462 120 /* Configure the DMA handler for reception process */
mbed_official 55:814265bf5462 121 hdma_rx.Instance = (DMA_Stream_TypeDef *)DMA_UartRx_Stream[SERIAL_OBJ(index)];
mbed_official 55:814265bf5462 122 hdma_rx.Init.Channel = DMA_UartRx_Channel[SERIAL_OBJ(index)];
mbed_official 55:814265bf5462 123 hdma_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
mbed_official 55:814265bf5462 124 hdma_rx.Init.PeriphInc = DMA_PINC_DISABLE;
mbed_official 55:814265bf5462 125 hdma_rx.Init.MemInc = DMA_MINC_ENABLE;
mbed_official 55:814265bf5462 126 hdma_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
mbed_official 55:814265bf5462 127 hdma_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
mbed_official 55:814265bf5462 128 hdma_rx.Init.Mode = DMA_NORMAL;
mbed_official 55:814265bf5462 129 hdma_rx.Init.Priority = DMA_PRIORITY_HIGH;
mbed_official 55:814265bf5462 130 hdma_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
mbed_official 55:814265bf5462 131 hdma_rx.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL;
mbed_official 55:814265bf5462 132 hdma_rx.Init.MemBurst = DMA_MBURST_INC4;
mbed_official 55:814265bf5462 133 hdma_rx.Init.PeriphBurst = DMA_PBURST_INC4;
mbed_official 55:814265bf5462 134
mbed_official 55:814265bf5462 135 HAL_DMA_Init(&hdma_rx);
mbed_official 55:814265bf5462 136
mbed_official 55:814265bf5462 137 /* Associate the initialized DMA handle to the UART handle */
mbed_official 55:814265bf5462 138 __HAL_LINKDMA(&UartHandle, hdmarx, hdma_rx);
mbed_official 55:814265bf5462 139 }
mbed_official 55:814265bf5462 140 #endif
bogdanm 0:9b334a45a8ff 141
bogdanm 0:9b334a45a8ff 142 if (HAL_UART_Init(&UartHandle) != HAL_OK) {
mbed_official 55:814265bf5462 143 error("Cannot initialize UART\n");
bogdanm 0:9b334a45a8ff 144 }
bogdanm 0:9b334a45a8ff 145 }
bogdanm 0:9b334a45a8ff 146
bogdanm 0:9b334a45a8ff 147 void serial_init(serial_t *obj, PinName tx, PinName rx)
bogdanm 0:9b334a45a8ff 148 {
bogdanm 0:9b334a45a8ff 149 // Determine the UART to use (UART_1, UART_2, ...)
bogdanm 0:9b334a45a8ff 150 UARTName uart_tx = (UARTName)pinmap_peripheral(tx, PinMap_UART_TX);
bogdanm 0:9b334a45a8ff 151 UARTName uart_rx = (UARTName)pinmap_peripheral(rx, PinMap_UART_RX);
bogdanm 0:9b334a45a8ff 152
bogdanm 0:9b334a45a8ff 153 // Get the peripheral name (UART_1, UART_2, ...) from the pin and assign it to the object
mbed_official 55:814265bf5462 154 SERIAL_OBJ(uart) = (UARTName)pinmap_merge(uart_tx, uart_rx);
mbed_official 55:814265bf5462 155
mbed_official 55:814265bf5462 156 MBED_ASSERT(SERIAL_OBJ(uart) != (UARTName)NC);
bogdanm 0:9b334a45a8ff 157
bogdanm 0:9b334a45a8ff 158 // Enable USART clock
mbed_official 55:814265bf5462 159 switch (SERIAL_OBJ(uart)) {
bogdanm 0:9b334a45a8ff 160 case UART_1:
bogdanm 0:9b334a45a8ff 161 __HAL_RCC_USART1_CLK_ENABLE();
mbed_official 55:814265bf5462 162 SERIAL_OBJ(index) = 0;
mbed_official 55:814265bf5462 163 #if DEVICE_SERIAL_ASYNCH_DMA
mbed_official 55:814265bf5462 164 __HAL_RCC_DMA2_CLK_ENABLE();
mbed_official 55:814265bf5462 165 #endif
bogdanm 0:9b334a45a8ff 166 break;
bogdanm 0:9b334a45a8ff 167 case UART_2:
bogdanm 0:9b334a45a8ff 168 __HAL_RCC_USART2_CLK_ENABLE();
mbed_official 55:814265bf5462 169 SERIAL_OBJ(index) = 1;
mbed_official 55:814265bf5462 170 #if DEVICE_SERIAL_ASYNCH_DMA
mbed_official 55:814265bf5462 171 __HAL_RCC_DMA1_CLK_ENABLE();
mbed_official 55:814265bf5462 172 #endif
bogdanm 0:9b334a45a8ff 173 break;
bogdanm 0:9b334a45a8ff 174 #if defined(USART3_BASE)
bogdanm 0:9b334a45a8ff 175 case UART_3:
bogdanm 0:9b334a45a8ff 176 __HAL_RCC_USART3_CLK_ENABLE();
mbed_official 55:814265bf5462 177 SERIAL_OBJ(index) = 2;
mbed_official 55:814265bf5462 178 #if DEVICE_SERIAL_ASYNCH_DMA
mbed_official 55:814265bf5462 179 __HAL_RCC_DMA1_CLK_ENABLE();
mbed_official 55:814265bf5462 180 #endif
bogdanm 0:9b334a45a8ff 181 break;
bogdanm 0:9b334a45a8ff 182 #endif
bogdanm 0:9b334a45a8ff 183 #if defined(UART4_BASE)
bogdanm 0:9b334a45a8ff 184 case UART_4:
bogdanm 0:9b334a45a8ff 185 __HAL_RCC_UART4_CLK_ENABLE();
mbed_official 55:814265bf5462 186 SERIAL_OBJ(index) = 3;
mbed_official 55:814265bf5462 187 #if DEVICE_SERIAL_ASYNCH_DMA
mbed_official 55:814265bf5462 188 __HAL_RCC_DMA1_CLK_ENABLE();
mbed_official 55:814265bf5462 189 #endif
bogdanm 0:9b334a45a8ff 190 break;
bogdanm 0:9b334a45a8ff 191 #endif
bogdanm 0:9b334a45a8ff 192 #if defined(UART5_BASE)
bogdanm 0:9b334a45a8ff 193 case UART_5:
bogdanm 0:9b334a45a8ff 194 __HAL_RCC_UART5_CLK_ENABLE();
mbed_official 55:814265bf5462 195 SERIAL_OBJ(index) = 4;
mbed_official 55:814265bf5462 196 #if DEVICE_SERIAL_ASYNCH_DMA
mbed_official 55:814265bf5462 197 __HAL_RCC_DMA1_CLK_ENABLE();
mbed_official 55:814265bf5462 198 #endif
bogdanm 0:9b334a45a8ff 199 break;
bogdanm 0:9b334a45a8ff 200 #endif
bogdanm 0:9b334a45a8ff 201 #if defined(USART6_BASE)
bogdanm 0:9b334a45a8ff 202 case UART_6:
bogdanm 0:9b334a45a8ff 203 __HAL_RCC_USART6_CLK_ENABLE();
mbed_official 55:814265bf5462 204 SERIAL_OBJ(index) = 5;
mbed_official 55:814265bf5462 205 #if DEVICE_SERIAL_ASYNCH_DMA
mbed_official 55:814265bf5462 206 __HAL_RCC_DMA2_CLK_ENABLE();
mbed_official 55:814265bf5462 207 #endif
bogdanm 0:9b334a45a8ff 208 break;
bogdanm 0:9b334a45a8ff 209 #endif
bogdanm 0:9b334a45a8ff 210 #if defined(UART7_BASE)
bogdanm 0:9b334a45a8ff 211 case UART_7:
bogdanm 0:9b334a45a8ff 212 __HAL_RCC_UART7_CLK_ENABLE();
mbed_official 55:814265bf5462 213 SERIAL_OBJ(index) = 6;
mbed_official 55:814265bf5462 214 #if DEVICE_SERIAL_ASYNCH_DMA
mbed_official 55:814265bf5462 215 __HAL_RCC_DMA1_CLK_ENABLE();
mbed_official 55:814265bf5462 216 #endif
bogdanm 0:9b334a45a8ff 217 break;
bogdanm 0:9b334a45a8ff 218 #endif
bogdanm 0:9b334a45a8ff 219 #if defined(UART8_BASE)
bogdanm 0:9b334a45a8ff 220 case UART_8:
bogdanm 0:9b334a45a8ff 221 __HAL_RCC_UART8_CLK_ENABLE();
mbed_official 55:814265bf5462 222 SERIAL_OBJ(index) = 7;
mbed_official 55:814265bf5462 223 #if DEVICE_SERIAL_ASYNCH_DMA
mbed_official 55:814265bf5462 224 __HAL_RCC_DMA1_CLK_ENABLE();
mbed_official 55:814265bf5462 225 #endif
bogdanm 0:9b334a45a8ff 226 break;
bogdanm 0:9b334a45a8ff 227 #endif
bogdanm 0:9b334a45a8ff 228 }
bogdanm 0:9b334a45a8ff 229
bogdanm 0:9b334a45a8ff 230 // Configure the UART pins
bogdanm 0:9b334a45a8ff 231 pinmap_pinout(tx, PinMap_UART_TX);
bogdanm 0:9b334a45a8ff 232 pinmap_pinout(rx, PinMap_UART_RX);
mbed_official 55:814265bf5462 233
bogdanm 0:9b334a45a8ff 234 if (tx != NC) {
bogdanm 0:9b334a45a8ff 235 pin_mode(tx, PullUp);
bogdanm 0:9b334a45a8ff 236 }
bogdanm 0:9b334a45a8ff 237 if (rx != NC) {
bogdanm 0:9b334a45a8ff 238 pin_mode(rx, PullUp);
bogdanm 0:9b334a45a8ff 239 }
bogdanm 0:9b334a45a8ff 240
bogdanm 0:9b334a45a8ff 241 // Configure UART
mbed_official 55:814265bf5462 242 SERIAL_OBJ(baudrate) = 9600;
mbed_official 55:814265bf5462 243 SERIAL_OBJ(databits) = UART_WORDLENGTH_8B;
mbed_official 55:814265bf5462 244 SERIAL_OBJ(stopbits) = UART_STOPBITS_1;
mbed_official 55:814265bf5462 245 SERIAL_OBJ(parity) = UART_PARITY_NONE;
bogdanm 0:9b334a45a8ff 246
mbed_official 55:814265bf5462 247 SERIAL_OBJ(pin_tx) = tx;
mbed_official 55:814265bf5462 248 SERIAL_OBJ(pin_rx) = rx;
bogdanm 0:9b334a45a8ff 249
bogdanm 0:9b334a45a8ff 250 init_uart(obj);
bogdanm 0:9b334a45a8ff 251
bogdanm 0:9b334a45a8ff 252 // For stdio management
mbed_official 55:814265bf5462 253 if (SERIAL_OBJ(uart) == STDIO_UART) {
bogdanm 0:9b334a45a8ff 254 stdio_uart_inited = 1;
bogdanm 0:9b334a45a8ff 255 memcpy(&stdio_uart, obj, sizeof(serial_t));
bogdanm 0:9b334a45a8ff 256 }
bogdanm 0:9b334a45a8ff 257 }
bogdanm 0:9b334a45a8ff 258
bogdanm 0:9b334a45a8ff 259 void serial_free(serial_t *obj)
bogdanm 0:9b334a45a8ff 260 {
bogdanm 0:9b334a45a8ff 261 // Reset UART and disable clock
mbed_official 55:814265bf5462 262 switch (SERIAL_OBJ(uart)) {
bogdanm 0:9b334a45a8ff 263 case UART_1:
bogdanm 0:9b334a45a8ff 264 __USART1_FORCE_RESET();
bogdanm 0:9b334a45a8ff 265 __USART1_RELEASE_RESET();
bogdanm 0:9b334a45a8ff 266 __USART1_CLK_DISABLE();
bogdanm 0:9b334a45a8ff 267 break;
bogdanm 0:9b334a45a8ff 268 case UART_2:
bogdanm 0:9b334a45a8ff 269 __USART2_FORCE_RESET();
bogdanm 0:9b334a45a8ff 270 __USART2_RELEASE_RESET();
bogdanm 0:9b334a45a8ff 271 __USART2_CLK_DISABLE();
bogdanm 0:9b334a45a8ff 272 break;
bogdanm 0:9b334a45a8ff 273 #if defined(USART3_BASE)
bogdanm 0:9b334a45a8ff 274 case UART_3:
bogdanm 0:9b334a45a8ff 275 __USART3_FORCE_RESET();
bogdanm 0:9b334a45a8ff 276 __USART3_RELEASE_RESET();
bogdanm 0:9b334a45a8ff 277 __USART3_CLK_DISABLE();
bogdanm 0:9b334a45a8ff 278 break;
bogdanm 0:9b334a45a8ff 279 #endif
bogdanm 0:9b334a45a8ff 280 #if defined(UART4_BASE)
bogdanm 0:9b334a45a8ff 281 case UART_4:
bogdanm 0:9b334a45a8ff 282 __UART4_FORCE_RESET();
bogdanm 0:9b334a45a8ff 283 __UART4_RELEASE_RESET();
bogdanm 0:9b334a45a8ff 284 __UART4_CLK_DISABLE();
mbed_official 55:814265bf5462 285 #if DEVICE_SERIAL_ASYNCH_DMA
mbed_official 55:814265bf5462 286 __HAL_RCC_DMA1_CLK_DISABLE();
mbed_official 55:814265bf5462 287 #endif
bogdanm 0:9b334a45a8ff 288 break;
bogdanm 0:9b334a45a8ff 289 #endif
bogdanm 0:9b334a45a8ff 290 #if defined(UART5_BASE)
bogdanm 0:9b334a45a8ff 291 case UART_5:
bogdanm 0:9b334a45a8ff 292 __UART5_FORCE_RESET();
bogdanm 0:9b334a45a8ff 293 __UART5_RELEASE_RESET();
bogdanm 0:9b334a45a8ff 294 __UART5_CLK_DISABLE();
bogdanm 0:9b334a45a8ff 295 break;
bogdanm 0:9b334a45a8ff 296 #endif
bogdanm 0:9b334a45a8ff 297 #if defined(USART6_BASE)
bogdanm 0:9b334a45a8ff 298 case UART_6:
bogdanm 0:9b334a45a8ff 299 __USART6_FORCE_RESET();
bogdanm 0:9b334a45a8ff 300 __USART6_RELEASE_RESET();
bogdanm 0:9b334a45a8ff 301 __USART6_CLK_DISABLE();
bogdanm 0:9b334a45a8ff 302 break;
bogdanm 0:9b334a45a8ff 303 #endif
bogdanm 0:9b334a45a8ff 304 #if defined(UART7_BASE)
bogdanm 0:9b334a45a8ff 305 case UART_7:
bogdanm 0:9b334a45a8ff 306 __UART7_FORCE_RESET();
bogdanm 0:9b334a45a8ff 307 __UART7_RELEASE_RESET();
bogdanm 0:9b334a45a8ff 308 __UART7_CLK_DISABLE();
bogdanm 0:9b334a45a8ff 309 break;
bogdanm 0:9b334a45a8ff 310 #endif
bogdanm 0:9b334a45a8ff 311 #if defined(UART8_BASE)
bogdanm 0:9b334a45a8ff 312 case UART_8:
bogdanm 0:9b334a45a8ff 313 __UART8_FORCE_RESET();
bogdanm 0:9b334a45a8ff 314 __UART8_RELEASE_RESET();
bogdanm 0:9b334a45a8ff 315 __UART8_CLK_DISABLE();
bogdanm 0:9b334a45a8ff 316 break;
bogdanm 0:9b334a45a8ff 317 #endif
bogdanm 0:9b334a45a8ff 318 }
bogdanm 0:9b334a45a8ff 319 // Configure GPIOs
mbed_official 55:814265bf5462 320 pin_function(SERIAL_OBJ(pin_tx), STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0));
mbed_official 55:814265bf5462 321 pin_function(SERIAL_OBJ(pin_rx), STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0));
bogdanm 0:9b334a45a8ff 322
mbed_official 55:814265bf5462 323 serial_irq_ids[SERIAL_OBJ(index)] = 0;
bogdanm 0:9b334a45a8ff 324 }
bogdanm 0:9b334a45a8ff 325
bogdanm 0:9b334a45a8ff 326 void serial_baud(serial_t *obj, int baudrate)
bogdanm 0:9b334a45a8ff 327 {
mbed_official 55:814265bf5462 328 SERIAL_OBJ(baudrate) = baudrate;
bogdanm 0:9b334a45a8ff 329 init_uart(obj);
bogdanm 0:9b334a45a8ff 330 }
bogdanm 0:9b334a45a8ff 331
bogdanm 0:9b334a45a8ff 332 void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits)
bogdanm 0:9b334a45a8ff 333 {
bogdanm 0:9b334a45a8ff 334 if (data_bits == 9) {
mbed_official 55:814265bf5462 335 SERIAL_OBJ(databits) = UART_WORDLENGTH_9B;
bogdanm 0:9b334a45a8ff 336 } else {
mbed_official 55:814265bf5462 337 SERIAL_OBJ(databits) = UART_WORDLENGTH_8B;
bogdanm 0:9b334a45a8ff 338 }
bogdanm 0:9b334a45a8ff 339
bogdanm 0:9b334a45a8ff 340 switch (parity) {
bogdanm 0:9b334a45a8ff 341 case ParityOdd:
bogdanm 0:9b334a45a8ff 342 case ParityForced0:
mbed_official 55:814265bf5462 343 SERIAL_OBJ(parity) = UART_PARITY_ODD;
bogdanm 0:9b334a45a8ff 344 break;
bogdanm 0:9b334a45a8ff 345 case ParityEven:
bogdanm 0:9b334a45a8ff 346 case ParityForced1:
mbed_official 55:814265bf5462 347 SERIAL_OBJ(parity) = UART_PARITY_EVEN;
bogdanm 0:9b334a45a8ff 348 break;
bogdanm 0:9b334a45a8ff 349 default: // ParityNone
mbed_official 55:814265bf5462 350 SERIAL_OBJ(parity) = UART_PARITY_NONE;
bogdanm 0:9b334a45a8ff 351 break;
bogdanm 0:9b334a45a8ff 352 }
bogdanm 0:9b334a45a8ff 353
bogdanm 0:9b334a45a8ff 354 if (stop_bits == 2) {
mbed_official 55:814265bf5462 355 SERIAL_OBJ(stopbits) = UART_STOPBITS_2;
bogdanm 0:9b334a45a8ff 356 } else {
mbed_official 55:814265bf5462 357 SERIAL_OBJ(stopbits) = UART_STOPBITS_1;
bogdanm 0:9b334a45a8ff 358 }
bogdanm 0:9b334a45a8ff 359
bogdanm 0:9b334a45a8ff 360 init_uart(obj);
bogdanm 0:9b334a45a8ff 361 }
bogdanm 0:9b334a45a8ff 362
bogdanm 0:9b334a45a8ff 363 /******************************************************************************
bogdanm 0:9b334a45a8ff 364 * INTERRUPTS HANDLING
bogdanm 0:9b334a45a8ff 365 ******************************************************************************/
bogdanm 0:9b334a45a8ff 366
bogdanm 0:9b334a45a8ff 367 static void uart_irq(UARTName name, int id)
bogdanm 0:9b334a45a8ff 368 {
bogdanm 0:9b334a45a8ff 369 UartHandle.Instance = (USART_TypeDef *)name;
bogdanm 0:9b334a45a8ff 370 if (serial_irq_ids[id] != 0) {
bogdanm 0:9b334a45a8ff 371 if (__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_TC) != RESET) {
bogdanm 0:9b334a45a8ff 372 irq_handler(serial_irq_ids[id], TxIrq);
bogdanm 0:9b334a45a8ff 373 __HAL_UART_CLEAR_FLAG(&UartHandle, UART_FLAG_TC);
bogdanm 0:9b334a45a8ff 374 }
bogdanm 0:9b334a45a8ff 375 if (__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_RXNE) != RESET) {
bogdanm 0:9b334a45a8ff 376 irq_handler(serial_irq_ids[id], RxIrq);
bogdanm 0:9b334a45a8ff 377 __HAL_UART_CLEAR_FLAG(&UartHandle, UART_FLAG_RXNE);
bogdanm 0:9b334a45a8ff 378 }
bogdanm 0:9b334a45a8ff 379 }
bogdanm 0:9b334a45a8ff 380 }
mbed_official 55:814265bf5462 381 #if DEVICE_SERIAL_ASYNCH_DMA
mbed_official 55:814265bf5462 382 static void dma_irq(DMAName name, int id)
mbed_official 55:814265bf5462 383 {
mbed_official 55:814265bf5462 384 // TO DO
mbed_official 55:814265bf5462 385 DmaHandle.Instance = (DMA_Stream_TypeDef *)name;
mbed_official 55:814265bf5462 386 if (serial_irq_ids[id] != 0) {
mbed_official 55:814265bf5462 387 if (__HAL_DMA_GET_TC_FLAG_INDEX(&DmaHandle) != RESET) {
mbed_official 55:814265bf5462 388 irq_handler(serial_irq_ids[id], TxIrq);
mbed_official 55:814265bf5462 389 __HAL_DMA_CLEAR_FLAG(&DmaHandle, DMA_FLAG_TCIF0_4);
mbed_official 55:814265bf5462 390 }
mbed_official 55:814265bf5462 391 if (__HAL_DMA_GET_TC_FLAG_INDEX(&DmaHandle) != RESET) {
mbed_official 55:814265bf5462 392 irq_handler(serial_irq_ids[id], RxIrq);
mbed_official 55:814265bf5462 393 __HAL_DMA_CLEAR_FLAG(&DmaHandle, DMA_FLAG_TCIF2_6);
mbed_official 55:814265bf5462 394 }
mbed_official 55:814265bf5462 395 }
mbed_official 55:814265bf5462 396 }
mbed_official 55:814265bf5462 397 #endif
bogdanm 0:9b334a45a8ff 398
bogdanm 0:9b334a45a8ff 399 static void uart1_irq(void)
bogdanm 0:9b334a45a8ff 400 {
bogdanm 0:9b334a45a8ff 401 uart_irq(UART_1, 0);
bogdanm 0:9b334a45a8ff 402 }
bogdanm 0:9b334a45a8ff 403
bogdanm 0:9b334a45a8ff 404 static void uart2_irq(void)
bogdanm 0:9b334a45a8ff 405 {
bogdanm 0:9b334a45a8ff 406 uart_irq(UART_2, 1);
bogdanm 0:9b334a45a8ff 407 }
bogdanm 0:9b334a45a8ff 408
bogdanm 0:9b334a45a8ff 409 #if defined(USART3_BASE)
bogdanm 0:9b334a45a8ff 410 static void uart3_irq(void)
bogdanm 0:9b334a45a8ff 411 {
bogdanm 0:9b334a45a8ff 412 uart_irq(UART_3, 2);
bogdanm 0:9b334a45a8ff 413 }
bogdanm 0:9b334a45a8ff 414 #endif
bogdanm 0:9b334a45a8ff 415
bogdanm 0:9b334a45a8ff 416 #if defined(UART4_BASE)
bogdanm 0:9b334a45a8ff 417 static void uart4_irq(void)
bogdanm 0:9b334a45a8ff 418 {
bogdanm 0:9b334a45a8ff 419 uart_irq(UART_4, 3);
bogdanm 0:9b334a45a8ff 420 }
mbed_official 55:814265bf5462 421 #if DEVICE_SERIAL_ASYNCH_DMA
mbed_official 55:814265bf5462 422
mbed_official 55:814265bf5462 423 static void dma1_stream2_irq(void)
mbed_official 55:814265bf5462 424 {
mbed_official 55:814265bf5462 425 dma_irq(DMA_1, 3 /* TO DO : ??? WHAT IS THIS 3 ??? */);
mbed_official 55:814265bf5462 426 }
mbed_official 55:814265bf5462 427
mbed_official 55:814265bf5462 428
mbed_official 55:814265bf5462 429 static void dma1_stream4_irq(void)
mbed_official 55:814265bf5462 430 {
mbed_official 55:814265bf5462 431 dma_irq(DMA_1, 3 /* TO DO : ??? WHAT IS THIS 3 ??? */);
mbed_official 55:814265bf5462 432 }
mbed_official 55:814265bf5462 433 #endif
bogdanm 0:9b334a45a8ff 434 #endif
bogdanm 0:9b334a45a8ff 435
bogdanm 0:9b334a45a8ff 436 #if defined(UART5_BASE)
bogdanm 0:9b334a45a8ff 437 static void uart5_irq(void)
bogdanm 0:9b334a45a8ff 438 {
bogdanm 0:9b334a45a8ff 439 uart_irq(UART_5, 4);
bogdanm 0:9b334a45a8ff 440 }
bogdanm 0:9b334a45a8ff 441 #endif
bogdanm 0:9b334a45a8ff 442
bogdanm 0:9b334a45a8ff 443 #if defined(USART6_BASE)
bogdanm 0:9b334a45a8ff 444 static void uart6_irq(void)
bogdanm 0:9b334a45a8ff 445 {
bogdanm 0:9b334a45a8ff 446 uart_irq(UART_6, 5);
bogdanm 0:9b334a45a8ff 447 }
bogdanm 0:9b334a45a8ff 448 #endif
bogdanm 0:9b334a45a8ff 449
bogdanm 0:9b334a45a8ff 450 #if defined(UART7_BASE)
bogdanm 0:9b334a45a8ff 451 static void uart7_irq(void)
bogdanm 0:9b334a45a8ff 452 {
bogdanm 0:9b334a45a8ff 453 uart_irq(UART_7, 6);
bogdanm 0:9b334a45a8ff 454 }
bogdanm 0:9b334a45a8ff 455 #endif
bogdanm 0:9b334a45a8ff 456
bogdanm 0:9b334a45a8ff 457 #if defined(UART8_BASE)
bogdanm 0:9b334a45a8ff 458 static void uart8_irq(void)
bogdanm 0:9b334a45a8ff 459 {
bogdanm 0:9b334a45a8ff 460 uart_irq(UART_8, 7);
bogdanm 0:9b334a45a8ff 461 }
bogdanm 0:9b334a45a8ff 462 #endif
bogdanm 0:9b334a45a8ff 463
bogdanm 0:9b334a45a8ff 464 void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id)
bogdanm 0:9b334a45a8ff 465 {
bogdanm 0:9b334a45a8ff 466 irq_handler = handler;
mbed_official 55:814265bf5462 467 serial_irq_ids[SERIAL_OBJ(index)] = id;
bogdanm 0:9b334a45a8ff 468 }
bogdanm 0:9b334a45a8ff 469
bogdanm 0:9b334a45a8ff 470 void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable)
bogdanm 0:9b334a45a8ff 471 {
bogdanm 0:9b334a45a8ff 472 IRQn_Type irq_n = (IRQn_Type)0;
bogdanm 0:9b334a45a8ff 473 uint32_t vector = 0;
mbed_official 55:814265bf5462 474 #if DEVICE_SERIAL_ASYNCH_DMA
mbed_official 55:814265bf5462 475 IRQn_Type irqn_dma = (IRQn_Type)0;
mbed_official 55:814265bf5462 476 uint32_t vector_dma = 0;
mbed_official 55:814265bf5462 477 #endif
bogdanm 0:9b334a45a8ff 478
mbed_official 55:814265bf5462 479 UartHandle.Instance = (USART_TypeDef *)SERIAL_OBJ(uart);
bogdanm 0:9b334a45a8ff 480
mbed_official 55:814265bf5462 481 switch (SERIAL_OBJ(uart)) {
bogdanm 0:9b334a45a8ff 482 case UART_1:
bogdanm 0:9b334a45a8ff 483 irq_n = USART1_IRQn;
bogdanm 0:9b334a45a8ff 484 vector = (uint32_t)&uart1_irq;
bogdanm 0:9b334a45a8ff 485 break;
bogdanm 0:9b334a45a8ff 486
bogdanm 0:9b334a45a8ff 487 case UART_2:
bogdanm 0:9b334a45a8ff 488 irq_n = USART2_IRQn;
bogdanm 0:9b334a45a8ff 489 vector = (uint32_t)&uart2_irq;
bogdanm 0:9b334a45a8ff 490 break;
bogdanm 0:9b334a45a8ff 491 #if defined(USART3_BASE)
bogdanm 0:9b334a45a8ff 492 case UART_3:
bogdanm 0:9b334a45a8ff 493 irq_n = USART3_IRQn;
bogdanm 0:9b334a45a8ff 494 vector = (uint32_t)&uart3_irq;
bogdanm 0:9b334a45a8ff 495 break;
bogdanm 0:9b334a45a8ff 496 #endif
bogdanm 0:9b334a45a8ff 497 #if defined(UART4_BASE)
bogdanm 0:9b334a45a8ff 498 case UART_4:
bogdanm 0:9b334a45a8ff 499 irq_n = UART4_IRQn;
bogdanm 0:9b334a45a8ff 500 vector = (uint32_t)&uart4_irq;
mbed_official 55:814265bf5462 501 #if DEVICE_SERIAL_ASYNCH_DMA
mbed_official 55:814265bf5462 502 if (irq == RxIrq) {
mbed_official 55:814265bf5462 503 irqn_dma = DMA1_Stream2_IRQn;
mbed_official 55:814265bf5462 504 vector_dma = (uint32_t)&dma1_stream2_irq;
mbed_official 55:814265bf5462 505 } else {
mbed_official 55:814265bf5462 506 irqn_dma = DMA1_Stream4_IRQn;
mbed_official 55:814265bf5462 507 vector_dma = (uint32_t)&dma1_stream4_irq;
mbed_official 55:814265bf5462 508 }
mbed_official 55:814265bf5462 509 #endif
bogdanm 0:9b334a45a8ff 510 break;
bogdanm 0:9b334a45a8ff 511 #endif
bogdanm 0:9b334a45a8ff 512 #if defined(UART5_BASE)
bogdanm 0:9b334a45a8ff 513 case UART_5:
bogdanm 0:9b334a45a8ff 514 irq_n = UART5_IRQn;
bogdanm 0:9b334a45a8ff 515 vector = (uint32_t)&uart5_irq;
bogdanm 0:9b334a45a8ff 516 break;
bogdanm 0:9b334a45a8ff 517 #endif
bogdanm 0:9b334a45a8ff 518 #if defined(USART6_BASE)
bogdanm 0:9b334a45a8ff 519 case UART_6:
bogdanm 0:9b334a45a8ff 520 irq_n = USART6_IRQn;
bogdanm 0:9b334a45a8ff 521 vector = (uint32_t)&uart6_irq;
bogdanm 0:9b334a45a8ff 522 break;
bogdanm 0:9b334a45a8ff 523 #endif
bogdanm 0:9b334a45a8ff 524 #if defined(UART7_BASE)
bogdanm 0:9b334a45a8ff 525 case UART_7:
bogdanm 0:9b334a45a8ff 526 irq_n = UART7_IRQn;
bogdanm 0:9b334a45a8ff 527 vector = (uint32_t)&uart7_irq;
bogdanm 0:9b334a45a8ff 528 break;
bogdanm 0:9b334a45a8ff 529 #endif
bogdanm 0:9b334a45a8ff 530 #if defined(UART8_BASE)
bogdanm 0:9b334a45a8ff 531 case UART_8:
bogdanm 0:9b334a45a8ff 532 irq_n = UART8_IRQn;
bogdanm 0:9b334a45a8ff 533 vector = (uint32_t)&uart8_irq;
bogdanm 0:9b334a45a8ff 534 break;
bogdanm 0:9b334a45a8ff 535 #endif
bogdanm 0:9b334a45a8ff 536 }
bogdanm 0:9b334a45a8ff 537
bogdanm 0:9b334a45a8ff 538 if (enable) {
bogdanm 0:9b334a45a8ff 539
bogdanm 0:9b334a45a8ff 540 if (irq == RxIrq) {
bogdanm 0:9b334a45a8ff 541 __HAL_UART_ENABLE_IT(&UartHandle, UART_IT_RXNE);
mbed_official 55:814265bf5462 542 #if DEVICE_SERIAL_ASYNCH_DMA
mbed_official 55:814265bf5462 543 NVIC_SetVector(irq_n, vector_dma);
mbed_official 55:814265bf5462 544 NVIC_EnableIRQ(irq_n);
mbed_official 55:814265bf5462 545 NVIC_SetVector(irqn_dma, vector_dma);
mbed_official 55:814265bf5462 546 NVIC_EnableIRQ(irqn_dma);
mbed_official 55:814265bf5462 547 #else
mbed_official 55:814265bf5462 548 NVIC_SetVector(irq_n, vector);
mbed_official 55:814265bf5462 549 NVIC_EnableIRQ(irq_n);
mbed_official 55:814265bf5462 550 #endif
bogdanm 0:9b334a45a8ff 551 } else { // TxIrq
bogdanm 0:9b334a45a8ff 552 __HAL_UART_ENABLE_IT(&UartHandle, UART_IT_TC);
mbed_official 55:814265bf5462 553 NVIC_SetVector(irq_n, vector);
mbed_official 55:814265bf5462 554 NVIC_EnableIRQ(irq_n);
mbed_official 55:814265bf5462 555 #if DEVICE_SERIAL_ASYNCH_DMA
mbed_official 55:814265bf5462 556 NVIC_SetVector(irqn_dma, vector_dma);
mbed_official 55:814265bf5462 557 NVIC_EnableIRQ(irqn_dma);
mbed_official 55:814265bf5462 558 #endif
bogdanm 0:9b334a45a8ff 559 }
bogdanm 0:9b334a45a8ff 560 } else { // disable
bogdanm 0:9b334a45a8ff 561
bogdanm 0:9b334a45a8ff 562 int all_disabled = 0;
bogdanm 0:9b334a45a8ff 563
bogdanm 0:9b334a45a8ff 564 if (irq == RxIrq) {
bogdanm 0:9b334a45a8ff 565 __HAL_UART_DISABLE_IT(&UartHandle, UART_IT_RXNE);
bogdanm 0:9b334a45a8ff 566 // Check if TxIrq is disabled too
bogdanm 0:9b334a45a8ff 567 if ((UartHandle.Instance->CR1 & USART_CR1_TXEIE) == 0) all_disabled = 1;
bogdanm 0:9b334a45a8ff 568 } else { // TxIrq
bogdanm 0:9b334a45a8ff 569 __HAL_UART_DISABLE_IT(&UartHandle, UART_IT_TXE);
bogdanm 0:9b334a45a8ff 570 // Check if RxIrq is disabled too
bogdanm 0:9b334a45a8ff 571 if ((UartHandle.Instance->CR1 & USART_CR1_RXNEIE) == 0) all_disabled = 1;
bogdanm 0:9b334a45a8ff 572 }
bogdanm 0:9b334a45a8ff 573
mbed_official 55:814265bf5462 574 if (all_disabled) {
mbed_official 55:814265bf5462 575 NVIC_DisableIRQ(irq_n);
mbed_official 55:814265bf5462 576 #if DEVICE_SERIAL_ASYNCH_DMA
mbed_official 55:814265bf5462 577 NVIC_DisableIRQ(irqn_dma);
mbed_official 55:814265bf5462 578 #endif
mbed_official 55:814265bf5462 579 }
bogdanm 0:9b334a45a8ff 580
bogdanm 0:9b334a45a8ff 581 }
bogdanm 0:9b334a45a8ff 582 }
bogdanm 0:9b334a45a8ff 583
bogdanm 0:9b334a45a8ff 584 /******************************************************************************
bogdanm 0:9b334a45a8ff 585 * READ/WRITE
bogdanm 0:9b334a45a8ff 586 ******************************************************************************/
bogdanm 0:9b334a45a8ff 587
bogdanm 0:9b334a45a8ff 588 int serial_getc(serial_t *obj)
bogdanm 0:9b334a45a8ff 589 {
mbed_official 55:814265bf5462 590 USART_TypeDef *uart = (USART_TypeDef *)(SERIAL_OBJ(uart));
bogdanm 0:9b334a45a8ff 591 while (!serial_readable(obj));
bogdanm 0:9b334a45a8ff 592 return (int)(uart->DR & 0x1FF);
bogdanm 0:9b334a45a8ff 593 }
bogdanm 0:9b334a45a8ff 594
bogdanm 0:9b334a45a8ff 595 void serial_putc(serial_t *obj, int c)
bogdanm 0:9b334a45a8ff 596 {
mbed_official 55:814265bf5462 597 USART_TypeDef *uart = (USART_TypeDef *)(SERIAL_OBJ(uart));
bogdanm 0:9b334a45a8ff 598 while (!serial_writable(obj));
bogdanm 0:9b334a45a8ff 599 uart->DR = (uint32_t)(c & 0x1FF);
bogdanm 0:9b334a45a8ff 600 }
bogdanm 0:9b334a45a8ff 601
bogdanm 0:9b334a45a8ff 602 int serial_readable(serial_t *obj)
bogdanm 0:9b334a45a8ff 603 {
bogdanm 0:9b334a45a8ff 604 int status;
mbed_official 55:814265bf5462 605 UartHandle.Instance = (USART_TypeDef *)(SERIAL_OBJ(uart));
bogdanm 0:9b334a45a8ff 606 // Check if data is received
bogdanm 0:9b334a45a8ff 607 status = ((__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_RXNE) != RESET) ? 1 : 0);
bogdanm 0:9b334a45a8ff 608 return status;
bogdanm 0:9b334a45a8ff 609 }
bogdanm 0:9b334a45a8ff 610
bogdanm 0:9b334a45a8ff 611 int serial_writable(serial_t *obj)
bogdanm 0:9b334a45a8ff 612 {
bogdanm 0:9b334a45a8ff 613 int status;
mbed_official 55:814265bf5462 614 UartHandle.Instance = (USART_TypeDef *)(SERIAL_OBJ(uart));
bogdanm 0:9b334a45a8ff 615 // Check if data is transmitted
bogdanm 0:9b334a45a8ff 616 status = ((__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_TXE) != RESET) ? 1 : 0);
bogdanm 0:9b334a45a8ff 617 return status;
bogdanm 0:9b334a45a8ff 618 }
bogdanm 0:9b334a45a8ff 619
bogdanm 0:9b334a45a8ff 620 void serial_clear(serial_t *obj)
bogdanm 0:9b334a45a8ff 621 {
mbed_official 55:814265bf5462 622 UartHandle.Instance = (USART_TypeDef *)(SERIAL_OBJ(uart));
bogdanm 0:9b334a45a8ff 623 __HAL_UART_CLEAR_FLAG(&UartHandle, UART_FLAG_TXE);
bogdanm 0:9b334a45a8ff 624 __HAL_UART_CLEAR_FLAG(&UartHandle, UART_FLAG_RXNE);
bogdanm 0:9b334a45a8ff 625 }
bogdanm 0:9b334a45a8ff 626
bogdanm 0:9b334a45a8ff 627 void serial_pinout_tx(PinName tx)
bogdanm 0:9b334a45a8ff 628 {
bogdanm 0:9b334a45a8ff 629 pinmap_pinout(tx, PinMap_UART_TX);
bogdanm 0:9b334a45a8ff 630 }
bogdanm 0:9b334a45a8ff 631
bogdanm 0:9b334a45a8ff 632 void serial_break_set(serial_t *obj)
bogdanm 0:9b334a45a8ff 633 {
mbed_official 55:814265bf5462 634 UartHandle.Instance = (USART_TypeDef *)(SERIAL_OBJ(uart));
bogdanm 0:9b334a45a8ff 635 HAL_LIN_SendBreak(&UartHandle);
bogdanm 0:9b334a45a8ff 636 }
bogdanm 0:9b334a45a8ff 637
bogdanm 0:9b334a45a8ff 638 void serial_break_clear(serial_t *obj)
bogdanm 0:9b334a45a8ff 639 {
bogdanm 0:9b334a45a8ff 640 }
bogdanm 0:9b334a45a8ff 641
mbed_official 55:814265bf5462 642 //########################################################################################
mbed_official 55:814265bf5462 643
mbed_official 55:814265bf5462 644 #if DEVICE_SERIAL_ASYNCH
mbed_official 55:814265bf5462 645
mbed_official 55:814265bf5462 646 //----------------------------------------------------------------------------------------
mbed_official 55:814265bf5462 647 // LOCAL HELPER FUNCTIONS
mbed_official 55:814265bf5462 648 //----------------------------------------------------------------------------------------
mbed_official 55:814265bf5462 649
mbed_official 55:814265bf5462 650 /** Configure the TX buffer for an asynchronous write serial transaction
mbed_official 55:814265bf5462 651 *
mbed_official 55:814265bf5462 652 * @param obj The serial object.
mbed_official 55:814265bf5462 653 * @param tx The buffer for sending.
mbed_official 55:814265bf5462 654 * @param tx_length The number of words to transmit.
mbed_official 55:814265bf5462 655 */
mbed_official 55:814265bf5462 656 static void h_serial_tx_buffer_set(serial_t *obj, void *tx, int tx_length, uint8_t width)
mbed_official 55:814265bf5462 657 {
mbed_official 55:814265bf5462 658 // We only support byte buffers for now
mbed_official 55:814265bf5462 659 MBED_ASSERT(width == 8);
mbed_official 55:814265bf5462 660 UartHandle.Instance = (USART_TypeDef *)SERIAL_OBJ(uart);
mbed_official 55:814265bf5462 661
mbed_official 55:814265bf5462 662 // Exit if a transmit is already on-going
mbed_official 55:814265bf5462 663 if (serial_tx_active(obj)) return;
mbed_official 55:814265bf5462 664
mbed_official 55:814265bf5462 665 obj->tx_buff.buffer = tx;
mbed_official 55:814265bf5462 666 obj->tx_buff.length = tx_length;
mbed_official 55:814265bf5462 667 obj->tx_buff.pos = 0;
mbed_official 55:814265bf5462 668
mbed_official 55:814265bf5462 669 return;
mbed_official 55:814265bf5462 670 }
mbed_official 55:814265bf5462 671
mbed_official 55:814265bf5462 672 /** Configure the RX buffer for an asynchronous write serial transaction
mbed_official 55:814265bf5462 673 *
mbed_official 55:814265bf5462 674 * @param obj The serial object.
mbed_official 55:814265bf5462 675 * @param tx The buffer for sending.
mbed_official 55:814265bf5462 676 * @param tx_length The number of words to transmit.
mbed_official 55:814265bf5462 677 */
mbed_official 55:814265bf5462 678 static void h_serial_rx_buffer_set(serial_t *obj, void *rx, int rx_length, uint8_t width)
mbed_official 55:814265bf5462 679 {
mbed_official 55:814265bf5462 680 /* Sanity check arguments */
mbed_official 55:814265bf5462 681 MBED_ASSERT(obj);
mbed_official 55:814265bf5462 682 MBED_ASSERT(rx != (void*)0);
mbed_official 55:814265bf5462 683 // We only support byte buffers for now
mbed_official 55:814265bf5462 684 MBED_ASSERT(width == 8);
mbed_official 55:814265bf5462 685
mbed_official 55:814265bf5462 686 // Exit if a reception is already on-going
mbed_official 55:814265bf5462 687 if (serial_rx_active(obj)) return;
mbed_official 55:814265bf5462 688
mbed_official 55:814265bf5462 689 obj->rx_buff.buffer = rx;
mbed_official 55:814265bf5462 690 obj->rx_buff.length = rx_length;
mbed_official 55:814265bf5462 691 obj->rx_buff.pos = 0;
mbed_official 55:814265bf5462 692
mbed_official 55:814265bf5462 693 return;
mbed_official 55:814265bf5462 694 }
mbed_official 55:814265bf5462 695
mbed_official 55:814265bf5462 696 /** Configure TX events
mbed_official 55:814265bf5462 697 *
mbed_official 55:814265bf5462 698 * @param obj The serial object
mbed_official 55:814265bf5462 699 * @param event The logical OR of the TX events to configure
mbed_official 55:814265bf5462 700 * @param enable Set to non-zero to enable events, or zero to disable them
mbed_official 55:814265bf5462 701 */
mbed_official 55:814265bf5462 702 static void h_serial_tx_enable_event(serial_t *obj, int event, uint8_t enable)
mbed_official 55:814265bf5462 703 {
mbed_official 55:814265bf5462 704 // Shouldn't have to enable TX interrupt here, just need to keep track of the requested events.
mbed_official 55:814265bf5462 705 if (enable) SERIAL_OBJ(events) |= event;
mbed_official 55:814265bf5462 706 else SERIAL_OBJ(events) &= ~event;
mbed_official 55:814265bf5462 707 }
mbed_official 55:814265bf5462 708
mbed_official 55:814265bf5462 709 /** Configure RX events
mbed_official 55:814265bf5462 710 *
mbed_official 55:814265bf5462 711 * @param obj The serial object
mbed_official 55:814265bf5462 712 * @param event The logical OR of the RX events to configure
mbed_official 55:814265bf5462 713 * @param enable Set to non-zero to enable events, or zero to disable them
mbed_official 55:814265bf5462 714 */
mbed_official 55:814265bf5462 715 static void h_serial_rx_enable_event(serial_t *obj, int event, uint8_t enable)
mbed_official 55:814265bf5462 716 {
mbed_official 55:814265bf5462 717 // Shouldn't have to enable RX interrupt here, just need to keep track of the requested events.
mbed_official 55:814265bf5462 718 if (enable) SERIAL_OBJ(events) |= event;
mbed_official 55:814265bf5462 719 else SERIAL_OBJ(events) &= ~event;
mbed_official 55:814265bf5462 720 }
mbed_official 55:814265bf5462 721
mbed_official 55:814265bf5462 722 /**
mbed_official 55:814265bf5462 723 * Get index of serial object TX IRQ, relating it to the physical peripheral.
mbed_official 55:814265bf5462 724 *
mbed_official 55:814265bf5462 725 * @param obj pointer to serial object
mbed_official 55:814265bf5462 726 * @return internal NVIC TX IRQ index of U(S)ART peripheral
mbed_official 55:814265bf5462 727 */
mbed_official 55:814265bf5462 728 static IRQn_Type h_serial_get_irq_index(serial_t *obj)
mbed_official 55:814265bf5462 729 {
mbed_official 55:814265bf5462 730 IRQn_Type irq_n = (IRQn_Type)0;
mbed_official 55:814265bf5462 731
mbed_official 55:814265bf5462 732 UartHandle.Instance = (USART_TypeDef *)SERIAL_OBJ(uart);
mbed_official 55:814265bf5462 733
mbed_official 55:814265bf5462 734 switch (SERIAL_OBJ(uart)) {
mbed_official 55:814265bf5462 735 #if defined(USART1_BASE)
mbed_official 55:814265bf5462 736 case UART_1:
mbed_official 55:814265bf5462 737 irq_n = USART1_IRQn;
mbed_official 55:814265bf5462 738 break;
bogdanm 0:9b334a45a8ff 739 #endif
mbed_official 55:814265bf5462 740 #if defined(USART2_BASE)
mbed_official 55:814265bf5462 741 case UART_2:
mbed_official 55:814265bf5462 742 irq_n = USART2_IRQn;
mbed_official 55:814265bf5462 743 break;
mbed_official 55:814265bf5462 744 #endif
mbed_official 55:814265bf5462 745 #if defined(USART3_BASE)
mbed_official 55:814265bf5462 746 case UART_3:
mbed_official 55:814265bf5462 747 irq_n = USART3_IRQn;
mbed_official 55:814265bf5462 748 break;
mbed_official 55:814265bf5462 749 #endif
mbed_official 55:814265bf5462 750 #if defined(UART4_BASE)
mbed_official 55:814265bf5462 751 case UART_4:
mbed_official 55:814265bf5462 752 irq_n = UART4_IRQn;
mbed_official 55:814265bf5462 753 break;
mbed_official 55:814265bf5462 754 #endif
mbed_official 55:814265bf5462 755 #if defined(UART5_BASE)
mbed_official 55:814265bf5462 756 case UART_5:
mbed_official 55:814265bf5462 757 irq_n = UART5_IRQn;
mbed_official 55:814265bf5462 758 break;
mbed_official 55:814265bf5462 759 #endif
mbed_official 55:814265bf5462 760 #if defined(USART6_BASE)
mbed_official 55:814265bf5462 761 case UART_6:
mbed_official 55:814265bf5462 762 irq_n = USART6_IRQn;
mbed_official 55:814265bf5462 763 break;
mbed_official 55:814265bf5462 764 #endif
mbed_official 55:814265bf5462 765 #if defined(UART7_BASE)
mbed_official 55:814265bf5462 766 case UART_7:
mbed_official 55:814265bf5462 767 irq_n = UART7_IRQn;
mbed_official 55:814265bf5462 768 break;
mbed_official 55:814265bf5462 769 #endif
mbed_official 55:814265bf5462 770 #if defined(UART8_BASE)
mbed_official 55:814265bf5462 771 case UART_8:
mbed_official 55:814265bf5462 772 irq_n = UART8_IRQn;
mbed_official 55:814265bf5462 773 break;
mbed_official 55:814265bf5462 774 #endif
mbed_official 55:814265bf5462 775 default:
mbed_official 55:814265bf5462 776 irq_n = (IRQn_Type)0;
mbed_official 55:814265bf5462 777 }
mbed_official 55:814265bf5462 778
mbed_official 55:814265bf5462 779 return irq_n;
mbed_official 55:814265bf5462 780 }
mbed_official 55:814265bf5462 781
mbed_official 55:814265bf5462 782 #if DEVICE_SERIAL_ASYNCH_DMA
mbed_official 55:814265bf5462 783
mbed_official 55:814265bf5462 784 /** The asynchronous TX and RX handler.
mbed_official 55:814265bf5462 785 *
mbed_official 55:814265bf5462 786 * @param obj The serial object
mbed_official 55:814265bf5462 787 * @return Returns event flags if a TX/RX transfer termination condition was met or 0 otherwise
mbed_official 55:814265bf5462 788 */
mbed_official 55:814265bf5462 789 static void h_serial_txdma_irq_handler_asynch()
mbed_official 55:814265bf5462 790 {
mbed_official 55:814265bf5462 791 HAL_DMA_IRQHandler(UartHandle.hdmatx);
mbed_official 55:814265bf5462 792 }
mbed_official 55:814265bf5462 793 /** The asynchronous TX and RX handler.
mbed_official 55:814265bf5462 794 *
mbed_official 55:814265bf5462 795 * @param obj The serial object
mbed_official 55:814265bf5462 796 * @return Returns event flags if a TX/RX transfer termination condition was met or 0 otherwise
mbed_official 55:814265bf5462 797 */
mbed_official 55:814265bf5462 798 void h_serial_rxdma_irq_handler_asynch(serial_t *obj)
mbed_official 55:814265bf5462 799 {
mbed_official 55:814265bf5462 800 // UartHandle.Instance = (USART_TypeDef *)(SERIAL_OBJ(uart));
mbed_official 55:814265bf5462 801 HAL_DMA_IRQHandler(UartHandle.hdmarx);
mbed_official 55:814265bf5462 802 }
mbed_official 55:814265bf5462 803
mbed_official 55:814265bf5462 804 /**
mbed_official 55:814265bf5462 805 * Get index of serial object TX DMA IRQ, relating it to the physical peripheral.
mbed_official 55:814265bf5462 806 *
mbed_official 55:814265bf5462 807 * @param obj pointer to serial object
mbed_official 55:814265bf5462 808 * @return internal NVIC TX DMA IRQ index of U(S)ART peripheral
mbed_official 55:814265bf5462 809 */
mbed_official 55:814265bf5462 810 static IRQn_Type h_serial_tx_get_irqdma_index(serial_t *obj)
mbed_official 55:814265bf5462 811 {
mbed_official 55:814265bf5462 812 IRQn_Type irq_n = (IRQn_Type)0;
mbed_official 55:814265bf5462 813
mbed_official 55:814265bf5462 814 UartHandle.Instance = (USART_TypeDef *)SERIAL_OBJ(uart);
mbed_official 55:814265bf5462 815
mbed_official 55:814265bf5462 816 switch (SERIAL_OBJ(uart)) {
mbed_official 55:814265bf5462 817 #if defined(USART1_BASE)
mbed_official 55:814265bf5462 818 case UART_1:
mbed_official 55:814265bf5462 819 irq_n = DMA2_Stream7_IRQn;
mbed_official 55:814265bf5462 820 break;
mbed_official 55:814265bf5462 821 #endif
mbed_official 55:814265bf5462 822 #if defined(USART2_BASE)
mbed_official 55:814265bf5462 823 case UART_2:
mbed_official 55:814265bf5462 824 irq_n = DMA1_Stream6_IRQn;
mbed_official 55:814265bf5462 825 break;
mbed_official 55:814265bf5462 826 #endif
mbed_official 55:814265bf5462 827 #if defined(USART3_BASE)
mbed_official 55:814265bf5462 828 case UART_3:
mbed_official 55:814265bf5462 829 irq_n = DMA1_Stream3_IRQn;
mbed_official 55:814265bf5462 830 break;
mbed_official 55:814265bf5462 831 #endif
mbed_official 55:814265bf5462 832 #if defined(UART4_BASE)
mbed_official 55:814265bf5462 833 case UART_4:
mbed_official 55:814265bf5462 834 irq_n = DMA1_Stream4_IRQn;
mbed_official 55:814265bf5462 835 break;
mbed_official 55:814265bf5462 836 #endif
mbed_official 55:814265bf5462 837 #if defined(UART5_BASE)
mbed_official 55:814265bf5462 838 case UART_5:
mbed_official 55:814265bf5462 839 irq_n = DMA1_Stream7_IRQn;
mbed_official 55:814265bf5462 840 break;
mbed_official 55:814265bf5462 841 #endif
mbed_official 55:814265bf5462 842 #if defined(USART6_BASE)
mbed_official 55:814265bf5462 843 case UART_6:
mbed_official 55:814265bf5462 844 irq_n = DMA2_Stream6_IRQn;
mbed_official 55:814265bf5462 845 break;
mbed_official 55:814265bf5462 846 #endif
mbed_official 55:814265bf5462 847 #if defined(UART7_BASE)
mbed_official 55:814265bf5462 848 case UART_7:
mbed_official 55:814265bf5462 849 irq_n = DMA1_Stream1_IRQn;
mbed_official 55:814265bf5462 850 break;
mbed_official 55:814265bf5462 851 #endif
mbed_official 55:814265bf5462 852 #if defined(UART8_BASE)
mbed_official 55:814265bf5462 853 case UART_8:
mbed_official 55:814265bf5462 854 irq_n = DMA1_Stream0_IRQn;
mbed_official 55:814265bf5462 855 break;
mbed_official 55:814265bf5462 856 #endif
mbed_official 55:814265bf5462 857 default:
mbed_official 55:814265bf5462 858 irq_n = (IRQn_Type)0;
mbed_official 55:814265bf5462 859 }
mbed_official 55:814265bf5462 860
mbed_official 55:814265bf5462 861 return irq_n;
mbed_official 55:814265bf5462 862 }
mbed_official 55:814265bf5462 863 /**
mbed_official 55:814265bf5462 864 * Get index of serial object RX DMA IRQ, relating it to the physical peripheral.
mbed_official 55:814265bf5462 865 *
mbed_official 55:814265bf5462 866 * @param obj pointer to serial object
mbed_official 55:814265bf5462 867 * @return internal NVIC RX DMA IRQ index of U(S)ART peripheral
mbed_official 55:814265bf5462 868 */
mbed_official 55:814265bf5462 869 static IRQn_Type h_serial_rx_get_irqdma_index(serial_t *obj)
mbed_official 55:814265bf5462 870 {
mbed_official 55:814265bf5462 871 IRQn_Type irq_n = (IRQn_Type)0;
mbed_official 55:814265bf5462 872
mbed_official 55:814265bf5462 873 UartHandle.Instance = (USART_TypeDef *)SERIAL_OBJ(uart);
mbed_official 55:814265bf5462 874
mbed_official 55:814265bf5462 875 switch (SERIAL_OBJ(uart)) {
mbed_official 55:814265bf5462 876 #if defined(USART1_BASE)
mbed_official 55:814265bf5462 877 case UART_1:
mbed_official 55:814265bf5462 878 irq_n = DMA2_Stream5_IRQn;
mbed_official 55:814265bf5462 879 break;
mbed_official 55:814265bf5462 880 #endif
mbed_official 55:814265bf5462 881 #if defined(USART2_BASE)
mbed_official 55:814265bf5462 882 case UART_2:
mbed_official 55:814265bf5462 883 irq_n = DMA1_Stream5_IRQn;
mbed_official 55:814265bf5462 884 break;
mbed_official 55:814265bf5462 885 #endif
mbed_official 55:814265bf5462 886 #if defined(USART3_BASE)
mbed_official 55:814265bf5462 887 case UART_3:
mbed_official 55:814265bf5462 888 irq_n = DMA1_Stream1_IRQn;
mbed_official 55:814265bf5462 889 break;
mbed_official 55:814265bf5462 890 #endif
mbed_official 55:814265bf5462 891 #if defined(UART4_BASE)
mbed_official 55:814265bf5462 892 case UART_4:
mbed_official 55:814265bf5462 893 irq_n = DMA1_Stream2_IRQn;
mbed_official 55:814265bf5462 894 break;
mbed_official 55:814265bf5462 895 #endif
mbed_official 55:814265bf5462 896 #if defined(UART5_BASE)
mbed_official 55:814265bf5462 897 case UART_5:
mbed_official 55:814265bf5462 898 irq_n = DMA1_Stream0_IRQn;
mbed_official 55:814265bf5462 899 break;
mbed_official 55:814265bf5462 900 #endif
mbed_official 55:814265bf5462 901 #if defined(USART6_BASE)
mbed_official 55:814265bf5462 902 case UART_6:
mbed_official 55:814265bf5462 903 irq_n = DMA2_Stream2_IRQn;
mbed_official 55:814265bf5462 904 break;
mbed_official 55:814265bf5462 905 #endif
mbed_official 55:814265bf5462 906 #if defined(UART7_BASE)
mbed_official 55:814265bf5462 907 case UART_7:
mbed_official 55:814265bf5462 908 irq_n = DMA1_Stream3_IRQn;
mbed_official 55:814265bf5462 909 break;
mbed_official 55:814265bf5462 910 #endif
mbed_official 55:814265bf5462 911 #if defined(UART8_BASE)
mbed_official 55:814265bf5462 912 case UART_8:
mbed_official 55:814265bf5462 913 irq_n = DMA1_Stream6_IRQn;
mbed_official 55:814265bf5462 914 break;
mbed_official 55:814265bf5462 915 #endif
mbed_official 55:814265bf5462 916 default:
mbed_official 55:814265bf5462 917 irq_n = (IRQn_Type)0;
mbed_official 55:814265bf5462 918 }
mbed_official 55:814265bf5462 919
mbed_official 55:814265bf5462 920 return irq_n;
mbed_official 55:814265bf5462 921 }
mbed_official 55:814265bf5462 922 #endif
mbed_official 55:814265bf5462 923 //----------------------------------------------------------------------------------------
mbed_official 55:814265bf5462 924 // MBED API FUNCTIONS
mbed_official 55:814265bf5462 925 //----------------------------------------------------------------------------------------
mbed_official 55:814265bf5462 926
mbed_official 55:814265bf5462 927 /** Begin asynchronous TX transfer. The used buffer is specified in the serial object,
mbed_official 55:814265bf5462 928 * tx_buff
mbed_official 55:814265bf5462 929 *
mbed_official 55:814265bf5462 930 * @param obj The serial object
mbed_official 55:814265bf5462 931 * @param tx The buffer for sending
mbed_official 55:814265bf5462 932 * @param tx_length The number of words to transmit
mbed_official 55:814265bf5462 933 * @param tx_width The bit width of buffer word
mbed_official 55:814265bf5462 934 * @param handler The serial handler
mbed_official 55:814265bf5462 935 * @param event The logical OR of events to be registered
mbed_official 55:814265bf5462 936 * @param hint A suggestion for how to use DMA with this transfer
mbed_official 55:814265bf5462 937 * @return Returns number of data transfered, or 0 otherwise
mbed_official 55:814265bf5462 938 */
mbed_official 55:814265bf5462 939 int serial_tx_asynch(serial_t *obj, const void *tx, size_t tx_length, uint8_t tx_width, uint32_t handler, uint32_t event, DMAUsage hint)
mbed_official 55:814265bf5462 940 {
mbed_official 55:814265bf5462 941
mbed_official 55:814265bf5462 942 // Check buffer is ok
mbed_official 55:814265bf5462 943 MBED_ASSERT(tx != (void*)0);
mbed_official 55:814265bf5462 944 MBED_ASSERT(tx_width == 8); // support only 8b width
mbed_official 55:814265bf5462 945
mbed_official 55:814265bf5462 946 if (tx_length == 0) return 0;
mbed_official 55:814265bf5462 947
mbed_official 55:814265bf5462 948 // Set up buffer
mbed_official 55:814265bf5462 949 h_serial_tx_buffer_set(obj, (void *)tx, tx_length, tx_width);
mbed_official 55:814265bf5462 950
mbed_official 55:814265bf5462 951 // Set up events
mbed_official 55:814265bf5462 952 h_serial_tx_enable_event(obj, SERIAL_EVENT_TX_ALL, 0); // Clear all events
mbed_official 55:814265bf5462 953 h_serial_tx_enable_event(obj, event, 1); // Set only the wanted events
mbed_official 55:814265bf5462 954
mbed_official 55:814265bf5462 955 // Enable interrupt
mbed_official 55:814265bf5462 956 IRQn_Type irqn = h_serial_get_irq_index(obj);
mbed_official 55:814265bf5462 957 NVIC_ClearPendingIRQ(irqn);
mbed_official 55:814265bf5462 958 NVIC_DisableIRQ(irqn);
mbed_official 55:814265bf5462 959 NVIC_SetPriority(irqn, 1);
mbed_official 55:814265bf5462 960 NVIC_SetVector(irqn, (uint32_t)handler);
mbed_official 55:814265bf5462 961 UartHandle.Instance = (USART_TypeDef *)SERIAL_OBJ(uart);
mbed_official 55:814265bf5462 962 NVIC_EnableIRQ(irqn);
mbed_official 55:814265bf5462 963
mbed_official 55:814265bf5462 964 #if DEVICE_SERIAL_ASYNCH_DMA
mbed_official 55:814265bf5462 965 // Enable DMA interrupt
mbed_official 55:814265bf5462 966 irqn = h_serial_tx_get_irqdma_index(obj);
mbed_official 55:814265bf5462 967 NVIC_ClearPendingIRQ(irqn);
mbed_official 55:814265bf5462 968 NVIC_DisableIRQ(irqn);
mbed_official 55:814265bf5462 969 NVIC_SetPriority(irqn, 1);
mbed_official 55:814265bf5462 970 // NVIC_SetVector(irqn, (uint32_t)&h_serial_txdma_irq_handler_asynch);
mbed_official 55:814265bf5462 971 NVIC_SetVector(irqn, (uint32_t)handler);
mbed_official 55:814265bf5462 972 NVIC_EnableIRQ(irqn);
mbed_official 55:814265bf5462 973
mbed_official 55:814265bf5462 974 // the following function will enable program and enable the DMA transfer
mbed_official 55:814265bf5462 975 if (HAL_UART_Transmit_DMA(&UartHandle, (uint8_t*)tx, tx_length) != HAL_OK)
mbed_official 55:814265bf5462 976 {
mbed_official 55:814265bf5462 977 /* Transfer error in transmission process */
mbed_official 55:814265bf5462 978 return 0;
mbed_official 55:814265bf5462 979 }
mbed_official 55:814265bf5462 980 #else
mbed_official 55:814265bf5462 981 // the following function will enable UART_IT_TXE and error interrupts
mbed_official 55:814265bf5462 982 if (HAL_UART_Transmit_IT(&UartHandle, (uint8_t*)tx, tx_length) != HAL_OK)
mbed_official 55:814265bf5462 983 {
mbed_official 55:814265bf5462 984 /* Transfer error in transmission process */
mbed_official 55:814265bf5462 985 return 0;
mbed_official 55:814265bf5462 986 }
mbed_official 55:814265bf5462 987 #endif
mbed_official 55:814265bf5462 988
mbed_official 55:814265bf5462 989 return tx_length;
mbed_official 55:814265bf5462 990 }
mbed_official 55:814265bf5462 991
mbed_official 55:814265bf5462 992 /** Begin asynchronous RX transfer (enable interrupt for data collecting)
mbed_official 55:814265bf5462 993 * The used buffer is specified in the serial object - rx_buff
mbed_official 55:814265bf5462 994 *
mbed_official 55:814265bf5462 995 * @param obj The serial object
mbed_official 55:814265bf5462 996 * @param rx The buffer for sending
mbed_official 55:814265bf5462 997 * @param rx_length The number of words to transmit
mbed_official 55:814265bf5462 998 * @param rx_width The bit width of buffer word
mbed_official 55:814265bf5462 999 * @param handler The serial handler
mbed_official 55:814265bf5462 1000 * @param event The logical OR of events to be registered
mbed_official 55:814265bf5462 1001 * @param handler The serial handler
mbed_official 55:814265bf5462 1002 * @param char_match A character in range 0-254 to be matched
mbed_official 55:814265bf5462 1003 * @param hint A suggestion for how to use DMA with this transfer
mbed_official 55:814265bf5462 1004 */
mbed_official 55:814265bf5462 1005 void serial_rx_asynch(serial_t *obj, void *rx, size_t rx_length, uint8_t rx_width, uint32_t handler, uint32_t event, uint8_t char_match, DMAUsage hint)
mbed_official 55:814265bf5462 1006 {
mbed_official 55:814265bf5462 1007 /* Sanity check arguments */
mbed_official 55:814265bf5462 1008 MBED_ASSERT(obj);
mbed_official 55:814265bf5462 1009 MBED_ASSERT(rx != (void*)0);
mbed_official 55:814265bf5462 1010 MBED_ASSERT(rx_width == 8); // support only 8b width
mbed_official 55:814265bf5462 1011
mbed_official 55:814265bf5462 1012 h_serial_rx_enable_event(obj, SERIAL_EVENT_RX_ALL, 0);
mbed_official 55:814265bf5462 1013 h_serial_rx_enable_event(obj, event, 1);
mbed_official 55:814265bf5462 1014 // set CharMatch
mbed_official 55:814265bf5462 1015 if (char_match != SERIAL_RESERVED_CHAR_MATCH) {
mbed_official 55:814265bf5462 1016 obj->char_match = char_match;
mbed_official 55:814265bf5462 1017 }
mbed_official 55:814265bf5462 1018 h_serial_rx_buffer_set(obj, rx, rx_length, rx_width);
mbed_official 55:814265bf5462 1019
mbed_official 55:814265bf5462 1020 IRQn_Type irqn = h_serial_get_irq_index(obj);
mbed_official 55:814265bf5462 1021 NVIC_ClearPendingIRQ(irqn);
mbed_official 55:814265bf5462 1022 NVIC_DisableIRQ(irqn);
mbed_official 55:814265bf5462 1023 NVIC_SetPriority(irqn, 0);
mbed_official 55:814265bf5462 1024 NVIC_SetVector(irqn, (uint32_t)handler);
mbed_official 55:814265bf5462 1025 NVIC_EnableIRQ(irqn);
mbed_official 55:814265bf5462 1026
mbed_official 55:814265bf5462 1027 UartHandle.Instance = (USART_TypeDef *)SERIAL_OBJ(uart);
mbed_official 55:814265bf5462 1028 // flush current data + error flags
mbed_official 55:814265bf5462 1029 __HAL_UART_CLEAR_PEFLAG(&UartHandle);
mbed_official 55:814265bf5462 1030 #if DEVICE_SERIAL_ASYNCH_DMA
mbed_official 55:814265bf5462 1031 // Enable DMA interrupt
mbed_official 55:814265bf5462 1032 irqn = h_serial_rx_get_irqdma_index(obj);
mbed_official 55:814265bf5462 1033 NVIC_ClearPendingIRQ(irqn);
mbed_official 55:814265bf5462 1034 NVIC_DisableIRQ(irqn);
mbed_official 55:814265bf5462 1035 NVIC_SetPriority(irqn, 1);
mbed_official 55:814265bf5462 1036 NVIC_SetVector(irqn, (uint32_t)handler);
mbed_official 55:814265bf5462 1037
mbed_official 55:814265bf5462 1038 NVIC_EnableIRQ(irqn);
mbed_official 55:814265bf5462 1039 // following HAL function will program and enable the DMA transfer
mbed_official 55:814265bf5462 1040 HAL_UART_Receive_DMA(&UartHandle, (uint8_t*)rx, rx_length);
mbed_official 55:814265bf5462 1041 #else
mbed_official 55:814265bf5462 1042 // following HAL function will enable the RXNE interrupt + error interrupts
mbed_official 55:814265bf5462 1043 HAL_UART_Receive_IT(&UartHandle, (uint8_t*)rx, rx_length);
mbed_official 55:814265bf5462 1044 #endif
mbed_official 55:814265bf5462 1045 /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */
mbed_official 55:814265bf5462 1046 __HAL_UART_ENABLE_IT(&UartHandle, UART_IT_ERR);
mbed_official 55:814265bf5462 1047
mbed_official 55:814265bf5462 1048 return;
mbed_official 55:814265bf5462 1049 }
mbed_official 55:814265bf5462 1050
mbed_official 55:814265bf5462 1051 /** Attempts to determine if the serial peripheral is already in use for TX
mbed_official 55:814265bf5462 1052 *
mbed_official 55:814265bf5462 1053 * @param obj The serial object
mbed_official 55:814265bf5462 1054 * @return Non-zero if the TX transaction is ongoing, 0 otherwise
mbed_official 55:814265bf5462 1055 */
mbed_official 55:814265bf5462 1056 uint8_t serial_tx_active(serial_t *obj)
mbed_official 55:814265bf5462 1057 {
mbed_official 55:814265bf5462 1058 MBED_ASSERT(obj);
mbed_official 55:814265bf5462 1059 UartHandle.Instance = (USART_TypeDef *)(SERIAL_OBJ(uart));
mbed_official 55:814265bf5462 1060 return ((HAL_UART_GetState(&UartHandle) & UART_STATE_TX_ACTIVE) ? 1 : 0);
mbed_official 55:814265bf5462 1061 }
mbed_official 55:814265bf5462 1062
mbed_official 55:814265bf5462 1063 /** Attempts to determine if the serial peripheral is already in use for RX
mbed_official 55:814265bf5462 1064 *
mbed_official 55:814265bf5462 1065 * @param obj The serial object
mbed_official 55:814265bf5462 1066 * @return Non-zero if the RX transaction is ongoing, 0 otherwise
mbed_official 55:814265bf5462 1067 */
mbed_official 55:814265bf5462 1068 uint8_t serial_rx_active(serial_t *obj)
mbed_official 55:814265bf5462 1069 {
mbed_official 55:814265bf5462 1070 MBED_ASSERT(obj);
mbed_official 55:814265bf5462 1071 UartHandle.Instance = (USART_TypeDef *)(SERIAL_OBJ(uart));
mbed_official 55:814265bf5462 1072 return ((HAL_UART_GetState(&UartHandle) & UART_STATE_RX_ACTIVE) ? 1 : 0);
mbed_official 55:814265bf5462 1073
mbed_official 55:814265bf5462 1074 }
mbed_official 55:814265bf5462 1075
mbed_official 55:814265bf5462 1076 /** The asynchronous TX and RX handler.
mbed_official 55:814265bf5462 1077 *
mbed_official 55:814265bf5462 1078 * @param obj The serial object
mbed_official 55:814265bf5462 1079 * @return Returns event flags if a TX/RX transfer termination condition was met or 0 otherwise
mbed_official 55:814265bf5462 1080 */
mbed_official 55:814265bf5462 1081 int serial_irq_handler_asynch(serial_t *obj)
mbed_official 55:814265bf5462 1082 {
mbed_official 55:814265bf5462 1083 volatile int return_event = 0;
mbed_official 55:814265bf5462 1084 uint8_t *buf = (uint8_t*)obj->rx_buff.buffer;
mbed_official 55:814265bf5462 1085 uint8_t i = 0;
mbed_official 55:814265bf5462 1086
mbed_official 55:814265bf5462 1087 // Irq handler is common to Tx and Rx
mbed_official 55:814265bf5462 1088 UartHandle.Instance = (USART_TypeDef *)(SERIAL_OBJ(uart));
mbed_official 55:814265bf5462 1089 #if DEVICE_SERIAL_ASYNCH_DMA
mbed_official 55:814265bf5462 1090 if ((UartHandle.Instance->CR3 & USART_CR3_DMAT) !=0) {
mbed_official 55:814265bf5462 1091 // call dma tx interrupt
mbed_official 55:814265bf5462 1092 HAL_DMA_IRQHandler(UartHandle.hdmatx);
mbed_official 55:814265bf5462 1093 }
mbed_official 55:814265bf5462 1094 if ((UartHandle.Instance->CR3 & USART_CR3_DMAR) !=0) {
mbed_official 55:814265bf5462 1095 // call dma rx interrupt
mbed_official 55:814265bf5462 1096 HAL_DMA_IRQHandler(UartHandle.hdmarx);
mbed_official 55:814265bf5462 1097 }
mbed_official 55:814265bf5462 1098 #endif
mbed_official 55:814265bf5462 1099 HAL_UART_IRQHandler(&UartHandle);
mbed_official 55:814265bf5462 1100 // TX PART:
mbed_official 55:814265bf5462 1101 if (__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_TC) != RESET) {
mbed_official 55:814265bf5462 1102 __HAL_UART_CLEAR_FLAG(&UartHandle, UART_FLAG_TC);
mbed_official 55:814265bf5462 1103 // return event SERIAL_EVENT_TX_COMPLETE if requested
mbed_official 55:814265bf5462 1104 if ((SERIAL_OBJ(events) & SERIAL_EVENT_TX_COMPLETE ) != 0){
mbed_official 55:814265bf5462 1105 return_event |= SERIAL_EVENT_TX_COMPLETE & obj->serial.events;
mbed_official 55:814265bf5462 1106 }
mbed_official 55:814265bf5462 1107 }
mbed_official 55:814265bf5462 1108 // handle error events:
mbed_official 55:814265bf5462 1109 if (__HAL_UART_GET_FLAG(&UartHandle, HAL_UART_ERROR_PE)) {
mbed_official 55:814265bf5462 1110 __HAL_UART_CLEAR_FLAG(&UartHandle, HAL_UART_ERROR_PE);
mbed_official 55:814265bf5462 1111 return_event |= SERIAL_EVENT_RX_PARITY_ERROR & obj->serial.events;
mbed_official 55:814265bf5462 1112 }
mbed_official 55:814265bf5462 1113 if (__HAL_UART_GET_FLAG(&UartHandle, HAL_UART_ERROR_NE)||(UartHandle.ErrorCode & HAL_UART_ERROR_NE)!=0) {
mbed_official 55:814265bf5462 1114 __HAL_UART_CLEAR_FLAG(&UartHandle, HAL_UART_ERROR_NE);
mbed_official 55:814265bf5462 1115 // not supported by mbed
mbed_official 55:814265bf5462 1116 }
mbed_official 55:814265bf5462 1117 if (__HAL_UART_GET_FLAG(&UartHandle, HAL_UART_ERROR_FE)||(UartHandle.ErrorCode & HAL_UART_ERROR_FE)!=0) {
mbed_official 55:814265bf5462 1118 __HAL_UART_CLEAR_FLAG(&UartHandle, HAL_UART_ERROR_FE);
mbed_official 55:814265bf5462 1119 return_event |= SERIAL_EVENT_RX_FRAMING_ERROR & obj->serial.events;
mbed_official 55:814265bf5462 1120 }
mbed_official 55:814265bf5462 1121 if (__HAL_UART_GET_FLAG(&UartHandle, HAL_UART_ERROR_ORE)||(UartHandle.ErrorCode & HAL_UART_ERROR_ORE)!=0) {
mbed_official 55:814265bf5462 1122 __HAL_UART_CLEAR_FLAG(&UartHandle, HAL_UART_ERROR_ORE);
mbed_official 55:814265bf5462 1123 return_event |= SERIAL_EVENT_RX_OVERRUN_ERROR & obj->serial.events;
mbed_official 55:814265bf5462 1124 }
mbed_official 55:814265bf5462 1125
mbed_official 55:814265bf5462 1126 //RX PART
mbed_official 55:814265bf5462 1127 // increment rx_buff.pos
mbed_official 55:814265bf5462 1128 if (UartHandle.RxXferSize !=0) {
mbed_official 55:814265bf5462 1129 obj->rx_buff.pos = UartHandle.RxXferSize - UartHandle.RxXferCount;
mbed_official 55:814265bf5462 1130 }
mbed_official 55:814265bf5462 1131 if ((UartHandle.RxXferCount==0)&&(obj->rx_buff.pos >= (obj->rx_buff.length - 1))) {
mbed_official 55:814265bf5462 1132 return_event |= SERIAL_EVENT_RX_COMPLETE & obj->serial.events;
mbed_official 55:814265bf5462 1133 }
mbed_official 55:814265bf5462 1134 // Chek if Char_match is present
mbed_official 55:814265bf5462 1135 if (SERIAL_OBJ(events) & SERIAL_EVENT_RX_CHARACTER_MATCH) {
mbed_official 55:814265bf5462 1136 if (buf != NULL){
mbed_official 55:814265bf5462 1137 while((buf[i] != obj->char_match)&&(i<UartHandle.RxXferSize)){//for (i=0;i<UartHandle.RxXferSize;i++){
mbed_official 55:814265bf5462 1138 i++;//if (buf[i] == obj->char_match{
mbed_official 55:814265bf5462 1139 //}
mbed_official 55:814265bf5462 1140 }
mbed_official 55:814265bf5462 1141 if (i<UartHandle.RxXferSize){
mbed_official 55:814265bf5462 1142 obj->rx_buff.pos = i;
mbed_official 55:814265bf5462 1143 return_event |= SERIAL_EVENT_RX_CHARACTER_MATCH & obj->serial.events;
mbed_official 55:814265bf5462 1144 }
mbed_official 55:814265bf5462 1145 }
mbed_official 55:814265bf5462 1146 }
mbed_official 55:814265bf5462 1147 return return_event;
mbed_official 55:814265bf5462 1148 }
mbed_official 55:814265bf5462 1149
mbed_official 55:814265bf5462 1150 /** Abort the ongoing TX transaction. It disables the enabled interupt for TX and
mbed_official 55:814265bf5462 1151 * flush TX hardware buffer if TX FIFO is used
mbed_official 55:814265bf5462 1152 *
mbed_official 55:814265bf5462 1153 * @param obj The serial object
mbed_official 55:814265bf5462 1154 */
mbed_official 55:814265bf5462 1155 void serial_tx_abort_asynch(serial_t *obj)
mbed_official 55:814265bf5462 1156 {
mbed_official 55:814265bf5462 1157 UartHandle.Instance = (USART_TypeDef *)(SERIAL_OBJ(uart));
mbed_official 55:814265bf5462 1158 __HAL_UART_DISABLE_IT(&UartHandle, UART_IT_TC|UART_IT_TXE);
mbed_official 55:814265bf5462 1159 UartHandle.Instance = 0;
mbed_official 55:814265bf5462 1160
mbed_official 55:814265bf5462 1161 obj->tx_buff.buffer = 0;
mbed_official 55:814265bf5462 1162 obj->tx_buff.length = 0;
mbed_official 55:814265bf5462 1163
mbed_official 55:814265bf5462 1164 }
mbed_official 55:814265bf5462 1165
mbed_official 55:814265bf5462 1166 /** Abort the ongoing RX transaction It disables the enabled interrupt for RX and
mbed_official 55:814265bf5462 1167 * flush RX hardware buffer if RX FIFO is used
mbed_official 55:814265bf5462 1168 *
mbed_official 55:814265bf5462 1169 * @param obj The serial object
mbed_official 55:814265bf5462 1170 */
mbed_official 55:814265bf5462 1171 void serial_rx_abort_asynch(serial_t *obj)
mbed_official 55:814265bf5462 1172 {
mbed_official 55:814265bf5462 1173 UartHandle.Instance = (USART_TypeDef *)(SERIAL_OBJ(uart));
mbed_official 55:814265bf5462 1174 __HAL_UART_DISABLE_IT(&UartHandle, UART_IT_RXNE);
mbed_official 55:814265bf5462 1175 UartHandle.Instance = 0;
mbed_official 55:814265bf5462 1176
mbed_official 55:814265bf5462 1177 obj->rx_buff.buffer = 0;
mbed_official 55:814265bf5462 1178 obj->rx_buff.length = 0;
mbed_official 55:814265bf5462 1179
mbed_official 55:814265bf5462 1180 }
mbed_official 55:814265bf5462 1181
mbed_official 55:814265bf5462 1182 #endif
mbed_official 55:814265bf5462 1183
mbed_official 60:6e6ed0527880 1184 #if DEVICE_SERIAL_FC
mbed_official 60:6e6ed0527880 1185 /** Set HW Control Flow
mbed_official 60:6e6ed0527880 1186 * @param obj The serial object
mbed_official 60:6e6ed0527880 1187 * @param type The Control Flow type (FlowControlNone, FlowControlRTS, FlowControlCTS, FlowControlRTSCTS)
mbed_official 60:6e6ed0527880 1188 * @param rxflow Pin for the rxflow
mbed_official 60:6e6ed0527880 1189 * @param txflow Pin for the txflow
mbed_official 60:6e6ed0527880 1190 */
mbed_official 60:6e6ed0527880 1191 void serial_set_flow_control(serial_t *obj, FlowControl type, PinName rxflow, PinName txflow)
mbed_official 60:6e6ed0527880 1192 {
mbed_official 60:6e6ed0527880 1193
mbed_official 60:6e6ed0527880 1194 // Determine the UART to use (UART_1, UART_2, ...)
mbed_official 60:6e6ed0527880 1195 UARTName uart_rts = (UARTName)pinmap_peripheral(rxflow, PinMap_UART_RTS);
mbed_official 60:6e6ed0527880 1196 UARTName uart_cts = (UARTName)pinmap_peripheral(txflow, PinMap_UART_CTS);
mbed_official 60:6e6ed0527880 1197
mbed_official 60:6e6ed0527880 1198 // Get the peripheral name (UART_1, UART_2, ...) from the pin and assign it to the object
mbed_official 60:6e6ed0527880 1199 SERIAL_OBJ(uart) = (UARTName)pinmap_merge(uart_cts, uart_rts);
mbed_official 60:6e6ed0527880 1200
mbed_official 60:6e6ed0527880 1201 MBED_ASSERT(SERIAL_OBJ(uart) != (UARTName)NC);
mbed_official 60:6e6ed0527880 1202 UartHandle.Instance = (USART_TypeDef *)(SERIAL_OBJ(uart));
mbed_official 60:6e6ed0527880 1203
mbed_official 60:6e6ed0527880 1204 if(type == FlowControlNone) {
mbed_official 60:6e6ed0527880 1205 // Disable hardware flow control
mbed_official 60:6e6ed0527880 1206 SERIAL_OBJ(hw_flow_ctl) = UART_HWCONTROL_NONE;
mbed_official 60:6e6ed0527880 1207 }
mbed_official 60:6e6ed0527880 1208 if (type == FlowControlRTS) {
mbed_official 60:6e6ed0527880 1209 // Enable RTS
mbed_official 60:6e6ed0527880 1210 MBED_ASSERT(uart_rts != (UARTName)NC);
mbed_official 60:6e6ed0527880 1211 SERIAL_OBJ(hw_flow_ctl) = UART_HWCONTROL_RTS;
mbed_official 60:6e6ed0527880 1212 SERIAL_OBJ(pin_rts) = rxflow;
mbed_official 60:6e6ed0527880 1213 // Enable the pin for RTS function
mbed_official 60:6e6ed0527880 1214 pinmap_pinout(rxflow, PinMap_UART_RTS);
mbed_official 60:6e6ed0527880 1215 }
mbed_official 60:6e6ed0527880 1216 if (type == FlowControlCTS) {
mbed_official 60:6e6ed0527880 1217 // Enable CTS
mbed_official 60:6e6ed0527880 1218 MBED_ASSERT(uart_cts != (UARTName)NC);
mbed_official 60:6e6ed0527880 1219 SERIAL_OBJ(hw_flow_ctl) = UART_HWCONTROL_CTS;
mbed_official 60:6e6ed0527880 1220 SERIAL_OBJ(pin_cts) = txflow;
mbed_official 60:6e6ed0527880 1221 // Enable the pin for CTS function
mbed_official 60:6e6ed0527880 1222 pinmap_pinout(txflow, PinMap_UART_CTS);
mbed_official 60:6e6ed0527880 1223 }
mbed_official 60:6e6ed0527880 1224 if (type == FlowControlRTSCTS) {
mbed_official 60:6e6ed0527880 1225 // Enable CTS & RTS
mbed_official 60:6e6ed0527880 1226 MBED_ASSERT(uart_rts != (UARTName)NC);
mbed_official 60:6e6ed0527880 1227 MBED_ASSERT(uart_cts != (UARTName)NC);
mbed_official 60:6e6ed0527880 1228 SERIAL_OBJ(hw_flow_ctl) = UART_HWCONTROL_RTS_CTS;
mbed_official 60:6e6ed0527880 1229 SERIAL_OBJ(pin_rts) = rxflow;
mbed_official 60:6e6ed0527880 1230 SERIAL_OBJ(pin_cts) = txflow;
mbed_official 60:6e6ed0527880 1231 // Enable the pin for CTS function
mbed_official 60:6e6ed0527880 1232 pinmap_pinout(txflow, PinMap_UART_CTS);
mbed_official 60:6e6ed0527880 1233 // Enable the pin for RTS function
mbed_official 60:6e6ed0527880 1234 pinmap_pinout(rxflow, PinMap_UART_RTS);
mbed_official 60:6e6ed0527880 1235 }
mbed_official 60:6e6ed0527880 1236 init_uart(obj);
mbed_official 60:6e6ed0527880 1237 }
mbed_official 55:814265bf5462 1238 #endif
mbed_official 60:6e6ed0527880 1239 #endif