Toyomasa Watarai / mbed-dev

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targets/hal/TARGET_NXP/TARGET_LPC176X/can_api.c@68:53d4cfd70523, 2016-02-19 (annotated)

Committer:
MACRUM
Date:
Fri Feb 19 06:16:11 2016 +0000
Revision:
68:53d4cfd70523
Parent:
0:9b334a45a8ff 
Add state reset code in analogin_init() for Nucleo F303K8 target

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /* mbed Microcontroller Library
bogdanm 0:9b334a45a8ff 2 * Copyright (c) 2006-2013 ARM Limited
bogdanm 0:9b334a45a8ff 3 *
bogdanm 0:9b334a45a8ff 4 * Licensed under the Apache License, Version 2.0 (the "License");
bogdanm 0:9b334a45a8ff 5 * you may not use this file except in compliance with the License.
bogdanm 0:9b334a45a8ff 6 * You may obtain a copy of the License at
bogdanm 0:9b334a45a8ff 7 *
bogdanm 0:9b334a45a8ff 8 * http://www.apache.org/licenses/LICENSE-2.0
bogdanm 0:9b334a45a8ff 9 *
bogdanm 0:9b334a45a8ff 10 * Unless required by applicable law or agreed to in writing, software
bogdanm 0:9b334a45a8ff 11 * distributed under the License is distributed on an "AS IS" BASIS,
bogdanm 0:9b334a45a8ff 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
bogdanm 0:9b334a45a8ff 13 * See the License for the specific language governing permissions and
bogdanm 0:9b334a45a8ff 14 * limitations under the License.
bogdanm 0:9b334a45a8ff 15 */
bogdanm 0:9b334a45a8ff 16 #include "mbed_assert.h"
bogdanm 0:9b334a45a8ff 17 #include "can_api.h"
bogdanm 0:9b334a45a8ff 18
bogdanm 0:9b334a45a8ff 19 #include "cmsis.h"
bogdanm 0:9b334a45a8ff 20 #include "pinmap.h"
bogdanm 0:9b334a45a8ff 21
bogdanm 0:9b334a45a8ff 22 #include <math.h>
bogdanm 0:9b334a45a8ff 23 #include <string.h>
bogdanm 0:9b334a45a8ff 24
bogdanm 0:9b334a45a8ff 25 #define CAN_NUM 2
bogdanm 0:9b334a45a8ff 26
bogdanm 0:9b334a45a8ff 27 /* Acceptance filter mode in AFMR register */
bogdanm 0:9b334a45a8ff 28 #define ACCF_OFF 0x01
bogdanm 0:9b334a45a8ff 29 #define ACCF_BYPASS 0x02
bogdanm 0:9b334a45a8ff 30 #define ACCF_ON 0x00
bogdanm 0:9b334a45a8ff 31 #define ACCF_FULLCAN 0x04
bogdanm 0:9b334a45a8ff 32
bogdanm 0:9b334a45a8ff 33 /* There are several bit timing calculators on the internet.
bogdanm 0:9b334a45a8ff 34 http://www.port.de/engl/canprod/sv_req_form.html
bogdanm 0:9b334a45a8ff 35 http://www.kvaser.com/can/index.htm
bogdanm 0:9b334a45a8ff 36 */
bogdanm 0:9b334a45a8ff 37
bogdanm 0:9b334a45a8ff 38 static const PinMap PinMap_CAN_RD[] = {
bogdanm 0:9b334a45a8ff 39 {P0_0 , CAN_1, 1},
bogdanm 0:9b334a45a8ff 40 {P0_4 , CAN_2, 2},
bogdanm 0:9b334a45a8ff 41 {P0_21, CAN_1, 3},
bogdanm 0:9b334a45a8ff 42 {P2_7 , CAN_2, 1},
bogdanm 0:9b334a45a8ff 43 {NC , NC , 0}
bogdanm 0:9b334a45a8ff 44 };
bogdanm 0:9b334a45a8ff 45
bogdanm 0:9b334a45a8ff 46 static const PinMap PinMap_CAN_TD[] = {
bogdanm 0:9b334a45a8ff 47 {P0_1 , CAN_1, 1},
bogdanm 0:9b334a45a8ff 48 {P0_5 , CAN_2, 2},
bogdanm 0:9b334a45a8ff 49 {P0_22, CAN_1, 3},
bogdanm 0:9b334a45a8ff 50 {P2_8 , CAN_2, 1},
bogdanm 0:9b334a45a8ff 51 {NC , NC , 0}
bogdanm 0:9b334a45a8ff 52 };
bogdanm 0:9b334a45a8ff 53
bogdanm 0:9b334a45a8ff 54 // Type definition to hold a CAN message
bogdanm 0:9b334a45a8ff 55 struct CANMsg {
bogdanm 0:9b334a45a8ff 56 unsigned int reserved1 : 16;
bogdanm 0:9b334a45a8ff 57 unsigned int dlc : 4; // Bits 16..19: DLC - Data Length Counter
bogdanm 0:9b334a45a8ff 58 unsigned int reserved0 : 10;
bogdanm 0:9b334a45a8ff 59 unsigned int rtr : 1; // Bit 30: Set if this is a RTR message
bogdanm 0:9b334a45a8ff 60 unsigned int type : 1; // Bit 31: Set if this is a 29-bit ID message
bogdanm 0:9b334a45a8ff 61 unsigned int id; // CAN Message ID (11-bit or 29-bit)
bogdanm 0:9b334a45a8ff 62 unsigned char data[8]; // CAN Message Data Bytes 0-7
bogdanm 0:9b334a45a8ff 63 };
bogdanm 0:9b334a45a8ff 64 typedef struct CANMsg CANMsg;
bogdanm 0:9b334a45a8ff 65
bogdanm 0:9b334a45a8ff 66 static uint32_t can_irq_ids[CAN_NUM] = {0};
bogdanm 0:9b334a45a8ff 67 static can_irq_handler irq_handler;
bogdanm 0:9b334a45a8ff 68
bogdanm 0:9b334a45a8ff 69 static uint32_t can_disable(can_t *obj) {
bogdanm 0:9b334a45a8ff 70 uint32_t sm = obj->dev->MOD;
bogdanm 0:9b334a45a8ff 71 obj->dev->MOD |= 1;
bogdanm 0:9b334a45a8ff 72 return sm;
bogdanm 0:9b334a45a8ff 73 }
bogdanm 0:9b334a45a8ff 74
bogdanm 0:9b334a45a8ff 75 static inline void can_enable(can_t *obj) {
bogdanm 0:9b334a45a8ff 76 if (obj->dev->MOD & 1) {
bogdanm 0:9b334a45a8ff 77 obj->dev->MOD &= ~(1);
bogdanm 0:9b334a45a8ff 78 }
bogdanm 0:9b334a45a8ff 79 }
bogdanm 0:9b334a45a8ff 80
bogdanm 0:9b334a45a8ff 81 int can_mode(can_t *obj, CanMode mode) {
bogdanm 0:9b334a45a8ff 82 int success = 0;
bogdanm 0:9b334a45a8ff 83 switch (mode) {
bogdanm 0:9b334a45a8ff 84 case MODE_RESET:
bogdanm 0:9b334a45a8ff 85 // Clear all special modes
bogdanm 0:9b334a45a8ff 86 can_reset(obj);
bogdanm 0:9b334a45a8ff 87 obj->dev->MOD &=~ 0x06;
bogdanm 0:9b334a45a8ff 88 success = 1;
bogdanm 0:9b334a45a8ff 89 break;
bogdanm 0:9b334a45a8ff 90 case MODE_NORMAL:
bogdanm 0:9b334a45a8ff 91 // Clear all special modes
bogdanm 0:9b334a45a8ff 92 can_disable(obj);
bogdanm 0:9b334a45a8ff 93 obj->dev->MOD &=~ 0x06;
bogdanm 0:9b334a45a8ff 94 can_enable(obj);
bogdanm 0:9b334a45a8ff 95 success = 1;
bogdanm 0:9b334a45a8ff 96 break;
bogdanm 0:9b334a45a8ff 97 case MODE_SILENT:
bogdanm 0:9b334a45a8ff 98 // Set listen-only mode and clear self-test mode
bogdanm 0:9b334a45a8ff 99 can_disable(obj);
bogdanm 0:9b334a45a8ff 100 obj->dev->MOD |= 0x02;
bogdanm 0:9b334a45a8ff 101 obj->dev->MOD &=~ 0x04;
bogdanm 0:9b334a45a8ff 102 can_enable(obj);
bogdanm 0:9b334a45a8ff 103 success = 1;
bogdanm 0:9b334a45a8ff 104 break;
bogdanm 0:9b334a45a8ff 105 case MODE_TEST_LOCAL:
bogdanm 0:9b334a45a8ff 106 // Set self-test mode and clear listen-only mode
bogdanm 0:9b334a45a8ff 107 can_disable(obj);
bogdanm 0:9b334a45a8ff 108 obj->dev->MOD |= 0x04;
bogdanm 0:9b334a45a8ff 109 obj->dev->MOD &=~ 0x02;
bogdanm 0:9b334a45a8ff 110 can_enable(obj);
bogdanm 0:9b334a45a8ff 111 success = 1;
bogdanm 0:9b334a45a8ff 112 break;
bogdanm 0:9b334a45a8ff 113 case MODE_TEST_SILENT:
bogdanm 0:9b334a45a8ff 114 case MODE_TEST_GLOBAL:
bogdanm 0:9b334a45a8ff 115 default:
bogdanm 0:9b334a45a8ff 116 success = 0;
bogdanm 0:9b334a45a8ff 117 break;
bogdanm 0:9b334a45a8ff 118 }
bogdanm 0:9b334a45a8ff 119
bogdanm 0:9b334a45a8ff 120 return success;
bogdanm 0:9b334a45a8ff 121 }
bogdanm 0:9b334a45a8ff 122
bogdanm 0:9b334a45a8ff 123 int can_filter(can_t *obj, uint32_t id, uint32_t mask, CANFormat format, int32_t handle) {
bogdanm 0:9b334a45a8ff 124 return 0; // not implemented
bogdanm 0:9b334a45a8ff 125 }
bogdanm 0:9b334a45a8ff 126
bogdanm 0:9b334a45a8ff 127 static inline void can_irq(uint32_t icr, uint32_t index) {
bogdanm 0:9b334a45a8ff 128 uint32_t i;
bogdanm 0:9b334a45a8ff 129
bogdanm 0:9b334a45a8ff 130 for(i = 0; i < 8; i++)
bogdanm 0:9b334a45a8ff 131 {
bogdanm 0:9b334a45a8ff 132 if((can_irq_ids[index] != 0) && (icr & (1 << i)))
bogdanm 0:9b334a45a8ff 133 {
bogdanm 0:9b334a45a8ff 134 switch (i) {
bogdanm 0:9b334a45a8ff 135 case 0: irq_handler(can_irq_ids[index], IRQ_RX); break;
bogdanm 0:9b334a45a8ff 136 case 1: irq_handler(can_irq_ids[index], IRQ_TX); break;
bogdanm 0:9b334a45a8ff 137 case 2: irq_handler(can_irq_ids[index], IRQ_ERROR); break;
bogdanm 0:9b334a45a8ff 138 case 3: irq_handler(can_irq_ids[index], IRQ_OVERRUN); break;
bogdanm 0:9b334a45a8ff 139 case 4: irq_handler(can_irq_ids[index], IRQ_WAKEUP); break;
bogdanm 0:9b334a45a8ff 140 case 5: irq_handler(can_irq_ids[index], IRQ_PASSIVE); break;
bogdanm 0:9b334a45a8ff 141 case 6: irq_handler(can_irq_ids[index], IRQ_ARB); break;
bogdanm 0:9b334a45a8ff 142 case 7: irq_handler(can_irq_ids[index], IRQ_BUS); break;
bogdanm 0:9b334a45a8ff 143 case 8: irq_handler(can_irq_ids[index], IRQ_READY); break;
bogdanm 0:9b334a45a8ff 144 }
bogdanm 0:9b334a45a8ff 145 }
bogdanm 0:9b334a45a8ff 146 }
bogdanm 0:9b334a45a8ff 147 }
bogdanm 0:9b334a45a8ff 148
bogdanm 0:9b334a45a8ff 149 // Have to check that the CAN block is active before reading the Interrupt
bogdanm 0:9b334a45a8ff 150 // Control Register, or the mbed hangs
bogdanm 0:9b334a45a8ff 151 void can_irq_n() {
bogdanm 0:9b334a45a8ff 152 uint32_t icr;
bogdanm 0:9b334a45a8ff 153
bogdanm 0:9b334a45a8ff 154 if(LPC_SC->PCONP & (1 << 13)) {
bogdanm 0:9b334a45a8ff 155 icr = LPC_CAN1->ICR & 0x1FF;
bogdanm 0:9b334a45a8ff 156 can_irq(icr, 0);
bogdanm 0:9b334a45a8ff 157 }
bogdanm 0:9b334a45a8ff 158
bogdanm 0:9b334a45a8ff 159 if(LPC_SC->PCONP & (1 << 14)) {
bogdanm 0:9b334a45a8ff 160 icr = LPC_CAN2->ICR & 0x1FF;
bogdanm 0:9b334a45a8ff 161 can_irq(icr, 1);
bogdanm 0:9b334a45a8ff 162 }
bogdanm 0:9b334a45a8ff 163 }
bogdanm 0:9b334a45a8ff 164
bogdanm 0:9b334a45a8ff 165 // Register CAN object's irq handler
bogdanm 0:9b334a45a8ff 166 void can_irq_init(can_t *obj, can_irq_handler handler, uint32_t id) {
bogdanm 0:9b334a45a8ff 167 irq_handler = handler;
bogdanm 0:9b334a45a8ff 168 can_irq_ids[obj->index] = id;
bogdanm 0:9b334a45a8ff 169 }
bogdanm 0:9b334a45a8ff 170
bogdanm 0:9b334a45a8ff 171 // Unregister CAN object's irq handler
bogdanm 0:9b334a45a8ff 172 void can_irq_free(can_t *obj) {
bogdanm 0:9b334a45a8ff 173 obj->dev->IER &= ~(1);
bogdanm 0:9b334a45a8ff 174 can_irq_ids[obj->index] = 0;
bogdanm 0:9b334a45a8ff 175
bogdanm 0:9b334a45a8ff 176 if ((can_irq_ids[0] == 0) && (can_irq_ids[1] == 0)) {
bogdanm 0:9b334a45a8ff 177 NVIC_DisableIRQ(CAN_IRQn);
bogdanm 0:9b334a45a8ff 178 }
bogdanm 0:9b334a45a8ff 179 }
bogdanm 0:9b334a45a8ff 180
bogdanm 0:9b334a45a8ff 181 // Clear or set a irq
bogdanm 0:9b334a45a8ff 182 void can_irq_set(can_t *obj, CanIrqType type, uint32_t enable) {
bogdanm 0:9b334a45a8ff 183 uint32_t ier;
bogdanm 0:9b334a45a8ff 184
bogdanm 0:9b334a45a8ff 185 switch (type) {
bogdanm 0:9b334a45a8ff 186 case IRQ_RX: ier = (1 << 0); break;
bogdanm 0:9b334a45a8ff 187 case IRQ_TX: ier = (1 << 1); break;
bogdanm 0:9b334a45a8ff 188 case IRQ_ERROR: ier = (1 << 2); break;
bogdanm 0:9b334a45a8ff 189 case IRQ_OVERRUN: ier = (1 << 3); break;
bogdanm 0:9b334a45a8ff 190 case IRQ_WAKEUP: ier = (1 << 4); break;
bogdanm 0:9b334a45a8ff 191 case IRQ_PASSIVE: ier = (1 << 5); break;
bogdanm 0:9b334a45a8ff 192 case IRQ_ARB: ier = (1 << 6); break;
bogdanm 0:9b334a45a8ff 193 case IRQ_BUS: ier = (1 << 7); break;
bogdanm 0:9b334a45a8ff 194 case IRQ_READY: ier = (1 << 8); break;
bogdanm 0:9b334a45a8ff 195 default: return;
bogdanm 0:9b334a45a8ff 196 }
bogdanm 0:9b334a45a8ff 197
bogdanm 0:9b334a45a8ff 198 obj->dev->MOD |= 1;
bogdanm 0:9b334a45a8ff 199 if(enable == 0) {
bogdanm 0:9b334a45a8ff 200 obj->dev->IER &= ~ier;
bogdanm 0:9b334a45a8ff 201 }
bogdanm 0:9b334a45a8ff 202 else {
bogdanm 0:9b334a45a8ff 203 obj->dev->IER |= ier;
bogdanm 0:9b334a45a8ff 204 }
bogdanm 0:9b334a45a8ff 205 obj->dev->MOD &= ~(1);
bogdanm 0:9b334a45a8ff 206
bogdanm 0:9b334a45a8ff 207 // Enable NVIC if at least 1 interrupt is active
bogdanm 0:9b334a45a8ff 208 if(((LPC_SC->PCONP & (1 << 13)) && LPC_CAN1->IER) || ((LPC_SC->PCONP & (1 << 14)) && LPC_CAN2->IER)) {
bogdanm 0:9b334a45a8ff 209 NVIC_SetVector(CAN_IRQn, (uint32_t) &can_irq_n);
bogdanm 0:9b334a45a8ff 210 NVIC_EnableIRQ(CAN_IRQn);
bogdanm 0:9b334a45a8ff 211 }
bogdanm 0:9b334a45a8ff 212 else {
bogdanm 0:9b334a45a8ff 213 NVIC_DisableIRQ(CAN_IRQn);
bogdanm 0:9b334a45a8ff 214 }
bogdanm 0:9b334a45a8ff 215 }
bogdanm 0:9b334a45a8ff 216
bogdanm 0:9b334a45a8ff 217 static int can_pclk(can_t *obj) {
bogdanm 0:9b334a45a8ff 218 int value = 0;
bogdanm 0:9b334a45a8ff 219 switch ((int)obj->dev) {
bogdanm 0:9b334a45a8ff 220 case CAN_1: value = (LPC_SC->PCLKSEL0 & (0x3 << 26)) >> 26; break;
bogdanm 0:9b334a45a8ff 221 case CAN_2: value = (LPC_SC->PCLKSEL0 & (0x3 << 28)) >> 28; break;
bogdanm 0:9b334a45a8ff 222 }
bogdanm 0:9b334a45a8ff 223
bogdanm 0:9b334a45a8ff 224 switch (value) {
bogdanm 0:9b334a45a8ff 225 case 1: return 1;
bogdanm 0:9b334a45a8ff 226 case 2: return 2;
bogdanm 0:9b334a45a8ff 227 case 3: return 6;
bogdanm 0:9b334a45a8ff 228 default: return 4;
bogdanm 0:9b334a45a8ff 229 }
bogdanm 0:9b334a45a8ff 230 }
bogdanm 0:9b334a45a8ff 231
bogdanm 0:9b334a45a8ff 232 // This table has the sampling points as close to 75% as possible. The first
bogdanm 0:9b334a45a8ff 233 // value is TSEG1, the second TSEG2.
bogdanm 0:9b334a45a8ff 234 static const int timing_pts[23][2] = {
bogdanm 0:9b334a45a8ff 235 {0x0, 0x0}, // 2, 50%
bogdanm 0:9b334a45a8ff 236 {0x1, 0x0}, // 3, 67%
bogdanm 0:9b334a45a8ff 237 {0x2, 0x0}, // 4, 75%
bogdanm 0:9b334a45a8ff 238 {0x3, 0x0}, // 5, 80%
bogdanm 0:9b334a45a8ff 239 {0x3, 0x1}, // 6, 67%
bogdanm 0:9b334a45a8ff 240 {0x4, 0x1}, // 7, 71%
bogdanm 0:9b334a45a8ff 241 {0x5, 0x1}, // 8, 75%
bogdanm 0:9b334a45a8ff 242 {0x6, 0x1}, // 9, 78%
bogdanm 0:9b334a45a8ff 243 {0x6, 0x2}, // 10, 70%
bogdanm 0:9b334a45a8ff 244 {0x7, 0x2}, // 11, 73%
bogdanm 0:9b334a45a8ff 245 {0x8, 0x2}, // 12, 75%
bogdanm 0:9b334a45a8ff 246 {0x9, 0x2}, // 13, 77%
bogdanm 0:9b334a45a8ff 247 {0x9, 0x3}, // 14, 71%
bogdanm 0:9b334a45a8ff 248 {0xA, 0x3}, // 15, 73%
bogdanm 0:9b334a45a8ff 249 {0xB, 0x3}, // 16, 75%
bogdanm 0:9b334a45a8ff 250 {0xC, 0x3}, // 17, 76%
bogdanm 0:9b334a45a8ff 251 {0xD, 0x3}, // 18, 78%
bogdanm 0:9b334a45a8ff 252 {0xD, 0x4}, // 19, 74%
bogdanm 0:9b334a45a8ff 253 {0xE, 0x4}, // 20, 75%
bogdanm 0:9b334a45a8ff 254 {0xF, 0x4}, // 21, 76%
bogdanm 0:9b334a45a8ff 255 {0xF, 0x5}, // 22, 73%
bogdanm 0:9b334a45a8ff 256 {0xF, 0x6}, // 23, 70%
bogdanm 0:9b334a45a8ff 257 {0xF, 0x7}, // 24, 67%
bogdanm 0:9b334a45a8ff 258 };
bogdanm 0:9b334a45a8ff 259
bogdanm 0:9b334a45a8ff 260 static unsigned int can_speed(unsigned int sclk, unsigned int pclk, unsigned int cclk, unsigned char psjw) {
bogdanm 0:9b334a45a8ff 261 uint32_t btr;
bogdanm 0:9b334a45a8ff 262 uint16_t brp = 0;
bogdanm 0:9b334a45a8ff 263 uint32_t calcbit;
bogdanm 0:9b334a45a8ff 264 uint32_t bitwidth;
bogdanm 0:9b334a45a8ff 265 int hit = 0;
bogdanm 0:9b334a45a8ff 266 int bits;
bogdanm 0:9b334a45a8ff 267
bogdanm 0:9b334a45a8ff 268 bitwidth = sclk / (pclk * cclk);
bogdanm 0:9b334a45a8ff 269
bogdanm 0:9b334a45a8ff 270 brp = bitwidth / 0x18;
bogdanm 0:9b334a45a8ff 271 while ((!hit) && (brp < bitwidth / 4)) {
bogdanm 0:9b334a45a8ff 272 brp++;
bogdanm 0:9b334a45a8ff 273 for (bits = 22; bits > 0; bits--) {
bogdanm 0:9b334a45a8ff 274 calcbit = (bits + 3) * (brp + 1);
bogdanm 0:9b334a45a8ff 275 if (calcbit == bitwidth) {
bogdanm 0:9b334a45a8ff 276 hit = 1;
bogdanm 0:9b334a45a8ff 277 break;
bogdanm 0:9b334a45a8ff 278 }
bogdanm 0:9b334a45a8ff 279 }
bogdanm 0:9b334a45a8ff 280 }
bogdanm 0:9b334a45a8ff 281
bogdanm 0:9b334a45a8ff 282 if (hit) {
bogdanm 0:9b334a45a8ff 283 btr = ((timing_pts[bits][1] << 20) & 0x00700000)
bogdanm 0:9b334a45a8ff 284 | ((timing_pts[bits][0] << 16) & 0x000F0000)
bogdanm 0:9b334a45a8ff 285 | ((psjw << 14) & 0x0000C000)
bogdanm 0:9b334a45a8ff 286 | ((brp << 0) & 0x000003FF);
bogdanm 0:9b334a45a8ff 287 } else {
bogdanm 0:9b334a45a8ff 288 btr = 0xFFFFFFFF;
bogdanm 0:9b334a45a8ff 289 }
bogdanm 0:9b334a45a8ff 290
bogdanm 0:9b334a45a8ff 291 return btr;
bogdanm 0:9b334a45a8ff 292
bogdanm 0:9b334a45a8ff 293 }
bogdanm 0:9b334a45a8ff 294
bogdanm 0:9b334a45a8ff 295 void can_init(can_t *obj, PinName rd, PinName td) {
bogdanm 0:9b334a45a8ff 296 CANName can_rd = (CANName)pinmap_peripheral(rd, PinMap_CAN_RD);
bogdanm 0:9b334a45a8ff 297 CANName can_td = (CANName)pinmap_peripheral(td, PinMap_CAN_TD);
bogdanm 0:9b334a45a8ff 298 obj->dev = (LPC_CAN_TypeDef *)pinmap_merge(can_rd, can_td);
bogdanm 0:9b334a45a8ff 299 MBED_ASSERT((int)obj->dev != NC);
bogdanm 0:9b334a45a8ff 300
bogdanm 0:9b334a45a8ff 301 switch ((int)obj->dev) {
bogdanm 0:9b334a45a8ff 302 case CAN_1: LPC_SC->PCONP |= 1 << 13; break;
bogdanm 0:9b334a45a8ff 303 case CAN_2: LPC_SC->PCONP |= 1 << 14; break;
bogdanm 0:9b334a45a8ff 304 }
bogdanm 0:9b334a45a8ff 305
bogdanm 0:9b334a45a8ff 306 pinmap_pinout(rd, PinMap_CAN_RD);
bogdanm 0:9b334a45a8ff 307 pinmap_pinout(td, PinMap_CAN_TD);
bogdanm 0:9b334a45a8ff 308
bogdanm 0:9b334a45a8ff 309 switch ((int)obj->dev) {
bogdanm 0:9b334a45a8ff 310 case CAN_1: obj->index = 0; break;
bogdanm 0:9b334a45a8ff 311 case CAN_2: obj->index = 1; break;
bogdanm 0:9b334a45a8ff 312 }
bogdanm 0:9b334a45a8ff 313
bogdanm 0:9b334a45a8ff 314 can_reset(obj);
bogdanm 0:9b334a45a8ff 315 obj->dev->IER = 0; // Disable Interrupts
bogdanm 0:9b334a45a8ff 316 can_frequency(obj, 100000);
bogdanm 0:9b334a45a8ff 317
bogdanm 0:9b334a45a8ff 318 LPC_CANAF->AFMR = ACCF_BYPASS; // Bypass Filter
bogdanm 0:9b334a45a8ff 319 }
bogdanm 0:9b334a45a8ff 320
bogdanm 0:9b334a45a8ff 321 void can_free(can_t *obj) {
bogdanm 0:9b334a45a8ff 322 switch ((int)obj->dev) {
bogdanm 0:9b334a45a8ff 323 case CAN_1: LPC_SC->PCONP &= ~(1 << 13); break;
bogdanm 0:9b334a45a8ff 324 case CAN_2: LPC_SC->PCONP &= ~(1 << 14); break;
bogdanm 0:9b334a45a8ff 325 }
bogdanm 0:9b334a45a8ff 326 }
bogdanm 0:9b334a45a8ff 327
bogdanm 0:9b334a45a8ff 328 int can_frequency(can_t *obj, int f) {
bogdanm 0:9b334a45a8ff 329 int pclk = can_pclk(obj);
bogdanm 0:9b334a45a8ff 330
bogdanm 0:9b334a45a8ff 331 int btr = can_speed(SystemCoreClock, pclk, (unsigned int)f, 1);
bogdanm 0:9b334a45a8ff 332
bogdanm 0:9b334a45a8ff 333 if (btr > 0) {
bogdanm 0:9b334a45a8ff 334 uint32_t modmask = can_disable(obj);
bogdanm 0:9b334a45a8ff 335 obj->dev->BTR = btr;
bogdanm 0:9b334a45a8ff 336 obj->dev->MOD = modmask;
bogdanm 0:9b334a45a8ff 337 return 1;
bogdanm 0:9b334a45a8ff 338 } else {
bogdanm 0:9b334a45a8ff 339 return 0;
bogdanm 0:9b334a45a8ff 340 }
bogdanm 0:9b334a45a8ff 341 }
bogdanm 0:9b334a45a8ff 342
bogdanm 0:9b334a45a8ff 343 int can_write(can_t *obj, CAN_Message msg, int cc) {
bogdanm 0:9b334a45a8ff 344 unsigned int CANStatus;
bogdanm 0:9b334a45a8ff 345 CANMsg m;
bogdanm 0:9b334a45a8ff 346
bogdanm 0:9b334a45a8ff 347 can_enable(obj);
bogdanm 0:9b334a45a8ff 348
bogdanm 0:9b334a45a8ff 349 m.id = msg.id ;
bogdanm 0:9b334a45a8ff 350 m.dlc = msg.len & 0xF;
bogdanm 0:9b334a45a8ff 351 m.rtr = msg.type;
bogdanm 0:9b334a45a8ff 352 m.type = msg.format;
bogdanm 0:9b334a45a8ff 353 memcpy(m.data, msg.data, msg.len);
bogdanm 0:9b334a45a8ff 354 const unsigned int *buf = (const unsigned int *)&m;
bogdanm 0:9b334a45a8ff 355
bogdanm 0:9b334a45a8ff 356 CANStatus = obj->dev->SR;
bogdanm 0:9b334a45a8ff 357
bogdanm 0:9b334a45a8ff 358 // Send the message to ourself if in a test mode
bogdanm 0:9b334a45a8ff 359 if (obj->dev->MOD & 0x04) {
bogdanm 0:9b334a45a8ff 360 cc = 1;
bogdanm 0:9b334a45a8ff 361 }
bogdanm 0:9b334a45a8ff 362
bogdanm 0:9b334a45a8ff 363 if (CANStatus & 0x00000004) {
bogdanm 0:9b334a45a8ff 364 obj->dev->TFI1 = buf[0] & 0xC00F0000;
bogdanm 0:9b334a45a8ff 365 obj->dev->TID1 = buf[1];
bogdanm 0:9b334a45a8ff 366 obj->dev->TDA1 = buf[2];
bogdanm 0:9b334a45a8ff 367 obj->dev->TDB1 = buf[3];
bogdanm 0:9b334a45a8ff 368 if(cc) {
bogdanm 0:9b334a45a8ff 369 obj->dev->CMR = 0x30;
bogdanm 0:9b334a45a8ff 370 } else {
bogdanm 0:9b334a45a8ff 371 obj->dev->CMR = 0x21;
bogdanm 0:9b334a45a8ff 372 }
bogdanm 0:9b334a45a8ff 373 return 1;
bogdanm 0:9b334a45a8ff 374
bogdanm 0:9b334a45a8ff 375 } else if (CANStatus & 0x00000400) {
bogdanm 0:9b334a45a8ff 376 obj->dev->TFI2 = buf[0] & 0xC00F0000;
bogdanm 0:9b334a45a8ff 377 obj->dev->TID2 = buf[1];
bogdanm 0:9b334a45a8ff 378 obj->dev->TDA2 = buf[2];
bogdanm 0:9b334a45a8ff 379 obj->dev->TDB2 = buf[3];
bogdanm 0:9b334a45a8ff 380 if (cc) {
bogdanm 0:9b334a45a8ff 381 obj->dev->CMR = 0x50;
bogdanm 0:9b334a45a8ff 382 } else {
bogdanm 0:9b334a45a8ff 383 obj->dev->CMR = 0x41;
bogdanm 0:9b334a45a8ff 384 }
bogdanm 0:9b334a45a8ff 385 return 1;
bogdanm 0:9b334a45a8ff 386
bogdanm 0:9b334a45a8ff 387 } else if (CANStatus & 0x00040000) {
bogdanm 0:9b334a45a8ff 388 obj->dev->TFI3 = buf[0] & 0xC00F0000;
bogdanm 0:9b334a45a8ff 389 obj->dev->TID3 = buf[1];
bogdanm 0:9b334a45a8ff 390 obj->dev->TDA3 = buf[2];
bogdanm 0:9b334a45a8ff 391 obj->dev->TDB3 = buf[3];
bogdanm 0:9b334a45a8ff 392 if (cc) {
bogdanm 0:9b334a45a8ff 393 obj->dev->CMR = 0x90;
bogdanm 0:9b334a45a8ff 394 } else {
bogdanm 0:9b334a45a8ff 395 obj->dev->CMR = 0x81;
bogdanm 0:9b334a45a8ff 396 }
bogdanm 0:9b334a45a8ff 397 return 1;
bogdanm 0:9b334a45a8ff 398 }
bogdanm 0:9b334a45a8ff 399
bogdanm 0:9b334a45a8ff 400 return 0;
bogdanm 0:9b334a45a8ff 401 }
bogdanm 0:9b334a45a8ff 402
bogdanm 0:9b334a45a8ff 403 int can_read(can_t *obj, CAN_Message *msg, int handle) {
bogdanm 0:9b334a45a8ff 404 CANMsg x;
bogdanm 0:9b334a45a8ff 405 unsigned int *i = (unsigned int *)&x;
bogdanm 0:9b334a45a8ff 406
bogdanm 0:9b334a45a8ff 407 can_enable(obj);
bogdanm 0:9b334a45a8ff 408
bogdanm 0:9b334a45a8ff 409 if (obj->dev->GSR & 0x1) {
bogdanm 0:9b334a45a8ff 410 *i++ = obj->dev->RFS; // Frame
bogdanm 0:9b334a45a8ff 411 *i++ = obj->dev->RID; // ID
bogdanm 0:9b334a45a8ff 412 *i++ = obj->dev->RDA; // Data A
bogdanm 0:9b334a45a8ff 413 *i++ = obj->dev->RDB; // Data B
bogdanm 0:9b334a45a8ff 414 obj->dev->CMR = 0x04; // release receive buffer
bogdanm 0:9b334a45a8ff 415
bogdanm 0:9b334a45a8ff 416 msg->id = x.id;
bogdanm 0:9b334a45a8ff 417 msg->len = x.dlc;
bogdanm 0:9b334a45a8ff 418 msg->format = (x.type)? CANExtended : CANStandard;
bogdanm 0:9b334a45a8ff 419 msg->type = (x.rtr)? CANRemote: CANData;
bogdanm 0:9b334a45a8ff 420 memcpy(msg->data,x.data,x.dlc);
bogdanm 0:9b334a45a8ff 421 return 1;
bogdanm 0:9b334a45a8ff 422 }
bogdanm 0:9b334a45a8ff 423
bogdanm 0:9b334a45a8ff 424 return 0;
bogdanm 0:9b334a45a8ff 425 }
bogdanm 0:9b334a45a8ff 426
bogdanm 0:9b334a45a8ff 427 void can_reset(can_t *obj) {
bogdanm 0:9b334a45a8ff 428 can_disable(obj);
bogdanm 0:9b334a45a8ff 429 obj->dev->GSR = 0; // Reset error counter when CAN1MOD is in reset
bogdanm 0:9b334a45a8ff 430 }
bogdanm 0:9b334a45a8ff 431
bogdanm 0:9b334a45a8ff 432 unsigned char can_rderror(can_t *obj) {
bogdanm 0:9b334a45a8ff 433 return (obj->dev->GSR >> 16) & 0xFF;
bogdanm 0:9b334a45a8ff 434 }
bogdanm 0:9b334a45a8ff 435
bogdanm 0:9b334a45a8ff 436 unsigned char can_tderror(can_t *obj) {
bogdanm 0:9b334a45a8ff 437 return (obj->dev->GSR >> 24) & 0xFF;
bogdanm 0:9b334a45a8ff 438 }
bogdanm 0:9b334a45a8ff 439
bogdanm 0:9b334a45a8ff 440 void can_monitor(can_t *obj, int silent) {
bogdanm 0:9b334a45a8ff 441 uint32_t mod_mask = can_disable(obj);
bogdanm 0:9b334a45a8ff 442 if (silent) {
bogdanm 0:9b334a45a8ff 443 obj->dev->MOD |= (1 << 1);
bogdanm 0:9b334a45a8ff 444 } else {
bogdanm 0:9b334a45a8ff 445 obj->dev->MOD &= ~(1 << 1);
bogdanm 0:9b334a45a8ff 446 }
bogdanm 0:9b334a45a8ff 447 if (!(mod_mask & 1)) {
bogdanm 0:9b334a45a8ff 448 can_enable(obj);
bogdanm 0:9b334a45a8ff 449 }
bogdanm 0:9b334a45a8ff 450 }