Toyomasa Watarai / mbed-dev

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targets/hal/TARGET_ARM_SSG/TARGET_MPS2/PeripheralNames.h@68:53d4cfd70523, 2016-02-19 (annotated)

Committer:
MACRUM
Date:
Fri Feb 19 06:16:11 2016 +0000
Revision:
68:53d4cfd70523
Parent:
0:9b334a45a8ff 
Add state reset code in analogin_init() for Nucleo F303K8 target

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /* mbed Microcontroller Library
bogdanm 0:9b334a45a8ff 2 * Copyright (c) 2006-2015 ARM Limited
bogdanm 0:9b334a45a8ff 3 *
bogdanm 0:9b334a45a8ff 4 * Licensed under the Apache License, Version 2.0 (the "License");
bogdanm 0:9b334a45a8ff 5 * you may not use this file except in compliance with the License.
bogdanm 0:9b334a45a8ff 6 * You may obtain a copy of the License at
bogdanm 0:9b334a45a8ff 7 *
bogdanm 0:9b334a45a8ff 8 * http://www.apache.org/licenses/LICENSE-2.0
bogdanm 0:9b334a45a8ff 9 *
bogdanm 0:9b334a45a8ff 10 * Unless required by applicable law or agreed to in writing, software
bogdanm 0:9b334a45a8ff 11 * distributed under the License is distributed on an "AS IS" BASIS,
bogdanm 0:9b334a45a8ff 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
bogdanm 0:9b334a45a8ff 13 * See the License for the specific language governing permissions and
bogdanm 0:9b334a45a8ff 14 * limitations under the License.
bogdanm 0:9b334a45a8ff 15 */
bogdanm 0:9b334a45a8ff 16 #ifndef MBED_PERIPHERALNAMES_H
bogdanm 0:9b334a45a8ff 17 #define MBED_PERIPHERALNAMES_H
bogdanm 0:9b334a45a8ff 18
bogdanm 0:9b334a45a8ff 19 #include "cmsis.h"
bogdanm 0:9b334a45a8ff 20
bogdanm 0:9b334a45a8ff 21 #ifdef __cplusplus
bogdanm 0:9b334a45a8ff 22 extern "C" {
bogdanm 0:9b334a45a8ff 23 #endif
bogdanm 0:9b334a45a8ff 24
bogdanm 0:9b334a45a8ff 25 typedef enum {
bogdanm 0:9b334a45a8ff 26 UART_0 = (int)CMSDK_UART0_BASE,
bogdanm 0:9b334a45a8ff 27 UART_1 = (int)CMSDK_UART1_BASE
bogdanm 0:9b334a45a8ff 28 } UARTName;
bogdanm 0:9b334a45a8ff 29
bogdanm 0:9b334a45a8ff 30 typedef enum {
bogdanm 0:9b334a45a8ff 31 I2C_0 = (int)MPS2_TS_I2C,
bogdanm 0:9b334a45a8ff 32 I2C_1 = (int)MPS2_AAIC_I2C
bogdanm 0:9b334a45a8ff 33
bogdanm 0:9b334a45a8ff 34 } I2CName;
bogdanm 0:9b334a45a8ff 35
bogdanm 0:9b334a45a8ff 36 typedef enum {
bogdanm 0:9b334a45a8ff 37 ADC0_0 = 0,
bogdanm 0:9b334a45a8ff 38 ADC0_1,
bogdanm 0:9b334a45a8ff 39 ADC0_2,
bogdanm 0:9b334a45a8ff 40 ADC0_3,
bogdanm 0:9b334a45a8ff 41 ADC0_4,
bogdanm 0:9b334a45a8ff 42 ADC0_5,
bogdanm 0:9b334a45a8ff 43 ADC0_6,
bogdanm 0:9b334a45a8ff 44 ADC0_7
bogdanm 0:9b334a45a8ff 45 } ADCName;
bogdanm 0:9b334a45a8ff 46
bogdanm 0:9b334a45a8ff 47 typedef enum {
bogdanm 0:9b334a45a8ff 48 SPI_0 = (int)MPS2_SSP1,
bogdanm 0:9b334a45a8ff 49 SPI_1 = (int)MPS2_SSP0
bogdanm 0:9b334a45a8ff 50 } SPIName;
bogdanm 0:9b334a45a8ff 51
bogdanm 0:9b334a45a8ff 52 typedef enum {
bogdanm 0:9b334a45a8ff 53 PWM_1 = 0,
bogdanm 0:9b334a45a8ff 54 PWM_2,
bogdanm 0:9b334a45a8ff 55 PWM_3,
bogdanm 0:9b334a45a8ff 56 PWM_4,
bogdanm 0:9b334a45a8ff 57 PWM_5,
bogdanm 0:9b334a45a8ff 58 PWM_6,
bogdanm 0:9b334a45a8ff 59 PWM_7,
bogdanm 0:9b334a45a8ff 60 PWM_8,
bogdanm 0:9b334a45a8ff 61 PWM_9,
bogdanm 0:9b334a45a8ff 62 PWM_10,
bogdanm 0:9b334a45a8ff 63 PWM_11
bogdanm 0:9b334a45a8ff 64 } PWMName;
bogdanm 0:9b334a45a8ff 65
bogdanm 0:9b334a45a8ff 66 #define STDIO_UART_TX USBTX
bogdanm 0:9b334a45a8ff 67 #define STDIO_UART_RX USBRX
bogdanm 0:9b334a45a8ff 68 #define STDIO_UART UART_0
bogdanm 0:9b334a45a8ff 69
bogdanm 0:9b334a45a8ff 70 #define MBED_UART0 USBTX, USBRX
bogdanm 0:9b334a45a8ff 71 #define MBED_UART1 UART_TX1, UART_RX1
bogdanm 0:9b334a45a8ff 72 #define MBED_UART2 UART_TX2, UART_RX2
bogdanm 0:9b334a45a8ff 73 #define MBED_UARTUSB USBTX, USBRX
bogdanm 0:9b334a45a8ff 74
bogdanm 0:9b334a45a8ff 75 #ifdef __cplusplus
bogdanm 0:9b334a45a8ff 76 }
bogdanm 0:9b334a45a8ff 77 #endif
bogdanm 0:9b334a45a8ff 78
bogdanm 0:9b334a45a8ff 79 #endif