Toyomasa Watarai / mbed-dev-lpcx1769

Dependents:   LPCXpresso1769_blinky

Fork of mbed-dev by mbed official

Committer:
mbed_official
Date:
Tue Nov 10 09:30:11 2015 +0000
Revision:
19:112740acecfa
Parent:
0:9b334a45a8ff
Child:
23:ee8ca7052b3c
Synchronized with git revision 7218418919aeaf775fb8d386ea7ee0dfc0c80ff9

Full URL: https://github.com/mbedmicro/mbed/commit/7218418919aeaf775fb8d386ea7ee0dfc0c80ff9/

DISCO_F469NI - add disco F469NI support

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /* mbed Microcontroller Library
bogdanm 0:9b334a45a8ff 2 *******************************************************************************
bogdanm 0:9b334a45a8ff 3 * Copyright (c) 2015, STMicroelectronics
bogdanm 0:9b334a45a8ff 4 * All rights reserved.
bogdanm 0:9b334a45a8ff 5 *
bogdanm 0:9b334a45a8ff 6 * Redistribution and use in source and binary forms, with or without
bogdanm 0:9b334a45a8ff 7 * modification, are permitted provided that the following conditions are met:
bogdanm 0:9b334a45a8ff 8 *
bogdanm 0:9b334a45a8ff 9 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 0:9b334a45a8ff 10 * this list of conditions and the following disclaimer.
bogdanm 0:9b334a45a8ff 11 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 0:9b334a45a8ff 12 * this list of conditions and the following disclaimer in the documentation
bogdanm 0:9b334a45a8ff 13 * and/or other materials provided with the distribution.
bogdanm 0:9b334a45a8ff 14 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 0:9b334a45a8ff 15 * may be used to endorse or promote products derived from this software
bogdanm 0:9b334a45a8ff 16 * without specific prior written permission.
bogdanm 0:9b334a45a8ff 17 *
bogdanm 0:9b334a45a8ff 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 0:9b334a45a8ff 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 0:9b334a45a8ff 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 0:9b334a45a8ff 21 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 0:9b334a45a8ff 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 0:9b334a45a8ff 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 0:9b334a45a8ff 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 0:9b334a45a8ff 25 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 0:9b334a45a8ff 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 0:9b334a45a8ff 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 0:9b334a45a8ff 28 *******************************************************************************
bogdanm 0:9b334a45a8ff 29 */
bogdanm 0:9b334a45a8ff 30 #include "mbed_assert.h"
bogdanm 0:9b334a45a8ff 31 #include "spi_api.h"
bogdanm 0:9b334a45a8ff 32
bogdanm 0:9b334a45a8ff 33 #if DEVICE_SPI
bogdanm 0:9b334a45a8ff 34
bogdanm 0:9b334a45a8ff 35 #include <math.h>
bogdanm 0:9b334a45a8ff 36 #include "cmsis.h"
bogdanm 0:9b334a45a8ff 37 #include "pinmap.h"
bogdanm 0:9b334a45a8ff 38 #include "PeripheralPins.h"
bogdanm 0:9b334a45a8ff 39 #include "mbed_error.h"
bogdanm 0:9b334a45a8ff 40
bogdanm 0:9b334a45a8ff 41 static SPI_HandleTypeDef SpiHandle;
bogdanm 0:9b334a45a8ff 42
bogdanm 0:9b334a45a8ff 43 static void init_spi(spi_t *obj)
bogdanm 0:9b334a45a8ff 44 {
bogdanm 0:9b334a45a8ff 45 SpiHandle.Instance = (SPI_TypeDef *)(obj->spi);
bogdanm 0:9b334a45a8ff 46
bogdanm 0:9b334a45a8ff 47 __HAL_SPI_DISABLE(&SpiHandle);
bogdanm 0:9b334a45a8ff 48
bogdanm 0:9b334a45a8ff 49 SpiHandle.Init.Mode = obj->mode;
bogdanm 0:9b334a45a8ff 50 SpiHandle.Init.BaudRatePrescaler = obj->br_presc;
bogdanm 0:9b334a45a8ff 51 SpiHandle.Init.Direction = SPI_DIRECTION_2LINES;
bogdanm 0:9b334a45a8ff 52 SpiHandle.Init.CLKPhase = obj->cpha;
bogdanm 0:9b334a45a8ff 53 SpiHandle.Init.CLKPolarity = obj->cpol;
bogdanm 0:9b334a45a8ff 54 SpiHandle.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLED;
bogdanm 0:9b334a45a8ff 55 SpiHandle.Init.CRCPolynomial = 7;
bogdanm 0:9b334a45a8ff 56 SpiHandle.Init.DataSize = obj->bits;
bogdanm 0:9b334a45a8ff 57 SpiHandle.Init.FirstBit = SPI_FIRSTBIT_MSB;
bogdanm 0:9b334a45a8ff 58 SpiHandle.Init.NSS = obj->nss;
bogdanm 0:9b334a45a8ff 59 SpiHandle.Init.TIMode = SPI_TIMODE_DISABLED;
bogdanm 0:9b334a45a8ff 60
bogdanm 0:9b334a45a8ff 61 if (HAL_SPI_Init(&SpiHandle) != HAL_OK) {
bogdanm 0:9b334a45a8ff 62 error("Cannot initialize SPI");
bogdanm 0:9b334a45a8ff 63 }
bogdanm 0:9b334a45a8ff 64
bogdanm 0:9b334a45a8ff 65 __HAL_SPI_ENABLE(&SpiHandle);
bogdanm 0:9b334a45a8ff 66 }
bogdanm 0:9b334a45a8ff 67
bogdanm 0:9b334a45a8ff 68 void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel)
bogdanm 0:9b334a45a8ff 69 {
bogdanm 0:9b334a45a8ff 70 // Determine the SPI to use
bogdanm 0:9b334a45a8ff 71 SPIName spi_mosi = (SPIName)pinmap_peripheral(mosi, PinMap_SPI_MOSI);
bogdanm 0:9b334a45a8ff 72 SPIName spi_miso = (SPIName)pinmap_peripheral(miso, PinMap_SPI_MISO);
bogdanm 0:9b334a45a8ff 73 SPIName spi_sclk = (SPIName)pinmap_peripheral(sclk, PinMap_SPI_SCLK);
bogdanm 0:9b334a45a8ff 74 SPIName spi_ssel = (SPIName)pinmap_peripheral(ssel, PinMap_SPI_SSEL);
bogdanm 0:9b334a45a8ff 75
bogdanm 0:9b334a45a8ff 76 SPIName spi_data = (SPIName)pinmap_merge(spi_mosi, spi_miso);
bogdanm 0:9b334a45a8ff 77 SPIName spi_cntl = (SPIName)pinmap_merge(spi_sclk, spi_ssel);
bogdanm 0:9b334a45a8ff 78
bogdanm 0:9b334a45a8ff 79 obj->spi = (SPIName)pinmap_merge(spi_data, spi_cntl);
bogdanm 0:9b334a45a8ff 80 MBED_ASSERT(obj->spi != (SPIName)NC);
bogdanm 0:9b334a45a8ff 81
bogdanm 0:9b334a45a8ff 82 // Enable SPI clock
bogdanm 0:9b334a45a8ff 83 if (obj->spi == SPI_1) {
bogdanm 0:9b334a45a8ff 84 __HAL_RCC_SPI1_CLK_ENABLE();
bogdanm 0:9b334a45a8ff 85 }
bogdanm 0:9b334a45a8ff 86
bogdanm 0:9b334a45a8ff 87 if (obj->spi == SPI_2) {
bogdanm 0:9b334a45a8ff 88 __HAL_RCC_SPI2_CLK_ENABLE();
bogdanm 0:9b334a45a8ff 89 }
bogdanm 0:9b334a45a8ff 90
bogdanm 0:9b334a45a8ff 91 if (obj->spi == SPI_3) {
bogdanm 0:9b334a45a8ff 92 __HAL_RCC_SPI3_CLK_ENABLE();
bogdanm 0:9b334a45a8ff 93 }
bogdanm 0:9b334a45a8ff 94
bogdanm 0:9b334a45a8ff 95 #if defined SPI4_BASE
bogdanm 0:9b334a45a8ff 96 if (obj->spi == SPI_4) {
bogdanm 0:9b334a45a8ff 97 __HAL_RCC_SPI4_CLK_ENABLE();
bogdanm 0:9b334a45a8ff 98 }
bogdanm 0:9b334a45a8ff 99 #endif
bogdanm 0:9b334a45a8ff 100
bogdanm 0:9b334a45a8ff 101 #if defined SPI5_BASE
bogdanm 0:9b334a45a8ff 102 if (obj->spi == SPI_5) {
bogdanm 0:9b334a45a8ff 103 __HAL_RCC_SPI5_CLK_ENABLE();
bogdanm 0:9b334a45a8ff 104 }
bogdanm 0:9b334a45a8ff 105 #endif
bogdanm 0:9b334a45a8ff 106
bogdanm 0:9b334a45a8ff 107 // Configure the SPI pins
bogdanm 0:9b334a45a8ff 108 pinmap_pinout(mosi, PinMap_SPI_MOSI);
bogdanm 0:9b334a45a8ff 109 pinmap_pinout(miso, PinMap_SPI_MISO);
bogdanm 0:9b334a45a8ff 110 pinmap_pinout(sclk, PinMap_SPI_SCLK);
bogdanm 0:9b334a45a8ff 111
bogdanm 0:9b334a45a8ff 112 // Save new values
bogdanm 0:9b334a45a8ff 113 obj->bits = SPI_DATASIZE_8BIT;
bogdanm 0:9b334a45a8ff 114 obj->cpol = SPI_POLARITY_LOW;
bogdanm 0:9b334a45a8ff 115 obj->cpha = SPI_PHASE_1EDGE;
bogdanm 0:9b334a45a8ff 116 obj->br_presc = SPI_BAUDRATEPRESCALER_256;
bogdanm 0:9b334a45a8ff 117
bogdanm 0:9b334a45a8ff 118 obj->pin_miso = miso;
bogdanm 0:9b334a45a8ff 119 obj->pin_mosi = mosi;
bogdanm 0:9b334a45a8ff 120 obj->pin_sclk = sclk;
bogdanm 0:9b334a45a8ff 121 obj->pin_ssel = ssel;
bogdanm 0:9b334a45a8ff 122
bogdanm 0:9b334a45a8ff 123 if (ssel != NC) {
bogdanm 0:9b334a45a8ff 124 pinmap_pinout(ssel, PinMap_SPI_SSEL);
bogdanm 0:9b334a45a8ff 125 } else {
bogdanm 0:9b334a45a8ff 126 obj->nss = SPI_NSS_SOFT;
bogdanm 0:9b334a45a8ff 127 }
bogdanm 0:9b334a45a8ff 128
bogdanm 0:9b334a45a8ff 129 init_spi(obj);
bogdanm 0:9b334a45a8ff 130 }
bogdanm 0:9b334a45a8ff 131
bogdanm 0:9b334a45a8ff 132 void spi_free(spi_t *obj)
bogdanm 0:9b334a45a8ff 133 {
bogdanm 0:9b334a45a8ff 134 // Reset SPI and disable clock
bogdanm 0:9b334a45a8ff 135 if (obj->spi == SPI_1) {
bogdanm 0:9b334a45a8ff 136 __HAL_RCC_SPI1_FORCE_RESET();
bogdanm 0:9b334a45a8ff 137 __HAL_RCC_SPI1_RELEASE_RESET();
bogdanm 0:9b334a45a8ff 138 __HAL_RCC_SPI1_CLK_DISABLE();
bogdanm 0:9b334a45a8ff 139 }
bogdanm 0:9b334a45a8ff 140
bogdanm 0:9b334a45a8ff 141 if (obj->spi == SPI_2) {
bogdanm 0:9b334a45a8ff 142 __HAL_RCC_SPI2_FORCE_RESET();
bogdanm 0:9b334a45a8ff 143 __HAL_RCC_SPI2_RELEASE_RESET();
bogdanm 0:9b334a45a8ff 144 __HAL_RCC_SPI2_CLK_DISABLE();
bogdanm 0:9b334a45a8ff 145 }
bogdanm 0:9b334a45a8ff 146
bogdanm 0:9b334a45a8ff 147 if (obj->spi == SPI_3) {
bogdanm 0:9b334a45a8ff 148 __HAL_RCC_SPI3_FORCE_RESET();
bogdanm 0:9b334a45a8ff 149 __HAL_RCC_SPI3_RELEASE_RESET();
bogdanm 0:9b334a45a8ff 150 __HAL_RCC_SPI3_CLK_DISABLE();
bogdanm 0:9b334a45a8ff 151 }
bogdanm 0:9b334a45a8ff 152
bogdanm 0:9b334a45a8ff 153 #if defined SPI4_BASE
bogdanm 0:9b334a45a8ff 154 if (obj->spi == SPI_4) {
bogdanm 0:9b334a45a8ff 155 __HAL_RCC_SPI4_FORCE_RESET();
bogdanm 0:9b334a45a8ff 156 __HAL_RCC_SPI4_RELEASE_RESET();
bogdanm 0:9b334a45a8ff 157 __HAL_RCC_SPI4_CLK_DISABLE();
bogdanm 0:9b334a45a8ff 158 }
bogdanm 0:9b334a45a8ff 159 #endif
bogdanm 0:9b334a45a8ff 160
bogdanm 0:9b334a45a8ff 161 #if defined SPI5_BASE
bogdanm 0:9b334a45a8ff 162 if (obj->spi == SPI_5) {
bogdanm 0:9b334a45a8ff 163 __HAL_RCC_SPI5_FORCE_RESET();
bogdanm 0:9b334a45a8ff 164 __HAL_RCC_SPI5_RELEASE_RESET();
bogdanm 0:9b334a45a8ff 165 __HAL_RCC_SPI5_CLK_DISABLE();
bogdanm 0:9b334a45a8ff 166 }
bogdanm 0:9b334a45a8ff 167 #endif
bogdanm 0:9b334a45a8ff 168
bogdanm 0:9b334a45a8ff 169 // Configure GPIOs
bogdanm 0:9b334a45a8ff 170 pin_function(obj->pin_miso, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0));
bogdanm 0:9b334a45a8ff 171 pin_function(obj->pin_mosi, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0));
bogdanm 0:9b334a45a8ff 172 pin_function(obj->pin_sclk, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0));
bogdanm 0:9b334a45a8ff 173 pin_function(obj->pin_ssel, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0));
bogdanm 0:9b334a45a8ff 174 }
bogdanm 0:9b334a45a8ff 175
bogdanm 0:9b334a45a8ff 176 void spi_format(spi_t *obj, int bits, int mode, int slave)
bogdanm 0:9b334a45a8ff 177 {
bogdanm 0:9b334a45a8ff 178 // Save new values
bogdanm 0:9b334a45a8ff 179 if (bits == 16) {
bogdanm 0:9b334a45a8ff 180 obj->bits = SPI_DATASIZE_16BIT;
bogdanm 0:9b334a45a8ff 181 } else {
bogdanm 0:9b334a45a8ff 182 obj->bits = SPI_DATASIZE_8BIT;
bogdanm 0:9b334a45a8ff 183 }
bogdanm 0:9b334a45a8ff 184
bogdanm 0:9b334a45a8ff 185 switch (mode) {
bogdanm 0:9b334a45a8ff 186 case 0:
bogdanm 0:9b334a45a8ff 187 obj->cpol = SPI_POLARITY_LOW;
bogdanm 0:9b334a45a8ff 188 obj->cpha = SPI_PHASE_1EDGE;
bogdanm 0:9b334a45a8ff 189 break;
bogdanm 0:9b334a45a8ff 190 case 1:
bogdanm 0:9b334a45a8ff 191 obj->cpol = SPI_POLARITY_LOW;
bogdanm 0:9b334a45a8ff 192 obj->cpha = SPI_PHASE_2EDGE;
bogdanm 0:9b334a45a8ff 193 break;
bogdanm 0:9b334a45a8ff 194 case 2:
bogdanm 0:9b334a45a8ff 195 obj->cpol = SPI_POLARITY_HIGH;
bogdanm 0:9b334a45a8ff 196 obj->cpha = SPI_PHASE_1EDGE;
bogdanm 0:9b334a45a8ff 197 break;
bogdanm 0:9b334a45a8ff 198 default:
bogdanm 0:9b334a45a8ff 199 obj->cpol = SPI_POLARITY_HIGH;
bogdanm 0:9b334a45a8ff 200 obj->cpha = SPI_PHASE_2EDGE;
bogdanm 0:9b334a45a8ff 201 break;
bogdanm 0:9b334a45a8ff 202 }
bogdanm 0:9b334a45a8ff 203
bogdanm 0:9b334a45a8ff 204 if (obj->nss != SPI_NSS_SOFT) {
bogdanm 0:9b334a45a8ff 205 obj->nss = (slave) ? SPI_NSS_HARD_INPUT : SPI_NSS_HARD_OUTPUT;
bogdanm 0:9b334a45a8ff 206 }
bogdanm 0:9b334a45a8ff 207
bogdanm 0:9b334a45a8ff 208 obj->mode = (slave) ? SPI_MODE_SLAVE : SPI_MODE_MASTER;
bogdanm 0:9b334a45a8ff 209
bogdanm 0:9b334a45a8ff 210 init_spi(obj);
bogdanm 0:9b334a45a8ff 211 }
bogdanm 0:9b334a45a8ff 212
bogdanm 0:9b334a45a8ff 213 void spi_frequency(spi_t *obj, int hz)
bogdanm 0:9b334a45a8ff 214 {
bogdanm 0:9b334a45a8ff 215 #if defined(TARGET_STM32F401RE) || defined(TARGET_STM32F401VC) || defined(TARGET_STM32F407VG)
bogdanm 0:9b334a45a8ff 216 // Note: The frequencies are obtained with SPI1 clock = 84 MHz (APB2 clock)
bogdanm 0:9b334a45a8ff 217 if (hz < 600000) {
bogdanm 0:9b334a45a8ff 218 obj->br_presc = SPI_BAUDRATEPRESCALER_256; // 330 kHz
bogdanm 0:9b334a45a8ff 219 } else if ((hz >= 600000) && (hz < 1000000)) {
bogdanm 0:9b334a45a8ff 220 obj->br_presc = SPI_BAUDRATEPRESCALER_128; // 656 kHz
bogdanm 0:9b334a45a8ff 221 } else if ((hz >= 1000000) && (hz < 2000000)) {
bogdanm 0:9b334a45a8ff 222 obj->br_presc = SPI_BAUDRATEPRESCALER_64; // 1.3 MHz
bogdanm 0:9b334a45a8ff 223 } else if ((hz >= 2000000) && (hz < 5000000)) {
bogdanm 0:9b334a45a8ff 224 obj->br_presc = SPI_BAUDRATEPRESCALER_32; // 2.6 MHz
bogdanm 0:9b334a45a8ff 225 } else if ((hz >= 5000000) && (hz < 10000000)) {
bogdanm 0:9b334a45a8ff 226 obj->br_presc = SPI_BAUDRATEPRESCALER_16; // 5.25 MHz
bogdanm 0:9b334a45a8ff 227 } else if ((hz >= 10000000) && (hz < 21000000)) {
bogdanm 0:9b334a45a8ff 228 obj->br_presc = SPI_BAUDRATEPRESCALER_8; // 10.5 MHz
bogdanm 0:9b334a45a8ff 229 } else if ((hz >= 21000000) && (hz < 42000000)) {
bogdanm 0:9b334a45a8ff 230 obj->br_presc = SPI_BAUDRATEPRESCALER_4; // 21 MHz
bogdanm 0:9b334a45a8ff 231 } else { // >= 42000000
bogdanm 0:9b334a45a8ff 232 obj->br_presc = SPI_BAUDRATEPRESCALER_2; // 42 MHz
bogdanm 0:9b334a45a8ff 233 }
bogdanm 0:9b334a45a8ff 234 #elif defined(TARGET_STM32F405RG)
bogdanm 0:9b334a45a8ff 235 // Note: The frequencies are obtained with SPI1 clock = 48 MHz (APB2 clock)
bogdanm 0:9b334a45a8ff 236 if (obj->spi == SPI_1) {
bogdanm 0:9b334a45a8ff 237 if (hz < 375000) {
bogdanm 0:9b334a45a8ff 238 obj->br_presc = SPI_BAUDRATEPRESCALER_256; // 187.5 kHz
bogdanm 0:9b334a45a8ff 239 } else if ((hz >= 375000) && (hz < 750000)) {
bogdanm 0:9b334a45a8ff 240 obj->br_presc = SPI_BAUDRATEPRESCALER_128; // 375 kHz
bogdanm 0:9b334a45a8ff 241 } else if ((hz >= 750000) && (hz < 1500000)) {
bogdanm 0:9b334a45a8ff 242 obj->br_presc = SPI_BAUDRATEPRESCALER_64; // 0.75 MHz
bogdanm 0:9b334a45a8ff 243 } else if ((hz >= 1500000) && (hz < 3000000)) {
bogdanm 0:9b334a45a8ff 244 obj->br_presc = SPI_BAUDRATEPRESCALER_32; // 1.5 MHz
bogdanm 0:9b334a45a8ff 245 } else if ((hz >= 3000000) && (hz < 6000000)) {
bogdanm 0:9b334a45a8ff 246 obj->br_presc = SPI_BAUDRATEPRESCALER_16; // 3 MHz
bogdanm 0:9b334a45a8ff 247 } else if ((hz >= 6000000) && (hz < 12000000)) {
bogdanm 0:9b334a45a8ff 248 obj->br_presc = SPI_BAUDRATEPRESCALER_8; // 6 MHz
bogdanm 0:9b334a45a8ff 249 } else if ((hz >= 12000000) && (hz < 24000000)) {
bogdanm 0:9b334a45a8ff 250 obj->br_presc = SPI_BAUDRATEPRESCALER_4; // 12 MHz
bogdanm 0:9b334a45a8ff 251 } else { // >= 24000000
bogdanm 0:9b334a45a8ff 252 obj->br_presc = SPI_BAUDRATEPRESCALER_2; // 24 MHz
bogdanm 0:9b334a45a8ff 253 }
bogdanm 0:9b334a45a8ff 254 // Note: The frequencies are obtained with SPI2/3 clock = 48 MHz (APB1 clock)
bogdanm 0:9b334a45a8ff 255 } else if ((obj->spi == SPI_2) || (obj->spi == SPI_3)) {
bogdanm 0:9b334a45a8ff 256 if (hz < 375000) {
bogdanm 0:9b334a45a8ff 257 obj->br_presc = SPI_BAUDRATEPRESCALER_256; // 187.5 kHz
bogdanm 0:9b334a45a8ff 258 } else if ((hz >= 375000) && (hz < 750000)) {
bogdanm 0:9b334a45a8ff 259 obj->br_presc = SPI_BAUDRATEPRESCALER_128; // 375 kHz
bogdanm 0:9b334a45a8ff 260 } else if ((hz >= 750000) && (hz < 1500000)) {
bogdanm 0:9b334a45a8ff 261 obj->br_presc = SPI_BAUDRATEPRESCALER_64; // 0.75 MHz
bogdanm 0:9b334a45a8ff 262 } else if ((hz >= 1500000) && (hz < 3000000)) {
bogdanm 0:9b334a45a8ff 263 obj->br_presc = SPI_BAUDRATEPRESCALER_32; // 1.5 MHz
bogdanm 0:9b334a45a8ff 264 } else if ((hz >= 3000000) && (hz < 6000000)) {
bogdanm 0:9b334a45a8ff 265 obj->br_presc = SPI_BAUDRATEPRESCALER_16; // 3 MHz
bogdanm 0:9b334a45a8ff 266 } else if ((hz >= 6000000) && (hz < 12000000)) {
bogdanm 0:9b334a45a8ff 267 obj->br_presc = SPI_BAUDRATEPRESCALER_8; // 6 MHz
bogdanm 0:9b334a45a8ff 268 } else if ((hz >= 12000000) && (hz < 24000000)) {
bogdanm 0:9b334a45a8ff 269 obj->br_presc = SPI_BAUDRATEPRESCALER_4; // 12 MHz
bogdanm 0:9b334a45a8ff 270 } else { // >= 24000000
bogdanm 0:9b334a45a8ff 271 obj->br_presc = SPI_BAUDRATEPRESCALER_2; // 24 MHz
bogdanm 0:9b334a45a8ff 272 }
bogdanm 0:9b334a45a8ff 273 }
bogdanm 0:9b334a45a8ff 274 #elif defined(TARGET_STM32F411RE) || defined(TARGET_STM32F429ZI)
bogdanm 0:9b334a45a8ff 275 // Values depend of PCLK2: 100 MHz
bogdanm 0:9b334a45a8ff 276 if ((obj->spi == SPI_1) || (obj->spi == SPI_4) || (obj->spi == SPI_5)) {
bogdanm 0:9b334a45a8ff 277 if (hz < 700000) {
bogdanm 0:9b334a45a8ff 278 obj->br_presc = SPI_BAUDRATEPRESCALER_256; // 391 kHz
bogdanm 0:9b334a45a8ff 279 } else if ((hz >= 700000) && (hz < 1000000)) {
bogdanm 0:9b334a45a8ff 280 obj->br_presc = SPI_BAUDRATEPRESCALER_128; // 781 kHz
bogdanm 0:9b334a45a8ff 281 } else if ((hz >= 1000000) && (hz < 3000000)) {
bogdanm 0:9b334a45a8ff 282 obj->br_presc = SPI_BAUDRATEPRESCALER_64; // 1.56 MHz
bogdanm 0:9b334a45a8ff 283 } else if ((hz >= 3000000) && (hz < 6000000)) {
bogdanm 0:9b334a45a8ff 284 obj->br_presc = SPI_BAUDRATEPRESCALER_32; // 3.13 MHz
bogdanm 0:9b334a45a8ff 285 } else if ((hz >= 6000000) && (hz < 12000000)) {
bogdanm 0:9b334a45a8ff 286 obj->br_presc = SPI_BAUDRATEPRESCALER_16; // 6.25 MHz
bogdanm 0:9b334a45a8ff 287 } else if ((hz >= 12000000) && (hz < 25000000)) {
bogdanm 0:9b334a45a8ff 288 obj->br_presc = SPI_BAUDRATEPRESCALER_8; // 12.5 MHz
bogdanm 0:9b334a45a8ff 289 } else if ((hz >= 25000000) && (hz < 50000000)) {
bogdanm 0:9b334a45a8ff 290 obj->br_presc = SPI_BAUDRATEPRESCALER_4; // 25 MHz
bogdanm 0:9b334a45a8ff 291 } else { // >= 50000000
bogdanm 0:9b334a45a8ff 292 obj->br_presc = SPI_BAUDRATEPRESCALER_2; // 50 MHz
bogdanm 0:9b334a45a8ff 293 }
bogdanm 0:9b334a45a8ff 294 }
bogdanm 0:9b334a45a8ff 295 // Values depend of PCLK1: 50 MHz
bogdanm 0:9b334a45a8ff 296 if ((obj->spi == SPI_2) || (obj->spi == SPI_3)) {
bogdanm 0:9b334a45a8ff 297 if (hz < 400000) {
bogdanm 0:9b334a45a8ff 298 obj->br_presc = SPI_BAUDRATEPRESCALER_256; // 195 kHz
bogdanm 0:9b334a45a8ff 299 } else if ((hz >= 400000) && (hz < 700000)) {
bogdanm 0:9b334a45a8ff 300 obj->br_presc = SPI_BAUDRATEPRESCALER_128; // 391 kHz
bogdanm 0:9b334a45a8ff 301 } else if ((hz >= 700000) && (hz < 1000000)) {
bogdanm 0:9b334a45a8ff 302 obj->br_presc = SPI_BAUDRATEPRESCALER_64; // 781 MHz
bogdanm 0:9b334a45a8ff 303 } else if ((hz >= 1000000) && (hz < 3000000)) {
bogdanm 0:9b334a45a8ff 304 obj->br_presc = SPI_BAUDRATEPRESCALER_32; // 1.56 MHz
bogdanm 0:9b334a45a8ff 305 } else if ((hz >= 3000000) && (hz < 6000000)) {
bogdanm 0:9b334a45a8ff 306 obj->br_presc = SPI_BAUDRATEPRESCALER_16; // 3.13 MHz
bogdanm 0:9b334a45a8ff 307 } else if ((hz >= 6000000) && (hz < 12000000)) {
bogdanm 0:9b334a45a8ff 308 obj->br_presc = SPI_BAUDRATEPRESCALER_8; // 6.25 MHz
bogdanm 0:9b334a45a8ff 309 } else if ((hz >= 12000000) && (hz < 25000000)) {
bogdanm 0:9b334a45a8ff 310 obj->br_presc = SPI_BAUDRATEPRESCALER_4; // 12.5 MHz
bogdanm 0:9b334a45a8ff 311 } else { // >= 25000000
bogdanm 0:9b334a45a8ff 312 obj->br_presc = SPI_BAUDRATEPRESCALER_2; // 25 MHz
bogdanm 0:9b334a45a8ff 313 }
bogdanm 0:9b334a45a8ff 314 }
bogdanm 0:9b334a45a8ff 315 #elif defined(TARGET_STM32F446RE)
bogdanm 0:9b334a45a8ff 316 // Values depend of PCLK2: 90 MHz
bogdanm 0:9b334a45a8ff 317 if ((obj->spi == SPI_1) || (obj->spi == SPI_4)) {
bogdanm 0:9b334a45a8ff 318 if (hz < 700000) {
bogdanm 0:9b334a45a8ff 319 obj->br_presc = SPI_BAUDRATEPRESCALER_256; // 352 kHz
bogdanm 0:9b334a45a8ff 320 } else if ((hz >= 700000) && (hz < 1000000)) {
bogdanm 0:9b334a45a8ff 321 obj->br_presc = SPI_BAUDRATEPRESCALER_128; // 703 kHz
bogdanm 0:9b334a45a8ff 322 } else if ((hz >= 1000000) && (hz < 3000000)) {
bogdanm 0:9b334a45a8ff 323 obj->br_presc = SPI_BAUDRATEPRESCALER_64; // 1.41 MHz
bogdanm 0:9b334a45a8ff 324 } else if ((hz >= 3000000) && (hz < 5000000)) {
bogdanm 0:9b334a45a8ff 325 obj->br_presc = SPI_BAUDRATEPRESCALER_32; // 2.81 MHz
bogdanm 0:9b334a45a8ff 326 } else if ((hz >= 5000000) && (hz < 11000000)) {
bogdanm 0:9b334a45a8ff 327 obj->br_presc = SPI_BAUDRATEPRESCALER_16; // 5.63 MHz
bogdanm 0:9b334a45a8ff 328 } else if ((hz >= 11000000) && (hz < 22000000)) {
bogdanm 0:9b334a45a8ff 329 obj->br_presc = SPI_BAUDRATEPRESCALER_8; // 11.25 MHz
bogdanm 0:9b334a45a8ff 330 } else if ((hz >= 22000000) && (hz < 45000000)) {
bogdanm 0:9b334a45a8ff 331 obj->br_presc = SPI_BAUDRATEPRESCALER_4; // 22.5 MHz
bogdanm 0:9b334a45a8ff 332 } else { // >= 45000000
bogdanm 0:9b334a45a8ff 333 obj->br_presc = SPI_BAUDRATEPRESCALER_2; // 45 MHz
bogdanm 0:9b334a45a8ff 334 }
bogdanm 0:9b334a45a8ff 335 }
bogdanm 0:9b334a45a8ff 336 // Values depend of PCLK1: 45 MHz
bogdanm 0:9b334a45a8ff 337 if ((obj->spi == SPI_2) || (obj->spi == SPI_3)) {
bogdanm 0:9b334a45a8ff 338 if (hz < 350000) {
bogdanm 0:9b334a45a8ff 339 obj->br_presc = SPI_BAUDRATEPRESCALER_256; // 176 kHz
bogdanm 0:9b334a45a8ff 340 } else if ((hz >= 350000) && (hz < 700000)) {
bogdanm 0:9b334a45a8ff 341 obj->br_presc = SPI_BAUDRATEPRESCALER_128; // 352 kHz
bogdanm 0:9b334a45a8ff 342 } else if ((hz >= 700000) && (hz < 1000000)) {
bogdanm 0:9b334a45a8ff 343 obj->br_presc = SPI_BAUDRATEPRESCALER_64; // 703 kHz
bogdanm 0:9b334a45a8ff 344 } else if ((hz >= 1000000) && (hz < 3000000)) {
bogdanm 0:9b334a45a8ff 345 obj->br_presc = SPI_BAUDRATEPRESCALER_32; // 1.41 MHz
bogdanm 0:9b334a45a8ff 346 } else if ((hz >= 3000000) && (hz < 5000000)) {
bogdanm 0:9b334a45a8ff 347 obj->br_presc = SPI_BAUDRATEPRESCALER_16; // 2.81 MHz
bogdanm 0:9b334a45a8ff 348 } else if ((hz >= 5000000) && (hz < 11000000)) {
bogdanm 0:9b334a45a8ff 349 obj->br_presc = SPI_BAUDRATEPRESCALER_8; // 5.63 MHz
bogdanm 0:9b334a45a8ff 350 } else if ((hz >= 11000000) && (hz < 22000000)) {
bogdanm 0:9b334a45a8ff 351 obj->br_presc = SPI_BAUDRATEPRESCALER_4; // 11.25 MHz
bogdanm 0:9b334a45a8ff 352 } else { // >= 22000000
bogdanm 0:9b334a45a8ff 353 obj->br_presc = SPI_BAUDRATEPRESCALER_2; // 22.5 MHz
bogdanm 0:9b334a45a8ff 354 }
mbed_official 19:112740acecfa 355 }
mbed_official 19:112740acecfa 356 #elif defined(TARGET_STM32F469NI)
mbed_official 19:112740acecfa 357 // Values depend of PCLK2: 84 MHz
mbed_official 19:112740acecfa 358 if ((obj->spi == SPI_1) || (obj->spi == SPI_4)) {
mbed_official 19:112740acecfa 359 if (hz < 600000) {
mbed_official 19:112740acecfa 360 obj->br_presc = SPI_BAUDRATEPRESCALER_256; // 328 kHz
mbed_official 19:112740acecfa 361 } else if ((hz >= 600000) && (hz < 1000000)) {
mbed_official 19:112740acecfa 362 obj->br_presc = SPI_BAUDRATEPRESCALER_128; // 656 kHz
mbed_official 19:112740acecfa 363 } else if ((hz >= 1000000) && (hz < 2000000)) {
mbed_official 19:112740acecfa 364 obj->br_presc = SPI_BAUDRATEPRESCALER_64; // 1.31 MHz
mbed_official 19:112740acecfa 365 } else if ((hz >= 2000000) && (hz < 5000000)) {
mbed_official 19:112740acecfa 366 obj->br_presc = SPI_BAUDRATEPRESCALER_32; // 2.63 MHz
mbed_official 19:112740acecfa 367 } else if ((hz >= 5000000) && (hz < 10000000)) {
mbed_official 19:112740acecfa 368 obj->br_presc = SPI_BAUDRATEPRESCALER_16; // 5.25 MHz
mbed_official 19:112740acecfa 369 } else if ((hz >= 10000000) && (hz < 20000000)) {
mbed_official 19:112740acecfa 370 obj->br_presc = SPI_BAUDRATEPRESCALER_8; // 10.5 MHz
mbed_official 19:112740acecfa 371 } else if ((hz >= 20000000) && (hz < 40000000)) {
mbed_official 19:112740acecfa 372 obj->br_presc = SPI_BAUDRATEPRESCALER_4; // 21 MHz
mbed_official 19:112740acecfa 373 } else { // >= 40000000
mbed_official 19:112740acecfa 374 obj->br_presc = SPI_BAUDRATEPRESCALER_2; // 42 MHz
mbed_official 19:112740acecfa 375 }
mbed_official 19:112740acecfa 376 }
mbed_official 19:112740acecfa 377 // Values depend of PCLK1: 42 MHz
mbed_official 19:112740acecfa 378 if ((obj->spi == SPI_2) || (obj->spi == SPI_3)) {
mbed_official 19:112740acecfa 379 if (hz < 300000) {
mbed_official 19:112740acecfa 380 obj->br_presc = SPI_BAUDRATEPRESCALER_256; // 164 kHz
mbed_official 19:112740acecfa 381 } else if ((hz >= 300000) && (hz < 600000)) {
mbed_official 19:112740acecfa 382 obj->br_presc = SPI_BAUDRATEPRESCALER_128; // 328 kHz
mbed_official 19:112740acecfa 383 } else if ((hz >= 600000) && (hz < 1000000)) {
mbed_official 19:112740acecfa 384 obj->br_presc = SPI_BAUDRATEPRESCALER_64; // 656 kHz
mbed_official 19:112740acecfa 385 } else if ((hz >= 1000000) && (hz < 2000000)) {
mbed_official 19:112740acecfa 386 obj->br_presc = SPI_BAUDRATEPRESCALER_32; // 1.31 MHz
mbed_official 19:112740acecfa 387 } else if ((hz >= 2000000) && (hz < 5000000)) {
mbed_official 19:112740acecfa 388 obj->br_presc = SPI_BAUDRATEPRESCALER_16; // 2.63 MHz
mbed_official 19:112740acecfa 389 } else if ((hz >= 5000000) && (hz < 10000000)) {
mbed_official 19:112740acecfa 390 obj->br_presc = SPI_BAUDRATEPRESCALER_8; // 5.25 MHz
mbed_official 19:112740acecfa 391 } else if ((hz >= 10000000) && (hz < 20000000)) {
mbed_official 19:112740acecfa 392 obj->br_presc = SPI_BAUDRATEPRESCALER_4; // 10.5 MHz
mbed_official 19:112740acecfa 393 } else { // >= 20000000
mbed_official 19:112740acecfa 394 obj->br_presc = SPI_BAUDRATEPRESCALER_2; // 21 MHz
mbed_official 19:112740acecfa 395 }
mbed_official 19:112740acecfa 396 }
bogdanm 0:9b334a45a8ff 397 #endif
bogdanm 0:9b334a45a8ff 398 init_spi(obj);
bogdanm 0:9b334a45a8ff 399 }
bogdanm 0:9b334a45a8ff 400
bogdanm 0:9b334a45a8ff 401 static inline int ssp_readable(spi_t *obj)
bogdanm 0:9b334a45a8ff 402 {
bogdanm 0:9b334a45a8ff 403 int status;
bogdanm 0:9b334a45a8ff 404 SpiHandle.Instance = (SPI_TypeDef *)(obj->spi);
bogdanm 0:9b334a45a8ff 405 // Check if data is received
bogdanm 0:9b334a45a8ff 406 status = ((__HAL_SPI_GET_FLAG(&SpiHandle, SPI_FLAG_RXNE) != RESET) ? 1 : 0);
bogdanm 0:9b334a45a8ff 407 return status;
bogdanm 0:9b334a45a8ff 408 }
bogdanm 0:9b334a45a8ff 409
bogdanm 0:9b334a45a8ff 410 static inline int ssp_writeable(spi_t *obj)
bogdanm 0:9b334a45a8ff 411 {
bogdanm 0:9b334a45a8ff 412 int status;
bogdanm 0:9b334a45a8ff 413 SpiHandle.Instance = (SPI_TypeDef *)(obj->spi);
bogdanm 0:9b334a45a8ff 414 // Check if data is transmitted
bogdanm 0:9b334a45a8ff 415 status = ((__HAL_SPI_GET_FLAG(&SpiHandle, SPI_FLAG_TXE) != RESET) ? 1 : 0);
bogdanm 0:9b334a45a8ff 416 return status;
bogdanm 0:9b334a45a8ff 417 }
bogdanm 0:9b334a45a8ff 418
bogdanm 0:9b334a45a8ff 419 static inline void ssp_write(spi_t *obj, int value)
bogdanm 0:9b334a45a8ff 420 {
bogdanm 0:9b334a45a8ff 421 SPI_TypeDef *spi = (SPI_TypeDef *)(obj->spi);
bogdanm 0:9b334a45a8ff 422 while (!ssp_writeable(obj));
bogdanm 0:9b334a45a8ff 423 spi->DR = (uint16_t)value;
bogdanm 0:9b334a45a8ff 424 }
bogdanm 0:9b334a45a8ff 425
bogdanm 0:9b334a45a8ff 426 static inline int ssp_read(spi_t *obj)
bogdanm 0:9b334a45a8ff 427 {
bogdanm 0:9b334a45a8ff 428 SPI_TypeDef *spi = (SPI_TypeDef *)(obj->spi);
bogdanm 0:9b334a45a8ff 429 while (!ssp_readable(obj));
bogdanm 0:9b334a45a8ff 430 return (int)spi->DR;
bogdanm 0:9b334a45a8ff 431 }
bogdanm 0:9b334a45a8ff 432
bogdanm 0:9b334a45a8ff 433 static inline int ssp_busy(spi_t *obj)
bogdanm 0:9b334a45a8ff 434 {
bogdanm 0:9b334a45a8ff 435 int status;
bogdanm 0:9b334a45a8ff 436 SpiHandle.Instance = (SPI_TypeDef *)(obj->spi);
bogdanm 0:9b334a45a8ff 437 status = ((__HAL_SPI_GET_FLAG(&SpiHandle, SPI_FLAG_BSY) != RESET) ? 1 : 0);
bogdanm 0:9b334a45a8ff 438 return status;
bogdanm 0:9b334a45a8ff 439 }
bogdanm 0:9b334a45a8ff 440
bogdanm 0:9b334a45a8ff 441 int spi_master_write(spi_t *obj, int value)
bogdanm 0:9b334a45a8ff 442 {
bogdanm 0:9b334a45a8ff 443 ssp_write(obj, value);
bogdanm 0:9b334a45a8ff 444 return ssp_read(obj);
bogdanm 0:9b334a45a8ff 445 }
bogdanm 0:9b334a45a8ff 446
bogdanm 0:9b334a45a8ff 447 int spi_slave_receive(spi_t *obj)
bogdanm 0:9b334a45a8ff 448 {
bogdanm 0:9b334a45a8ff 449 return ((ssp_readable(obj) && !ssp_busy(obj)) ? 1 : 0);
bogdanm 0:9b334a45a8ff 450 };
bogdanm 0:9b334a45a8ff 451
bogdanm 0:9b334a45a8ff 452 int spi_slave_read(spi_t *obj)
bogdanm 0:9b334a45a8ff 453 {
bogdanm 0:9b334a45a8ff 454 SPI_TypeDef *spi = (SPI_TypeDef *)(obj->spi);
bogdanm 0:9b334a45a8ff 455 while (!ssp_readable(obj));
bogdanm 0:9b334a45a8ff 456 return (int)spi->DR;
bogdanm 0:9b334a45a8ff 457 }
bogdanm 0:9b334a45a8ff 458
bogdanm 0:9b334a45a8ff 459 void spi_slave_write(spi_t *obj, int value)
bogdanm 0:9b334a45a8ff 460 {
bogdanm 0:9b334a45a8ff 461 SPI_TypeDef *spi = (SPI_TypeDef *)(obj->spi);
bogdanm 0:9b334a45a8ff 462 while (!ssp_writeable(obj));
bogdanm 0:9b334a45a8ff 463 spi->DR = (uint16_t)value;
bogdanm 0:9b334a45a8ff 464 }
bogdanm 0:9b334a45a8ff 465
bogdanm 0:9b334a45a8ff 466 int spi_busy(spi_t *obj)
bogdanm 0:9b334a45a8ff 467 {
bogdanm 0:9b334a45a8ff 468 return ssp_busy(obj);
bogdanm 0:9b334a45a8ff 469 }
bogdanm 0:9b334a45a8ff 470
bogdanm 0:9b334a45a8ff 471 #endif