Easily add all supported connectivity methods to your mbed OS project

Dependencies:   type-yd-driver

Committer:
MACRUM
Date:
Wed Jul 12 10:52:58 2017 +0000
Revision:
0:615f90842ce8
Initial commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
MACRUM 0:615f90842ce8 1 /*
MACRUM 0:615f90842ce8 2 * Copyright (c) 2014-2015 ARM Limited. All rights reserved.
MACRUM 0:615f90842ce8 3 * SPDX-License-Identifier: Apache-2.0
MACRUM 0:615f90842ce8 4 * Licensed under the Apache License, Version 2.0 (the License); you may
MACRUM 0:615f90842ce8 5 * not use this file except in compliance with the License.
MACRUM 0:615f90842ce8 6 * You may obtain a copy of the License at
MACRUM 0:615f90842ce8 7 *
MACRUM 0:615f90842ce8 8 * http://www.apache.org/licenses/LICENSE-2.0
MACRUM 0:615f90842ce8 9 *
MACRUM 0:615f90842ce8 10 * Unless required by applicable law or agreed to in writing, software
MACRUM 0:615f90842ce8 11 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
MACRUM 0:615f90842ce8 12 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
MACRUM 0:615f90842ce8 13 * See the License for the specific language governing permissions and
MACRUM 0:615f90842ce8 14 * limitations under the License.
MACRUM 0:615f90842ce8 15 */
MACRUM 0:615f90842ce8 16 #include <string.h>
MACRUM 0:615f90842ce8 17 #include "platform/arm_hal_interrupt.h"
MACRUM 0:615f90842ce8 18 #include "nanostack/platform/arm_hal_phy.h"
MACRUM 0:615f90842ce8 19 #include "ns_types.h"
MACRUM 0:615f90842ce8 20 #include "NanostackRfPhyAtmel.h"
MACRUM 0:615f90842ce8 21 #include "randLIB.h"
MACRUM 0:615f90842ce8 22 #include "AT86RFReg.h"
MACRUM 0:615f90842ce8 23 #include "nanostack/platform/arm_hal_phy.h"
MACRUM 0:615f90842ce8 24 #include "toolchain.h"
MACRUM 0:615f90842ce8 25
MACRUM 0:615f90842ce8 26 /*Worst case sensitivity*/
MACRUM 0:615f90842ce8 27 #define RF_DEFAULT_SENSITIVITY -88
MACRUM 0:615f90842ce8 28 /*Run calibration every 5 minutes*/
MACRUM 0:615f90842ce8 29 #define RF_CALIBRATION_INTERVAL 6000000
MACRUM 0:615f90842ce8 30 /*Wait ACK for 2.5ms*/
MACRUM 0:615f90842ce8 31 #define RF_ACK_WAIT_DEFAULT_TIMEOUT 50
MACRUM 0:615f90842ce8 32 /*Base CCA backoff (50us units) - substitutes for Inter-Frame Spacing*/
MACRUM 0:615f90842ce8 33 #define RF_CCA_BASE_BACKOFF 13 /* 650us */
MACRUM 0:615f90842ce8 34 /*CCA random backoff (50us units)*/
MACRUM 0:615f90842ce8 35 #define RF_CCA_RANDOM_BACKOFF 51 /* 2550us */
MACRUM 0:615f90842ce8 36
MACRUM 0:615f90842ce8 37 #define RF_MTU 127
MACRUM 0:615f90842ce8 38
MACRUM 0:615f90842ce8 39 #define RF_PHY_MODE OQPSK_SIN_250
MACRUM 0:615f90842ce8 40
MACRUM 0:615f90842ce8 41 /*Radio RX and TX state definitions*/
MACRUM 0:615f90842ce8 42 #define RFF_ON 0x01
MACRUM 0:615f90842ce8 43 #define RFF_RX 0x02
MACRUM 0:615f90842ce8 44 #define RFF_TX 0x04
MACRUM 0:615f90842ce8 45 #define RFF_CCA 0x08
MACRUM 0:615f90842ce8 46 #define RFF_PROT 0x10
MACRUM 0:615f90842ce8 47
MACRUM 0:615f90842ce8 48 typedef enum
MACRUM 0:615f90842ce8 49 {
MACRUM 0:615f90842ce8 50 RF_MODE_NORMAL = 0,
MACRUM 0:615f90842ce8 51 RF_MODE_SNIFFER = 1,
MACRUM 0:615f90842ce8 52 RF_MODE_ED = 2
MACRUM 0:615f90842ce8 53 }rf_mode_t;
MACRUM 0:615f90842ce8 54
MACRUM 0:615f90842ce8 55 /*Atmel RF Part Type*/
MACRUM 0:615f90842ce8 56 typedef enum
MACRUM 0:615f90842ce8 57 {
MACRUM 0:615f90842ce8 58 ATMEL_UNKNOW_DEV = 0,
MACRUM 0:615f90842ce8 59 ATMEL_AT86RF212,
MACRUM 0:615f90842ce8 60 ATMEL_AT86RF231, // No longer supported (doesn't give ED+status on frame read)
MACRUM 0:615f90842ce8 61 ATMEL_AT86RF233
MACRUM 0:615f90842ce8 62 }rf_trx_part_e;
MACRUM 0:615f90842ce8 63
MACRUM 0:615f90842ce8 64 /*Atmel RF states*/
MACRUM 0:615f90842ce8 65 typedef enum
MACRUM 0:615f90842ce8 66 {
MACRUM 0:615f90842ce8 67 NOP = 0x00,
MACRUM 0:615f90842ce8 68 BUSY_RX = 0x01,
MACRUM 0:615f90842ce8 69 RF_TX_START = 0x02,
MACRUM 0:615f90842ce8 70 FORCE_TRX_OFF = 0x03,
MACRUM 0:615f90842ce8 71 FORCE_PLL_ON = 0x04,
MACRUM 0:615f90842ce8 72 RX_ON = 0x06,
MACRUM 0:615f90842ce8 73 TRX_OFF = 0x08,
MACRUM 0:615f90842ce8 74 PLL_ON = 0x09,
MACRUM 0:615f90842ce8 75 BUSY_RX_AACK = 0x11,
MACRUM 0:615f90842ce8 76 SLEEP = 0x0F,
MACRUM 0:615f90842ce8 77 RX_AACK_ON = 0x16,
MACRUM 0:615f90842ce8 78 TX_ARET_ON = 0x19
MACRUM 0:615f90842ce8 79 }rf_trx_states_t;
MACRUM 0:615f90842ce8 80
MACRUM 0:615f90842ce8 81 static const uint8_t *rf_tx_data; // Points to Nanostack's buffer
MACRUM 0:615f90842ce8 82 static uint8_t rf_tx_length;
MACRUM 0:615f90842ce8 83 /*ACK wait duration changes depending on data rate*/
MACRUM 0:615f90842ce8 84 static uint16_t rf_ack_wait_duration = RF_ACK_WAIT_DEFAULT_TIMEOUT;
MACRUM 0:615f90842ce8 85
MACRUM 0:615f90842ce8 86 static int8_t rf_sensitivity = RF_DEFAULT_SENSITIVITY;
MACRUM 0:615f90842ce8 87 static rf_mode_t rf_mode = RF_MODE_NORMAL;
MACRUM 0:615f90842ce8 88 static uint8_t radio_tx_power = 0x00; // Default to +4dBm
MACRUM 0:615f90842ce8 89 static uint8_t rf_phy_channel = 12;
MACRUM 0:615f90842ce8 90 static uint8_t rf_tuned = 1;
MACRUM 0:615f90842ce8 91 static uint8_t rf_use_antenna_diversity = 0;
MACRUM 0:615f90842ce8 92 static int16_t expected_ack_sequence = -1;
MACRUM 0:615f90842ce8 93 static uint8_t rf_rx_mode = 0;
MACRUM 0:615f90842ce8 94 static uint8_t rf_flags = 0;
MACRUM 0:615f90842ce8 95 static int8_t rf_radio_driver_id = -1;
MACRUM 0:615f90842ce8 96 static phy_device_driver_s device_driver;
MACRUM 0:615f90842ce8 97 static uint8_t mac_tx_handle = 0;
MACRUM 0:615f90842ce8 98
MACRUM 0:615f90842ce8 99 /* Channel configurations for 2.4 and sub-GHz */
MACRUM 0:615f90842ce8 100 static const phy_rf_channel_configuration_s phy_24ghz = {2405000000U, 5000000U, 250000U, 16U, M_OQPSK};
MACRUM 0:615f90842ce8 101 static const phy_rf_channel_configuration_s phy_subghz = {868300000U, 2000000U, 250000U, 11U, M_OQPSK};
MACRUM 0:615f90842ce8 102
MACRUM 0:615f90842ce8 103 static const phy_device_channel_page_s phy_channel_pages[] = {
MACRUM 0:615f90842ce8 104 { CHANNEL_PAGE_0, &phy_24ghz},
MACRUM 0:615f90842ce8 105 { CHANNEL_PAGE_2, &phy_subghz},
MACRUM 0:615f90842ce8 106 { CHANNEL_PAGE_0, NULL}
MACRUM 0:615f90842ce8 107 };
MACRUM 0:615f90842ce8 108
MACRUM 0:615f90842ce8 109 /**
MACRUM 0:615f90842ce8 110 * RF output power write
MACRUM 0:615f90842ce8 111 *
MACRUM 0:615f90842ce8 112 * \brief TX power has to be set before network start.
MACRUM 0:615f90842ce8 113 *
MACRUM 0:615f90842ce8 114 * \param power
MACRUM 0:615f90842ce8 115 * AT86RF233
MACRUM 0:615f90842ce8 116 * 0 = 4 dBm
MACRUM 0:615f90842ce8 117 * 1 = 3.7 dBm
MACRUM 0:615f90842ce8 118 * 2 = 3.4 dBm
MACRUM 0:615f90842ce8 119 * 3 = 3 dBm
MACRUM 0:615f90842ce8 120 * 4 = 2.5 dBm
MACRUM 0:615f90842ce8 121 * 5 = 2 dBm
MACRUM 0:615f90842ce8 122 * 6 = 1 dBm
MACRUM 0:615f90842ce8 123 * 7 = 0 dBm
MACRUM 0:615f90842ce8 124 * 8 = -1 dBm
MACRUM 0:615f90842ce8 125 * 9 = -2 dBm
MACRUM 0:615f90842ce8 126 * 10 = -3 dBm
MACRUM 0:615f90842ce8 127 * 11 = -4 dBm
MACRUM 0:615f90842ce8 128 * 12 = -6 dBm
MACRUM 0:615f90842ce8 129 * 13 = -8 dBm
MACRUM 0:615f90842ce8 130 * 14 = -12 dBm
MACRUM 0:615f90842ce8 131 * 15 = -17 dBm
MACRUM 0:615f90842ce8 132 *
MACRUM 0:615f90842ce8 133 * AT86RF212B
MACRUM 0:615f90842ce8 134 * See datasheet for TX power settings
MACRUM 0:615f90842ce8 135 *
MACRUM 0:615f90842ce8 136 * \return 0, Supported Value
MACRUM 0:615f90842ce8 137 * \return -1, Not Supported Value
MACRUM 0:615f90842ce8 138 */
MACRUM 0:615f90842ce8 139 static int8_t rf_tx_power_set(uint8_t power);
MACRUM 0:615f90842ce8 140 static rf_trx_part_e rf_radio_type_read(void);
MACRUM 0:615f90842ce8 141 static void rf_ack_wait_timer_start(uint16_t slots);
MACRUM 0:615f90842ce8 142 static void rf_ack_wait_timer_stop(void);
MACRUM 0:615f90842ce8 143 static void rf_handle_cca_ed_done(void);
MACRUM 0:615f90842ce8 144 static void rf_handle_tx_end(void);
MACRUM 0:615f90842ce8 145 static void rf_handle_rx_end(void);
MACRUM 0:615f90842ce8 146 static void rf_on(void);
MACRUM 0:615f90842ce8 147 static void rf_receive(void);
MACRUM 0:615f90842ce8 148 static void rf_poll_trx_state_change(rf_trx_states_t trx_state);
MACRUM 0:615f90842ce8 149 static void rf_init(void);
MACRUM 0:615f90842ce8 150 static int8_t rf_device_register(const uint8_t *mac_addr);
MACRUM 0:615f90842ce8 151 static void rf_device_unregister(void);
MACRUM 0:615f90842ce8 152 static void rf_enable_static_frame_buffer_protection(void);
MACRUM 0:615f90842ce8 153 static void rf_disable_static_frame_buffer_protection(void);
MACRUM 0:615f90842ce8 154 static int8_t rf_start_cca(uint8_t *data_ptr, uint16_t data_length, uint8_t tx_handle, data_protocol_e data_protocol );
MACRUM 0:615f90842ce8 155 static void rf_cca_abort(void);
MACRUM 0:615f90842ce8 156 static void rf_calibration_cb(void);
MACRUM 0:615f90842ce8 157 static void rf_init_phy_mode(void);
MACRUM 0:615f90842ce8 158 static void rf_ack_wait_timer_interrupt(void);
MACRUM 0:615f90842ce8 159 static void rf_calibration_timer_interrupt(void);
MACRUM 0:615f90842ce8 160 static void rf_calibration_timer_start(uint32_t slots);
MACRUM 0:615f90842ce8 161 static void rf_cca_timer_interrupt(void);
MACRUM 0:615f90842ce8 162 static void rf_cca_timer_start(uint32_t slots);
MACRUM 0:615f90842ce8 163 static uint8_t rf_scale_lqi(int8_t rssi);
MACRUM 0:615f90842ce8 164
MACRUM 0:615f90842ce8 165 static int8_t rf_interface_state_control(phy_interface_state_e new_state, uint8_t rf_channel);
MACRUM 0:615f90842ce8 166 static int8_t rf_extension(phy_extension_type_e extension_type,uint8_t *data_ptr);
MACRUM 0:615f90842ce8 167 static int8_t rf_address_write(phy_address_type_e address_type,uint8_t *address_ptr);
MACRUM 0:615f90842ce8 168
MACRUM 0:615f90842ce8 169 static void rf_if_cca_timer_start(uint32_t slots);
MACRUM 0:615f90842ce8 170 static void rf_if_enable_promiscuous_mode(void);
MACRUM 0:615f90842ce8 171 static void rf_if_lock(void);
MACRUM 0:615f90842ce8 172 static void rf_if_unlock(void);
MACRUM 0:615f90842ce8 173 static uint8_t rf_if_read_rnd(void);
MACRUM 0:615f90842ce8 174 static void rf_if_calibration_timer_start(uint32_t slots);
MACRUM 0:615f90842ce8 175 static void rf_if_interrupt_handler(void);
MACRUM 0:615f90842ce8 176 static void rf_if_ack_wait_timer_start(uint16_t slots);
MACRUM 0:615f90842ce8 177 static void rf_if_ack_wait_timer_stop(void);
MACRUM 0:615f90842ce8 178 static void rf_if_ack_pending_ctrl(uint8_t state);
MACRUM 0:615f90842ce8 179 static void rf_if_calibration(void);
MACRUM 0:615f90842ce8 180 static uint8_t rf_if_read_register(uint8_t addr);
MACRUM 0:615f90842ce8 181 static void rf_if_set_bit(uint8_t addr, uint8_t bit, uint8_t bit_mask);
MACRUM 0:615f90842ce8 182 static void rf_if_clear_bit(uint8_t addr, uint8_t bit);
MACRUM 0:615f90842ce8 183 static void rf_if_write_register(uint8_t addr, uint8_t data);
MACRUM 0:615f90842ce8 184 static void rf_if_reset_radio(void);
MACRUM 0:615f90842ce8 185 static void rf_if_enable_ant_div(void);
MACRUM 0:615f90842ce8 186 static void rf_if_disable_ant_div(void);
MACRUM 0:615f90842ce8 187 static void rf_if_enable_slptr(void);
MACRUM 0:615f90842ce8 188 static void rf_if_disable_slptr(void);
MACRUM 0:615f90842ce8 189 static void rf_if_write_antenna_diversity_settings(void);
MACRUM 0:615f90842ce8 190 static void rf_if_write_set_tx_power_register(uint8_t value);
MACRUM 0:615f90842ce8 191 static void rf_if_write_rf_settings(void);
MACRUM 0:615f90842ce8 192 static uint8_t rf_if_check_cca(void);
MACRUM 0:615f90842ce8 193 static uint8_t rf_if_read_trx_state(void);
MACRUM 0:615f90842ce8 194 static uint16_t rf_if_read_packet(uint8_t data[RF_MTU], uint8_t *lqi_out, uint8_t *ed_out, bool *crc_good);
MACRUM 0:615f90842ce8 195 static void rf_if_write_short_addr_registers(uint8_t *short_address);
MACRUM 0:615f90842ce8 196 static uint8_t rf_if_last_acked_pending(void);
MACRUM 0:615f90842ce8 197 static void rf_if_write_pan_id_registers(uint8_t *pan_id);
MACRUM 0:615f90842ce8 198 static void rf_if_write_ieee_addr_registers(uint8_t *address);
MACRUM 0:615f90842ce8 199 static void rf_if_write_frame_buffer(const uint8_t *ptr, uint8_t length);
MACRUM 0:615f90842ce8 200 static void rf_if_change_trx_state(rf_trx_states_t trx_state);
MACRUM 0:615f90842ce8 201 static void rf_if_enable_tx_end_interrupt(void);
MACRUM 0:615f90842ce8 202 static void rf_if_enable_rx_end_interrupt(void);
MACRUM 0:615f90842ce8 203 static void rf_if_enable_cca_ed_done_interrupt(void);
MACRUM 0:615f90842ce8 204 static void rf_if_start_cca_process(void);
MACRUM 0:615f90842ce8 205 static int8_t rf_if_scale_rssi(uint8_t ed_level);
MACRUM 0:615f90842ce8 206 static void rf_if_set_channel_register(uint8_t channel);
MACRUM 0:615f90842ce8 207 static void rf_if_enable_promiscuous_mode(void);
MACRUM 0:615f90842ce8 208 static void rf_if_disable_promiscuous_mode(void);
MACRUM 0:615f90842ce8 209 static uint8_t rf_if_read_part_num(void);
MACRUM 0:615f90842ce8 210 static void rf_if_enable_irq(void);
MACRUM 0:615f90842ce8 211 static void rf_if_disable_irq(void);
MACRUM 0:615f90842ce8 212
MACRUM 0:615f90842ce8 213 #ifdef MBED_CONF_RTOS_PRESENT
MACRUM 0:615f90842ce8 214 #include "mbed.h"
MACRUM 0:615f90842ce8 215 #include "rtos.h"
MACRUM 0:615f90842ce8 216
MACRUM 0:615f90842ce8 217 static void rf_if_irq_task_process_irq();
MACRUM 0:615f90842ce8 218
MACRUM 0:615f90842ce8 219 #define SIG_RADIO 1
MACRUM 0:615f90842ce8 220 #define SIG_TIMER_ACK 2
MACRUM 0:615f90842ce8 221 #define SIG_TIMER_CAL 4
MACRUM 0:615f90842ce8 222 #define SIG_TIMER_CCA 8
MACRUM 0:615f90842ce8 223
MACRUM 0:615f90842ce8 224 #define SIG_TIMERS (SIG_TIMER_ACK|SIG_TIMER_CAL|SIG_TIMER_CCA)
MACRUM 0:615f90842ce8 225 #define SIG_ALL (SIG_RADIO|SIG_TIMERS)
MACRUM 0:615f90842ce8 226 #endif
MACRUM 0:615f90842ce8 227
MACRUM 0:615f90842ce8 228 // HW pins to RF chip
MACRUM 0:615f90842ce8 229 #define SPI_SPEED 7500000
MACRUM 0:615f90842ce8 230
MACRUM 0:615f90842ce8 231 class UnlockedSPI : public SPI {
MACRUM 0:615f90842ce8 232 public:
MACRUM 0:615f90842ce8 233 UnlockedSPI(PinName mosi, PinName miso, PinName sclk) :
MACRUM 0:615f90842ce8 234 SPI(mosi, miso, sclk) { }
MACRUM 0:615f90842ce8 235 virtual void lock() { }
MACRUM 0:615f90842ce8 236 virtual void unlock() { }
MACRUM 0:615f90842ce8 237 };
MACRUM 0:615f90842ce8 238
MACRUM 0:615f90842ce8 239 class RFBits {
MACRUM 0:615f90842ce8 240 public:
MACRUM 0:615f90842ce8 241 RFBits(PinName spi_mosi, PinName spi_miso,
MACRUM 0:615f90842ce8 242 PinName spi_sclk, PinName spi_cs,
MACRUM 0:615f90842ce8 243 PinName spi_rst, PinName spi_slp, PinName spi_irq);
MACRUM 0:615f90842ce8 244 UnlockedSPI spi;
MACRUM 0:615f90842ce8 245 DigitalOut CS;
MACRUM 0:615f90842ce8 246 DigitalOut RST;
MACRUM 0:615f90842ce8 247 DigitalOut SLP_TR;
MACRUM 0:615f90842ce8 248 InterruptIn IRQ;
MACRUM 0:615f90842ce8 249 Timeout ack_timer;
MACRUM 0:615f90842ce8 250 Timeout cal_timer;
MACRUM 0:615f90842ce8 251 Timeout cca_timer;
MACRUM 0:615f90842ce8 252 #ifdef MBED_CONF_RTOS_PRESENT
MACRUM 0:615f90842ce8 253 Thread irq_thread;
MACRUM 0:615f90842ce8 254 Mutex mutex;
MACRUM 0:615f90842ce8 255 void rf_if_irq_task();
MACRUM 0:615f90842ce8 256 #endif
MACRUM 0:615f90842ce8 257 };
MACRUM 0:615f90842ce8 258
MACRUM 0:615f90842ce8 259 RFBits::RFBits(PinName spi_mosi, PinName spi_miso,
MACRUM 0:615f90842ce8 260 PinName spi_sclk, PinName spi_cs,
MACRUM 0:615f90842ce8 261 PinName spi_rst, PinName spi_slp, PinName spi_irq)
MACRUM 0:615f90842ce8 262 : spi(spi_mosi, spi_miso, spi_sclk),
MACRUM 0:615f90842ce8 263 CS(spi_cs),
MACRUM 0:615f90842ce8 264 RST(spi_rst),
MACRUM 0:615f90842ce8 265 SLP_TR(spi_slp),
MACRUM 0:615f90842ce8 266 IRQ(spi_irq)
MACRUM 0:615f90842ce8 267 #ifdef MBED_CONF_RTOS_PRESENT
MACRUM 0:615f90842ce8 268 ,irq_thread(osPriorityRealtime, 1024)
MACRUM 0:615f90842ce8 269 #endif
MACRUM 0:615f90842ce8 270 {
MACRUM 0:615f90842ce8 271 #ifdef MBED_CONF_RTOS_PRESENT
MACRUM 0:615f90842ce8 272 irq_thread.start(mbed::callback(this, &RFBits::rf_if_irq_task));
MACRUM 0:615f90842ce8 273 #endif
MACRUM 0:615f90842ce8 274 }
MACRUM 0:615f90842ce8 275
MACRUM 0:615f90842ce8 276 static RFBits *rf;
MACRUM 0:615f90842ce8 277 static uint8_t rf_part_num = 0;
MACRUM 0:615f90842ce8 278 /*TODO: RSSI Base value setting*/
MACRUM 0:615f90842ce8 279 static int8_t rf_rssi_base_val = -91;
MACRUM 0:615f90842ce8 280
MACRUM 0:615f90842ce8 281 static uint8_t rf_if_spi_exchange(uint8_t out);
MACRUM 0:615f90842ce8 282
MACRUM 0:615f90842ce8 283 static void rf_if_lock(void)
MACRUM 0:615f90842ce8 284 {
MACRUM 0:615f90842ce8 285 platform_enter_critical();
MACRUM 0:615f90842ce8 286 }
MACRUM 0:615f90842ce8 287
MACRUM 0:615f90842ce8 288 static void rf_if_unlock(void)
MACRUM 0:615f90842ce8 289 {
MACRUM 0:615f90842ce8 290 platform_exit_critical();
MACRUM 0:615f90842ce8 291 }
MACRUM 0:615f90842ce8 292
MACRUM 0:615f90842ce8 293 #ifdef MBED_CONF_RTOS_PRESENT
MACRUM 0:615f90842ce8 294 static void rf_if_cca_timer_signal(void)
MACRUM 0:615f90842ce8 295 {
MACRUM 0:615f90842ce8 296 rf->irq_thread.signal_set(SIG_TIMER_CCA);
MACRUM 0:615f90842ce8 297 }
MACRUM 0:615f90842ce8 298
MACRUM 0:615f90842ce8 299 static void rf_if_cal_timer_signal(void)
MACRUM 0:615f90842ce8 300 {
MACRUM 0:615f90842ce8 301 rf->irq_thread.signal_set(SIG_TIMER_CAL);
MACRUM 0:615f90842ce8 302 }
MACRUM 0:615f90842ce8 303
MACRUM 0:615f90842ce8 304 static void rf_if_ack_timer_signal(void)
MACRUM 0:615f90842ce8 305 {
MACRUM 0:615f90842ce8 306 rf->irq_thread.signal_set(SIG_TIMER_ACK);
MACRUM 0:615f90842ce8 307 }
MACRUM 0:615f90842ce8 308 #endif
MACRUM 0:615f90842ce8 309
MACRUM 0:615f90842ce8 310
MACRUM 0:615f90842ce8 311 /* Delay functions for RF Chip SPI access */
MACRUM 0:615f90842ce8 312 #ifdef __CC_ARM
MACRUM 0:615f90842ce8 313 __asm static void delay_loop(uint32_t count)
MACRUM 0:615f90842ce8 314 {
MACRUM 0:615f90842ce8 315 1
MACRUM 0:615f90842ce8 316 SUBS a1, a1, #1
MACRUM 0:615f90842ce8 317 BCS %BT1
MACRUM 0:615f90842ce8 318 BX lr
MACRUM 0:615f90842ce8 319 }
MACRUM 0:615f90842ce8 320 #elif defined (__ICCARM__)
MACRUM 0:615f90842ce8 321 static void delay_loop(uint32_t count)
MACRUM 0:615f90842ce8 322 {
MACRUM 0:615f90842ce8 323 __asm volatile(
MACRUM 0:615f90842ce8 324 "loop: \n"
MACRUM 0:615f90842ce8 325 " SUBS %0, %0, #1 \n"
MACRUM 0:615f90842ce8 326 " BCS.n loop\n"
MACRUM 0:615f90842ce8 327 : "+r" (count)
MACRUM 0:615f90842ce8 328 :
MACRUM 0:615f90842ce8 329 : "cc"
MACRUM 0:615f90842ce8 330 );
MACRUM 0:615f90842ce8 331 }
MACRUM 0:615f90842ce8 332 #else // GCC
MACRUM 0:615f90842ce8 333 static void delay_loop(uint32_t count)
MACRUM 0:615f90842ce8 334 {
MACRUM 0:615f90842ce8 335 __asm__ volatile (
MACRUM 0:615f90842ce8 336 "%=:\n\t"
MACRUM 0:615f90842ce8 337 #if defined(__thumb__) && !defined(__thumb2__)
MACRUM 0:615f90842ce8 338 "SUB %0, #1\n\t"
MACRUM 0:615f90842ce8 339 #else
MACRUM 0:615f90842ce8 340 "SUBS %0, %0, #1\n\t"
MACRUM 0:615f90842ce8 341 #endif
MACRUM 0:615f90842ce8 342 "BCS %=b\n\t"
MACRUM 0:615f90842ce8 343 : "+l" (count)
MACRUM 0:615f90842ce8 344 :
MACRUM 0:615f90842ce8 345 : "cc"
MACRUM 0:615f90842ce8 346 );
MACRUM 0:615f90842ce8 347 }
MACRUM 0:615f90842ce8 348 #endif
MACRUM 0:615f90842ce8 349
MACRUM 0:615f90842ce8 350 static void delay_ns(uint32_t ns)
MACRUM 0:615f90842ce8 351 {
MACRUM 0:615f90842ce8 352 uint32_t cycles_per_us = SystemCoreClock / 1000000;
MACRUM 0:615f90842ce8 353 // Cortex-M0 takes 4 cycles per loop (SUB=1, BCS=3)
MACRUM 0:615f90842ce8 354 // Cortex-M3 and M4 takes 3 cycles per loop (SUB=1, BCS=2)
MACRUM 0:615f90842ce8 355 // Cortex-M7 - who knows?
MACRUM 0:615f90842ce8 356 // Cortex M3-M7 have "CYCCNT" - would be better than a software loop, but M0 doesn't
MACRUM 0:615f90842ce8 357 // Assume 3 cycles per loop for now - will be 33% slow on M0. No biggie,
MACRUM 0:615f90842ce8 358 // as original version of code was 300% slow on M4.
MACRUM 0:615f90842ce8 359 // [Note that this very calculation, plus call overhead, will take multiple
MACRUM 0:615f90842ce8 360 // cycles. Could well be 100ns on its own... So round down here, startup is
MACRUM 0:615f90842ce8 361 // worth at least one loop iteration.]
MACRUM 0:615f90842ce8 362 uint32_t count = (cycles_per_us * ns) / 3000;
MACRUM 0:615f90842ce8 363
MACRUM 0:615f90842ce8 364 delay_loop(count);
MACRUM 0:615f90842ce8 365 }
MACRUM 0:615f90842ce8 366
MACRUM 0:615f90842ce8 367 // t1 = 180ns, SEL falling edge to MISO active [SPI setup assumed slow enough to not need manual delay]
MACRUM 0:615f90842ce8 368 #define CS_SELECT() {rf->CS = 0; /* delay_ns(180); */}
MACRUM 0:615f90842ce8 369 // t9 = 250ns, last clock to SEL rising edge, t8 = 250ns, SPI idle time between consecutive access
MACRUM 0:615f90842ce8 370 #define CS_RELEASE() {delay_ns(250); rf->CS = 1; delay_ns(250);}
MACRUM 0:615f90842ce8 371
MACRUM 0:615f90842ce8 372 /*
MACRUM 0:615f90842ce8 373 * \brief Function sets the TX power variable.
MACRUM 0:615f90842ce8 374 *
MACRUM 0:615f90842ce8 375 * \param power TX power setting
MACRUM 0:615f90842ce8 376 *
MACRUM 0:615f90842ce8 377 * \return 0 Success
MACRUM 0:615f90842ce8 378 * \return -1 Fail
MACRUM 0:615f90842ce8 379 */
MACRUM 0:615f90842ce8 380 MBED_UNUSED static int8_t rf_tx_power_set(uint8_t power)
MACRUM 0:615f90842ce8 381 {
MACRUM 0:615f90842ce8 382 int8_t ret_val = -1;
MACRUM 0:615f90842ce8 383
MACRUM 0:615f90842ce8 384 radio_tx_power = power;
MACRUM 0:615f90842ce8 385 rf_if_lock();
MACRUM 0:615f90842ce8 386 rf_if_write_set_tx_power_register(radio_tx_power);
MACRUM 0:615f90842ce8 387 rf_if_unlock();
MACRUM 0:615f90842ce8 388 ret_val = 0;
MACRUM 0:615f90842ce8 389
MACRUM 0:615f90842ce8 390 return ret_val;
MACRUM 0:615f90842ce8 391 }
MACRUM 0:615f90842ce8 392
MACRUM 0:615f90842ce8 393 /*
MACRUM 0:615f90842ce8 394 * \brief Read connected radio part.
MACRUM 0:615f90842ce8 395 *
MACRUM 0:615f90842ce8 396 * This function only return valid information when rf_init() is called
MACRUM 0:615f90842ce8 397 *
MACRUM 0:615f90842ce8 398 * \return
MACRUM 0:615f90842ce8 399 */
MACRUM 0:615f90842ce8 400 static rf_trx_part_e rf_radio_type_read(void)
MACRUM 0:615f90842ce8 401 {
MACRUM 0:615f90842ce8 402 rf_trx_part_e ret_val = ATMEL_UNKNOW_DEV;
MACRUM 0:615f90842ce8 403
MACRUM 0:615f90842ce8 404 switch (rf_part_num)
MACRUM 0:615f90842ce8 405 {
MACRUM 0:615f90842ce8 406 case PART_AT86RF212:
MACRUM 0:615f90842ce8 407 ret_val = ATMEL_AT86RF212;
MACRUM 0:615f90842ce8 408 break;
MACRUM 0:615f90842ce8 409 case PART_AT86RF233:
MACRUM 0:615f90842ce8 410 ret_val = ATMEL_AT86RF233;
MACRUM 0:615f90842ce8 411 break;
MACRUM 0:615f90842ce8 412 default:
MACRUM 0:615f90842ce8 413 break;
MACRUM 0:615f90842ce8 414 }
MACRUM 0:615f90842ce8 415
MACRUM 0:615f90842ce8 416 return ret_val;
MACRUM 0:615f90842ce8 417 }
MACRUM 0:615f90842ce8 418
MACRUM 0:615f90842ce8 419
MACRUM 0:615f90842ce8 420 /*
MACRUM 0:615f90842ce8 421 * \brief Function starts the ACK wait timeout.
MACRUM 0:615f90842ce8 422 *
MACRUM 0:615f90842ce8 423 * \param slots Given slots, resolution 50us
MACRUM 0:615f90842ce8 424 *
MACRUM 0:615f90842ce8 425 * \return none
MACRUM 0:615f90842ce8 426 */
MACRUM 0:615f90842ce8 427 static void rf_if_ack_wait_timer_start(uint16_t slots)
MACRUM 0:615f90842ce8 428 {
MACRUM 0:615f90842ce8 429 #ifdef MBED_CONF_RTOS_PRESENT
MACRUM 0:615f90842ce8 430 rf->ack_timer.attach_us(rf_if_ack_timer_signal, slots*50);
MACRUM 0:615f90842ce8 431 #else
MACRUM 0:615f90842ce8 432 rf->ack_timer.attach_us(rf_ack_wait_timer_interrupt, slots*50);
MACRUM 0:615f90842ce8 433 #endif
MACRUM 0:615f90842ce8 434 }
MACRUM 0:615f90842ce8 435
MACRUM 0:615f90842ce8 436 /*
MACRUM 0:615f90842ce8 437 * \brief Function starts the calibration interval.
MACRUM 0:615f90842ce8 438 *
MACRUM 0:615f90842ce8 439 * \param slots Given slots, resolution 50us
MACRUM 0:615f90842ce8 440 *
MACRUM 0:615f90842ce8 441 * \return none
MACRUM 0:615f90842ce8 442 */
MACRUM 0:615f90842ce8 443 static void rf_if_calibration_timer_start(uint32_t slots)
MACRUM 0:615f90842ce8 444 {
MACRUM 0:615f90842ce8 445 #ifdef MBED_CONF_RTOS_PRESENT
MACRUM 0:615f90842ce8 446 rf->cal_timer.attach_us(rf_if_cal_timer_signal, slots*50);
MACRUM 0:615f90842ce8 447 #else
MACRUM 0:615f90842ce8 448 rf->cal_timer.attach_us(rf_calibration_timer_interrupt, slots*50);
MACRUM 0:615f90842ce8 449 #endif
MACRUM 0:615f90842ce8 450 }
MACRUM 0:615f90842ce8 451
MACRUM 0:615f90842ce8 452 /*
MACRUM 0:615f90842ce8 453 * \brief Function starts the CCA interval.
MACRUM 0:615f90842ce8 454 *
MACRUM 0:615f90842ce8 455 * \param slots Given slots, resolution 50us
MACRUM 0:615f90842ce8 456 *
MACRUM 0:615f90842ce8 457 * \return none
MACRUM 0:615f90842ce8 458 */
MACRUM 0:615f90842ce8 459 static void rf_if_cca_timer_start(uint32_t slots)
MACRUM 0:615f90842ce8 460 {
MACRUM 0:615f90842ce8 461 #ifdef MBED_CONF_RTOS_PRESENT
MACRUM 0:615f90842ce8 462 rf->cca_timer.attach_us(rf_if_cca_timer_signal, slots*50);
MACRUM 0:615f90842ce8 463 #else
MACRUM 0:615f90842ce8 464 rf->cca_timer.attach_us(rf_cca_timer_interrupt, slots*50);
MACRUM 0:615f90842ce8 465 #endif
MACRUM 0:615f90842ce8 466 }
MACRUM 0:615f90842ce8 467
MACRUM 0:615f90842ce8 468 /*
MACRUM 0:615f90842ce8 469 * \brief Function stops the CCA interval.
MACRUM 0:615f90842ce8 470 *
MACRUM 0:615f90842ce8 471 * \return none
MACRUM 0:615f90842ce8 472 */
MACRUM 0:615f90842ce8 473 static void rf_if_cca_timer_stop(void)
MACRUM 0:615f90842ce8 474 {
MACRUM 0:615f90842ce8 475 rf->cca_timer.detach();
MACRUM 0:615f90842ce8 476 }
MACRUM 0:615f90842ce8 477
MACRUM 0:615f90842ce8 478 /*
MACRUM 0:615f90842ce8 479 * \brief Function stops the ACK wait timeout.
MACRUM 0:615f90842ce8 480 *
MACRUM 0:615f90842ce8 481 * \param none
MACRUM 0:615f90842ce8 482 *
MACRUM 0:615f90842ce8 483 * \return none
MACRUM 0:615f90842ce8 484 */
MACRUM 0:615f90842ce8 485 static void rf_if_ack_wait_timer_stop(void)
MACRUM 0:615f90842ce8 486 {
MACRUM 0:615f90842ce8 487 rf->ack_timer.detach();
MACRUM 0:615f90842ce8 488 }
MACRUM 0:615f90842ce8 489
MACRUM 0:615f90842ce8 490 /*
MACRUM 0:615f90842ce8 491 * \brief Function sets bit(s) in given RF register.
MACRUM 0:615f90842ce8 492 *
MACRUM 0:615f90842ce8 493 * \param addr Address of the register to set
MACRUM 0:615f90842ce8 494 * \param bit Bit(s) to set
MACRUM 0:615f90842ce8 495 * \param bit_mask Masks the field inside the register
MACRUM 0:615f90842ce8 496 *
MACRUM 0:615f90842ce8 497 * \return none
MACRUM 0:615f90842ce8 498 */
MACRUM 0:615f90842ce8 499 static void rf_if_set_bit(uint8_t addr, uint8_t bit, uint8_t bit_mask)
MACRUM 0:615f90842ce8 500 {
MACRUM 0:615f90842ce8 501 uint8_t reg = rf_if_read_register(addr);
MACRUM 0:615f90842ce8 502 reg &= ~bit_mask;
MACRUM 0:615f90842ce8 503 reg |= bit;
MACRUM 0:615f90842ce8 504 rf_if_write_register(addr, reg);
MACRUM 0:615f90842ce8 505 }
MACRUM 0:615f90842ce8 506
MACRUM 0:615f90842ce8 507 /*
MACRUM 0:615f90842ce8 508 * \brief Function clears bit(s) in given RF register.
MACRUM 0:615f90842ce8 509 *
MACRUM 0:615f90842ce8 510 * \param addr Address of the register to clear
MACRUM 0:615f90842ce8 511 * \param bit Bit(s) to clear
MACRUM 0:615f90842ce8 512 *
MACRUM 0:615f90842ce8 513 * \return none
MACRUM 0:615f90842ce8 514 */
MACRUM 0:615f90842ce8 515 static void rf_if_clear_bit(uint8_t addr, uint8_t bit)
MACRUM 0:615f90842ce8 516 {
MACRUM 0:615f90842ce8 517 rf_if_set_bit(addr, 0, bit);
MACRUM 0:615f90842ce8 518 }
MACRUM 0:615f90842ce8 519
MACRUM 0:615f90842ce8 520 /*
MACRUM 0:615f90842ce8 521 * \brief Function writes register in RF.
MACRUM 0:615f90842ce8 522 *
MACRUM 0:615f90842ce8 523 * \param addr Address on the RF
MACRUM 0:615f90842ce8 524 * \param data Written data
MACRUM 0:615f90842ce8 525 *
MACRUM 0:615f90842ce8 526 * \return none
MACRUM 0:615f90842ce8 527 */
MACRUM 0:615f90842ce8 528 static void rf_if_write_register(uint8_t addr, uint8_t data)
MACRUM 0:615f90842ce8 529 {
MACRUM 0:615f90842ce8 530 uint8_t cmd = 0xC0;
MACRUM 0:615f90842ce8 531 CS_SELECT();
MACRUM 0:615f90842ce8 532 rf_if_spi_exchange(cmd | addr);
MACRUM 0:615f90842ce8 533 rf_if_spi_exchange(data);
MACRUM 0:615f90842ce8 534 CS_RELEASE();
MACRUM 0:615f90842ce8 535 }
MACRUM 0:615f90842ce8 536
MACRUM 0:615f90842ce8 537 /*
MACRUM 0:615f90842ce8 538 * \brief Function reads RF register.
MACRUM 0:615f90842ce8 539 *
MACRUM 0:615f90842ce8 540 * \param addr Address on the RF
MACRUM 0:615f90842ce8 541 *
MACRUM 0:615f90842ce8 542 * \return Read data
MACRUM 0:615f90842ce8 543 */
MACRUM 0:615f90842ce8 544 static uint8_t rf_if_read_register(uint8_t addr)
MACRUM 0:615f90842ce8 545 {
MACRUM 0:615f90842ce8 546 uint8_t cmd = 0x80;
MACRUM 0:615f90842ce8 547 uint8_t data;
MACRUM 0:615f90842ce8 548 CS_SELECT();
MACRUM 0:615f90842ce8 549 rf_if_spi_exchange(cmd | addr);
MACRUM 0:615f90842ce8 550 data = rf_if_spi_exchange(0);
MACRUM 0:615f90842ce8 551 CS_RELEASE();
MACRUM 0:615f90842ce8 552 return data;
MACRUM 0:615f90842ce8 553 }
MACRUM 0:615f90842ce8 554
MACRUM 0:615f90842ce8 555 /*
MACRUM 0:615f90842ce8 556 * \brief Function resets the RF.
MACRUM 0:615f90842ce8 557 *
MACRUM 0:615f90842ce8 558 * \param none
MACRUM 0:615f90842ce8 559 *
MACRUM 0:615f90842ce8 560 * \return none
MACRUM 0:615f90842ce8 561 */
MACRUM 0:615f90842ce8 562 static void rf_if_reset_radio(void)
MACRUM 0:615f90842ce8 563 {
MACRUM 0:615f90842ce8 564 rf->spi.frequency(SPI_SPEED);
MACRUM 0:615f90842ce8 565 rf->IRQ.rise(0);
MACRUM 0:615f90842ce8 566 rf->RST = 1;
MACRUM 0:615f90842ce8 567 wait_ms(1);
MACRUM 0:615f90842ce8 568 rf->RST = 0;
MACRUM 0:615f90842ce8 569 wait_ms(10);
MACRUM 0:615f90842ce8 570 CS_RELEASE();
MACRUM 0:615f90842ce8 571 rf->SLP_TR = 0;
MACRUM 0:615f90842ce8 572 wait_ms(10);
MACRUM 0:615f90842ce8 573 rf->RST = 1;
MACRUM 0:615f90842ce8 574 wait_ms(10);
MACRUM 0:615f90842ce8 575
MACRUM 0:615f90842ce8 576 rf->IRQ.rise(&rf_if_interrupt_handler);
MACRUM 0:615f90842ce8 577 }
MACRUM 0:615f90842ce8 578
MACRUM 0:615f90842ce8 579 /*
MACRUM 0:615f90842ce8 580 * \brief Function enables the promiscuous mode.
MACRUM 0:615f90842ce8 581 *
MACRUM 0:615f90842ce8 582 * \param none
MACRUM 0:615f90842ce8 583 *
MACRUM 0:615f90842ce8 584 * \return none
MACRUM 0:615f90842ce8 585 */
MACRUM 0:615f90842ce8 586 static void rf_if_enable_promiscuous_mode(void)
MACRUM 0:615f90842ce8 587 {
MACRUM 0:615f90842ce8 588 /*Set AACK_PROM_MODE to enable the promiscuous mode*/
MACRUM 0:615f90842ce8 589 rf_if_set_bit(XAH_CTRL_1, AACK_PROM_MODE, AACK_PROM_MODE);
MACRUM 0:615f90842ce8 590 }
MACRUM 0:615f90842ce8 591
MACRUM 0:615f90842ce8 592 /*
MACRUM 0:615f90842ce8 593 * \brief Function enables the promiscuous mode.
MACRUM 0:615f90842ce8 594 *
MACRUM 0:615f90842ce8 595 * \param none
MACRUM 0:615f90842ce8 596 *
MACRUM 0:615f90842ce8 597 * \return none
MACRUM 0:615f90842ce8 598 */
MACRUM 0:615f90842ce8 599 static void rf_if_disable_promiscuous_mode(void)
MACRUM 0:615f90842ce8 600 {
MACRUM 0:615f90842ce8 601 /*Set AACK_PROM_MODE to enable the promiscuous mode*/
MACRUM 0:615f90842ce8 602 rf_if_clear_bit(XAH_CTRL_1, AACK_PROM_MODE);
MACRUM 0:615f90842ce8 603 }
MACRUM 0:615f90842ce8 604
MACRUM 0:615f90842ce8 605 /*
MACRUM 0:615f90842ce8 606 * \brief Function enables the Antenna diversity usage.
MACRUM 0:615f90842ce8 607 *
MACRUM 0:615f90842ce8 608 * \param none
MACRUM 0:615f90842ce8 609 *
MACRUM 0:615f90842ce8 610 * \return none
MACRUM 0:615f90842ce8 611 */
MACRUM 0:615f90842ce8 612 static void rf_if_enable_ant_div(void)
MACRUM 0:615f90842ce8 613 {
MACRUM 0:615f90842ce8 614 /*Set ANT_EXT_SW_EN to enable controlling of antenna diversity*/
MACRUM 0:615f90842ce8 615 rf_if_set_bit(ANT_DIV, ANT_EXT_SW_EN, ANT_EXT_SW_EN);
MACRUM 0:615f90842ce8 616 }
MACRUM 0:615f90842ce8 617
MACRUM 0:615f90842ce8 618 /*
MACRUM 0:615f90842ce8 619 * \brief Function disables the Antenna diversity usage.
MACRUM 0:615f90842ce8 620 *
MACRUM 0:615f90842ce8 621 * \param none
MACRUM 0:615f90842ce8 622 *
MACRUM 0:615f90842ce8 623 * \return none
MACRUM 0:615f90842ce8 624 */
MACRUM 0:615f90842ce8 625 static void rf_if_disable_ant_div(void)
MACRUM 0:615f90842ce8 626 {
MACRUM 0:615f90842ce8 627 rf_if_clear_bit(ANT_DIV, ANT_EXT_SW_EN);
MACRUM 0:615f90842ce8 628 }
MACRUM 0:615f90842ce8 629
MACRUM 0:615f90842ce8 630 /*
MACRUM 0:615f90842ce8 631 * \brief Function sets the SLP TR pin.
MACRUM 0:615f90842ce8 632 *
MACRUM 0:615f90842ce8 633 * \param none
MACRUM 0:615f90842ce8 634 *
MACRUM 0:615f90842ce8 635 * \return none
MACRUM 0:615f90842ce8 636 */
MACRUM 0:615f90842ce8 637 static void rf_if_enable_slptr(void)
MACRUM 0:615f90842ce8 638 {
MACRUM 0:615f90842ce8 639 rf->SLP_TR = 1;
MACRUM 0:615f90842ce8 640 }
MACRUM 0:615f90842ce8 641
MACRUM 0:615f90842ce8 642 /*
MACRUM 0:615f90842ce8 643 * \brief Function clears the SLP TR pin.
MACRUM 0:615f90842ce8 644 *
MACRUM 0:615f90842ce8 645 * \param none
MACRUM 0:615f90842ce8 646 *
MACRUM 0:615f90842ce8 647 * \return none
MACRUM 0:615f90842ce8 648 */
MACRUM 0:615f90842ce8 649 static void rf_if_disable_slptr(void)
MACRUM 0:615f90842ce8 650 {
MACRUM 0:615f90842ce8 651 rf->SLP_TR = 0;
MACRUM 0:615f90842ce8 652 }
MACRUM 0:615f90842ce8 653
MACRUM 0:615f90842ce8 654 /*
MACRUM 0:615f90842ce8 655 * \brief Function writes the antenna diversity settings.
MACRUM 0:615f90842ce8 656 *
MACRUM 0:615f90842ce8 657 * \param none
MACRUM 0:615f90842ce8 658 *
MACRUM 0:615f90842ce8 659 * \return none
MACRUM 0:615f90842ce8 660 */
MACRUM 0:615f90842ce8 661 static void rf_if_write_antenna_diversity_settings(void)
MACRUM 0:615f90842ce8 662 {
MACRUM 0:615f90842ce8 663 /*Recommended setting of PDT_THRES is 3 when antenna diversity is used*/
MACRUM 0:615f90842ce8 664 rf_if_set_bit(RX_CTRL, 0x03, 0x0f);
MACRUM 0:615f90842ce8 665 rf_if_write_register(ANT_DIV, ANT_DIV_EN | ANT_EXT_SW_EN | ANT_CTRL_DEFAULT);
MACRUM 0:615f90842ce8 666 }
MACRUM 0:615f90842ce8 667
MACRUM 0:615f90842ce8 668 /*
MACRUM 0:615f90842ce8 669 * \brief Function writes the TX output power register.
MACRUM 0:615f90842ce8 670 *
MACRUM 0:615f90842ce8 671 * \param value Given register value
MACRUM 0:615f90842ce8 672 *
MACRUM 0:615f90842ce8 673 * \return none
MACRUM 0:615f90842ce8 674 */
MACRUM 0:615f90842ce8 675 static void rf_if_write_set_tx_power_register(uint8_t value)
MACRUM 0:615f90842ce8 676 {
MACRUM 0:615f90842ce8 677 rf_if_write_register(PHY_TX_PWR, value);
MACRUM 0:615f90842ce8 678 }
MACRUM 0:615f90842ce8 679
MACRUM 0:615f90842ce8 680 /*
MACRUM 0:615f90842ce8 681 * \brief Function returns the RF part number.
MACRUM 0:615f90842ce8 682 *
MACRUM 0:615f90842ce8 683 * \param none
MACRUM 0:615f90842ce8 684 *
MACRUM 0:615f90842ce8 685 * \return part number
MACRUM 0:615f90842ce8 686 */
MACRUM 0:615f90842ce8 687 static uint8_t rf_if_read_part_num(void)
MACRUM 0:615f90842ce8 688 {
MACRUM 0:615f90842ce8 689 return rf_if_read_register(PART_NUM);
MACRUM 0:615f90842ce8 690 }
MACRUM 0:615f90842ce8 691
MACRUM 0:615f90842ce8 692 /*
MACRUM 0:615f90842ce8 693 * \brief Function writes the RF settings and initialises SPI interface.
MACRUM 0:615f90842ce8 694 *
MACRUM 0:615f90842ce8 695 * \param none
MACRUM 0:615f90842ce8 696 *
MACRUM 0:615f90842ce8 697 * \return none
MACRUM 0:615f90842ce8 698 */
MACRUM 0:615f90842ce8 699 static void rf_if_write_rf_settings(void)
MACRUM 0:615f90842ce8 700 {
MACRUM 0:615f90842ce8 701 /*Reset RF module*/
MACRUM 0:615f90842ce8 702 rf_if_reset_radio();
MACRUM 0:615f90842ce8 703
MACRUM 0:615f90842ce8 704 rf_part_num = rf_if_read_part_num();
MACRUM 0:615f90842ce8 705
MACRUM 0:615f90842ce8 706 rf_if_write_register(XAH_CTRL_0,0);
MACRUM 0:615f90842ce8 707 rf_if_write_register(TRX_CTRL_1, 0x20);
MACRUM 0:615f90842ce8 708
MACRUM 0:615f90842ce8 709 /*CCA Mode - Carrier sense OR energy above threshold. Channel list is set separately*/
MACRUM 0:615f90842ce8 710 rf_if_write_register(PHY_CC_CCA, 0x05);
MACRUM 0:615f90842ce8 711
MACRUM 0:615f90842ce8 712 /*Read transceiver PART_NUM*/
MACRUM 0:615f90842ce8 713 rf_part_num = rf_if_read_register(PART_NUM);
MACRUM 0:615f90842ce8 714
MACRUM 0:615f90842ce8 715 /*Sub-GHz RF settings*/
MACRUM 0:615f90842ce8 716 if(rf_part_num == PART_AT86RF212)
MACRUM 0:615f90842ce8 717 {
MACRUM 0:615f90842ce8 718 /*GC_TX_OFFS mode-dependent setting - OQPSK*/
MACRUM 0:615f90842ce8 719 rf_if_write_register(RF_CTRL_0, 0x32);
MACRUM 0:615f90842ce8 720
MACRUM 0:615f90842ce8 721 if(rf_if_read_register(VERSION_NUM) == VERSION_AT86RF212B)
MACRUM 0:615f90842ce8 722 {
MACRUM 0:615f90842ce8 723 /*TX Output Power setting - 0 dBm North American Band*/
MACRUM 0:615f90842ce8 724 rf_if_write_register(PHY_TX_PWR, 0x03);
MACRUM 0:615f90842ce8 725 }
MACRUM 0:615f90842ce8 726 else
MACRUM 0:615f90842ce8 727 {
MACRUM 0:615f90842ce8 728 /*TX Output Power setting - 0 dBm North American Band*/
MACRUM 0:615f90842ce8 729 rf_if_write_register(PHY_TX_PWR, 0x24);
MACRUM 0:615f90842ce8 730 }
MACRUM 0:615f90842ce8 731
MACRUM 0:615f90842ce8 732 /*PHY Mode: IEEE 802.15.4-2006/2011 - OQPSK-SIN-250*/
MACRUM 0:615f90842ce8 733 rf_if_write_register(TRX_CTRL_2, RF_PHY_MODE);
MACRUM 0:615f90842ce8 734 /*Based on receiver Characteristics. See AT86RF212B Datasheet where RSSI BASE VALUE in range -97 - -100 dBm*/
MACRUM 0:615f90842ce8 735 rf_rssi_base_val = -98;
MACRUM 0:615f90842ce8 736 }
MACRUM 0:615f90842ce8 737 /*2.4GHz RF settings*/
MACRUM 0:615f90842ce8 738 else
MACRUM 0:615f90842ce8 739 {
MACRUM 0:615f90842ce8 740 #if 0
MACRUM 0:615f90842ce8 741 /* Disable power saving functions for now - can only impact reliability,
MACRUM 0:615f90842ce8 742 * and don't have any users demanding it. */
MACRUM 0:615f90842ce8 743 /*Set RPC register*/
MACRUM 0:615f90842ce8 744 rf_if_write_register(TRX_RPC, RX_RPC_CTRL|RX_RPC_EN|PLL_RPC_EN|XAH_TX_RPC_EN|IPAN_RPC_EN|TRX_RPC_RSVD_1);
MACRUM 0:615f90842ce8 745 #endif
MACRUM 0:615f90842ce8 746 /*PHY Mode: IEEE 802.15.4 - Data Rate 250 kb/s*/
MACRUM 0:615f90842ce8 747 rf_if_write_register(TRX_CTRL_2, 0);
MACRUM 0:615f90842ce8 748 rf_rssi_base_val = -91;
MACRUM 0:615f90842ce8 749 }
MACRUM 0:615f90842ce8 750 }
MACRUM 0:615f90842ce8 751
MACRUM 0:615f90842ce8 752 /*
MACRUM 0:615f90842ce8 753 * \brief Function checks the channel availability
MACRUM 0:615f90842ce8 754 *
MACRUM 0:615f90842ce8 755 * \param none
MACRUM 0:615f90842ce8 756 *
MACRUM 0:615f90842ce8 757 * \return 1 Channel clear
MACRUM 0:615f90842ce8 758 * \return 0 Channel not clear
MACRUM 0:615f90842ce8 759 */
MACRUM 0:615f90842ce8 760 static uint8_t rf_if_check_cca(void)
MACRUM 0:615f90842ce8 761 {
MACRUM 0:615f90842ce8 762 uint8_t retval = 0;
MACRUM 0:615f90842ce8 763 if(rf_if_read_register(TRX_STATUS) & CCA_STATUS)
MACRUM 0:615f90842ce8 764 {
MACRUM 0:615f90842ce8 765 retval = 1;
MACRUM 0:615f90842ce8 766 }
MACRUM 0:615f90842ce8 767 return retval;
MACRUM 0:615f90842ce8 768 }
MACRUM 0:615f90842ce8 769
MACRUM 0:615f90842ce8 770 /*
MACRUM 0:615f90842ce8 771 * \brief Function returns the RF state
MACRUM 0:615f90842ce8 772 *
MACRUM 0:615f90842ce8 773 * \param none
MACRUM 0:615f90842ce8 774 *
MACRUM 0:615f90842ce8 775 * \return RF state
MACRUM 0:615f90842ce8 776 */
MACRUM 0:615f90842ce8 777 static uint8_t rf_if_read_trx_state(void)
MACRUM 0:615f90842ce8 778 {
MACRUM 0:615f90842ce8 779 return rf_if_read_register(TRX_STATUS) & 0x1F;
MACRUM 0:615f90842ce8 780 }
MACRUM 0:615f90842ce8 781
MACRUM 0:615f90842ce8 782 /*
MACRUM 0:615f90842ce8 783 * \brief Function reads packet buffer.
MACRUM 0:615f90842ce8 784 *
MACRUM 0:615f90842ce8 785 * \param data_out Output buffer
MACRUM 0:615f90842ce8 786 * \param lqi_out LQI output
MACRUM 0:615f90842ce8 787 * \param ed_out ED output
MACRUM 0:615f90842ce8 788 * \param crc_good CRC good indication
MACRUM 0:615f90842ce8 789 *
MACRUM 0:615f90842ce8 790 * \return PSDU length [0..RF_MTU]
MACRUM 0:615f90842ce8 791 */
MACRUM 0:615f90842ce8 792 static uint16_t rf_if_read_packet(uint8_t data_out[RF_MTU], uint8_t *lqi_out, uint8_t *ed_out, bool *crc_good)
MACRUM 0:615f90842ce8 793 {
MACRUM 0:615f90842ce8 794 CS_SELECT();
MACRUM 0:615f90842ce8 795 rf_if_spi_exchange(0x20);
MACRUM 0:615f90842ce8 796 uint8_t len = rf_if_spi_exchange(0) & 0x7F;
MACRUM 0:615f90842ce8 797 uint8_t *ptr = data_out;
MACRUM 0:615f90842ce8 798 for (uint_fast8_t i = 0; i < len; i++) {
MACRUM 0:615f90842ce8 799 *ptr++ = rf_if_spi_exchange(0);
MACRUM 0:615f90842ce8 800 }
MACRUM 0:615f90842ce8 801
MACRUM 0:615f90842ce8 802 *lqi_out = rf_if_spi_exchange(0);
MACRUM 0:615f90842ce8 803 *ed_out = rf_if_spi_exchange(0);
MACRUM 0:615f90842ce8 804 *crc_good = rf_if_spi_exchange(0) & 0x80;
MACRUM 0:615f90842ce8 805 CS_RELEASE();
MACRUM 0:615f90842ce8 806
MACRUM 0:615f90842ce8 807 return len;
MACRUM 0:615f90842ce8 808 }
MACRUM 0:615f90842ce8 809
MACRUM 0:615f90842ce8 810 /*
MACRUM 0:615f90842ce8 811 * \brief Function writes RF short address registers
MACRUM 0:615f90842ce8 812 *
MACRUM 0:615f90842ce8 813 * \param short_address Given short address
MACRUM 0:615f90842ce8 814 *
MACRUM 0:615f90842ce8 815 * \return none
MACRUM 0:615f90842ce8 816 */
MACRUM 0:615f90842ce8 817 static void rf_if_write_short_addr_registers(uint8_t *short_address)
MACRUM 0:615f90842ce8 818 {
MACRUM 0:615f90842ce8 819 rf_if_write_register(SHORT_ADDR_1, *short_address++);
MACRUM 0:615f90842ce8 820 rf_if_write_register(SHORT_ADDR_0, *short_address);
MACRUM 0:615f90842ce8 821 }
MACRUM 0:615f90842ce8 822
MACRUM 0:615f90842ce8 823 /*
MACRUM 0:615f90842ce8 824 * \brief Function sets the frame pending in ACK message
MACRUM 0:615f90842ce8 825 *
MACRUM 0:615f90842ce8 826 * \param state Given frame pending state
MACRUM 0:615f90842ce8 827 *
MACRUM 0:615f90842ce8 828 * \return none
MACRUM 0:615f90842ce8 829 */
MACRUM 0:615f90842ce8 830 static void rf_if_ack_pending_ctrl(uint8_t state)
MACRUM 0:615f90842ce8 831 {
MACRUM 0:615f90842ce8 832 rf_if_lock();
MACRUM 0:615f90842ce8 833 if(state)
MACRUM 0:615f90842ce8 834 {
MACRUM 0:615f90842ce8 835 rf_if_set_bit(CSMA_SEED_1, (1 << AACK_SET_PD), (1 << AACK_SET_PD));
MACRUM 0:615f90842ce8 836 }
MACRUM 0:615f90842ce8 837 else
MACRUM 0:615f90842ce8 838 {
MACRUM 0:615f90842ce8 839 rf_if_clear_bit(CSMA_SEED_1, (1 << AACK_SET_PD));
MACRUM 0:615f90842ce8 840 }
MACRUM 0:615f90842ce8 841 rf_if_unlock();
MACRUM 0:615f90842ce8 842 }
MACRUM 0:615f90842ce8 843
MACRUM 0:615f90842ce8 844 /*
MACRUM 0:615f90842ce8 845 * \brief Function returns the state of frame pending control
MACRUM 0:615f90842ce8 846 *
MACRUM 0:615f90842ce8 847 * \param none
MACRUM 0:615f90842ce8 848 *
MACRUM 0:615f90842ce8 849 * \return Frame pending state
MACRUM 0:615f90842ce8 850 */
MACRUM 0:615f90842ce8 851 static uint8_t rf_if_last_acked_pending(void)
MACRUM 0:615f90842ce8 852 {
MACRUM 0:615f90842ce8 853 uint8_t last_acked_data_pending;
MACRUM 0:615f90842ce8 854
MACRUM 0:615f90842ce8 855 rf_if_lock();
MACRUM 0:615f90842ce8 856 if(rf_if_read_register(CSMA_SEED_1) & 0x20)
MACRUM 0:615f90842ce8 857 last_acked_data_pending = 1;
MACRUM 0:615f90842ce8 858 else
MACRUM 0:615f90842ce8 859 last_acked_data_pending = 0;
MACRUM 0:615f90842ce8 860 rf_if_unlock();
MACRUM 0:615f90842ce8 861
MACRUM 0:615f90842ce8 862 return last_acked_data_pending;
MACRUM 0:615f90842ce8 863 }
MACRUM 0:615f90842ce8 864
MACRUM 0:615f90842ce8 865 /*
MACRUM 0:615f90842ce8 866 * \brief Function calibrates the RF part.
MACRUM 0:615f90842ce8 867 *
MACRUM 0:615f90842ce8 868 * \param none
MACRUM 0:615f90842ce8 869 *
MACRUM 0:615f90842ce8 870 * \return none
MACRUM 0:615f90842ce8 871 */
MACRUM 0:615f90842ce8 872 static void rf_if_calibration(void)
MACRUM 0:615f90842ce8 873 {
MACRUM 0:615f90842ce8 874 rf_if_set_bit(FTN_CTRL, FTN_START, FTN_START);
MACRUM 0:615f90842ce8 875 /*Wait while calibration is running*/
MACRUM 0:615f90842ce8 876 while(rf_if_read_register(FTN_CTRL) & FTN_START);
MACRUM 0:615f90842ce8 877 }
MACRUM 0:615f90842ce8 878
MACRUM 0:615f90842ce8 879 /*
MACRUM 0:615f90842ce8 880 * \brief Function writes RF PAN Id registers
MACRUM 0:615f90842ce8 881 *
MACRUM 0:615f90842ce8 882 * \param pan_id Given PAN Id
MACRUM 0:615f90842ce8 883 *
MACRUM 0:615f90842ce8 884 * \return none
MACRUM 0:615f90842ce8 885 */
MACRUM 0:615f90842ce8 886 static void rf_if_write_pan_id_registers(uint8_t *pan_id)
MACRUM 0:615f90842ce8 887 {
MACRUM 0:615f90842ce8 888 rf_if_write_register(PAN_ID_1, *pan_id++);
MACRUM 0:615f90842ce8 889 rf_if_write_register(PAN_ID_0, *pan_id);
MACRUM 0:615f90842ce8 890 }
MACRUM 0:615f90842ce8 891
MACRUM 0:615f90842ce8 892 /*
MACRUM 0:615f90842ce8 893 * \brief Function writes RF IEEE Address registers
MACRUM 0:615f90842ce8 894 *
MACRUM 0:615f90842ce8 895 * \param address Given IEEE Address
MACRUM 0:615f90842ce8 896 *
MACRUM 0:615f90842ce8 897 * \return none
MACRUM 0:615f90842ce8 898 */
MACRUM 0:615f90842ce8 899 static void rf_if_write_ieee_addr_registers(uint8_t *address)
MACRUM 0:615f90842ce8 900 {
MACRUM 0:615f90842ce8 901 uint8_t i;
MACRUM 0:615f90842ce8 902 uint8_t temp = IEEE_ADDR_0;
MACRUM 0:615f90842ce8 903
MACRUM 0:615f90842ce8 904 for(i=0; i<8; i++)
MACRUM 0:615f90842ce8 905 rf_if_write_register(temp++, address[7-i]);
MACRUM 0:615f90842ce8 906 }
MACRUM 0:615f90842ce8 907
MACRUM 0:615f90842ce8 908 /*
MACRUM 0:615f90842ce8 909 * \brief Function writes data in RF frame buffer.
MACRUM 0:615f90842ce8 910 *
MACRUM 0:615f90842ce8 911 * \param ptr Pointer to data (PSDU, except FCS)
MACRUM 0:615f90842ce8 912 * \param length Pointer to length (PSDU length, minus 2 for FCS)
MACRUM 0:615f90842ce8 913 *
MACRUM 0:615f90842ce8 914 * \return none
MACRUM 0:615f90842ce8 915 */
MACRUM 0:615f90842ce8 916 static void rf_if_write_frame_buffer(const uint8_t *ptr, uint8_t length)
MACRUM 0:615f90842ce8 917 {
MACRUM 0:615f90842ce8 918 uint8_t i;
MACRUM 0:615f90842ce8 919 uint8_t cmd = 0x60;
MACRUM 0:615f90842ce8 920
MACRUM 0:615f90842ce8 921 CS_SELECT();
MACRUM 0:615f90842ce8 922 rf_if_spi_exchange(cmd);
MACRUM 0:615f90842ce8 923 rf_if_spi_exchange(length + 2);
MACRUM 0:615f90842ce8 924 for(i=0; i<length; i++)
MACRUM 0:615f90842ce8 925 rf_if_spi_exchange(*ptr++);
MACRUM 0:615f90842ce8 926
MACRUM 0:615f90842ce8 927 CS_RELEASE();
MACRUM 0:615f90842ce8 928 }
MACRUM 0:615f90842ce8 929
MACRUM 0:615f90842ce8 930 /*
MACRUM 0:615f90842ce8 931 * \brief Function returns 8-bit random value.
MACRUM 0:615f90842ce8 932 *
MACRUM 0:615f90842ce8 933 * \param none
MACRUM 0:615f90842ce8 934 *
MACRUM 0:615f90842ce8 935 * \return random value
MACRUM 0:615f90842ce8 936 */
MACRUM 0:615f90842ce8 937 static uint8_t rf_if_read_rnd(void)
MACRUM 0:615f90842ce8 938 {
MACRUM 0:615f90842ce8 939 uint8_t temp;
MACRUM 0:615f90842ce8 940 uint8_t tmp_rpc_val = 0;
MACRUM 0:615f90842ce8 941 /*RPC must be disabled while reading the random number*/
MACRUM 0:615f90842ce8 942 if(rf_part_num == PART_AT86RF233)
MACRUM 0:615f90842ce8 943 {
MACRUM 0:615f90842ce8 944 tmp_rpc_val = rf_if_read_register(TRX_RPC);
MACRUM 0:615f90842ce8 945 rf_if_write_register(TRX_RPC, RX_RPC_CTRL|TRX_RPC_RSVD_1);
MACRUM 0:615f90842ce8 946 }
MACRUM 0:615f90842ce8 947
MACRUM 0:615f90842ce8 948 wait_ms(1);
MACRUM 0:615f90842ce8 949 temp = ((rf_if_read_register(PHY_RSSI)>>5) << 6);
MACRUM 0:615f90842ce8 950 wait_ms(1);
MACRUM 0:615f90842ce8 951 temp |= ((rf_if_read_register(PHY_RSSI)>>5) << 4);
MACRUM 0:615f90842ce8 952 wait_ms(1);
MACRUM 0:615f90842ce8 953 temp |= ((rf_if_read_register(PHY_RSSI)>>5) << 2);
MACRUM 0:615f90842ce8 954 wait_ms(1);
MACRUM 0:615f90842ce8 955 temp |= ((rf_if_read_register(PHY_RSSI)>>5));
MACRUM 0:615f90842ce8 956 wait_ms(1);
MACRUM 0:615f90842ce8 957 if(rf_part_num == PART_AT86RF233)
MACRUM 0:615f90842ce8 958 rf_if_write_register(TRX_RPC, tmp_rpc_val);
MACRUM 0:615f90842ce8 959 return temp;
MACRUM 0:615f90842ce8 960 }
MACRUM 0:615f90842ce8 961
MACRUM 0:615f90842ce8 962 /*
MACRUM 0:615f90842ce8 963 * \brief Function changes the state of the RF.
MACRUM 0:615f90842ce8 964 *
MACRUM 0:615f90842ce8 965 * \param trx_state Given RF state
MACRUM 0:615f90842ce8 966 *
MACRUM 0:615f90842ce8 967 * \return none
MACRUM 0:615f90842ce8 968 */
MACRUM 0:615f90842ce8 969 static void rf_if_change_trx_state(rf_trx_states_t trx_state)
MACRUM 0:615f90842ce8 970 {
MACRUM 0:615f90842ce8 971 // XXX Lock claim apparently not required
MACRUM 0:615f90842ce8 972 rf_if_lock();
MACRUM 0:615f90842ce8 973 rf_if_write_register(TRX_STATE, trx_state);
MACRUM 0:615f90842ce8 974 /*Wait while not in desired state*/
MACRUM 0:615f90842ce8 975 rf_poll_trx_state_change(trx_state);
MACRUM 0:615f90842ce8 976 rf_if_unlock();
MACRUM 0:615f90842ce8 977 }
MACRUM 0:615f90842ce8 978
MACRUM 0:615f90842ce8 979 /*
MACRUM 0:615f90842ce8 980 * \brief Function enables the TX END interrupt
MACRUM 0:615f90842ce8 981 *
MACRUM 0:615f90842ce8 982 * \param none
MACRUM 0:615f90842ce8 983 *
MACRUM 0:615f90842ce8 984 * \return none
MACRUM 0:615f90842ce8 985 */
MACRUM 0:615f90842ce8 986 static void rf_if_enable_tx_end_interrupt(void)
MACRUM 0:615f90842ce8 987 {
MACRUM 0:615f90842ce8 988 rf_if_set_bit(IRQ_MASK, TRX_END, TRX_END);
MACRUM 0:615f90842ce8 989 }
MACRUM 0:615f90842ce8 990
MACRUM 0:615f90842ce8 991 /*
MACRUM 0:615f90842ce8 992 * \brief Function enables the RX END interrupt
MACRUM 0:615f90842ce8 993 *
MACRUM 0:615f90842ce8 994 * \param none
MACRUM 0:615f90842ce8 995 *
MACRUM 0:615f90842ce8 996 * \return none
MACRUM 0:615f90842ce8 997 */
MACRUM 0:615f90842ce8 998 static void rf_if_enable_rx_end_interrupt(void)
MACRUM 0:615f90842ce8 999 {
MACRUM 0:615f90842ce8 1000 rf_if_set_bit(IRQ_MASK, TRX_END, TRX_END);
MACRUM 0:615f90842ce8 1001 }
MACRUM 0:615f90842ce8 1002
MACRUM 0:615f90842ce8 1003 /*
MACRUM 0:615f90842ce8 1004 * \brief Function enables the CCA ED interrupt
MACRUM 0:615f90842ce8 1005 *
MACRUM 0:615f90842ce8 1006 * \param none
MACRUM 0:615f90842ce8 1007 *
MACRUM 0:615f90842ce8 1008 * \return none
MACRUM 0:615f90842ce8 1009 */
MACRUM 0:615f90842ce8 1010 static void rf_if_enable_cca_ed_done_interrupt(void)
MACRUM 0:615f90842ce8 1011 {
MACRUM 0:615f90842ce8 1012 rf_if_set_bit(IRQ_MASK, CCA_ED_DONE, CCA_ED_DONE);
MACRUM 0:615f90842ce8 1013 }
MACRUM 0:615f90842ce8 1014
MACRUM 0:615f90842ce8 1015 /*
MACRUM 0:615f90842ce8 1016 * \brief Function starts the CCA process
MACRUM 0:615f90842ce8 1017 *
MACRUM 0:615f90842ce8 1018 * \param none
MACRUM 0:615f90842ce8 1019 *
MACRUM 0:615f90842ce8 1020 * \return none
MACRUM 0:615f90842ce8 1021 */
MACRUM 0:615f90842ce8 1022 static void rf_if_start_cca_process(void)
MACRUM 0:615f90842ce8 1023 {
MACRUM 0:615f90842ce8 1024 rf_if_set_bit(PHY_CC_CCA, CCA_REQUEST, CCA_REQUEST);
MACRUM 0:615f90842ce8 1025 }
MACRUM 0:615f90842ce8 1026
MACRUM 0:615f90842ce8 1027 /*
MACRUM 0:615f90842ce8 1028 * \brief Function scales RSSI
MACRUM 0:615f90842ce8 1029 *
MACRUM 0:615f90842ce8 1030 * \param ed_level ED level read from chip
MACRUM 0:615f90842ce8 1031 *
MACRUM 0:615f90842ce8 1032 * \return appropriately scaled RSSI dBm
MACRUM 0:615f90842ce8 1033 */
MACRUM 0:615f90842ce8 1034 static int8_t rf_if_scale_rssi(uint8_t ed_level)
MACRUM 0:615f90842ce8 1035 {
MACRUM 0:615f90842ce8 1036 if (rf_part_num == PART_AT86RF212) {
MACRUM 0:615f90842ce8 1037 /* Data sheet says to multiply by 1.03 - this is 1.03125, rounding down */
MACRUM 0:615f90842ce8 1038 ed_level += ed_level >> 5;
MACRUM 0:615f90842ce8 1039 }
MACRUM 0:615f90842ce8 1040 return rf_rssi_base_val + ed_level;
MACRUM 0:615f90842ce8 1041 }
MACRUM 0:615f90842ce8 1042
MACRUM 0:615f90842ce8 1043 /*
MACRUM 0:615f90842ce8 1044 * \brief Function sets the RF channel field
MACRUM 0:615f90842ce8 1045 *
MACRUM 0:615f90842ce8 1046 * \param Given channel
MACRUM 0:615f90842ce8 1047 *
MACRUM 0:615f90842ce8 1048 * \return none
MACRUM 0:615f90842ce8 1049 */
MACRUM 0:615f90842ce8 1050 static void rf_if_set_channel_register(uint8_t channel)
MACRUM 0:615f90842ce8 1051 {
MACRUM 0:615f90842ce8 1052 rf_if_set_bit(PHY_CC_CCA, channel, 0x1f);
MACRUM 0:615f90842ce8 1053 }
MACRUM 0:615f90842ce8 1054
MACRUM 0:615f90842ce8 1055 /*
MACRUM 0:615f90842ce8 1056 * \brief Function enables RF irq pin interrupts in RF interface.
MACRUM 0:615f90842ce8 1057 *
MACRUM 0:615f90842ce8 1058 * \param none
MACRUM 0:615f90842ce8 1059 *
MACRUM 0:615f90842ce8 1060 * \return none
MACRUM 0:615f90842ce8 1061 */
MACRUM 0:615f90842ce8 1062 static void rf_if_enable_irq(void)
MACRUM 0:615f90842ce8 1063 {
MACRUM 0:615f90842ce8 1064 rf->IRQ.enable_irq();
MACRUM 0:615f90842ce8 1065 }
MACRUM 0:615f90842ce8 1066
MACRUM 0:615f90842ce8 1067 /*
MACRUM 0:615f90842ce8 1068 * \brief Function disables RF irq pin interrupts in RF interface.
MACRUM 0:615f90842ce8 1069 *
MACRUM 0:615f90842ce8 1070 * \param none
MACRUM 0:615f90842ce8 1071 *
MACRUM 0:615f90842ce8 1072 * \return none
MACRUM 0:615f90842ce8 1073 */
MACRUM 0:615f90842ce8 1074 static void rf_if_disable_irq(void)
MACRUM 0:615f90842ce8 1075 {
MACRUM 0:615f90842ce8 1076 rf->IRQ.disable_irq();
MACRUM 0:615f90842ce8 1077 }
MACRUM 0:615f90842ce8 1078
MACRUM 0:615f90842ce8 1079 #ifdef MBED_CONF_RTOS_PRESENT
MACRUM 0:615f90842ce8 1080 static void rf_if_interrupt_handler(void)
MACRUM 0:615f90842ce8 1081 {
MACRUM 0:615f90842ce8 1082 rf->irq_thread.signal_set(SIG_RADIO);
MACRUM 0:615f90842ce8 1083 }
MACRUM 0:615f90842ce8 1084
MACRUM 0:615f90842ce8 1085 // Started during construction of rf, so variable
MACRUM 0:615f90842ce8 1086 // rf isn't set at the start. Uses 'this' instead.
MACRUM 0:615f90842ce8 1087 void RFBits::rf_if_irq_task(void)
MACRUM 0:615f90842ce8 1088 {
MACRUM 0:615f90842ce8 1089 for (;;) {
MACRUM 0:615f90842ce8 1090 osEvent event = irq_thread.signal_wait(0);
MACRUM 0:615f90842ce8 1091 if (event.status != osEventSignal) {
MACRUM 0:615f90842ce8 1092 continue;
MACRUM 0:615f90842ce8 1093 }
MACRUM 0:615f90842ce8 1094 rf_if_lock();
MACRUM 0:615f90842ce8 1095 if (event.value.signals & SIG_RADIO) {
MACRUM 0:615f90842ce8 1096 rf_if_irq_task_process_irq();
MACRUM 0:615f90842ce8 1097 }
MACRUM 0:615f90842ce8 1098 if (event.value.signals & SIG_TIMER_ACK) {
MACRUM 0:615f90842ce8 1099 rf_ack_wait_timer_interrupt();
MACRUM 0:615f90842ce8 1100 }
MACRUM 0:615f90842ce8 1101 if (event.value.signals & SIG_TIMER_CCA) {
MACRUM 0:615f90842ce8 1102 rf_cca_timer_interrupt();
MACRUM 0:615f90842ce8 1103 }
MACRUM 0:615f90842ce8 1104 if (event.value.signals & SIG_TIMER_CAL) {
MACRUM 0:615f90842ce8 1105 rf_calibration_timer_interrupt();
MACRUM 0:615f90842ce8 1106 }
MACRUM 0:615f90842ce8 1107 rf_if_unlock();
MACRUM 0:615f90842ce8 1108 }
MACRUM 0:615f90842ce8 1109 }
MACRUM 0:615f90842ce8 1110
MACRUM 0:615f90842ce8 1111 static void rf_if_irq_task_process_irq(void)
MACRUM 0:615f90842ce8 1112 #else
MACRUM 0:615f90842ce8 1113 /*
MACRUM 0:615f90842ce8 1114 * \brief Function is a RF interrupt vector. End of frame in RX and TX are handled here as well as CCA process interrupt.
MACRUM 0:615f90842ce8 1115 *
MACRUM 0:615f90842ce8 1116 * \param none
MACRUM 0:615f90842ce8 1117 *
MACRUM 0:615f90842ce8 1118 * \return none
MACRUM 0:615f90842ce8 1119 */
MACRUM 0:615f90842ce8 1120 static void rf_if_interrupt_handler(void)
MACRUM 0:615f90842ce8 1121 #endif
MACRUM 0:615f90842ce8 1122 {
MACRUM 0:615f90842ce8 1123 uint8_t irq_status;
MACRUM 0:615f90842ce8 1124
MACRUM 0:615f90842ce8 1125 /*Read interrupt flag*/
MACRUM 0:615f90842ce8 1126 irq_status = rf_if_read_register(IRQ_STATUS);
MACRUM 0:615f90842ce8 1127
MACRUM 0:615f90842ce8 1128 /*Disable interrupt on RF*/
MACRUM 0:615f90842ce8 1129 rf_if_clear_bit(IRQ_MASK, irq_status);
MACRUM 0:615f90842ce8 1130 /*RX start interrupt*/
MACRUM 0:615f90842ce8 1131 if(irq_status & RX_START)
MACRUM 0:615f90842ce8 1132 {
MACRUM 0:615f90842ce8 1133 }
MACRUM 0:615f90842ce8 1134 /*Address matching interrupt*/
MACRUM 0:615f90842ce8 1135 if(irq_status & AMI)
MACRUM 0:615f90842ce8 1136 {
MACRUM 0:615f90842ce8 1137 }
MACRUM 0:615f90842ce8 1138 if(irq_status & TRX_UR)
MACRUM 0:615f90842ce8 1139 {
MACRUM 0:615f90842ce8 1140 }
MACRUM 0:615f90842ce8 1141 /*Frame end interrupt (RX and TX)*/
MACRUM 0:615f90842ce8 1142 if(irq_status & TRX_END)
MACRUM 0:615f90842ce8 1143 {
MACRUM 0:615f90842ce8 1144 /*TX done interrupt*/
MACRUM 0:615f90842ce8 1145 if(rf_if_read_trx_state() == PLL_ON || rf_if_read_trx_state() == TX_ARET_ON)
MACRUM 0:615f90842ce8 1146 {
MACRUM 0:615f90842ce8 1147 rf_handle_tx_end();
MACRUM 0:615f90842ce8 1148 }
MACRUM 0:615f90842ce8 1149 /*Frame received interrupt*/
MACRUM 0:615f90842ce8 1150 else
MACRUM 0:615f90842ce8 1151 {
MACRUM 0:615f90842ce8 1152 rf_handle_rx_end();
MACRUM 0:615f90842ce8 1153 }
MACRUM 0:615f90842ce8 1154 }
MACRUM 0:615f90842ce8 1155 if(irq_status & CCA_ED_DONE)
MACRUM 0:615f90842ce8 1156 {
MACRUM 0:615f90842ce8 1157 rf_handle_cca_ed_done();
MACRUM 0:615f90842ce8 1158 }
MACRUM 0:615f90842ce8 1159 }
MACRUM 0:615f90842ce8 1160
MACRUM 0:615f90842ce8 1161 /*
MACRUM 0:615f90842ce8 1162 * \brief Function writes/read data in SPI interface
MACRUM 0:615f90842ce8 1163 *
MACRUM 0:615f90842ce8 1164 * \param out Output data
MACRUM 0:615f90842ce8 1165 *
MACRUM 0:615f90842ce8 1166 * \return Input data
MACRUM 0:615f90842ce8 1167 */
MACRUM 0:615f90842ce8 1168 static uint8_t rf_if_spi_exchange(uint8_t out)
MACRUM 0:615f90842ce8 1169 {
MACRUM 0:615f90842ce8 1170 uint8_t v;
MACRUM 0:615f90842ce8 1171 v = rf->spi.write(out);
MACRUM 0:615f90842ce8 1172 // t9 = t5 = 250ns, delay between LSB of last byte to next MSB or delay between LSB & SEL rising
MACRUM 0:615f90842ce8 1173 // [SPI setup assumed slow enough to not need manual delay]
MACRUM 0:615f90842ce8 1174 // delay_ns(250);
MACRUM 0:615f90842ce8 1175 return v;
MACRUM 0:615f90842ce8 1176 }
MACRUM 0:615f90842ce8 1177
MACRUM 0:615f90842ce8 1178 /*
MACRUM 0:615f90842ce8 1179 * \brief Function sets given RF flag on.
MACRUM 0:615f90842ce8 1180 *
MACRUM 0:615f90842ce8 1181 * \param x Given RF flag
MACRUM 0:615f90842ce8 1182 *
MACRUM 0:615f90842ce8 1183 * \return none
MACRUM 0:615f90842ce8 1184 */
MACRUM 0:615f90842ce8 1185 static void rf_flags_set(uint8_t x)
MACRUM 0:615f90842ce8 1186 {
MACRUM 0:615f90842ce8 1187 rf_flags |= x;
MACRUM 0:615f90842ce8 1188 }
MACRUM 0:615f90842ce8 1189
MACRUM 0:615f90842ce8 1190 /*
MACRUM 0:615f90842ce8 1191 * \brief Function clears given RF flag on.
MACRUM 0:615f90842ce8 1192 *
MACRUM 0:615f90842ce8 1193 * \param x Given RF flag
MACRUM 0:615f90842ce8 1194 *
MACRUM 0:615f90842ce8 1195 * \return none
MACRUM 0:615f90842ce8 1196 */
MACRUM 0:615f90842ce8 1197 static void rf_flags_clear(uint8_t x)
MACRUM 0:615f90842ce8 1198 {
MACRUM 0:615f90842ce8 1199 rf_flags &= ~x;
MACRUM 0:615f90842ce8 1200 }
MACRUM 0:615f90842ce8 1201
MACRUM 0:615f90842ce8 1202 /*
MACRUM 0:615f90842ce8 1203 * \brief Function checks if given RF flag is on.
MACRUM 0:615f90842ce8 1204 *
MACRUM 0:615f90842ce8 1205 * \param x Given RF flag
MACRUM 0:615f90842ce8 1206 *
MACRUM 0:615f90842ce8 1207 * \return states of the given flags
MACRUM 0:615f90842ce8 1208 */
MACRUM 0:615f90842ce8 1209 static uint8_t rf_flags_check(uint8_t x)
MACRUM 0:615f90842ce8 1210 {
MACRUM 0:615f90842ce8 1211 return (rf_flags & x);
MACRUM 0:615f90842ce8 1212 }
MACRUM 0:615f90842ce8 1213
MACRUM 0:615f90842ce8 1214 /*
MACRUM 0:615f90842ce8 1215 * \brief Function clears all RF flags.
MACRUM 0:615f90842ce8 1216 *
MACRUM 0:615f90842ce8 1217 * \param none
MACRUM 0:615f90842ce8 1218 *
MACRUM 0:615f90842ce8 1219 * \return none
MACRUM 0:615f90842ce8 1220 */
MACRUM 0:615f90842ce8 1221 static void rf_flags_reset(void)
MACRUM 0:615f90842ce8 1222 {
MACRUM 0:615f90842ce8 1223 rf_flags = 0;
MACRUM 0:615f90842ce8 1224 }
MACRUM 0:615f90842ce8 1225
MACRUM 0:615f90842ce8 1226 /*
MACRUM 0:615f90842ce8 1227 * \brief Function initialises and registers the RF driver.
MACRUM 0:615f90842ce8 1228 *
MACRUM 0:615f90842ce8 1229 * \param none
MACRUM 0:615f90842ce8 1230 *
MACRUM 0:615f90842ce8 1231 * \return rf_radio_driver_id Driver ID given by NET library
MACRUM 0:615f90842ce8 1232 */
MACRUM 0:615f90842ce8 1233 static int8_t rf_device_register(const uint8_t *mac_addr)
MACRUM 0:615f90842ce8 1234 {
MACRUM 0:615f90842ce8 1235 rf_trx_part_e radio_type;
MACRUM 0:615f90842ce8 1236
MACRUM 0:615f90842ce8 1237 rf_init();
MACRUM 0:615f90842ce8 1238
MACRUM 0:615f90842ce8 1239 radio_type = rf_radio_type_read();
MACRUM 0:615f90842ce8 1240 if(radio_type != ATMEL_UNKNOW_DEV)
MACRUM 0:615f90842ce8 1241 {
MACRUM 0:615f90842ce8 1242 /*Set pointer to MAC address*/
MACRUM 0:615f90842ce8 1243 device_driver.PHY_MAC = (uint8_t *)mac_addr;
MACRUM 0:615f90842ce8 1244 device_driver.driver_description = (char*)"ATMEL_MAC";
MACRUM 0:615f90842ce8 1245 //Create setup Used Radio chips
MACRUM 0:615f90842ce8 1246 if(radio_type == ATMEL_AT86RF212)
MACRUM 0:615f90842ce8 1247 {
MACRUM 0:615f90842ce8 1248 device_driver.link_type = PHY_LINK_15_4_SUBGHZ_TYPE;
MACRUM 0:615f90842ce8 1249 }
MACRUM 0:615f90842ce8 1250 else
MACRUM 0:615f90842ce8 1251 {
MACRUM 0:615f90842ce8 1252 device_driver.link_type = PHY_LINK_15_4_2_4GHZ_TYPE;
MACRUM 0:615f90842ce8 1253 }
MACRUM 0:615f90842ce8 1254 device_driver.phy_channel_pages = phy_channel_pages;
MACRUM 0:615f90842ce8 1255 /*Maximum size of payload is 127*/
MACRUM 0:615f90842ce8 1256 device_driver.phy_MTU = 127;
MACRUM 0:615f90842ce8 1257 /*No header in PHY*/
MACRUM 0:615f90842ce8 1258 device_driver.phy_header_length = 0;
MACRUM 0:615f90842ce8 1259 /*No tail in PHY*/
MACRUM 0:615f90842ce8 1260 device_driver.phy_tail_length = 0;
MACRUM 0:615f90842ce8 1261 /*Set address write function*/
MACRUM 0:615f90842ce8 1262 device_driver.address_write = &rf_address_write;
MACRUM 0:615f90842ce8 1263 /*Set RF extension function*/
MACRUM 0:615f90842ce8 1264 device_driver.extension = &rf_extension;
MACRUM 0:615f90842ce8 1265 /*Set RF state control function*/
MACRUM 0:615f90842ce8 1266 device_driver.state_control = &rf_interface_state_control;
MACRUM 0:615f90842ce8 1267 /*Set transmit function*/
MACRUM 0:615f90842ce8 1268 device_driver.tx = &rf_start_cca;
MACRUM 0:615f90842ce8 1269 /*NULLIFY rx and tx_done callbacks*/
MACRUM 0:615f90842ce8 1270 device_driver.phy_rx_cb = NULL;
MACRUM 0:615f90842ce8 1271 device_driver.phy_tx_done_cb = NULL;
MACRUM 0:615f90842ce8 1272 /*Register device driver*/
MACRUM 0:615f90842ce8 1273 rf_radio_driver_id = arm_net_phy_register(&device_driver);
MACRUM 0:615f90842ce8 1274 }
MACRUM 0:615f90842ce8 1275 return rf_radio_driver_id;
MACRUM 0:615f90842ce8 1276 }
MACRUM 0:615f90842ce8 1277
MACRUM 0:615f90842ce8 1278 /*
MACRUM 0:615f90842ce8 1279 * \brief Function unregisters the RF driver.
MACRUM 0:615f90842ce8 1280 *
MACRUM 0:615f90842ce8 1281 * \param none
MACRUM 0:615f90842ce8 1282 *
MACRUM 0:615f90842ce8 1283 * \return none
MACRUM 0:615f90842ce8 1284 */
MACRUM 0:615f90842ce8 1285 static void rf_device_unregister()
MACRUM 0:615f90842ce8 1286 {
MACRUM 0:615f90842ce8 1287 if (rf_radio_driver_id >= 0) {
MACRUM 0:615f90842ce8 1288 arm_net_phy_unregister(rf_radio_driver_id);
MACRUM 0:615f90842ce8 1289 rf_radio_driver_id = -1;
MACRUM 0:615f90842ce8 1290 }
MACRUM 0:615f90842ce8 1291 }
MACRUM 0:615f90842ce8 1292
MACRUM 0:615f90842ce8 1293 /*
MACRUM 0:615f90842ce8 1294 * \brief Enable frame buffer protection
MACRUM 0:615f90842ce8 1295 *
MACRUM 0:615f90842ce8 1296 * If protection is enabled, reception cannot start - the radio will
MACRUM 0:615f90842ce8 1297 * not go into RX_BUSY or write into the frame buffer if in receive mode.
MACRUM 0:615f90842ce8 1298 * Setting this won't abort an already-started reception.
MACRUM 0:615f90842ce8 1299 * We can still write the frame buffer ourselves.
MACRUM 0:615f90842ce8 1300 */
MACRUM 0:615f90842ce8 1301 static void rf_enable_static_frame_buffer_protection(void)
MACRUM 0:615f90842ce8 1302 {
MACRUM 0:615f90842ce8 1303 if (!rf_flags_check(RFF_PROT)) {
MACRUM 0:615f90842ce8 1304 /* This also writes RX_PDT_LEVEL to 0 - maximum RX sensitivity */
MACRUM 0:615f90842ce8 1305 /* Would need to modify this function if messing with that */
MACRUM 0:615f90842ce8 1306 rf_if_write_register(RX_SYN, RX_PDT_DIS);
MACRUM 0:615f90842ce8 1307 rf_flags_set(RFF_PROT);
MACRUM 0:615f90842ce8 1308 }
MACRUM 0:615f90842ce8 1309 }
MACRUM 0:615f90842ce8 1310
MACRUM 0:615f90842ce8 1311 /*
MACRUM 0:615f90842ce8 1312 * \brief Disable frame buffer protection
MACRUM 0:615f90842ce8 1313 */
MACRUM 0:615f90842ce8 1314 static void rf_disable_static_frame_buffer_protection(void)
MACRUM 0:615f90842ce8 1315 {
MACRUM 0:615f90842ce8 1316 if (rf_flags_check(RFF_PROT)) {
MACRUM 0:615f90842ce8 1317 /* This also writes RX_PDT_LEVEL to 0 - maximum RX sensitivity */
MACRUM 0:615f90842ce8 1318 /* Would need to modify this function if messing with that */
MACRUM 0:615f90842ce8 1319 rf_if_write_register(RX_SYN, 0);
MACRUM 0:615f90842ce8 1320 rf_flags_clear(RFF_PROT);
MACRUM 0:615f90842ce8 1321 }
MACRUM 0:615f90842ce8 1322 }
MACRUM 0:615f90842ce8 1323
MACRUM 0:615f90842ce8 1324
MACRUM 0:615f90842ce8 1325 /*
MACRUM 0:615f90842ce8 1326 * \brief Function is a call back for ACK wait timeout.
MACRUM 0:615f90842ce8 1327 *
MACRUM 0:615f90842ce8 1328 * \param none
MACRUM 0:615f90842ce8 1329 *
MACRUM 0:615f90842ce8 1330 * \return none
MACRUM 0:615f90842ce8 1331 */
MACRUM 0:615f90842ce8 1332 static void rf_ack_wait_timer_interrupt(void)
MACRUM 0:615f90842ce8 1333 {
MACRUM 0:615f90842ce8 1334 rf_if_lock();
MACRUM 0:615f90842ce8 1335 expected_ack_sequence = -1;
MACRUM 0:615f90842ce8 1336 /*Force PLL state*/
MACRUM 0:615f90842ce8 1337 rf_if_change_trx_state(FORCE_PLL_ON);
MACRUM 0:615f90842ce8 1338 rf_poll_trx_state_change(PLL_ON);
MACRUM 0:615f90842ce8 1339 /*Start receiver in RX_AACK_ON state*/
MACRUM 0:615f90842ce8 1340 rf_rx_mode = 0;
MACRUM 0:615f90842ce8 1341 rf_flags_clear(RFF_RX);
MACRUM 0:615f90842ce8 1342 rf_receive();
MACRUM 0:615f90842ce8 1343 rf_if_unlock();
MACRUM 0:615f90842ce8 1344 }
MACRUM 0:615f90842ce8 1345
MACRUM 0:615f90842ce8 1346 /*
MACRUM 0:615f90842ce8 1347 * \brief Function is a call back for calibration interval timer.
MACRUM 0:615f90842ce8 1348 *
MACRUM 0:615f90842ce8 1349 * \param none
MACRUM 0:615f90842ce8 1350 *
MACRUM 0:615f90842ce8 1351 * \return none
MACRUM 0:615f90842ce8 1352 */
MACRUM 0:615f90842ce8 1353 static void rf_calibration_timer_interrupt(void)
MACRUM 0:615f90842ce8 1354 {
MACRUM 0:615f90842ce8 1355 /*Calibrate RF*/
MACRUM 0:615f90842ce8 1356 rf_calibration_cb();
MACRUM 0:615f90842ce8 1357 /*Start new calibration timeout*/
MACRUM 0:615f90842ce8 1358 rf_calibration_timer_start(RF_CALIBRATION_INTERVAL);
MACRUM 0:615f90842ce8 1359 }
MACRUM 0:615f90842ce8 1360
MACRUM 0:615f90842ce8 1361 /*
MACRUM 0:615f90842ce8 1362 * \brief Function is a call back for cca interval timer.
MACRUM 0:615f90842ce8 1363 *
MACRUM 0:615f90842ce8 1364 * \param none
MACRUM 0:615f90842ce8 1365 *
MACRUM 0:615f90842ce8 1366 * \return none
MACRUM 0:615f90842ce8 1367 */
MACRUM 0:615f90842ce8 1368 static void rf_cca_timer_interrupt(void)
MACRUM 0:615f90842ce8 1369 {
MACRUM 0:615f90842ce8 1370 /*Disable reception - locks against entering BUSY_RX and overwriting frame buffer*/
MACRUM 0:615f90842ce8 1371 rf_enable_static_frame_buffer_protection();
MACRUM 0:615f90842ce8 1372
MACRUM 0:615f90842ce8 1373 if(rf_if_read_trx_state() == BUSY_RX_AACK)
MACRUM 0:615f90842ce8 1374 {
MACRUM 0:615f90842ce8 1375 /*Reception already started - re-enable reception and say CCA fail*/
MACRUM 0:615f90842ce8 1376 rf_disable_static_frame_buffer_protection();
MACRUM 0:615f90842ce8 1377 if(device_driver.phy_tx_done_cb){
MACRUM 0:615f90842ce8 1378 device_driver.phy_tx_done_cb(rf_radio_driver_id, mac_tx_handle, PHY_LINK_CCA_FAIL, 0, 0);
MACRUM 0:615f90842ce8 1379 }
MACRUM 0:615f90842ce8 1380 }
MACRUM 0:615f90842ce8 1381 else
MACRUM 0:615f90842ce8 1382 {
MACRUM 0:615f90842ce8 1383 /*Load the frame buffer with frame to transmit */
MACRUM 0:615f90842ce8 1384 rf_if_write_frame_buffer(rf_tx_data, rf_tx_length);
MACRUM 0:615f90842ce8 1385 /*Make sure we're in RX state to read channel (any way we could not be?)*/
MACRUM 0:615f90842ce8 1386 rf_receive();
MACRUM 0:615f90842ce8 1387 rf_flags_set(RFF_CCA);
MACRUM 0:615f90842ce8 1388 /*Start CCA process*/
MACRUM 0:615f90842ce8 1389 rf_if_enable_cca_ed_done_interrupt();
MACRUM 0:615f90842ce8 1390 rf_if_start_cca_process();
MACRUM 0:615f90842ce8 1391 }
MACRUM 0:615f90842ce8 1392 }
MACRUM 0:615f90842ce8 1393
MACRUM 0:615f90842ce8 1394 /*
MACRUM 0:615f90842ce8 1395 * \brief Function starts the ACK wait timeout.
MACRUM 0:615f90842ce8 1396 *
MACRUM 0:615f90842ce8 1397 * \param slots Given slots, resolution 50us
MACRUM 0:615f90842ce8 1398 *
MACRUM 0:615f90842ce8 1399 * \return none
MACRUM 0:615f90842ce8 1400 */
MACRUM 0:615f90842ce8 1401 static void rf_ack_wait_timer_start(uint16_t slots)
MACRUM 0:615f90842ce8 1402 {
MACRUM 0:615f90842ce8 1403 rf_if_ack_wait_timer_start(slots);
MACRUM 0:615f90842ce8 1404 }
MACRUM 0:615f90842ce8 1405
MACRUM 0:615f90842ce8 1406 /*
MACRUM 0:615f90842ce8 1407 * \brief Function starts the calibration interval.
MACRUM 0:615f90842ce8 1408 *
MACRUM 0:615f90842ce8 1409 * \param slots Given slots, resolution 50us
MACRUM 0:615f90842ce8 1410 *
MACRUM 0:615f90842ce8 1411 * \return none
MACRUM 0:615f90842ce8 1412 */
MACRUM 0:615f90842ce8 1413 static void rf_calibration_timer_start(uint32_t slots)
MACRUM 0:615f90842ce8 1414 {
MACRUM 0:615f90842ce8 1415 rf_if_calibration_timer_start(slots);
MACRUM 0:615f90842ce8 1416 }
MACRUM 0:615f90842ce8 1417
MACRUM 0:615f90842ce8 1418 /*
MACRUM 0:615f90842ce8 1419 * \brief Function starts the CCA backoff.
MACRUM 0:615f90842ce8 1420 *
MACRUM 0:615f90842ce8 1421 * \param slots Given slots, resolution 50us
MACRUM 0:615f90842ce8 1422 *
MACRUM 0:615f90842ce8 1423 * \return none
MACRUM 0:615f90842ce8 1424 */
MACRUM 0:615f90842ce8 1425 static void rf_cca_timer_start(uint32_t slots)
MACRUM 0:615f90842ce8 1426 {
MACRUM 0:615f90842ce8 1427 rf_if_cca_timer_start(slots);
MACRUM 0:615f90842ce8 1428 }
MACRUM 0:615f90842ce8 1429
MACRUM 0:615f90842ce8 1430 /*
MACRUM 0:615f90842ce8 1431 * \brief Function stops the CCA backoff.
MACRUM 0:615f90842ce8 1432 *
MACRUM 0:615f90842ce8 1433 * \return none
MACRUM 0:615f90842ce8 1434 */
MACRUM 0:615f90842ce8 1435 static void rf_cca_timer_stop(void)
MACRUM 0:615f90842ce8 1436 {
MACRUM 0:615f90842ce8 1437 rf_if_cca_timer_stop();
MACRUM 0:615f90842ce8 1438 }
MACRUM 0:615f90842ce8 1439
MACRUM 0:615f90842ce8 1440 /*
MACRUM 0:615f90842ce8 1441 * \brief Function stops the ACK wait timeout.
MACRUM 0:615f90842ce8 1442 *
MACRUM 0:615f90842ce8 1443 * \param none
MACRUM 0:615f90842ce8 1444 *
MACRUM 0:615f90842ce8 1445 * \return none
MACRUM 0:615f90842ce8 1446 */
MACRUM 0:615f90842ce8 1447 static void rf_ack_wait_timer_stop(void)
MACRUM 0:615f90842ce8 1448 {
MACRUM 0:615f90842ce8 1449 rf_if_ack_wait_timer_stop();
MACRUM 0:615f90842ce8 1450 }
MACRUM 0:615f90842ce8 1451
MACRUM 0:615f90842ce8 1452 /*
MACRUM 0:615f90842ce8 1453 * \brief Function writes various RF settings in startup.
MACRUM 0:615f90842ce8 1454 *
MACRUM 0:615f90842ce8 1455 * \param none
MACRUM 0:615f90842ce8 1456 *
MACRUM 0:615f90842ce8 1457 * \return none
MACRUM 0:615f90842ce8 1458 */
MACRUM 0:615f90842ce8 1459 static void rf_write_settings(void)
MACRUM 0:615f90842ce8 1460 {
MACRUM 0:615f90842ce8 1461 rf_if_lock();
MACRUM 0:615f90842ce8 1462 rf_if_write_rf_settings();
MACRUM 0:615f90842ce8 1463 /*Set output power*/
MACRUM 0:615f90842ce8 1464 rf_if_write_set_tx_power_register(radio_tx_power);
MACRUM 0:615f90842ce8 1465 /*Initialise Antenna Diversity*/
MACRUM 0:615f90842ce8 1466 if(rf_use_antenna_diversity)
MACRUM 0:615f90842ce8 1467 rf_if_write_antenna_diversity_settings();
MACRUM 0:615f90842ce8 1468 rf_if_unlock();
MACRUM 0:615f90842ce8 1469 }
MACRUM 0:615f90842ce8 1470
MACRUM 0:615f90842ce8 1471 /*
MACRUM 0:615f90842ce8 1472 * \brief Function writes 16-bit address in RF address filter.
MACRUM 0:615f90842ce8 1473 *
MACRUM 0:615f90842ce8 1474 * \param short_address Given short address
MACRUM 0:615f90842ce8 1475 *
MACRUM 0:615f90842ce8 1476 * \return none
MACRUM 0:615f90842ce8 1477 */
MACRUM 0:615f90842ce8 1478 static void rf_set_short_adr(uint8_t * short_address)
MACRUM 0:615f90842ce8 1479 {
MACRUM 0:615f90842ce8 1480 rf_if_lock();
MACRUM 0:615f90842ce8 1481 /*Wake up RF if sleeping*/
MACRUM 0:615f90842ce8 1482 if(rf_flags_check(RFF_ON) == 0)
MACRUM 0:615f90842ce8 1483 {
MACRUM 0:615f90842ce8 1484 rf_if_disable_slptr();
MACRUM 0:615f90842ce8 1485 rf_poll_trx_state_change(TRX_OFF);
MACRUM 0:615f90842ce8 1486 }
MACRUM 0:615f90842ce8 1487 /*Write address filter registers*/
MACRUM 0:615f90842ce8 1488 rf_if_write_short_addr_registers(short_address);
MACRUM 0:615f90842ce8 1489 /*RF back to sleep*/
MACRUM 0:615f90842ce8 1490 if(rf_flags_check(RFF_ON) == 0)
MACRUM 0:615f90842ce8 1491 {
MACRUM 0:615f90842ce8 1492 rf_if_enable_slptr();
MACRUM 0:615f90842ce8 1493 }
MACRUM 0:615f90842ce8 1494 rf_if_unlock();
MACRUM 0:615f90842ce8 1495 }
MACRUM 0:615f90842ce8 1496
MACRUM 0:615f90842ce8 1497 /*
MACRUM 0:615f90842ce8 1498 * \brief Function writes PAN Id in RF PAN Id filter.
MACRUM 0:615f90842ce8 1499 *
MACRUM 0:615f90842ce8 1500 * \param pan_id Given PAN Id
MACRUM 0:615f90842ce8 1501 *
MACRUM 0:615f90842ce8 1502 * \return none
MACRUM 0:615f90842ce8 1503 */
MACRUM 0:615f90842ce8 1504 static void rf_set_pan_id(uint8_t *pan_id)
MACRUM 0:615f90842ce8 1505 {
MACRUM 0:615f90842ce8 1506 rf_if_lock();
MACRUM 0:615f90842ce8 1507 /*Wake up RF if sleeping*/
MACRUM 0:615f90842ce8 1508 if(rf_flags_check(RFF_ON) == 0)
MACRUM 0:615f90842ce8 1509 {
MACRUM 0:615f90842ce8 1510 rf_if_disable_slptr();
MACRUM 0:615f90842ce8 1511 rf_poll_trx_state_change(TRX_OFF);
MACRUM 0:615f90842ce8 1512 }
MACRUM 0:615f90842ce8 1513 /*Write address filter registers*/
MACRUM 0:615f90842ce8 1514 rf_if_write_pan_id_registers(pan_id);
MACRUM 0:615f90842ce8 1515 /*RF back to sleep*/
MACRUM 0:615f90842ce8 1516 if(rf_flags_check(RFF_ON) == 0)
MACRUM 0:615f90842ce8 1517 {
MACRUM 0:615f90842ce8 1518 rf_if_enable_slptr();
MACRUM 0:615f90842ce8 1519 }
MACRUM 0:615f90842ce8 1520 rf_if_unlock();
MACRUM 0:615f90842ce8 1521 }
MACRUM 0:615f90842ce8 1522
MACRUM 0:615f90842ce8 1523 /*
MACRUM 0:615f90842ce8 1524 * \brief Function writes 64-bit address in RF address filter.
MACRUM 0:615f90842ce8 1525 *
MACRUM 0:615f90842ce8 1526 * \param address Given 64-bit address
MACRUM 0:615f90842ce8 1527 *
MACRUM 0:615f90842ce8 1528 * \return none
MACRUM 0:615f90842ce8 1529 */
MACRUM 0:615f90842ce8 1530 static void rf_set_address(uint8_t *address)
MACRUM 0:615f90842ce8 1531 {
MACRUM 0:615f90842ce8 1532 rf_if_lock();
MACRUM 0:615f90842ce8 1533 /*Wake up RF if sleeping*/
MACRUM 0:615f90842ce8 1534 if(rf_flags_check(RFF_ON) == 0)
MACRUM 0:615f90842ce8 1535 {
MACRUM 0:615f90842ce8 1536 rf_if_disable_slptr();
MACRUM 0:615f90842ce8 1537 rf_poll_trx_state_change(TRX_OFF);
MACRUM 0:615f90842ce8 1538 }
MACRUM 0:615f90842ce8 1539 /*Write address filter registers*/
MACRUM 0:615f90842ce8 1540 rf_if_write_ieee_addr_registers(address);
MACRUM 0:615f90842ce8 1541 /*RF back to sleep*/
MACRUM 0:615f90842ce8 1542 if(rf_flags_check(RFF_ON) == 0)
MACRUM 0:615f90842ce8 1543 {
MACRUM 0:615f90842ce8 1544 rf_if_enable_slptr();
MACRUM 0:615f90842ce8 1545 }
MACRUM 0:615f90842ce8 1546 rf_if_unlock();
MACRUM 0:615f90842ce8 1547 }
MACRUM 0:615f90842ce8 1548
MACRUM 0:615f90842ce8 1549 /*
MACRUM 0:615f90842ce8 1550 * \brief Function sets the RF channel.
MACRUM 0:615f90842ce8 1551 *
MACRUM 0:615f90842ce8 1552 * \param ch New channel
MACRUM 0:615f90842ce8 1553 *
MACRUM 0:615f90842ce8 1554 * \return none
MACRUM 0:615f90842ce8 1555 */
MACRUM 0:615f90842ce8 1556 static void rf_channel_set(uint8_t ch)
MACRUM 0:615f90842ce8 1557 {
MACRUM 0:615f90842ce8 1558 rf_if_lock();
MACRUM 0:615f90842ce8 1559 rf_phy_channel = ch;
MACRUM 0:615f90842ce8 1560 if(ch < 0x1f)
MACRUM 0:615f90842ce8 1561 rf_if_set_channel_register(ch);
MACRUM 0:615f90842ce8 1562 rf_if_unlock();
MACRUM 0:615f90842ce8 1563 }
MACRUM 0:615f90842ce8 1564
MACRUM 0:615f90842ce8 1565
MACRUM 0:615f90842ce8 1566 /*
MACRUM 0:615f90842ce8 1567 * \brief Function initialises the radio driver and resets the radio.
MACRUM 0:615f90842ce8 1568 *
MACRUM 0:615f90842ce8 1569 * \param none
MACRUM 0:615f90842ce8 1570 *
MACRUM 0:615f90842ce8 1571 * \return none
MACRUM 0:615f90842ce8 1572 */
MACRUM 0:615f90842ce8 1573 static void rf_init(void)
MACRUM 0:615f90842ce8 1574 {
MACRUM 0:615f90842ce8 1575 /*Reset RF module*/
MACRUM 0:615f90842ce8 1576 rf_if_reset_radio();
MACRUM 0:615f90842ce8 1577
MACRUM 0:615f90842ce8 1578 rf_if_lock();
MACRUM 0:615f90842ce8 1579
MACRUM 0:615f90842ce8 1580 /*Write RF settings*/
MACRUM 0:615f90842ce8 1581 rf_write_settings();
MACRUM 0:615f90842ce8 1582 /*Initialise PHY mode*/
MACRUM 0:615f90842ce8 1583 rf_init_phy_mode();
MACRUM 0:615f90842ce8 1584 /*Clear RF flags*/
MACRUM 0:615f90842ce8 1585 rf_flags_reset();
MACRUM 0:615f90842ce8 1586 /*Set RF in TRX OFF state*/
MACRUM 0:615f90842ce8 1587 rf_if_change_trx_state(TRX_OFF);
MACRUM 0:615f90842ce8 1588 /*Set RF in PLL_ON state*/
MACRUM 0:615f90842ce8 1589 rf_if_change_trx_state(PLL_ON);
MACRUM 0:615f90842ce8 1590 /*Start receiver*/
MACRUM 0:615f90842ce8 1591 rf_receive();
MACRUM 0:615f90842ce8 1592 /*Read randomness, and add to seed*/
MACRUM 0:615f90842ce8 1593 randLIB_add_seed(rf_if_read_rnd());
MACRUM 0:615f90842ce8 1594 /*Start RF calibration timer*/
MACRUM 0:615f90842ce8 1595 rf_calibration_timer_start(RF_CALIBRATION_INTERVAL);
MACRUM 0:615f90842ce8 1596
MACRUM 0:615f90842ce8 1597 rf_if_unlock();
MACRUM 0:615f90842ce8 1598 }
MACRUM 0:615f90842ce8 1599
MACRUM 0:615f90842ce8 1600 /**
MACRUM 0:615f90842ce8 1601 * \brief Function gets called when MAC is setting radio off.
MACRUM 0:615f90842ce8 1602 *
MACRUM 0:615f90842ce8 1603 * \param none
MACRUM 0:615f90842ce8 1604 *
MACRUM 0:615f90842ce8 1605 * \return none
MACRUM 0:615f90842ce8 1606 */
MACRUM 0:615f90842ce8 1607 static void rf_off(void)
MACRUM 0:615f90842ce8 1608 {
MACRUM 0:615f90842ce8 1609 if(rf_flags_check(RFF_ON))
MACRUM 0:615f90842ce8 1610 {
MACRUM 0:615f90842ce8 1611 rf_if_lock();
MACRUM 0:615f90842ce8 1612 rf_cca_abort();
MACRUM 0:615f90842ce8 1613 uint16_t while_counter = 0;
MACRUM 0:615f90842ce8 1614 /*Wait while receiving*/
MACRUM 0:615f90842ce8 1615 while(rf_if_read_trx_state() == BUSY_RX_AACK)
MACRUM 0:615f90842ce8 1616 {
MACRUM 0:615f90842ce8 1617 while_counter++;
MACRUM 0:615f90842ce8 1618 if(while_counter == 0xffff)
MACRUM 0:615f90842ce8 1619 break;
MACRUM 0:615f90842ce8 1620 }
MACRUM 0:615f90842ce8 1621 /*RF state change: RX_AACK_ON->PLL_ON->TRX_OFF->SLEEP*/
MACRUM 0:615f90842ce8 1622 if(rf_if_read_trx_state() == RX_AACK_ON)
MACRUM 0:615f90842ce8 1623 {
MACRUM 0:615f90842ce8 1624 rf_if_change_trx_state(PLL_ON);
MACRUM 0:615f90842ce8 1625 }
MACRUM 0:615f90842ce8 1626 rf_if_change_trx_state(TRX_OFF);
MACRUM 0:615f90842ce8 1627 rf_if_enable_slptr();
MACRUM 0:615f90842ce8 1628
MACRUM 0:615f90842ce8 1629 /*Disable Antenna Diversity*/
MACRUM 0:615f90842ce8 1630 if(rf_use_antenna_diversity)
MACRUM 0:615f90842ce8 1631 rf_if_disable_ant_div();
MACRUM 0:615f90842ce8 1632 rf_if_unlock();
MACRUM 0:615f90842ce8 1633 }
MACRUM 0:615f90842ce8 1634
MACRUM 0:615f90842ce8 1635 /*Clears all flags*/
MACRUM 0:615f90842ce8 1636 rf_flags_reset();
MACRUM 0:615f90842ce8 1637 }
MACRUM 0:615f90842ce8 1638
MACRUM 0:615f90842ce8 1639 /*
MACRUM 0:615f90842ce8 1640 * \brief Function polls the RF state until it has changed to desired state.
MACRUM 0:615f90842ce8 1641 *
MACRUM 0:615f90842ce8 1642 * \param trx_state RF state
MACRUM 0:615f90842ce8 1643 *
MACRUM 0:615f90842ce8 1644 * \return none
MACRUM 0:615f90842ce8 1645 */
MACRUM 0:615f90842ce8 1646 static void rf_poll_trx_state_change(rf_trx_states_t trx_state)
MACRUM 0:615f90842ce8 1647 {
MACRUM 0:615f90842ce8 1648 uint16_t while_counter = 0;
MACRUM 0:615f90842ce8 1649 // XXX lock apparently not needed
MACRUM 0:615f90842ce8 1650 rf_if_lock();
MACRUM 0:615f90842ce8 1651
MACRUM 0:615f90842ce8 1652 if(trx_state != RF_TX_START)
MACRUM 0:615f90842ce8 1653 {
MACRUM 0:615f90842ce8 1654 if(trx_state == FORCE_PLL_ON)
MACRUM 0:615f90842ce8 1655 trx_state = PLL_ON;
MACRUM 0:615f90842ce8 1656 else if(trx_state == FORCE_TRX_OFF)
MACRUM 0:615f90842ce8 1657 trx_state = TRX_OFF;
MACRUM 0:615f90842ce8 1658
MACRUM 0:615f90842ce8 1659 while(rf_if_read_trx_state() != trx_state)
MACRUM 0:615f90842ce8 1660 {
MACRUM 0:615f90842ce8 1661 while_counter++;
MACRUM 0:615f90842ce8 1662 if(while_counter == 0x1ff)
MACRUM 0:615f90842ce8 1663 break;
MACRUM 0:615f90842ce8 1664 }
MACRUM 0:615f90842ce8 1665 }
MACRUM 0:615f90842ce8 1666 rf_if_unlock();
MACRUM 0:615f90842ce8 1667 }
MACRUM 0:615f90842ce8 1668
MACRUM 0:615f90842ce8 1669 /*
MACRUM 0:615f90842ce8 1670 * \brief Function starts the CCA process before starting data transmission and copies the data to RF TX FIFO.
MACRUM 0:615f90842ce8 1671 *
MACRUM 0:615f90842ce8 1672 * \param data_ptr Pointer to TX data (excluding FCS)
MACRUM 0:615f90842ce8 1673 * \param data_length Length of the TX data (excluding FCS)
MACRUM 0:615f90842ce8 1674 * \param tx_handle Handle to transmission
MACRUM 0:615f90842ce8 1675 * \return 0 Success
MACRUM 0:615f90842ce8 1676 * \return -1 Busy
MACRUM 0:615f90842ce8 1677 */
MACRUM 0:615f90842ce8 1678 static int8_t rf_start_cca(uint8_t *data_ptr, uint16_t data_length, uint8_t tx_handle, data_protocol_e data_protocol )
MACRUM 0:615f90842ce8 1679 {
MACRUM 0:615f90842ce8 1680 (void)data_protocol;
MACRUM 0:615f90842ce8 1681 rf_if_lock();
MACRUM 0:615f90842ce8 1682 /*Check if transmitter is busy*/
MACRUM 0:615f90842ce8 1683 if(rf_if_read_trx_state() == BUSY_RX_AACK || data_length > RF_MTU - 2)
MACRUM 0:615f90842ce8 1684 {
MACRUM 0:615f90842ce8 1685 rf_if_unlock();
MACRUM 0:615f90842ce8 1686 /*Return busy*/
MACRUM 0:615f90842ce8 1687 return -1;
MACRUM 0:615f90842ce8 1688 }
MACRUM 0:615f90842ce8 1689 else
MACRUM 0:615f90842ce8 1690 {
MACRUM 0:615f90842ce8 1691 expected_ack_sequence = -1;
MACRUM 0:615f90842ce8 1692
MACRUM 0:615f90842ce8 1693 /*Nanostack has a static TX buffer, which will remain valid until we*/
MACRUM 0:615f90842ce8 1694 /*generate a callback, so we just note the pointer for reading later.*/
MACRUM 0:615f90842ce8 1695 rf_tx_data = data_ptr;
MACRUM 0:615f90842ce8 1696 rf_tx_length = data_length;
MACRUM 0:615f90842ce8 1697 /*Start CCA timeout*/
MACRUM 0:615f90842ce8 1698 rf_cca_timer_start(RF_CCA_BASE_BACKOFF + randLIB_get_random_in_range(0, RF_CCA_RANDOM_BACKOFF));
MACRUM 0:615f90842ce8 1699 /*Store TX handle*/
MACRUM 0:615f90842ce8 1700 mac_tx_handle = tx_handle;
MACRUM 0:615f90842ce8 1701 rf_if_unlock();
MACRUM 0:615f90842ce8 1702 }
MACRUM 0:615f90842ce8 1703
MACRUM 0:615f90842ce8 1704 /*Return success*/
MACRUM 0:615f90842ce8 1705 return 0;
MACRUM 0:615f90842ce8 1706 }
MACRUM 0:615f90842ce8 1707
MACRUM 0:615f90842ce8 1708 /*
MACRUM 0:615f90842ce8 1709 * \brief Function aborts CCA process.
MACRUM 0:615f90842ce8 1710 *
MACRUM 0:615f90842ce8 1711 * \param none
MACRUM 0:615f90842ce8 1712 *
MACRUM 0:615f90842ce8 1713 * \return none
MACRUM 0:615f90842ce8 1714 */
MACRUM 0:615f90842ce8 1715 static void rf_cca_abort(void)
MACRUM 0:615f90842ce8 1716 {
MACRUM 0:615f90842ce8 1717 rf_cca_timer_stop();
MACRUM 0:615f90842ce8 1718 rf_flags_clear(RFF_CCA);
MACRUM 0:615f90842ce8 1719 rf_disable_static_frame_buffer_protection();
MACRUM 0:615f90842ce8 1720 }
MACRUM 0:615f90842ce8 1721
MACRUM 0:615f90842ce8 1722 /*
MACRUM 0:615f90842ce8 1723 * \brief Function starts the transmission of the frame.
MACRUM 0:615f90842ce8 1724 *
MACRUM 0:615f90842ce8 1725 * \param none
MACRUM 0:615f90842ce8 1726 *
MACRUM 0:615f90842ce8 1727 * \return none
MACRUM 0:615f90842ce8 1728 */
MACRUM 0:615f90842ce8 1729 static void rf_start_tx(void)
MACRUM 0:615f90842ce8 1730 {
MACRUM 0:615f90842ce8 1731 /*Only start transmitting from RX state*/
MACRUM 0:615f90842ce8 1732 uint8_t trx_state = rf_if_read_trx_state();
MACRUM 0:615f90842ce8 1733 if(trx_state != RX_AACK_ON)
MACRUM 0:615f90842ce8 1734 {
MACRUM 0:615f90842ce8 1735 rf_disable_static_frame_buffer_protection();
MACRUM 0:615f90842ce8 1736 if(device_driver.phy_tx_done_cb){
MACRUM 0:615f90842ce8 1737 device_driver.phy_tx_done_cb(rf_radio_driver_id, mac_tx_handle, PHY_LINK_CCA_FAIL, 0, 0);
MACRUM 0:615f90842ce8 1738 }
MACRUM 0:615f90842ce8 1739 }
MACRUM 0:615f90842ce8 1740 else
MACRUM 0:615f90842ce8 1741 {
MACRUM 0:615f90842ce8 1742 /*RF state change: ->PLL_ON->RF_TX_START*/
MACRUM 0:615f90842ce8 1743 rf_if_change_trx_state(FORCE_PLL_ON);
MACRUM 0:615f90842ce8 1744 rf_flags_clear(RFF_RX);
MACRUM 0:615f90842ce8 1745 /*Now we're out of receive mode, can release protection*/
MACRUM 0:615f90842ce8 1746 rf_disable_static_frame_buffer_protection();
MACRUM 0:615f90842ce8 1747 rf_if_enable_tx_end_interrupt();
MACRUM 0:615f90842ce8 1748 rf_flags_set(RFF_TX);
MACRUM 0:615f90842ce8 1749 rf_if_change_trx_state(RF_TX_START);
MACRUM 0:615f90842ce8 1750 }
MACRUM 0:615f90842ce8 1751 }
MACRUM 0:615f90842ce8 1752
MACRUM 0:615f90842ce8 1753 /*
MACRUM 0:615f90842ce8 1754 * \brief Function sets the RF in RX state.
MACRUM 0:615f90842ce8 1755 *
MACRUM 0:615f90842ce8 1756 * \param none
MACRUM 0:615f90842ce8 1757 *
MACRUM 0:615f90842ce8 1758 * \return none
MACRUM 0:615f90842ce8 1759 */
MACRUM 0:615f90842ce8 1760 static void rf_receive(void)
MACRUM 0:615f90842ce8 1761 {
MACRUM 0:615f90842ce8 1762 uint16_t while_counter = 0;
MACRUM 0:615f90842ce8 1763 if(rf_flags_check(RFF_ON) == 0)
MACRUM 0:615f90842ce8 1764 {
MACRUM 0:615f90842ce8 1765 rf_on();
MACRUM 0:615f90842ce8 1766 }
MACRUM 0:615f90842ce8 1767 /*If not yet in RX state set it*/
MACRUM 0:615f90842ce8 1768 if(rf_flags_check(RFF_RX) == 0)
MACRUM 0:615f90842ce8 1769 {
MACRUM 0:615f90842ce8 1770 rf_if_lock();
MACRUM 0:615f90842ce8 1771 /*Wait while receiving data*/
MACRUM 0:615f90842ce8 1772 while(rf_if_read_trx_state() == BUSY_RX_AACK)
MACRUM 0:615f90842ce8 1773 {
MACRUM 0:615f90842ce8 1774 while_counter++;
MACRUM 0:615f90842ce8 1775 if(while_counter == 0xffff)
MACRUM 0:615f90842ce8 1776 {
MACRUM 0:615f90842ce8 1777 break;
MACRUM 0:615f90842ce8 1778 }
MACRUM 0:615f90842ce8 1779 }
MACRUM 0:615f90842ce8 1780
MACRUM 0:615f90842ce8 1781 rf_if_change_trx_state(PLL_ON);
MACRUM 0:615f90842ce8 1782
MACRUM 0:615f90842ce8 1783 if((rf_mode == RF_MODE_SNIFFER) || (rf_mode == RF_MODE_ED))
MACRUM 0:615f90842ce8 1784 {
MACRUM 0:615f90842ce8 1785 rf_if_change_trx_state(RX_ON);
MACRUM 0:615f90842ce8 1786 }
MACRUM 0:615f90842ce8 1787 else
MACRUM 0:615f90842ce8 1788 {
MACRUM 0:615f90842ce8 1789 /*ACK is always received in promiscuous mode to bypass address filters*/
MACRUM 0:615f90842ce8 1790 if(rf_rx_mode)
MACRUM 0:615f90842ce8 1791 {
MACRUM 0:615f90842ce8 1792 rf_rx_mode = 0;
MACRUM 0:615f90842ce8 1793 rf_if_enable_promiscuous_mode();
MACRUM 0:615f90842ce8 1794 }
MACRUM 0:615f90842ce8 1795 else
MACRUM 0:615f90842ce8 1796 {
MACRUM 0:615f90842ce8 1797 rf_if_disable_promiscuous_mode();
MACRUM 0:615f90842ce8 1798 }
MACRUM 0:615f90842ce8 1799 rf_if_change_trx_state(RX_AACK_ON);
MACRUM 0:615f90842ce8 1800 }
MACRUM 0:615f90842ce8 1801 /*If calibration timer was unable to calibrate the RF, run calibration now*/
MACRUM 0:615f90842ce8 1802 if(!rf_tuned)
MACRUM 0:615f90842ce8 1803 {
MACRUM 0:615f90842ce8 1804 /*Start calibration. This can be done in states TRX_OFF, PLL_ON or in any receive state*/
MACRUM 0:615f90842ce8 1805 rf_if_calibration();
MACRUM 0:615f90842ce8 1806 /*RF is tuned now*/
MACRUM 0:615f90842ce8 1807 rf_tuned = 1;
MACRUM 0:615f90842ce8 1808 }
MACRUM 0:615f90842ce8 1809
MACRUM 0:615f90842ce8 1810 rf_channel_set(rf_phy_channel);
MACRUM 0:615f90842ce8 1811 rf_flags_set(RFF_RX);
MACRUM 0:615f90842ce8 1812 // Don't receive packets when ED mode enabled
MACRUM 0:615f90842ce8 1813 if (rf_mode != RF_MODE_ED)
MACRUM 0:615f90842ce8 1814 {
MACRUM 0:615f90842ce8 1815 rf_if_enable_rx_end_interrupt();
MACRUM 0:615f90842ce8 1816 }
MACRUM 0:615f90842ce8 1817 rf_if_unlock();
MACRUM 0:615f90842ce8 1818 }
MACRUM 0:615f90842ce8 1819 }
MACRUM 0:615f90842ce8 1820
MACRUM 0:615f90842ce8 1821 /*
MACRUM 0:615f90842ce8 1822 * \brief Function calibrates the radio.
MACRUM 0:615f90842ce8 1823 *
MACRUM 0:615f90842ce8 1824 * \param none
MACRUM 0:615f90842ce8 1825 *
MACRUM 0:615f90842ce8 1826 * \return none
MACRUM 0:615f90842ce8 1827 */
MACRUM 0:615f90842ce8 1828 static void rf_calibration_cb(void)
MACRUM 0:615f90842ce8 1829 {
MACRUM 0:615f90842ce8 1830 /*clear tuned flag to start tuning in rf_receive*/
MACRUM 0:615f90842ce8 1831 rf_tuned = 0;
MACRUM 0:615f90842ce8 1832 /*If RF is in default receive state, start calibration*/
MACRUM 0:615f90842ce8 1833 if(rf_if_read_trx_state() == RX_AACK_ON)
MACRUM 0:615f90842ce8 1834 {
MACRUM 0:615f90842ce8 1835 rf_if_lock();
MACRUM 0:615f90842ce8 1836 /*Set RF in PLL_ON state*/
MACRUM 0:615f90842ce8 1837 rf_if_change_trx_state(PLL_ON);
MACRUM 0:615f90842ce8 1838 /*Set RF in TRX_OFF state to start PLL tuning*/
MACRUM 0:615f90842ce8 1839 rf_if_change_trx_state(TRX_OFF);
MACRUM 0:615f90842ce8 1840 /*Set RF in RX_ON state to calibrate*/
MACRUM 0:615f90842ce8 1841 rf_if_change_trx_state(RX_ON);
MACRUM 0:615f90842ce8 1842 /*Calibrate FTN*/
MACRUM 0:615f90842ce8 1843 rf_if_calibration();
MACRUM 0:615f90842ce8 1844 /*RF is tuned now*/
MACRUM 0:615f90842ce8 1845 rf_tuned = 1;
MACRUM 0:615f90842ce8 1846 /*Back to default receive state*/
MACRUM 0:615f90842ce8 1847 rf_flags_clear(RFF_RX);
MACRUM 0:615f90842ce8 1848 rf_receive();
MACRUM 0:615f90842ce8 1849 rf_if_unlock();
MACRUM 0:615f90842ce8 1850 }
MACRUM 0:615f90842ce8 1851 }
MACRUM 0:615f90842ce8 1852
MACRUM 0:615f90842ce8 1853 /*
MACRUM 0:615f90842ce8 1854 * \brief Function sets RF_ON flag when radio is powered.
MACRUM 0:615f90842ce8 1855 *
MACRUM 0:615f90842ce8 1856 * \param none
MACRUM 0:615f90842ce8 1857 *
MACRUM 0:615f90842ce8 1858 * \return none
MACRUM 0:615f90842ce8 1859 */
MACRUM 0:615f90842ce8 1860 static void rf_on(void)
MACRUM 0:615f90842ce8 1861 {
MACRUM 0:615f90842ce8 1862 /*Set RFF_ON flag*/
MACRUM 0:615f90842ce8 1863 if(rf_flags_check(RFF_ON) == 0)
MACRUM 0:615f90842ce8 1864 {
MACRUM 0:615f90842ce8 1865 rf_if_lock();
MACRUM 0:615f90842ce8 1866 rf_flags_set(RFF_ON);
MACRUM 0:615f90842ce8 1867 /*Enable Antenna diversity*/
MACRUM 0:615f90842ce8 1868 if(rf_use_antenna_diversity)
MACRUM 0:615f90842ce8 1869 /*Set ANT_EXT_SW_EN to enable controlling of antenna diversity*/
MACRUM 0:615f90842ce8 1870 rf_if_enable_ant_div();
MACRUM 0:615f90842ce8 1871
MACRUM 0:615f90842ce8 1872 /*Wake up from sleep state*/
MACRUM 0:615f90842ce8 1873 rf_if_disable_slptr();
MACRUM 0:615f90842ce8 1874 rf_poll_trx_state_change(TRX_OFF);
MACRUM 0:615f90842ce8 1875 rf_if_unlock();
MACRUM 0:615f90842ce8 1876 }
MACRUM 0:615f90842ce8 1877 }
MACRUM 0:615f90842ce8 1878
MACRUM 0:615f90842ce8 1879 /*
MACRUM 0:615f90842ce8 1880 * \brief Function handles the received ACK frame.
MACRUM 0:615f90842ce8 1881 *
MACRUM 0:615f90842ce8 1882 * \param seq_number Sequence number of received ACK
MACRUM 0:615f90842ce8 1883 * \param data_pending Pending bit state in received ACK
MACRUM 0:615f90842ce8 1884 *
MACRUM 0:615f90842ce8 1885 * \return none
MACRUM 0:615f90842ce8 1886 */
MACRUM 0:615f90842ce8 1887 static void rf_handle_ack(uint8_t seq_number, uint8_t data_pending)
MACRUM 0:615f90842ce8 1888 {
MACRUM 0:615f90842ce8 1889 phy_link_tx_status_e phy_status;
MACRUM 0:615f90842ce8 1890 rf_if_lock();
MACRUM 0:615f90842ce8 1891 /*Received ACK sequence must be equal with transmitted packet sequence*/
MACRUM 0:615f90842ce8 1892 if(expected_ack_sequence == seq_number)
MACRUM 0:615f90842ce8 1893 {
MACRUM 0:615f90842ce8 1894 rf_ack_wait_timer_stop();
MACRUM 0:615f90842ce8 1895 expected_ack_sequence = -1;
MACRUM 0:615f90842ce8 1896 /*When data pending bit in ACK frame is set, inform NET library*/
MACRUM 0:615f90842ce8 1897 if(data_pending)
MACRUM 0:615f90842ce8 1898 phy_status = PHY_LINK_TX_DONE_PENDING;
MACRUM 0:615f90842ce8 1899 else
MACRUM 0:615f90842ce8 1900 phy_status = PHY_LINK_TX_DONE;
MACRUM 0:615f90842ce8 1901 /*Call PHY TX Done API*/
MACRUM 0:615f90842ce8 1902 if(device_driver.phy_tx_done_cb){
MACRUM 0:615f90842ce8 1903 device_driver.phy_tx_done_cb(rf_radio_driver_id, mac_tx_handle,phy_status, 0, 0);
MACRUM 0:615f90842ce8 1904 }
MACRUM 0:615f90842ce8 1905 }
MACRUM 0:615f90842ce8 1906 rf_if_unlock();
MACRUM 0:615f90842ce8 1907 }
MACRUM 0:615f90842ce8 1908
MACRUM 0:615f90842ce8 1909 /*
MACRUM 0:615f90842ce8 1910 * \brief Function is a call back for RX end interrupt.
MACRUM 0:615f90842ce8 1911 *
MACRUM 0:615f90842ce8 1912 * \param none
MACRUM 0:615f90842ce8 1913 *
MACRUM 0:615f90842ce8 1914 * \return none
MACRUM 0:615f90842ce8 1915 */
MACRUM 0:615f90842ce8 1916 static void rf_handle_rx_end(void)
MACRUM 0:615f90842ce8 1917 {
MACRUM 0:615f90842ce8 1918 /*Start receiver*/
MACRUM 0:615f90842ce8 1919 rf_flags_clear(RFF_RX);
MACRUM 0:615f90842ce8 1920 rf_receive();
MACRUM 0:615f90842ce8 1921
MACRUM 0:615f90842ce8 1922 /*Frame received interrupt*/
MACRUM 0:615f90842ce8 1923 if(!rf_flags_check(RFF_RX)) {
MACRUM 0:615f90842ce8 1924 return;
MACRUM 0:615f90842ce8 1925 }
MACRUM 0:615f90842ce8 1926
MACRUM 0:615f90842ce8 1927 static uint8_t rf_buffer[RF_MTU];
MACRUM 0:615f90842ce8 1928 uint8_t rf_lqi, rf_ed;
MACRUM 0:615f90842ce8 1929 int8_t rf_rssi;
MACRUM 0:615f90842ce8 1930 bool crc_good;
MACRUM 0:615f90842ce8 1931
MACRUM 0:615f90842ce8 1932 /*Read received packet*/
MACRUM 0:615f90842ce8 1933 uint8_t len = rf_if_read_packet(rf_buffer, &rf_lqi, &rf_ed, &crc_good);
MACRUM 0:615f90842ce8 1934 if (len < 5 || !crc_good) {
MACRUM 0:615f90842ce8 1935 return;
MACRUM 0:615f90842ce8 1936 }
MACRUM 0:615f90842ce8 1937
MACRUM 0:615f90842ce8 1938 /* Convert raw ED to dBm value (chip-dependent) */
MACRUM 0:615f90842ce8 1939 rf_rssi = rf_if_scale_rssi(rf_ed);
MACRUM 0:615f90842ce8 1940
MACRUM 0:615f90842ce8 1941 /* Create a virtual LQI using received RSSI, forgetting actual HW LQI */
MACRUM 0:615f90842ce8 1942 /* (should be done through PHY_EXTENSION_CONVERT_SIGNAL_INFO) */
MACRUM 0:615f90842ce8 1943 rf_lqi = rf_scale_lqi(rf_rssi);
MACRUM 0:615f90842ce8 1944
MACRUM 0:615f90842ce8 1945 /*Handle received ACK*/
MACRUM 0:615f90842ce8 1946 if((rf_buffer[0] & 0x07) == 0x02 && rf_mode != RF_MODE_SNIFFER)
MACRUM 0:615f90842ce8 1947 {
MACRUM 0:615f90842ce8 1948 /*Check if data is pending*/
MACRUM 0:615f90842ce8 1949 bool pending = (rf_buffer[0] & 0x10);
MACRUM 0:615f90842ce8 1950
MACRUM 0:615f90842ce8 1951 /*Send sequence number in ACK handler*/
MACRUM 0:615f90842ce8 1952 rf_handle_ack(rf_buffer[2], pending);
MACRUM 0:615f90842ce8 1953 } else {
MACRUM 0:615f90842ce8 1954 if( device_driver.phy_rx_cb ){
MACRUM 0:615f90842ce8 1955 device_driver.phy_rx_cb(rf_buffer, len - 2, rf_lqi, rf_rssi, rf_radio_driver_id);
MACRUM 0:615f90842ce8 1956 }
MACRUM 0:615f90842ce8 1957 }
MACRUM 0:615f90842ce8 1958 }
MACRUM 0:615f90842ce8 1959
MACRUM 0:615f90842ce8 1960 /*
MACRUM 0:615f90842ce8 1961 * \brief Function is called when MAC is shutting down the radio.
MACRUM 0:615f90842ce8 1962 *
MACRUM 0:615f90842ce8 1963 * \param none
MACRUM 0:615f90842ce8 1964 *
MACRUM 0:615f90842ce8 1965 * \return none
MACRUM 0:615f90842ce8 1966 */
MACRUM 0:615f90842ce8 1967 static void rf_shutdown(void)
MACRUM 0:615f90842ce8 1968 {
MACRUM 0:615f90842ce8 1969 /*Call RF OFF*/
MACRUM 0:615f90842ce8 1970 rf_off();
MACRUM 0:615f90842ce8 1971 }
MACRUM 0:615f90842ce8 1972
MACRUM 0:615f90842ce8 1973 /*
MACRUM 0:615f90842ce8 1974 * \brief Function is a call back for TX end interrupt.
MACRUM 0:615f90842ce8 1975 *
MACRUM 0:615f90842ce8 1976 * \param none
MACRUM 0:615f90842ce8 1977 *
MACRUM 0:615f90842ce8 1978 * \return none
MACRUM 0:615f90842ce8 1979 */
MACRUM 0:615f90842ce8 1980 static void rf_handle_tx_end(void)
MACRUM 0:615f90842ce8 1981 {
MACRUM 0:615f90842ce8 1982 rf_rx_mode = 0;
MACRUM 0:615f90842ce8 1983 /*If ACK is needed for this transmission*/
MACRUM 0:615f90842ce8 1984 if((rf_tx_data[0] & 0x20) && rf_flags_check(RFF_TX))
MACRUM 0:615f90842ce8 1985 {
MACRUM 0:615f90842ce8 1986 expected_ack_sequence = rf_tx_data[2];
MACRUM 0:615f90842ce8 1987 rf_ack_wait_timer_start(rf_ack_wait_duration);
MACRUM 0:615f90842ce8 1988 rf_rx_mode = 1;
MACRUM 0:615f90842ce8 1989 }
MACRUM 0:615f90842ce8 1990 rf_flags_clear(RFF_RX);
MACRUM 0:615f90842ce8 1991 /*Start receiver*/
MACRUM 0:615f90842ce8 1992 rf_receive();
MACRUM 0:615f90842ce8 1993
MACRUM 0:615f90842ce8 1994 /*Call PHY TX Done API*/
MACRUM 0:615f90842ce8 1995 if(device_driver.phy_tx_done_cb){
MACRUM 0:615f90842ce8 1996 device_driver.phy_tx_done_cb(rf_radio_driver_id, mac_tx_handle, PHY_LINK_TX_SUCCESS, 0, 0);
MACRUM 0:615f90842ce8 1997 }
MACRUM 0:615f90842ce8 1998 }
MACRUM 0:615f90842ce8 1999
MACRUM 0:615f90842ce8 2000 /*
MACRUM 0:615f90842ce8 2001 * \brief Function is a call back for CCA ED done interrupt.
MACRUM 0:615f90842ce8 2002 *
MACRUM 0:615f90842ce8 2003 * \param none
MACRUM 0:615f90842ce8 2004 *
MACRUM 0:615f90842ce8 2005 * \return none
MACRUM 0:615f90842ce8 2006 */
MACRUM 0:615f90842ce8 2007 static void rf_handle_cca_ed_done(void)
MACRUM 0:615f90842ce8 2008 {
MACRUM 0:615f90842ce8 2009 if (!rf_flags_check(RFF_CCA)) {
MACRUM 0:615f90842ce8 2010 return;
MACRUM 0:615f90842ce8 2011 }
MACRUM 0:615f90842ce8 2012 rf_flags_clear(RFF_CCA);
MACRUM 0:615f90842ce8 2013 /*Check the result of CCA process*/
MACRUM 0:615f90842ce8 2014 if(rf_if_check_cca())
MACRUM 0:615f90842ce8 2015 {
MACRUM 0:615f90842ce8 2016 rf_start_tx();
MACRUM 0:615f90842ce8 2017 }
MACRUM 0:615f90842ce8 2018 else
MACRUM 0:615f90842ce8 2019 {
MACRUM 0:615f90842ce8 2020 /*Re-enable reception*/
MACRUM 0:615f90842ce8 2021 rf_disable_static_frame_buffer_protection();
MACRUM 0:615f90842ce8 2022 /*Send CCA fail notification*/
MACRUM 0:615f90842ce8 2023 if(device_driver.phy_tx_done_cb){
MACRUM 0:615f90842ce8 2024 device_driver.phy_tx_done_cb(rf_radio_driver_id, mac_tx_handle, PHY_LINK_CCA_FAIL, 0, 0);
MACRUM 0:615f90842ce8 2025 }
MACRUM 0:615f90842ce8 2026 }
MACRUM 0:615f90842ce8 2027 }
MACRUM 0:615f90842ce8 2028
MACRUM 0:615f90842ce8 2029 /*
MACRUM 0:615f90842ce8 2030 * \brief Function returns the TX power variable.
MACRUM 0:615f90842ce8 2031 *
MACRUM 0:615f90842ce8 2032 * \param none
MACRUM 0:615f90842ce8 2033 *
MACRUM 0:615f90842ce8 2034 * \return radio_tx_power TX power variable
MACRUM 0:615f90842ce8 2035 */
MACRUM 0:615f90842ce8 2036 MBED_UNUSED static uint8_t rf_tx_power_get(void)
MACRUM 0:615f90842ce8 2037 {
MACRUM 0:615f90842ce8 2038 return radio_tx_power;
MACRUM 0:615f90842ce8 2039 }
MACRUM 0:615f90842ce8 2040
MACRUM 0:615f90842ce8 2041 /*
MACRUM 0:615f90842ce8 2042 * \brief Function enables the usage of Antenna diversity.
MACRUM 0:615f90842ce8 2043 *
MACRUM 0:615f90842ce8 2044 * \param none
MACRUM 0:615f90842ce8 2045 *
MACRUM 0:615f90842ce8 2046 * \return 0 Success
MACRUM 0:615f90842ce8 2047 */
MACRUM 0:615f90842ce8 2048 MBED_UNUSED static int8_t rf_enable_antenna_diversity(void)
MACRUM 0:615f90842ce8 2049 {
MACRUM 0:615f90842ce8 2050 int8_t ret_val = 0;
MACRUM 0:615f90842ce8 2051 rf_use_antenna_diversity = 1;
MACRUM 0:615f90842ce8 2052 return ret_val;
MACRUM 0:615f90842ce8 2053 }
MACRUM 0:615f90842ce8 2054
MACRUM 0:615f90842ce8 2055 /*
MACRUM 0:615f90842ce8 2056 * \brief Function gives the control of RF states to MAC.
MACRUM 0:615f90842ce8 2057 *
MACRUM 0:615f90842ce8 2058 * \param new_state RF state
MACRUM 0:615f90842ce8 2059 * \param rf_channel RF channel
MACRUM 0:615f90842ce8 2060 *
MACRUM 0:615f90842ce8 2061 * \return 0 Success
MACRUM 0:615f90842ce8 2062 */
MACRUM 0:615f90842ce8 2063 static int8_t rf_interface_state_control(phy_interface_state_e new_state, uint8_t rf_channel)
MACRUM 0:615f90842ce8 2064 {
MACRUM 0:615f90842ce8 2065 int8_t ret_val = 0;
MACRUM 0:615f90842ce8 2066 switch (new_state)
MACRUM 0:615f90842ce8 2067 {
MACRUM 0:615f90842ce8 2068 /*Reset PHY driver and set to idle*/
MACRUM 0:615f90842ce8 2069 case PHY_INTERFACE_RESET:
MACRUM 0:615f90842ce8 2070 break;
MACRUM 0:615f90842ce8 2071 /*Disable PHY Interface driver*/
MACRUM 0:615f90842ce8 2072 case PHY_INTERFACE_DOWN:
MACRUM 0:615f90842ce8 2073 rf_shutdown();
MACRUM 0:615f90842ce8 2074 break;
MACRUM 0:615f90842ce8 2075 /*Enable PHY Interface driver*/
MACRUM 0:615f90842ce8 2076 case PHY_INTERFACE_UP:
MACRUM 0:615f90842ce8 2077 rf_mode = RF_MODE_NORMAL;
MACRUM 0:615f90842ce8 2078 rf_channel_set(rf_channel);
MACRUM 0:615f90842ce8 2079 rf_receive();
MACRUM 0:615f90842ce8 2080 rf_if_enable_irq();
MACRUM 0:615f90842ce8 2081 break;
MACRUM 0:615f90842ce8 2082 /*Enable wireless interface ED scan mode*/
MACRUM 0:615f90842ce8 2083 case PHY_INTERFACE_RX_ENERGY_STATE:
MACRUM 0:615f90842ce8 2084 rf_mode = RF_MODE_ED;
MACRUM 0:615f90842ce8 2085 rf_channel_set(rf_channel);
MACRUM 0:615f90842ce8 2086 rf_receive();
MACRUM 0:615f90842ce8 2087 rf_if_disable_irq();
MACRUM 0:615f90842ce8 2088 // Read status to clear pending flags.
MACRUM 0:615f90842ce8 2089 rf_if_read_register(IRQ_STATUS);
MACRUM 0:615f90842ce8 2090 // Must set interrupt mask to be able to read IRQ status. GPIO interrupt is disabled.
MACRUM 0:615f90842ce8 2091 rf_if_enable_cca_ed_done_interrupt();
MACRUM 0:615f90842ce8 2092 // ED can be initiated by writing arbitrary value to PHY_ED_LEVEL
MACRUM 0:615f90842ce8 2093 rf_if_write_register(PHY_ED_LEVEL, 0xff);
MACRUM 0:615f90842ce8 2094 break;
MACRUM 0:615f90842ce8 2095 case PHY_INTERFACE_SNIFFER_STATE: /**< Enable Sniffer state */
MACRUM 0:615f90842ce8 2096 rf_mode = RF_MODE_SNIFFER;
MACRUM 0:615f90842ce8 2097 rf_channel_set(rf_channel);
MACRUM 0:615f90842ce8 2098 rf_flags_clear(RFF_RX);
MACRUM 0:615f90842ce8 2099 rf_receive();
MACRUM 0:615f90842ce8 2100 rf_if_enable_irq();
MACRUM 0:615f90842ce8 2101 break;
MACRUM 0:615f90842ce8 2102 }
MACRUM 0:615f90842ce8 2103 return ret_val;
MACRUM 0:615f90842ce8 2104 }
MACRUM 0:615f90842ce8 2105
MACRUM 0:615f90842ce8 2106 /*
MACRUM 0:615f90842ce8 2107 * \brief Function controls the ACK pending, channel setting and energy detection.
MACRUM 0:615f90842ce8 2108 *
MACRUM 0:615f90842ce8 2109 * \param extension_type Type of control
MACRUM 0:615f90842ce8 2110 * \param data_ptr Data from NET library
MACRUM 0:615f90842ce8 2111 *
MACRUM 0:615f90842ce8 2112 * \return 0 Success
MACRUM 0:615f90842ce8 2113 */
MACRUM 0:615f90842ce8 2114 static int8_t rf_extension(phy_extension_type_e extension_type, uint8_t *data_ptr)
MACRUM 0:615f90842ce8 2115 {
MACRUM 0:615f90842ce8 2116 switch (extension_type)
MACRUM 0:615f90842ce8 2117 {
MACRUM 0:615f90842ce8 2118 /*Control MAC pending bit for Indirect data transmission*/
MACRUM 0:615f90842ce8 2119 case PHY_EXTENSION_CTRL_PENDING_BIT:
MACRUM 0:615f90842ce8 2120 if(*data_ptr)
MACRUM 0:615f90842ce8 2121 {
MACRUM 0:615f90842ce8 2122 rf_if_ack_pending_ctrl(1);
MACRUM 0:615f90842ce8 2123 }
MACRUM 0:615f90842ce8 2124 else
MACRUM 0:615f90842ce8 2125 {
MACRUM 0:615f90842ce8 2126 rf_if_ack_pending_ctrl(0);
MACRUM 0:615f90842ce8 2127 }
MACRUM 0:615f90842ce8 2128 break;
MACRUM 0:615f90842ce8 2129 /*Return frame pending status*/
MACRUM 0:615f90842ce8 2130 case PHY_EXTENSION_READ_LAST_ACK_PENDING_STATUS:
MACRUM 0:615f90842ce8 2131 *data_ptr = rf_if_last_acked_pending();
MACRUM 0:615f90842ce8 2132 break;
MACRUM 0:615f90842ce8 2133 /*Set channel*/
MACRUM 0:615f90842ce8 2134 case PHY_EXTENSION_SET_CHANNEL:
MACRUM 0:615f90842ce8 2135 break;
MACRUM 0:615f90842ce8 2136 /*Read energy on the channel*/
MACRUM 0:615f90842ce8 2137 case PHY_EXTENSION_READ_CHANNEL_ENERGY:
MACRUM 0:615f90842ce8 2138 // End of the ED measurement is indicated by CCA_ED_DONE
MACRUM 0:615f90842ce8 2139 while (!(rf_if_read_register(IRQ_STATUS) & CCA_ED_DONE));
MACRUM 0:615f90842ce8 2140 // RF input power: RSSI base level + 1[db] * PHY_ED_LEVEL
MACRUM 0:615f90842ce8 2141 *data_ptr = rf_sensitivity + rf_if_read_register(PHY_ED_LEVEL);
MACRUM 0:615f90842ce8 2142 // Read status to clear pending flags.
MACRUM 0:615f90842ce8 2143 rf_if_read_register(IRQ_STATUS);
MACRUM 0:615f90842ce8 2144 // Next ED measurement is started, next PHY_EXTENSION_READ_CHANNEL_ENERGY call will return the result.
MACRUM 0:615f90842ce8 2145 rf_if_write_register(PHY_ED_LEVEL, 0xff);
MACRUM 0:615f90842ce8 2146 break;
MACRUM 0:615f90842ce8 2147 /*Read status of the link*/
MACRUM 0:615f90842ce8 2148 case PHY_EXTENSION_READ_LINK_STATUS:
MACRUM 0:615f90842ce8 2149 break;
MACRUM 0:615f90842ce8 2150 default:
MACRUM 0:615f90842ce8 2151 break;
MACRUM 0:615f90842ce8 2152 }
MACRUM 0:615f90842ce8 2153 return 0;
MACRUM 0:615f90842ce8 2154 }
MACRUM 0:615f90842ce8 2155
MACRUM 0:615f90842ce8 2156 /*
MACRUM 0:615f90842ce8 2157 * \brief Function sets the addresses to RF address filters.
MACRUM 0:615f90842ce8 2158 *
MACRUM 0:615f90842ce8 2159 * \param address_type Type of address
MACRUM 0:615f90842ce8 2160 * \param address_ptr Pointer to given address
MACRUM 0:615f90842ce8 2161 *
MACRUM 0:615f90842ce8 2162 * \return 0 Success
MACRUM 0:615f90842ce8 2163 */
MACRUM 0:615f90842ce8 2164 static int8_t rf_address_write(phy_address_type_e address_type, uint8_t *address_ptr)
MACRUM 0:615f90842ce8 2165 {
MACRUM 0:615f90842ce8 2166 int8_t ret_val = 0;
MACRUM 0:615f90842ce8 2167 switch (address_type)
MACRUM 0:615f90842ce8 2168 {
MACRUM 0:615f90842ce8 2169 /*Set 48-bit address*/
MACRUM 0:615f90842ce8 2170 case PHY_MAC_48BIT:
MACRUM 0:615f90842ce8 2171 break;
MACRUM 0:615f90842ce8 2172 /*Set 64-bit address*/
MACRUM 0:615f90842ce8 2173 case PHY_MAC_64BIT:
MACRUM 0:615f90842ce8 2174 rf_set_address(address_ptr);
MACRUM 0:615f90842ce8 2175 break;
MACRUM 0:615f90842ce8 2176 /*Set 16-bit address*/
MACRUM 0:615f90842ce8 2177 case PHY_MAC_16BIT:
MACRUM 0:615f90842ce8 2178 rf_set_short_adr(address_ptr);
MACRUM 0:615f90842ce8 2179 break;
MACRUM 0:615f90842ce8 2180 /*Set PAN Id*/
MACRUM 0:615f90842ce8 2181 case PHY_MAC_PANID:
MACRUM 0:615f90842ce8 2182 rf_set_pan_id(address_ptr);
MACRUM 0:615f90842ce8 2183 break;
MACRUM 0:615f90842ce8 2184 }
MACRUM 0:615f90842ce8 2185 return ret_val;
MACRUM 0:615f90842ce8 2186 }
MACRUM 0:615f90842ce8 2187
MACRUM 0:615f90842ce8 2188 /*
MACRUM 0:615f90842ce8 2189 * \brief Function initialises the ACK wait time and returns the used PHY mode.
MACRUM 0:615f90842ce8 2190 *
MACRUM 0:615f90842ce8 2191 * \param none
MACRUM 0:615f90842ce8 2192 *
MACRUM 0:615f90842ce8 2193 * \return tmp Used PHY mode
MACRUM 0:615f90842ce8 2194 */
MACRUM 0:615f90842ce8 2195 static void rf_init_phy_mode(void)
MACRUM 0:615f90842ce8 2196 {
MACRUM 0:615f90842ce8 2197 uint8_t tmp = 0;
MACRUM 0:615f90842ce8 2198 uint8_t part = rf_if_read_part_num();
MACRUM 0:615f90842ce8 2199 /*Read used PHY Mode*/
MACRUM 0:615f90842ce8 2200 tmp = rf_if_read_register(TRX_CTRL_2);
MACRUM 0:615f90842ce8 2201 /*Set ACK wait time for used data rate*/
MACRUM 0:615f90842ce8 2202 if(part == PART_AT86RF212)
MACRUM 0:615f90842ce8 2203 {
MACRUM 0:615f90842ce8 2204 if((tmp & 0x1f) == 0x00)
MACRUM 0:615f90842ce8 2205 {
MACRUM 0:615f90842ce8 2206 rf_sensitivity = -110;
MACRUM 0:615f90842ce8 2207 rf_ack_wait_duration = 938;
MACRUM 0:615f90842ce8 2208 tmp = BPSK_20;
MACRUM 0:615f90842ce8 2209 }
MACRUM 0:615f90842ce8 2210 else if((tmp & 0x1f) == 0x04)
MACRUM 0:615f90842ce8 2211 {
MACRUM 0:615f90842ce8 2212 rf_sensitivity = -108;
MACRUM 0:615f90842ce8 2213 rf_ack_wait_duration = 469;
MACRUM 0:615f90842ce8 2214 tmp = BPSK_40;
MACRUM 0:615f90842ce8 2215 }
MACRUM 0:615f90842ce8 2216 else if((tmp & 0x1f) == 0x14)
MACRUM 0:615f90842ce8 2217 {
MACRUM 0:615f90842ce8 2218 rf_sensitivity = -108;
MACRUM 0:615f90842ce8 2219 rf_ack_wait_duration = 469;
MACRUM 0:615f90842ce8 2220 tmp = BPSK_40_ALT;
MACRUM 0:615f90842ce8 2221 }
MACRUM 0:615f90842ce8 2222 else if((tmp & 0x1f) == 0x08)
MACRUM 0:615f90842ce8 2223 {
MACRUM 0:615f90842ce8 2224 rf_sensitivity = -101;
MACRUM 0:615f90842ce8 2225 rf_ack_wait_duration = 50;
MACRUM 0:615f90842ce8 2226 tmp = OQPSK_SIN_RC_100;
MACRUM 0:615f90842ce8 2227 }
MACRUM 0:615f90842ce8 2228 else if((tmp & 0x1f) == 0x09)
MACRUM 0:615f90842ce8 2229 {
MACRUM 0:615f90842ce8 2230 rf_sensitivity = -99;
MACRUM 0:615f90842ce8 2231 rf_ack_wait_duration = 30;
MACRUM 0:615f90842ce8 2232 tmp = OQPSK_SIN_RC_200;
MACRUM 0:615f90842ce8 2233 }
MACRUM 0:615f90842ce8 2234 else if((tmp & 0x1f) == 0x18)
MACRUM 0:615f90842ce8 2235 {
MACRUM 0:615f90842ce8 2236 rf_sensitivity = -102;
MACRUM 0:615f90842ce8 2237 rf_ack_wait_duration = 50;
MACRUM 0:615f90842ce8 2238 tmp = OQPSK_RC_100;
MACRUM 0:615f90842ce8 2239 }
MACRUM 0:615f90842ce8 2240 else if((tmp & 0x1f) == 0x19)
MACRUM 0:615f90842ce8 2241 {
MACRUM 0:615f90842ce8 2242 rf_sensitivity = -100;
MACRUM 0:615f90842ce8 2243 rf_ack_wait_duration = 30;
MACRUM 0:615f90842ce8 2244 tmp = OQPSK_RC_200;
MACRUM 0:615f90842ce8 2245 }
MACRUM 0:615f90842ce8 2246 else if((tmp & 0x1f) == 0x0c)
MACRUM 0:615f90842ce8 2247 {
MACRUM 0:615f90842ce8 2248 rf_sensitivity = -100;
MACRUM 0:615f90842ce8 2249 rf_ack_wait_duration = 20;
MACRUM 0:615f90842ce8 2250 tmp = OQPSK_SIN_250;
MACRUM 0:615f90842ce8 2251 }
MACRUM 0:615f90842ce8 2252 else if((tmp & 0x1f) == 0x0d)
MACRUM 0:615f90842ce8 2253 {
MACRUM 0:615f90842ce8 2254 rf_sensitivity = -98;
MACRUM 0:615f90842ce8 2255 rf_ack_wait_duration = 25;
MACRUM 0:615f90842ce8 2256 tmp = OQPSK_SIN_500;
MACRUM 0:615f90842ce8 2257 }
MACRUM 0:615f90842ce8 2258 else if((tmp & 0x1f) == 0x0f)
MACRUM 0:615f90842ce8 2259 {
MACRUM 0:615f90842ce8 2260 rf_sensitivity = -98;
MACRUM 0:615f90842ce8 2261 rf_ack_wait_duration = 25;
MACRUM 0:615f90842ce8 2262 tmp = OQPSK_SIN_500_ALT;
MACRUM 0:615f90842ce8 2263 }
MACRUM 0:615f90842ce8 2264 else if((tmp & 0x1f) == 0x1c)
MACRUM 0:615f90842ce8 2265 {
MACRUM 0:615f90842ce8 2266 rf_sensitivity = -101;
MACRUM 0:615f90842ce8 2267 rf_ack_wait_duration = 20;
MACRUM 0:615f90842ce8 2268 tmp = OQPSK_RC_250;
MACRUM 0:615f90842ce8 2269 }
MACRUM 0:615f90842ce8 2270 else if((tmp & 0x1f) == 0x1d)
MACRUM 0:615f90842ce8 2271 {
MACRUM 0:615f90842ce8 2272 rf_sensitivity = -99;
MACRUM 0:615f90842ce8 2273 rf_ack_wait_duration = 25;
MACRUM 0:615f90842ce8 2274 tmp = OQPSK_RC_500;
MACRUM 0:615f90842ce8 2275 }
MACRUM 0:615f90842ce8 2276 else if((tmp & 0x1f) == 0x1f)
MACRUM 0:615f90842ce8 2277 {
MACRUM 0:615f90842ce8 2278 rf_sensitivity = -99;
MACRUM 0:615f90842ce8 2279 rf_ack_wait_duration = 25;
MACRUM 0:615f90842ce8 2280 tmp = OQPSK_RC_500_ALT;
MACRUM 0:615f90842ce8 2281 }
MACRUM 0:615f90842ce8 2282 else if((tmp & 0x3f) == 0x2A)
MACRUM 0:615f90842ce8 2283 {
MACRUM 0:615f90842ce8 2284 rf_sensitivity = -91;
MACRUM 0:615f90842ce8 2285 rf_ack_wait_duration = 25;
MACRUM 0:615f90842ce8 2286 tmp = OQPSK_SIN_RC_400_SCR_ON;
MACRUM 0:615f90842ce8 2287 }
MACRUM 0:615f90842ce8 2288 else if((tmp & 0x3f) == 0x0A)
MACRUM 0:615f90842ce8 2289 {
MACRUM 0:615f90842ce8 2290 rf_sensitivity = -91;
MACRUM 0:615f90842ce8 2291 rf_ack_wait_duration = 25;
MACRUM 0:615f90842ce8 2292 tmp = OQPSK_SIN_RC_400_SCR_OFF;
MACRUM 0:615f90842ce8 2293 }
MACRUM 0:615f90842ce8 2294 else if((tmp & 0x3f) == 0x3A)
MACRUM 0:615f90842ce8 2295 {
MACRUM 0:615f90842ce8 2296 rf_sensitivity = -97;
MACRUM 0:615f90842ce8 2297 rf_ack_wait_duration = 25;
MACRUM 0:615f90842ce8 2298 tmp = OQPSK_RC_400_SCR_ON;
MACRUM 0:615f90842ce8 2299 }
MACRUM 0:615f90842ce8 2300 else if((tmp & 0x3f) == 0x1A)
MACRUM 0:615f90842ce8 2301 {
MACRUM 0:615f90842ce8 2302 rf_sensitivity = -97;
MACRUM 0:615f90842ce8 2303 rf_ack_wait_duration = 25;
MACRUM 0:615f90842ce8 2304 tmp = OQPSK_RC_400_SCR_OFF;
MACRUM 0:615f90842ce8 2305 }
MACRUM 0:615f90842ce8 2306 else if((tmp & 0x3f) == 0x2E)
MACRUM 0:615f90842ce8 2307 {
MACRUM 0:615f90842ce8 2308 rf_sensitivity = -93;
MACRUM 0:615f90842ce8 2309 rf_ack_wait_duration = 13;
MACRUM 0:615f90842ce8 2310 tmp = OQPSK_SIN_1000_SCR_ON;
MACRUM 0:615f90842ce8 2311 }
MACRUM 0:615f90842ce8 2312 else if((tmp & 0x3f) == 0x0E)
MACRUM 0:615f90842ce8 2313 {
MACRUM 0:615f90842ce8 2314 rf_sensitivity = -93;
MACRUM 0:615f90842ce8 2315 rf_ack_wait_duration = 13;
MACRUM 0:615f90842ce8 2316 tmp = OQPSK_SIN_1000_SCR_OFF;
MACRUM 0:615f90842ce8 2317 }
MACRUM 0:615f90842ce8 2318 else if((tmp & 0x3f) == 0x3E)
MACRUM 0:615f90842ce8 2319 {
MACRUM 0:615f90842ce8 2320 rf_sensitivity = -95;
MACRUM 0:615f90842ce8 2321 rf_ack_wait_duration = 13;
MACRUM 0:615f90842ce8 2322 tmp = OQPSK_RC_1000_SCR_ON;
MACRUM 0:615f90842ce8 2323 }
MACRUM 0:615f90842ce8 2324 else if((tmp & 0x3f) == 0x1E)
MACRUM 0:615f90842ce8 2325 {
MACRUM 0:615f90842ce8 2326 rf_sensitivity = -95;
MACRUM 0:615f90842ce8 2327 rf_ack_wait_duration = 13;
MACRUM 0:615f90842ce8 2328 tmp = OQPSK_RC_1000_SCR_OFF;
MACRUM 0:615f90842ce8 2329 }
MACRUM 0:615f90842ce8 2330 }
MACRUM 0:615f90842ce8 2331 else
MACRUM 0:615f90842ce8 2332 {
MACRUM 0:615f90842ce8 2333 rf_sensitivity = -101;
MACRUM 0:615f90842ce8 2334 rf_ack_wait_duration = 20;
MACRUM 0:615f90842ce8 2335 }
MACRUM 0:615f90842ce8 2336 /*Board design might reduces the sensitivity*/
MACRUM 0:615f90842ce8 2337 //rf_sensitivity += RF_SENSITIVITY_CALIBRATION;
MACRUM 0:615f90842ce8 2338 }
MACRUM 0:615f90842ce8 2339
MACRUM 0:615f90842ce8 2340
MACRUM 0:615f90842ce8 2341 static uint8_t rf_scale_lqi(int8_t rssi)
MACRUM 0:615f90842ce8 2342 {
MACRUM 0:615f90842ce8 2343 uint8_t scaled_lqi;
MACRUM 0:615f90842ce8 2344
MACRUM 0:615f90842ce8 2345 /*rssi < RF sensitivity*/
MACRUM 0:615f90842ce8 2346 if(rssi < rf_sensitivity)
MACRUM 0:615f90842ce8 2347 scaled_lqi=0;
MACRUM 0:615f90842ce8 2348 /*-91 dBm < rssi < -81 dBm (AT86RF233 XPro)*/
MACRUM 0:615f90842ce8 2349 /*-90 dBm < rssi < -80 dBm (AT86RF212B XPro)*/
MACRUM 0:615f90842ce8 2350 else if(rssi < (rf_sensitivity + 10))
MACRUM 0:615f90842ce8 2351 scaled_lqi=31;
MACRUM 0:615f90842ce8 2352 /*-81 dBm < rssi < -71 dBm (AT86RF233 XPro)*/
MACRUM 0:615f90842ce8 2353 /*-80 dBm < rssi < -70 dBm (AT86RF212B XPro)*/
MACRUM 0:615f90842ce8 2354 else if(rssi < (rf_sensitivity + 20))
MACRUM 0:615f90842ce8 2355 scaled_lqi=207;
MACRUM 0:615f90842ce8 2356 /*-71 dBm < rssi < -61 dBm (AT86RF233 XPro)*/
MACRUM 0:615f90842ce8 2357 /*-70 dBm < rssi < -60 dBm (AT86RF212B XPro)*/
MACRUM 0:615f90842ce8 2358 else if(rssi < (rf_sensitivity + 30))
MACRUM 0:615f90842ce8 2359 scaled_lqi=255;
MACRUM 0:615f90842ce8 2360 /*-61 dBm < rssi < -51 dBm (AT86RF233 XPro)*/
MACRUM 0:615f90842ce8 2361 /*-60 dBm < rssi < -50 dBm (AT86RF212B XPro)*/
MACRUM 0:615f90842ce8 2362 else if(rssi < (rf_sensitivity + 40))
MACRUM 0:615f90842ce8 2363 scaled_lqi=255;
MACRUM 0:615f90842ce8 2364 /*-51 dBm < rssi < -41 dBm (AT86RF233 XPro)*/
MACRUM 0:615f90842ce8 2365 /*-50 dBm < rssi < -40 dBm (AT86RF212B XPro)*/
MACRUM 0:615f90842ce8 2366 else if(rssi < (rf_sensitivity + 50))
MACRUM 0:615f90842ce8 2367 scaled_lqi=255;
MACRUM 0:615f90842ce8 2368 /*-41 dBm < rssi < -31 dBm (AT86RF233 XPro)*/
MACRUM 0:615f90842ce8 2369 /*-40 dBm < rssi < -30 dBm (AT86RF212B XPro)*/
MACRUM 0:615f90842ce8 2370 else if(rssi < (rf_sensitivity + 60))
MACRUM 0:615f90842ce8 2371 scaled_lqi=255;
MACRUM 0:615f90842ce8 2372 /*-31 dBm < rssi < -21 dBm (AT86RF233 XPro)*/
MACRUM 0:615f90842ce8 2373 /*-30 dBm < rssi < -20 dBm (AT86RF212B XPro)*/
MACRUM 0:615f90842ce8 2374 else if(rssi < (rf_sensitivity + 70))
MACRUM 0:615f90842ce8 2375 scaled_lqi=255;
MACRUM 0:615f90842ce8 2376 /*rssi > RF saturation*/
MACRUM 0:615f90842ce8 2377 else if(rssi > (rf_sensitivity + 80))
MACRUM 0:615f90842ce8 2378 scaled_lqi=111;
MACRUM 0:615f90842ce8 2379 /*-21 dBm < rssi < -11 dBm (AT86RF233 XPro)*/
MACRUM 0:615f90842ce8 2380 /*-20 dBm < rssi < -10 dBm (AT86RF212B XPro)*/
MACRUM 0:615f90842ce8 2381 else
MACRUM 0:615f90842ce8 2382 scaled_lqi=255;
MACRUM 0:615f90842ce8 2383
MACRUM 0:615f90842ce8 2384 return scaled_lqi;
MACRUM 0:615f90842ce8 2385 }
MACRUM 0:615f90842ce8 2386
MACRUM 0:615f90842ce8 2387 NanostackRfPhyAtmel::NanostackRfPhyAtmel(PinName spi_mosi, PinName spi_miso,
MACRUM 0:615f90842ce8 2388 PinName spi_sclk, PinName spi_cs, PinName spi_rst, PinName spi_slp, PinName spi_irq,
MACRUM 0:615f90842ce8 2389 PinName i2c_sda, PinName i2c_scl)
MACRUM 0:615f90842ce8 2390 : _mac(i2c_sda, i2c_scl), _mac_addr(), _rf(NULL), _mac_set(false),
MACRUM 0:615f90842ce8 2391 _spi_mosi(spi_mosi), _spi_miso(spi_miso), _spi_sclk(spi_sclk),
MACRUM 0:615f90842ce8 2392 _spi_cs(spi_cs), _spi_rst(spi_rst), _spi_slp(spi_slp), _spi_irq(spi_irq)
MACRUM 0:615f90842ce8 2393 {
MACRUM 0:615f90842ce8 2394 _rf = new RFBits(_spi_mosi, _spi_miso, _spi_sclk, _spi_cs, _spi_rst, _spi_slp, _spi_irq);
MACRUM 0:615f90842ce8 2395 }
MACRUM 0:615f90842ce8 2396
MACRUM 0:615f90842ce8 2397 NanostackRfPhyAtmel::~NanostackRfPhyAtmel()
MACRUM 0:615f90842ce8 2398 {
MACRUM 0:615f90842ce8 2399 delete _rf;
MACRUM 0:615f90842ce8 2400 }
MACRUM 0:615f90842ce8 2401
MACRUM 0:615f90842ce8 2402 int8_t NanostackRfPhyAtmel::rf_register()
MACRUM 0:615f90842ce8 2403 {
MACRUM 0:615f90842ce8 2404 if (NULL == _rf) {
MACRUM 0:615f90842ce8 2405 return -1;
MACRUM 0:615f90842ce8 2406 }
MACRUM 0:615f90842ce8 2407
MACRUM 0:615f90842ce8 2408 rf_if_lock();
MACRUM 0:615f90842ce8 2409
MACRUM 0:615f90842ce8 2410 if (rf != NULL) {
MACRUM 0:615f90842ce8 2411 rf_if_unlock();
MACRUM 0:615f90842ce8 2412 error("Multiple registrations of NanostackRfPhyAtmel not supported");
MACRUM 0:615f90842ce8 2413 return -1;
MACRUM 0:615f90842ce8 2414 }
MACRUM 0:615f90842ce8 2415
MACRUM 0:615f90842ce8 2416 // Read the mac address if it hasn't been set by a user
MACRUM 0:615f90842ce8 2417 rf = _rf;
MACRUM 0:615f90842ce8 2418 if (!_mac_set) {
MACRUM 0:615f90842ce8 2419 int ret = _mac.read_eui64((void*)_mac_addr);
MACRUM 0:615f90842ce8 2420 if (ret < 0) {
MACRUM 0:615f90842ce8 2421 rf = NULL;
MACRUM 0:615f90842ce8 2422 rf_if_unlock();
MACRUM 0:615f90842ce8 2423 return -1;
MACRUM 0:615f90842ce8 2424 }
MACRUM 0:615f90842ce8 2425 }
MACRUM 0:615f90842ce8 2426
MACRUM 0:615f90842ce8 2427 int8_t radio_id = rf_device_register(_mac_addr);
MACRUM 0:615f90842ce8 2428 if (radio_id < 0) {
MACRUM 0:615f90842ce8 2429 rf = NULL;
MACRUM 0:615f90842ce8 2430 }
MACRUM 0:615f90842ce8 2431
MACRUM 0:615f90842ce8 2432 rf_if_unlock();
MACRUM 0:615f90842ce8 2433 return radio_id;
MACRUM 0:615f90842ce8 2434 }
MACRUM 0:615f90842ce8 2435
MACRUM 0:615f90842ce8 2436 void NanostackRfPhyAtmel::rf_unregister()
MACRUM 0:615f90842ce8 2437 {
MACRUM 0:615f90842ce8 2438 rf_if_lock();
MACRUM 0:615f90842ce8 2439
MACRUM 0:615f90842ce8 2440 if (NULL == rf) {
MACRUM 0:615f90842ce8 2441 rf_if_unlock();
MACRUM 0:615f90842ce8 2442 return;
MACRUM 0:615f90842ce8 2443 }
MACRUM 0:615f90842ce8 2444
MACRUM 0:615f90842ce8 2445 rf_device_unregister();
MACRUM 0:615f90842ce8 2446 rf = NULL;
MACRUM 0:615f90842ce8 2447
MACRUM 0:615f90842ce8 2448 rf_if_unlock();
MACRUM 0:615f90842ce8 2449 }
MACRUM 0:615f90842ce8 2450
MACRUM 0:615f90842ce8 2451 void NanostackRfPhyAtmel::get_mac_address(uint8_t *mac)
MACRUM 0:615f90842ce8 2452 {
MACRUM 0:615f90842ce8 2453 rf_if_lock();
MACRUM 0:615f90842ce8 2454
MACRUM 0:615f90842ce8 2455 if (NULL == rf) {
MACRUM 0:615f90842ce8 2456 error("NanostackRfPhyAtmel Must be registered to read mac address");
MACRUM 0:615f90842ce8 2457 rf_if_unlock();
MACRUM 0:615f90842ce8 2458 return;
MACRUM 0:615f90842ce8 2459 }
MACRUM 0:615f90842ce8 2460 memcpy((void*)mac, (void*)_mac_addr, sizeof(_mac_addr));
MACRUM 0:615f90842ce8 2461
MACRUM 0:615f90842ce8 2462 rf_if_unlock();
MACRUM 0:615f90842ce8 2463 }
MACRUM 0:615f90842ce8 2464
MACRUM 0:615f90842ce8 2465 void NanostackRfPhyAtmel::set_mac_address(uint8_t *mac)
MACRUM 0:615f90842ce8 2466 {
MACRUM 0:615f90842ce8 2467 rf_if_lock();
MACRUM 0:615f90842ce8 2468
MACRUM 0:615f90842ce8 2469 if (NULL != rf) {
MACRUM 0:615f90842ce8 2470 error("NanostackRfPhyAtmel cannot change mac address when running");
MACRUM 0:615f90842ce8 2471 rf_if_unlock();
MACRUM 0:615f90842ce8 2472 return;
MACRUM 0:615f90842ce8 2473 }
MACRUM 0:615f90842ce8 2474 memcpy((void*)_mac_addr, (void*)mac, sizeof(_mac_addr));
MACRUM 0:615f90842ce8 2475 _mac_set = true;
MACRUM 0:615f90842ce8 2476
MACRUM 0:615f90842ce8 2477 rf_if_unlock();
MACRUM 0:615f90842ce8 2478 }
MACRUM 0:615f90842ce8 2479