LPC_USB_TypeDef Struct Reference
[LPC17xx_System]

Offset: 0x02C (R/W) Register

Definition at line 723 of file LPC17xx.h.

Offset: 0x028 (R/W) Register

Definition at line 722 of file LPC17xx.h.

Offset: 0x210 (R/W) USB Command Code Register

Definition at line 751 of file LPC17xx.h.

Offset: 0x214 (R/W) USB Command Data Register

Definition at line 752 of file LPC17xx.h.

Offset: 0x008 (R/W) Command / Status Register

Definition at line 714 of file LPC17xx.h.

Offset: 0x004 (R/W) Control Register

Definition at line 713 of file LPC17xx.h.

Offset: 0x024 (R/W) Register

Definition at line 721 of file LPC17xx.h.

Offset: 0x020 (R/W) Register

Definition at line 720 of file LPC17xx.h.

Offset: 0x228 (R/W) USB Control Register

Definition at line 758 of file LPC17xx.h.

Offset: 0x208 ( /W) USB Device Interrupt Clear Register

Definition at line 748 of file LPC17xx.h.

Offset: 0x204 (R/W) USB Device Interrupt Enable Register

Definition at line 747 of file LPC17xx.h.

Offset: 0x22C (R/W) USB Device Interrupt Priority Register

Definition at line 759 of file LPC17xx.h.

Offset: 0x20C ( /W) USB Device Interrupt Set Register

Definition at line 749 of file LPC17xx.h.

Offset: 0x200 (R/ ) USB Device Interrupt Status Register

Definition at line 746 of file LPC17xx.h.

Offset: 0x294 (R/W) USB DMA Interrupt Enable Register

Definition at line 780 of file LPC17xx.h.

Offset: 0x290 (R/ ) USB DMA Interrupt Status Register

Definition at line 779 of file LPC17xx.h.

Offset: 0x254 ( /W) USB DMA Request Clear Register

Definition at line 772 of file LPC17xx.h.

Offset: 0x258 ( /W) USB DMA Request Set Register

Definition at line 773 of file LPC17xx.h.

Offset: 0x250 (R/ ) USB DMA Request Status Register

Definition at line 771 of file LPC17xx.h.

Offset: 0x030 (R/ ) Register

Definition at line 724 of file LPC17xx.h.

Offset: 0x2A4 ( /W) USB End of Transfer Interrupt Clear Register

Definition at line 783 of file LPC17xx.h.

Offset: 0x2A8 ( /W) USB End of Transfer Interrupt Set Register

Definition at line 784 of file LPC17xx.h.

Offset: 0x2A0 (R/ ) USB End of Transfer Interrupt Status Register

Definition at line 782 of file LPC17xx.h.

Offset: 0x28C ( /W) USB EP DMA Disable Register

Definition at line 778 of file LPC17xx.h.

Offset: 0x288 ( /W) USB EP DMA Enable Register

Definition at line 777 of file LPC17xx.h.

Offset: 0x284 (R/ ) USB EP DMA Status Register

Definition at line 776 of file LPC17xx.h.

Offset: 0x248 ( /W) USB Endpoint Index Register

Definition at line 768 of file LPC17xx.h.

Offset: 0x238 ( /W) USB Endpoint Interrupt Clear Register

Definition at line 763 of file LPC17xx.h.

Offset: 0x234 (R/W) USB Endpoint Interrupt Enable Register

Definition at line 762 of file LPC17xx.h.

Offset: 0x240 ( /W) USB Endpoint Interrupt Priority Register

Definition at line 765 of file LPC17xx.h.

Offset: 0x23C ( /W) USB Endpoint Interrupt Set Register

Definition at line 764 of file LPC17xx.h.

Offset: 0x230 (R/ ) USB Endpoint Interrupt Status Register

Definition at line 761 of file LPC17xx.h.

Offset: 0x034 (R/W) Register

Definition at line 725 of file LPC17xx.h.

Offset: 0x03C (R/ ) Register

Definition at line 727 of file LPC17xx.h.

Offset: 0x038 (R/ ) Register

Definition at line 726 of file LPC17xx.h.

Offset: 0x018 (R/W) Host Controller communication Area Register

Definition at line 718 of file LPC17xx.h.

Offset: 0x30C (R/W) OTG I2C Clock High Register

Definition at line 799 of file LPC17xx.h.

Offset: 0x310 ( /W) OTG I2C Clock Low Register

Definition at line 800 of file LPC17xx.h.

Offset: 0x308 (R/W) OTG I2C Control Register

Definition at line 798 of file LPC17xx.h.

Offset: 0x300 (R/ ) OTG I2C Receive Register

Definition at line 794 of file LPC17xx.h.

Offset: 0x304 (R/ ) OTG I2C Status Register

Definition at line 797 of file LPC17xx.h.

Offset: 0x300 ( /W) OTG I2C Transmit Register

Definition at line 795 of file LPC17xx.h.

Offset: 0x10C ( /W) OTG Interrupt Clear Register

Definition at line 741 of file LPC17xx.h.

Offset: 0x104 (R/W) OTG Interrupt Enable Register

Definition at line 739 of file LPC17xx.h.

Offset: 0x014 (R/W) Interrupt Disable Register

Definition at line 717 of file LPC17xx.h.

Offset: 0x010 (R/W) Interrupt Enable Register

Definition at line 716 of file LPC17xx.h.

Offset: 0x00C (R/W) Interrupt Status Register

Definition at line 715 of file LPC17xx.h.

Offset: 0x108 ( /W) OTG Interrupt Set Register

Definition at line 740 of file LPC17xx.h.

Offset: 0x100 (R/ ) OTG Interrupt Status Register

Definition at line 738 of file LPC17xx.h.

Offset: 0x044 (R/W) Register

Definition at line 729 of file LPC17xx.h.

Offset: 0x24C (R/W) USB MaxPacketSize Register

Definition at line 769 of file LPC17xx.h.

Offset: 0x0FC (R/ ) Module ID / Version Reverence ID Register

Definition at line 736 of file LPC17xx.h.

Offset: 0x2B0 ( /W) USB New DD Request Interrupt Clear Register

Definition at line 786 of file LPC17xx.h.

Offset: 0x2B4 ( /W) USB New DD Request Interrupt Set Register

Definition at line 787 of file LPC17xx.h.

Offset: 0x2AC (R/ ) USB New DD Request Interrupt Status Register

Definition at line 785 of file LPC17xx.h.

Offset: 0xFF4 (R/W) USB clock controller Register

Definition at line 805 of file LPC17xx.h.

Offset: 0xFF8 (R/ ) USB clock status Register

Definition at line 809 of file LPC17xx.h.

Offset: 0x01C (R/ ) Register

Definition at line 719 of file LPC17xx.h.

Offset: 0x040 (R/W) Register

Definition at line 728 of file LPC17xx.h.

Offset: 0x244 (R/W) USB Realize Endpoint Register

Definition at line 767 of file LPC17xx.h.

Offset: 0x000 (R/ ) Revision Register

Definition at line 712 of file LPC17xx.h.

Offset: 0x048 (R/W) Register

Definition at line 730 of file LPC17xx.h.

Offset: 0x04C (R/W) Register

Definition at line 731 of file LPC17xx.h.

Offset: 0x054 (R/W) Register

Definition at line 733 of file LPC17xx.h.

Offset: 0x05C (R/W) Register

Definition at line 734 of file LPC17xx.h.

Offset: 0x050 (R/W) Register

Definition at line 732 of file LPC17xx.h.

Offset: 0x218 (R/ ) USB Receive Data Register

Definition at line 754 of file LPC17xx.h.

Offset: 0x220 (R/ ) USB Receive Packet Length Register

Definition at line 756 of file LPC17xx.h.

Offset: 0x110 (R/W) OTG Status and Control Register

Definition at line 742 of file LPC17xx.h.

Offset: 0x2BC ( /W) USB System Error Interrupt Clear Register

Definition at line 789 of file LPC17xx.h.

Offset: 0x2C0 ( /W) USB System Error Interrupt Set Register

Definition at line 790 of file LPC17xx.h.

Offset: 0x2B8 (R/ ) USB System Error Interrupt Status Register

Definition at line 788 of file LPC17xx.h.

Offset: 0x114 (R/W) OTG Timer Register

Definition at line 743 of file LPC17xx.h.

Offset: 0x21C ( /W) USB Transmit Data Register

Definition at line 755 of file LPC17xx.h.

Offset: 0x224 ( /W) USB Transmit Packet Length Register

Definition at line 757 of file LPC17xx.h.

Offset: 0x280 (R/W) USB UDCA Head Register

Definition at line 775 of file LPC17xx.h.

Offset: 0xFF4 (R/W) OTG clock controller Register

Definition at line 804 of file LPC17xx.h.

Offset: 0xFF8 (R/ ) OTG clock status Register

Definition at line 808 of file LPC17xx.h.