n
Fork of
LG
by igor Apu
« Back to documentation index
LPC_UART_TypeDef Struct Reference
Universal Asynchronous Receiver Transmitter (UART) register structure definition.
More...
#include <LPC17xx.h >
__IO uint32_t LCR __I uint32_t LSR __IO uint32_t SCR __IO uint32_t ACR __IO uint32_t ICR __IO uint32_t FDR __IO uint32_t TER __I uint32_t RBR __O uint32_t THR __IO uint32_t DLL __IO uint32_t DLM __IO uint32_t IER __I uint32_t IIR __O uint32_t FCR
Detailed Description
Universal Asynchronous Receiver Transmitter (UART) register structure definition.
Definition at line 343 of file LPC17xx.h .
Field Documentation
Offset: 0x020 Auto-baud Control Register (R/W)
Definition at line 363 of file LPC17xx.h .
Offset: 0x000 Divisor Latch LSB (R/W)
Definition at line 348 of file LPC17xx.h .
Offset: 0x004 Divisor Latch MSB (R/W)
Definition at line 351 of file LPC17xx.h .
Offset: 0x008 FIFO Control Register ( /W)
Definition at line 356 of file LPC17xx.h .
Offset: 0x028 Fractional Divider Register (R/W)
Definition at line 365 of file LPC17xx.h .
Offset: 0x024 IrDA Control Register (R/W)
Definition at line 364 of file LPC17xx.h .
Offset: 0x004 Interrupt Enable Register (R/W)
Definition at line 352 of file LPC17xx.h .
Offset: 0x008 Interrupt ID Register (R/ )
Definition at line 355 of file LPC17xx.h .
Offset: 0x00C Line Control Register (R/W)
Definition at line 358 of file LPC17xx.h .
Offset: 0x014 Line Status Register (R/ )
Definition at line 360 of file LPC17xx.h .
Offset: 0x000 Receiver Buffer Register (R/ )
Definition at line 346 of file LPC17xx.h .
Offset: 0x01C Scratch Pad Register (R/W)
Definition at line 362 of file LPC17xx.h .
Offset: 0x030 Transmit Enable Register (R/W)
Definition at line 367 of file LPC17xx.h .
Offset: 0x000 Transmit Holding Register ( /W)
Definition at line 347 of file LPC17xx.h .
Dmitry Kovalev
1.7.2