Johannes Stratmann / mbed-dev

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targets/hal/TARGET_Silicon_Labs/TARGET_EFM32/emlib/inc/em_gpio.h@50:a417edff4437, 2016-01-15 (annotated)

Committer:
mbed_official
Date:
Fri Jan 15 07:45:16 2016 +0000
Revision:
50:a417edff4437
Parent:
0:9b334a45a8ff
Child:
144:ef7eb2e8f9f7
Synchronized with git revision 6010f32619bfcbb01cc73747d4ff9040863482d9



Full URL: https://github.com/mbedmicro/mbed/commit/6010f32619bfcbb01cc73747d4ff9040863482d9/



Remove doubling of buffer size in realiseEndpoint()

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /***************************************************************************//**
bogdanm 0:9b334a45a8ff 2 * @file em_gpio.h
bogdanm 0:9b334a45a8ff 3 * @brief General Purpose IO (GPIO) peripheral API
mbed_official 50:a417edff4437 4 * @version 4.2.1
bogdanm 0:9b334a45a8ff 5 *******************************************************************************
bogdanm 0:9b334a45a8ff 6 * @section License
mbed_official 50:a417edff4437 7 * <b>(C) Copyright 2015 Silicon Labs, http://www.silabs.com</b>
bogdanm 0:9b334a45a8ff 8 *******************************************************************************
bogdanm 0:9b334a45a8ff 9 *
bogdanm 0:9b334a45a8ff 10 * Permission is granted to anyone to use this software for any purpose,
bogdanm 0:9b334a45a8ff 11 * including commercial applications, and to alter it and redistribute it
bogdanm 0:9b334a45a8ff 12 * freely, subject to the following restrictions:
bogdanm 0:9b334a45a8ff 13 *
bogdanm 0:9b334a45a8ff 14 * 1. The origin of this software must not be misrepresented; you must not
bogdanm 0:9b334a45a8ff 15 * claim that you wrote the original software.
bogdanm 0:9b334a45a8ff 16 * 2. Altered source versions must be plainly marked as such, and must not be
bogdanm 0:9b334a45a8ff 17 * misrepresented as being the original software.
bogdanm 0:9b334a45a8ff 18 * 3. This notice may not be removed or altered from any source distribution.
bogdanm 0:9b334a45a8ff 19 *
bogdanm 0:9b334a45a8ff 20 * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Labs has no
bogdanm 0:9b334a45a8ff 21 * obligation to support this Software. Silicon Labs is providing the
bogdanm 0:9b334a45a8ff 22 * Software "AS IS", with no express or implied warranties of any kind,
bogdanm 0:9b334a45a8ff 23 * including, but not limited to, any implied warranties of merchantability
bogdanm 0:9b334a45a8ff 24 * or fitness for any particular purpose or warranties against infringement
bogdanm 0:9b334a45a8ff 25 * of any proprietary rights of a third party.
bogdanm 0:9b334a45a8ff 26 *
bogdanm 0:9b334a45a8ff 27 * Silicon Labs will not be liable for any consequential, incidental, or
bogdanm 0:9b334a45a8ff 28 * special damages, or any other relief, or for any claim by any third party,
bogdanm 0:9b334a45a8ff 29 * arising from your use of this Software.
bogdanm 0:9b334a45a8ff 30 *
bogdanm 0:9b334a45a8ff 31 ******************************************************************************/
bogdanm 0:9b334a45a8ff 32
bogdanm 0:9b334a45a8ff 33
mbed_official 50:a417edff4437 34 #ifndef __SILICON_LABS_EM_GPIO_H__
mbed_official 50:a417edff4437 35 #define __SILICON_LABS_EM_GPIO_H__
bogdanm 0:9b334a45a8ff 36
bogdanm 0:9b334a45a8ff 37 #include "em_device.h"
bogdanm 0:9b334a45a8ff 38 #if defined(GPIO_COUNT) && (GPIO_COUNT > 0)
bogdanm 0:9b334a45a8ff 39
bogdanm 0:9b334a45a8ff 40 #include <stdbool.h>
mbed_official 50:a417edff4437 41 #include "em_bus.h"
bogdanm 0:9b334a45a8ff 42 #include "em_assert.h"
bogdanm 0:9b334a45a8ff 43
bogdanm 0:9b334a45a8ff 44 #ifdef __cplusplus
bogdanm 0:9b334a45a8ff 45 extern "C" {
bogdanm 0:9b334a45a8ff 46 #endif
bogdanm 0:9b334a45a8ff 47
bogdanm 0:9b334a45a8ff 48 /***************************************************************************//**
bogdanm 0:9b334a45a8ff 49 * @addtogroup EM_Library
bogdanm 0:9b334a45a8ff 50 * @{
bogdanm 0:9b334a45a8ff 51 ******************************************************************************/
bogdanm 0:9b334a45a8ff 52
bogdanm 0:9b334a45a8ff 53 /***************************************************************************//**
bogdanm 0:9b334a45a8ff 54 * @addtogroup GPIO
bogdanm 0:9b334a45a8ff 55 * @{
bogdanm 0:9b334a45a8ff 56 ******************************************************************************/
bogdanm 0:9b334a45a8ff 57
bogdanm 0:9b334a45a8ff 58 /*******************************************************************************
mbed_official 50:a417edff4437 59 ******************************* DEFINES ***********************************
mbed_official 50:a417edff4437 60 ******************************************************************************/
mbed_official 50:a417edff4437 61
mbed_official 50:a417edff4437 62 /** @cond DO_NOT_INCLUDE_WITH_DOXYGEN */
mbed_official 50:a417edff4437 63 #if defined( _EFM32_TINY_FAMILY ) || defined( _EFM32_ZERO_FAMILY )
mbed_official 50:a417edff4437 64
mbed_official 50:a417edff4437 65 #define _GPIO_PORT_A_PIN_COUNT 14
mbed_official 50:a417edff4437 66 #define _GPIO_PORT_B_PIN_COUNT 10
mbed_official 50:a417edff4437 67 #define _GPIO_PORT_C_PIN_COUNT 16
mbed_official 50:a417edff4437 68 #define _GPIO_PORT_D_PIN_COUNT 9
mbed_official 50:a417edff4437 69 #define _GPIO_PORT_E_PIN_COUNT 12
mbed_official 50:a417edff4437 70 #define _GPIO_PORT_F_PIN_COUNT 6
mbed_official 50:a417edff4437 71
mbed_official 50:a417edff4437 72 #define _GPIO_PORT_A_PIN_MASK 0xF77F
mbed_official 50:a417edff4437 73 #define _GPIO_PORT_B_PIN_MASK 0x79F8
mbed_official 50:a417edff4437 74 #define _GPIO_PORT_C_PIN_MASK 0xFFFF
mbed_official 50:a417edff4437 75 #define _GPIO_PORT_D_PIN_MASK 0x01FF
mbed_official 50:a417edff4437 76 #define _GPIO_PORT_E_PIN_MASK 0xFFF0
mbed_official 50:a417edff4437 77 #define _GPIO_PORT_F_PIN_MASK 0x003F
mbed_official 50:a417edff4437 78
mbed_official 50:a417edff4437 79 #elif defined( _EFM32_HAPPY_FAMILY )
mbed_official 50:a417edff4437 80
mbed_official 50:a417edff4437 81 #define _GPIO_PORT_A_PIN_COUNT 6
mbed_official 50:a417edff4437 82 #define _GPIO_PORT_B_PIN_COUNT 5
mbed_official 50:a417edff4437 83 #define _GPIO_PORT_C_PIN_COUNT 12
mbed_official 50:a417edff4437 84 #define _GPIO_PORT_D_PIN_COUNT 4
mbed_official 50:a417edff4437 85 #define _GPIO_PORT_E_PIN_COUNT 4
mbed_official 50:a417edff4437 86 #define _GPIO_PORT_F_PIN_COUNT 6
mbed_official 50:a417edff4437 87
mbed_official 50:a417edff4437 88 #define _GPIO_PORT_A_PIN_MASK 0x0707
mbed_official 50:a417edff4437 89 #define _GPIO_PORT_B_PIN_MASK 0x6980
mbed_official 50:a417edff4437 90 #define _GPIO_PORT_C_PIN_MASK 0xEF1F
mbed_official 50:a417edff4437 91 #define _GPIO_PORT_D_PIN_MASK 0x00F0
mbed_official 50:a417edff4437 92 #define _GPIO_PORT_E_PIN_MASK 0x3C00
mbed_official 50:a417edff4437 93 #define _GPIO_PORT_F_PIN_MASK 0x003F
mbed_official 50:a417edff4437 94
mbed_official 50:a417edff4437 95 #elif defined( _EFM32_GIANT_FAMILY ) \
mbed_official 50:a417edff4437 96 || defined( _EFM32_WONDER_FAMILY )
mbed_official 50:a417edff4437 97
mbed_official 50:a417edff4437 98 #define _GPIO_PORT_A_PIN_COUNT 16
mbed_official 50:a417edff4437 99 #define _GPIO_PORT_B_PIN_COUNT 16
mbed_official 50:a417edff4437 100 #define _GPIO_PORT_C_PIN_COUNT 16
mbed_official 50:a417edff4437 101 #define _GPIO_PORT_D_PIN_COUNT 16
mbed_official 50:a417edff4437 102 #define _GPIO_PORT_E_PIN_COUNT 16
mbed_official 50:a417edff4437 103 #define _GPIO_PORT_F_PIN_COUNT 13
mbed_official 50:a417edff4437 104
mbed_official 50:a417edff4437 105 #define _GPIO_PORT_A_PIN_MASK 0xFFFF
mbed_official 50:a417edff4437 106 #define _GPIO_PORT_B_PIN_MASK 0xFFFF
mbed_official 50:a417edff4437 107 #define _GPIO_PORT_C_PIN_MASK 0xFFFF
mbed_official 50:a417edff4437 108 #define _GPIO_PORT_D_PIN_MASK 0xFFFF
mbed_official 50:a417edff4437 109 #define _GPIO_PORT_E_PIN_MASK 0xFFFF
mbed_official 50:a417edff4437 110 #define _GPIO_PORT_F_PIN_MASK 0x1FFF
mbed_official 50:a417edff4437 111
mbed_official 50:a417edff4437 112 #elif defined( _EFM32_GECKO_FAMILY )
mbed_official 50:a417edff4437 113
mbed_official 50:a417edff4437 114 #define _GPIO_PORT_A_PIN_COUNT 16
mbed_official 50:a417edff4437 115 #define _GPIO_PORT_B_PIN_COUNT 16
mbed_official 50:a417edff4437 116 #define _GPIO_PORT_C_PIN_COUNT 16
mbed_official 50:a417edff4437 117 #define _GPIO_PORT_D_PIN_COUNT 16
mbed_official 50:a417edff4437 118 #define _GPIO_PORT_E_PIN_COUNT 16
mbed_official 50:a417edff4437 119 #define _GPIO_PORT_F_PIN_COUNT 10
mbed_official 50:a417edff4437 120
mbed_official 50:a417edff4437 121 #define _GPIO_PORT_A_PIN_MASK 0xFFFF
mbed_official 50:a417edff4437 122 #define _GPIO_PORT_B_PIN_MASK 0xFFFF
mbed_official 50:a417edff4437 123 #define _GPIO_PORT_C_PIN_MASK 0xFFFF
mbed_official 50:a417edff4437 124 #define _GPIO_PORT_D_PIN_MASK 0xFFFF
mbed_official 50:a417edff4437 125 #define _GPIO_PORT_E_PIN_MASK 0xFFFF
mbed_official 50:a417edff4437 126 #define _GPIO_PORT_F_PIN_MASK 0x03FF
mbed_official 50:a417edff4437 127
mbed_official 50:a417edff4437 128 #elif defined( _EFR32_MIGHTY_FAMILY ) \
mbed_official 50:a417edff4437 129 || defined( _EFR32_BLUE_FAMILY ) \
mbed_official 50:a417edff4437 130 || defined( _EFR32_FLEX_FAMILY ) \
mbed_official 50:a417edff4437 131 || defined( _EFR32_ZAPPY_FAMILY )
mbed_official 50:a417edff4437 132
mbed_official 50:a417edff4437 133 #define _GPIO_PORT_A_PIN_COUNT 6
mbed_official 50:a417edff4437 134 #define _GPIO_PORT_B_PIN_COUNT 5
mbed_official 50:a417edff4437 135 #define _GPIO_PORT_C_PIN_COUNT 6
mbed_official 50:a417edff4437 136 #define _GPIO_PORT_D_PIN_COUNT 3
mbed_official 50:a417edff4437 137 #define _GPIO_PORT_E_PIN_COUNT 0
mbed_official 50:a417edff4437 138 #define _GPIO_PORT_F_PIN_COUNT 8
mbed_official 50:a417edff4437 139
mbed_official 50:a417edff4437 140 #define _GPIO_PORT_A_PIN_MASK 0x003F
mbed_official 50:a417edff4437 141 #define _GPIO_PORT_B_PIN_MASK 0xF800
mbed_official 50:a417edff4437 142 #define _GPIO_PORT_C_PIN_MASK 0x0FC0
mbed_official 50:a417edff4437 143 #define _GPIO_PORT_D_PIN_MASK 0xE000
mbed_official 50:a417edff4437 144 #define _GPIO_PORT_E_PIN_MASK 0x0000
mbed_official 50:a417edff4437 145 #define _GPIO_PORT_F_PIN_MASK 0x00FF
mbed_official 50:a417edff4437 146
mbed_official 50:a417edff4437 147 #elif defined( _EFM32_PEARL_FAMILY ) \
mbed_official 50:a417edff4437 148 || defined( _EFM32_JADE_FAMILY )
mbed_official 50:a417edff4437 149
mbed_official 50:a417edff4437 150 #define _GPIO_PORT_A_PIN_COUNT 6
mbed_official 50:a417edff4437 151 #define _GPIO_PORT_B_PIN_COUNT 5
mbed_official 50:a417edff4437 152 #define _GPIO_PORT_C_PIN_COUNT 6
mbed_official 50:a417edff4437 153 #define _GPIO_PORT_D_PIN_COUNT 7
mbed_official 50:a417edff4437 154 #define _GPIO_PORT_E_PIN_COUNT 0
mbed_official 50:a417edff4437 155 #define _GPIO_PORT_F_PIN_COUNT 8
mbed_official 50:a417edff4437 156
mbed_official 50:a417edff4437 157 #define _GPIO_PORT_A_PIN_MASK 0x003F
mbed_official 50:a417edff4437 158 #define _GPIO_PORT_B_PIN_MASK 0xF800
mbed_official 50:a417edff4437 159 #define _GPIO_PORT_C_PIN_MASK 0x0FC0
mbed_official 50:a417edff4437 160 #define _GPIO_PORT_D_PIN_MASK 0xFE00
mbed_official 50:a417edff4437 161 #define _GPIO_PORT_E_PIN_MASK 0x0000
mbed_official 50:a417edff4437 162 #define _GPIO_PORT_F_PIN_MASK 0x00FF
mbed_official 50:a417edff4437 163
mbed_official 50:a417edff4437 164 #else
mbed_official 50:a417edff4437 165 #warning "Port and pin masks are not defined for this family."
mbed_official 50:a417edff4437 166 #endif
mbed_official 50:a417edff4437 167
mbed_official 50:a417edff4437 168 #if defined( _GPIO_PORT_G_PIN_COUNT ) && defined( _GPIO_PORT_H_PIN_COUNT )
mbed_official 50:a417edff4437 169 #define _GPIO_PORT_SIZE(port) ( \
mbed_official 50:a417edff4437 170 (port) == 0 ? _GPIO_PORT_A_PIN_COUNT : \
mbed_official 50:a417edff4437 171 (port) == 1 ? _GPIO_PORT_B_PIN_COUNT : \
mbed_official 50:a417edff4437 172 (port) == 2 ? _GPIO_PORT_C_PIN_COUNT : \
mbed_official 50:a417edff4437 173 (port) == 3 ? _GPIO_PORT_D_PIN_COUNT : \
mbed_official 50:a417edff4437 174 (port) == 4 ? _GPIO_PORT_E_PIN_COUNT : \
mbed_official 50:a417edff4437 175 (port) == 5 ? _GPIO_PORT_F_PIN_COUNT : \
mbed_official 50:a417edff4437 176 (port) == 6 ? _GPIO_PORT_G_PIN_COUNT : \
mbed_official 50:a417edff4437 177 (port) == 7 ? _GPIO_PORT_H_PIN_COUNT : \
mbed_official 50:a417edff4437 178 0)
mbed_official 50:a417edff4437 179 #else
mbed_official 50:a417edff4437 180 #define _GPIO_PORT_SIZE(port) ( \
mbed_official 50:a417edff4437 181 (port) == 0 ? _GPIO_PORT_A_PIN_COUNT : \
mbed_official 50:a417edff4437 182 (port) == 1 ? _GPIO_PORT_B_PIN_COUNT : \
mbed_official 50:a417edff4437 183 (port) == 2 ? _GPIO_PORT_C_PIN_COUNT : \
mbed_official 50:a417edff4437 184 (port) == 3 ? _GPIO_PORT_D_PIN_COUNT : \
mbed_official 50:a417edff4437 185 (port) == 4 ? _GPIO_PORT_E_PIN_COUNT : \
mbed_official 50:a417edff4437 186 (port) == 5 ? _GPIO_PORT_F_PIN_COUNT : \
mbed_official 50:a417edff4437 187 0)
mbed_official 50:a417edff4437 188 #endif
mbed_official 50:a417edff4437 189
mbed_official 50:a417edff4437 190 #if defined( _GPIO_PORT_G_PIN_MASK ) && defined( _GPIO_PORT_H_PIN_MASK )
mbed_official 50:a417edff4437 191 #define _GPIO_PORT_MASK(port) ( \
mbed_official 50:a417edff4437 192 (port) == 0 ? _GPIO_PORT_A_PIN_MASK : \
mbed_official 50:a417edff4437 193 (port) == 1 ? _GPIO_PORT_B_PIN_MASK : \
mbed_official 50:a417edff4437 194 (port) == 2 ? _GPIO_PORT_C_PIN_MASK : \
mbed_official 50:a417edff4437 195 (port) == 3 ? _GPIO_PORT_D_PIN_MASK : \
mbed_official 50:a417edff4437 196 (port) == 4 ? _GPIO_PORT_E_PIN_MASK : \
mbed_official 50:a417edff4437 197 (port) == 5 ? _GPIO_PORT_F_PIN_MASK : \
mbed_official 50:a417edff4437 198 (port) == 6 ? _GPIO_PORT_G_PIN_MASK : \
mbed_official 50:a417edff4437 199 (port) == 7 ? _GPIO_PORT_H_PIN_MASK : \
mbed_official 50:a417edff4437 200 0)
mbed_official 50:a417edff4437 201 #else
mbed_official 50:a417edff4437 202 #define _GPIO_PORT_MASK(port) ( \
mbed_official 50:a417edff4437 203 (port) == 0 ? _GPIO_PORT_A_PIN_MASK : \
mbed_official 50:a417edff4437 204 (port) == 1 ? _GPIO_PORT_B_PIN_MASK : \
mbed_official 50:a417edff4437 205 (port) == 2 ? _GPIO_PORT_C_PIN_MASK : \
mbed_official 50:a417edff4437 206 (port) == 3 ? _GPIO_PORT_D_PIN_MASK : \
mbed_official 50:a417edff4437 207 (port) == 4 ? _GPIO_PORT_E_PIN_MASK : \
mbed_official 50:a417edff4437 208 (port) == 5 ? _GPIO_PORT_F_PIN_MASK : \
mbed_official 50:a417edff4437 209 0)
mbed_official 50:a417edff4437 210 #endif
mbed_official 50:a417edff4437 211
mbed_official 50:a417edff4437 212 /** Validation of port and pin */
mbed_official 50:a417edff4437 213 #define GPIO_PORT_VALID(port) ( _GPIO_PORT_MASK(port) )
mbed_official 50:a417edff4437 214 #define GPIO_PORT_PIN_VALID(port, pin) ((( _GPIO_PORT_MASK(port)) >> (pin)) & 0x1 )
mbed_official 50:a417edff4437 215
mbed_official 50:a417edff4437 216 /** Highest GPIO pin number */
mbed_official 50:a417edff4437 217 #define GPIO_PIN_MAX 15
mbed_official 50:a417edff4437 218
mbed_official 50:a417edff4437 219 /** Highest GPIO port number */
mbed_official 50:a417edff4437 220 #if defined( _GPIO_PORT_G_PIN_COUNT ) && defined( _GPIO_PORT_H_PIN_COUNT )
mbed_official 50:a417edff4437 221 #define GPIO_PORT_MAX 7
mbed_official 50:a417edff4437 222 #else
mbed_official 50:a417edff4437 223 #define GPIO_PORT_MAX 5
mbed_official 50:a417edff4437 224 #endif
mbed_official 50:a417edff4437 225 /** @endcond */
mbed_official 50:a417edff4437 226
mbed_official 50:a417edff4437 227 /*******************************************************************************
bogdanm 0:9b334a45a8ff 228 ******************************** ENUMS ************************************
bogdanm 0:9b334a45a8ff 229 ******************************************************************************/
bogdanm 0:9b334a45a8ff 230
mbed_official 50:a417edff4437 231 /** GPIO ports ids. */
bogdanm 0:9b334a45a8ff 232 typedef enum
bogdanm 0:9b334a45a8ff 233 {
mbed_official 50:a417edff4437 234 #if ( _GPIO_PORT_A_PIN_COUNT > 0 )
mbed_official 50:a417edff4437 235 gpioPortA = 0,
mbed_official 50:a417edff4437 236 #endif
mbed_official 50:a417edff4437 237 #if ( _GPIO_PORT_B_PIN_COUNT > 0 )
mbed_official 50:a417edff4437 238 gpioPortB = 1,
mbed_official 50:a417edff4437 239 #endif
mbed_official 50:a417edff4437 240 #if ( _GPIO_PORT_C_PIN_COUNT > 0 )
mbed_official 50:a417edff4437 241 gpioPortC = 2,
mbed_official 50:a417edff4437 242 #endif
mbed_official 50:a417edff4437 243 #if ( _GPIO_PORT_D_PIN_COUNT > 0 )
mbed_official 50:a417edff4437 244 gpioPortD = 3,
mbed_official 50:a417edff4437 245 #endif
mbed_official 50:a417edff4437 246 #if ( _GPIO_PORT_E_PIN_COUNT > 0 )
mbed_official 50:a417edff4437 247 gpioPortE = 4,
mbed_official 50:a417edff4437 248 #endif
mbed_official 50:a417edff4437 249 #if ( _GPIO_PORT_F_PIN_COUNT > 0 )
mbed_official 50:a417edff4437 250 gpioPortF = 5
mbed_official 50:a417edff4437 251 #endif
mbed_official 50:a417edff4437 252 #if defined( _GPIO_PORT_G_PIN_COUNT ) && ( _GPIO_PORT_G_PIN_COUNT > 0 )
mbed_official 50:a417edff4437 253 gpioPortG = 6
mbed_official 50:a417edff4437 254 #endif
mbed_official 50:a417edff4437 255 #if defined( _GPIO_PORT_H_PIN_COUNT ) && ( _GPIO_PORT_H_PIN_COUNT > 0 )
mbed_official 50:a417edff4437 256 gpioPortH = 7
mbed_official 50:a417edff4437 257 #endif
bogdanm 0:9b334a45a8ff 258 } GPIO_Port_TypeDef;
bogdanm 0:9b334a45a8ff 259
mbed_official 50:a417edff4437 260 #if defined( _GPIO_P_CTRL_DRIVEMODE_MASK )
bogdanm 0:9b334a45a8ff 261 /** GPIO drive mode. */
bogdanm 0:9b334a45a8ff 262 typedef enum
bogdanm 0:9b334a45a8ff 263 {
bogdanm 0:9b334a45a8ff 264 /** Default 6mA */
bogdanm 0:9b334a45a8ff 265 gpioDriveModeStandard = GPIO_P_CTRL_DRIVEMODE_STANDARD,
bogdanm 0:9b334a45a8ff 266 /** 0.5 mA */
bogdanm 0:9b334a45a8ff 267 gpioDriveModeLowest = GPIO_P_CTRL_DRIVEMODE_LOWEST,
bogdanm 0:9b334a45a8ff 268 /** 20 mA */
bogdanm 0:9b334a45a8ff 269 gpioDriveModeHigh = GPIO_P_CTRL_DRIVEMODE_HIGH,
bogdanm 0:9b334a45a8ff 270 /** 2 mA */
bogdanm 0:9b334a45a8ff 271 gpioDriveModeLow = GPIO_P_CTRL_DRIVEMODE_LOW
bogdanm 0:9b334a45a8ff 272 } GPIO_DriveMode_TypeDef;
mbed_official 50:a417edff4437 273 #endif
bogdanm 0:9b334a45a8ff 274
mbed_official 50:a417edff4437 275 #if defined( _GPIO_P_CTRL_DRIVESTRENGTH_MASK ) && defined( _GPIO_P_CTRL_DRIVESTRENGTHALT_MASK )
mbed_official 50:a417edff4437 276 /** GPIO drive strength. */
mbed_official 50:a417edff4437 277 typedef enum
mbed_official 50:a417edff4437 278 {
mbed_official 50:a417edff4437 279 /** GPIO weak 1mA and alternate function weak 1mA */
mbed_official 50:a417edff4437 280 gpioDriveStrengthWeakAlternateWeak = GPIO_P_CTRL_DRIVESTRENGTH_WEAK | GPIO_P_CTRL_DRIVESTRENGTHALT_WEAK,
mbed_official 50:a417edff4437 281
mbed_official 50:a417edff4437 282 /** GPIO weak 1mA and alternate function strong 10mA */
mbed_official 50:a417edff4437 283 gpioDriveStrengthWeakAlternateStrong = GPIO_P_CTRL_DRIVESTRENGTH_WEAK | GPIO_P_CTRL_DRIVESTRENGTHALT_STRONG,
mbed_official 50:a417edff4437 284
mbed_official 50:a417edff4437 285 /** GPIO strong 10mA and alternate function weak 1mA */
mbed_official 50:a417edff4437 286 gpioDriveStrengthStrongAlternateWeak = GPIO_P_CTRL_DRIVESTRENGTH_STRONG | GPIO_P_CTRL_DRIVESTRENGTHALT_WEAK,
mbed_official 50:a417edff4437 287
mbed_official 50:a417edff4437 288 /** GPIO strong 10mA and alternate function strong 10mA */
mbed_official 50:a417edff4437 289 gpioDriveStrengthStrongAlternateStrong = GPIO_P_CTRL_DRIVESTRENGTH_STRONG | GPIO_P_CTRL_DRIVESTRENGTHALT_STRONG,
mbed_official 50:a417edff4437 290 } GPIO_DriveStrength_TypeDef;
mbed_official 50:a417edff4437 291 /* For legacy support */
mbed_official 50:a417edff4437 292 #define gpioDriveStrengthStrong gpioDriveStrengthStrongAlternateStrong
mbed_official 50:a417edff4437 293 #define gpioDriveStrengthWeak gpioDriveStrengthWeakAlternateWeak
mbed_official 50:a417edff4437 294 #endif
mbed_official 50:a417edff4437 295
mbed_official 50:a417edff4437 296 /** Pin mode. For more details on each mode, please refer to the
bogdanm 0:9b334a45a8ff 297 * reference manual. */
bogdanm 0:9b334a45a8ff 298 typedef enum
bogdanm 0:9b334a45a8ff 299 {
bogdanm 0:9b334a45a8ff 300 /** Input disabled. Pullup if DOUT is set. */
bogdanm 0:9b334a45a8ff 301 gpioModeDisabled = _GPIO_P_MODEL_MODE0_DISABLED,
bogdanm 0:9b334a45a8ff 302 /** Input enabled. Filter if DOUT is set */
bogdanm 0:9b334a45a8ff 303 gpioModeInput = _GPIO_P_MODEL_MODE0_INPUT,
bogdanm 0:9b334a45a8ff 304 /** Input enabled. DOUT determines pull direction */
bogdanm 0:9b334a45a8ff 305 gpioModeInputPull = _GPIO_P_MODEL_MODE0_INPUTPULL,
bogdanm 0:9b334a45a8ff 306 /** Input enabled with filter. DOUT determines pull direction */
bogdanm 0:9b334a45a8ff 307 gpioModeInputPullFilter = _GPIO_P_MODEL_MODE0_INPUTPULLFILTER,
bogdanm 0:9b334a45a8ff 308 /** Push-pull output */
bogdanm 0:9b334a45a8ff 309 gpioModePushPull = _GPIO_P_MODEL_MODE0_PUSHPULL,
mbed_official 50:a417edff4437 310 #if defined( _GPIO_P_MODEL_MODE0_PUSHPULLDRIVE )
bogdanm 0:9b334a45a8ff 311 /** Push-pull output with drive-strength set by DRIVEMODE */
bogdanm 0:9b334a45a8ff 312 gpioModePushPullDrive = _GPIO_P_MODEL_MODE0_PUSHPULLDRIVE,
mbed_official 50:a417edff4437 313 #endif
mbed_official 50:a417edff4437 314 #if defined( _GPIO_P_MODEL_MODE0_PUSHPULLALT )
mbed_official 50:a417edff4437 315 /** Push-pull using alternate control */
mbed_official 50:a417edff4437 316 gpioModePushPullAlternate = _GPIO_P_MODEL_MODE0_PUSHPULLALT,
mbed_official 50:a417edff4437 317 #endif
bogdanm 0:9b334a45a8ff 318 /** Wired-or output */
mbed_official 50:a417edff4437 319 gpioModeWiredOr = _GPIO_P_MODEL_MODE0_WIREDOR,
bogdanm 0:9b334a45a8ff 320 /** Wired-or output with pull-down */
mbed_official 50:a417edff4437 321 gpioModeWiredOrPullDown = _GPIO_P_MODEL_MODE0_WIREDORPULLDOWN,
bogdanm 0:9b334a45a8ff 322 /** Open-drain output */
mbed_official 50:a417edff4437 323 gpioModeWiredAnd = _GPIO_P_MODEL_MODE0_WIREDAND,
bogdanm 0:9b334a45a8ff 324 /** Open-drain output with filter */
mbed_official 50:a417edff4437 325 gpioModeWiredAndFilter = _GPIO_P_MODEL_MODE0_WIREDANDFILTER,
bogdanm 0:9b334a45a8ff 326 /** Open-drain output with pullup */
mbed_official 50:a417edff4437 327 gpioModeWiredAndPullUp = _GPIO_P_MODEL_MODE0_WIREDANDPULLUP,
bogdanm 0:9b334a45a8ff 328 /** Open-drain output with filter and pullup */
mbed_official 50:a417edff4437 329 gpioModeWiredAndPullUpFilter = _GPIO_P_MODEL_MODE0_WIREDANDPULLUPFILTER,
mbed_official 50:a417edff4437 330 #if defined( _GPIO_P_MODEL_MODE0_WIREDANDDRIVE )
bogdanm 0:9b334a45a8ff 331 /** Open-drain output with drive-strength set by DRIVEMODE */
mbed_official 50:a417edff4437 332 gpioModeWiredAndDrive = _GPIO_P_MODEL_MODE0_WIREDANDDRIVE,
bogdanm 0:9b334a45a8ff 333 /** Open-drain output with filter and drive-strength set by DRIVEMODE */
mbed_official 50:a417edff4437 334 gpioModeWiredAndDriveFilter = _GPIO_P_MODEL_MODE0_WIREDANDDRIVEFILTER,
bogdanm 0:9b334a45a8ff 335 /** Open-drain output with pullup and drive-strength set by DRIVEMODE */
mbed_official 50:a417edff4437 336 gpioModeWiredAndDrivePullUp = _GPIO_P_MODEL_MODE0_WIREDANDDRIVEPULLUP,
bogdanm 0:9b334a45a8ff 337 /** Open-drain output with filter, pullup and drive-strength set by DRIVEMODE */
mbed_official 50:a417edff4437 338 gpioModeWiredAndDrivePullUpFilter = _GPIO_P_MODEL_MODE0_WIREDANDDRIVEPULLUPFILTER
mbed_official 50:a417edff4437 339 #endif
mbed_official 50:a417edff4437 340 #if defined( _GPIO_P_MODEL_MODE0_WIREDANDALT )
mbed_official 50:a417edff4437 341 /** Open-drain output using alternate control */
mbed_official 50:a417edff4437 342 gpioModeWiredAndAlternate = _GPIO_P_MODEL_MODE0_WIREDANDALT,
mbed_official 50:a417edff4437 343 /** Open-drain output using alternate control with filter */
mbed_official 50:a417edff4437 344 gpioModeWiredAndAlternateFilter = _GPIO_P_MODEL_MODE0_WIREDANDALTFILTER,
mbed_official 50:a417edff4437 345 /** Open-drain output using alternate control with pullup */
mbed_official 50:a417edff4437 346 gpioModeWiredAndAlternatePullUp = _GPIO_P_MODEL_MODE0_WIREDANDALTPULLUP,
mbed_official 50:a417edff4437 347 /** Open-drain output uisng alternate control with filter and pullup */
mbed_official 50:a417edff4437 348 gpioModeWiredAndAlternatePullUpFilter = _GPIO_P_MODEL_MODE0_WIREDANDALTPULLUPFILTER,
mbed_official 50:a417edff4437 349 #endif
bogdanm 0:9b334a45a8ff 350 } GPIO_Mode_TypeDef;
bogdanm 0:9b334a45a8ff 351
bogdanm 0:9b334a45a8ff 352 /*******************************************************************************
bogdanm 0:9b334a45a8ff 353 ***************************** PROTOTYPES **********************************
bogdanm 0:9b334a45a8ff 354 ******************************************************************************/
bogdanm 0:9b334a45a8ff 355
bogdanm 0:9b334a45a8ff 356 void GPIO_DbgLocationSet(unsigned int location);
bogdanm 0:9b334a45a8ff 357
bogdanm 0:9b334a45a8ff 358 void GPIO_IntConfig(GPIO_Port_TypeDef port,
bogdanm 0:9b334a45a8ff 359 unsigned int pin,
bogdanm 0:9b334a45a8ff 360 bool risingEdge,
bogdanm 0:9b334a45a8ff 361 bool fallingEdge,
bogdanm 0:9b334a45a8ff 362 bool enable);
bogdanm 0:9b334a45a8ff 363
bogdanm 0:9b334a45a8ff 364 void GPIO_PinModeSet(GPIO_Port_TypeDef port,
bogdanm 0:9b334a45a8ff 365 unsigned int pin,
bogdanm 0:9b334a45a8ff 366 GPIO_Mode_TypeDef mode,
bogdanm 0:9b334a45a8ff 367 unsigned int out);
bogdanm 0:9b334a45a8ff 368
mbed_official 50:a417edff4437 369 # if defined( _GPIO_EM4WUEN_MASK )
mbed_official 50:a417edff4437 370 void GPIO_EM4EnablePinWakeup(uint32_t pinmask, uint32_t polaritymask);
bogdanm 0:9b334a45a8ff 371 #endif
bogdanm 0:9b334a45a8ff 372
bogdanm 0:9b334a45a8ff 373 /***************************************************************************//**
bogdanm 0:9b334a45a8ff 374 * @brief
bogdanm 0:9b334a45a8ff 375 * Enable/disable serial wire clock pin.
bogdanm 0:9b334a45a8ff 376 *
bogdanm 0:9b334a45a8ff 377 * @note
bogdanm 0:9b334a45a8ff 378 * Disabling SWDClk will disable the debug interface, which may result in
bogdanm 0:9b334a45a8ff 379 * a lockout if done early in startup (before debugger is able to halt core).
bogdanm 0:9b334a45a8ff 380 *
bogdanm 0:9b334a45a8ff 381 * @param[in] enable
bogdanm 0:9b334a45a8ff 382 * @li false - disable serial wire clock.
bogdanm 0:9b334a45a8ff 383 * @li true - enable serial wire clock (default after reset).
bogdanm 0:9b334a45a8ff 384 ******************************************************************************/
bogdanm 0:9b334a45a8ff 385 __STATIC_INLINE void GPIO_DbgSWDClkEnable(bool enable)
bogdanm 0:9b334a45a8ff 386 {
mbed_official 50:a417edff4437 387 #if defined( _GPIO_ROUTE_SWCLKPEN_MASK )
mbed_official 50:a417edff4437 388 BUS_RegBitWrite(&(GPIO->ROUTE), _GPIO_ROUTE_SWCLKPEN_SHIFT, enable);
mbed_official 50:a417edff4437 389 #elif defined( _GPIO_ROUTEPEN_SWCLKTCKPEN_MASK )
mbed_official 50:a417edff4437 390 BUS_RegBitWrite(&(GPIO->ROUTEPEN), _GPIO_ROUTEPEN_SWCLKTCKPEN_SHIFT, enable);
mbed_official 50:a417edff4437 391 #else
mbed_official 50:a417edff4437 392 #warning "ROUTE enable for SWCLK pin is not defined."
mbed_official 50:a417edff4437 393 #endif
bogdanm 0:9b334a45a8ff 394 }
bogdanm 0:9b334a45a8ff 395
bogdanm 0:9b334a45a8ff 396
bogdanm 0:9b334a45a8ff 397 /***************************************************************************//**
bogdanm 0:9b334a45a8ff 398 * @brief
mbed_official 50:a417edff4437 399 * Enable/disable serial wire data I/O pin.
bogdanm 0:9b334a45a8ff 400 *
bogdanm 0:9b334a45a8ff 401 * @note
bogdanm 0:9b334a45a8ff 402 * Disabling SWDClk will disable the debug interface, which may result in
bogdanm 0:9b334a45a8ff 403 * a lockout if done early in startup (before debugger is able to halt core).
bogdanm 0:9b334a45a8ff 404 *
bogdanm 0:9b334a45a8ff 405 * @param[in] enable
bogdanm 0:9b334a45a8ff 406 * @li false - disable serial wire data pin.
bogdanm 0:9b334a45a8ff 407 * @li true - enable serial wire data pin (default after reset).
bogdanm 0:9b334a45a8ff 408 ******************************************************************************/
bogdanm 0:9b334a45a8ff 409 __STATIC_INLINE void GPIO_DbgSWDIOEnable(bool enable)
bogdanm 0:9b334a45a8ff 410 {
mbed_official 50:a417edff4437 411 #if defined( _GPIO_ROUTE_SWDIOPEN_MASK )
mbed_official 50:a417edff4437 412 BUS_RegBitWrite(&(GPIO->ROUTE), _GPIO_ROUTE_SWDIOPEN_SHIFT, enable);
mbed_official 50:a417edff4437 413 #elif defined( _GPIO_ROUTEPEN_SWDIOTMSPEN_MASK )
mbed_official 50:a417edff4437 414 BUS_RegBitWrite(&(GPIO->ROUTEPEN), _GPIO_ROUTEPEN_SWDIOTMSPEN_SHIFT, enable);
mbed_official 50:a417edff4437 415 #else
mbed_official 50:a417edff4437 416 #warning "ROUTE enable for SWDIO pin is not defined."
mbed_official 50:a417edff4437 417 #endif
bogdanm 0:9b334a45a8ff 418 }
bogdanm 0:9b334a45a8ff 419
bogdanm 0:9b334a45a8ff 420
mbed_official 50:a417edff4437 421 #if defined( _GPIO_ROUTE_SWOPEN_MASK ) || defined( _GPIO_ROUTEPEN_SWVPEN_MASK )
bogdanm 0:9b334a45a8ff 422 /***************************************************************************//**
bogdanm 0:9b334a45a8ff 423 * @brief
bogdanm 0:9b334a45a8ff 424 * Enable/Disable serial wire output pin.
bogdanm 0:9b334a45a8ff 425 *
bogdanm 0:9b334a45a8ff 426 * @note
bogdanm 0:9b334a45a8ff 427 * Enabling this pin is not sufficient to fully enable serial wire output
bogdanm 0:9b334a45a8ff 428 * which is also dependent on issues outside the GPIO module. Please refer to
bogdanm 0:9b334a45a8ff 429 * DBG_SWOEnable().
bogdanm 0:9b334a45a8ff 430 *
bogdanm 0:9b334a45a8ff 431 * @param[in] enable
bogdanm 0:9b334a45a8ff 432 * @li false - disable serial wire viewer pin (default after reset).
bogdanm 0:9b334a45a8ff 433 * @li true - enable serial wire viewer pin.
bogdanm 0:9b334a45a8ff 434 ******************************************************************************/
bogdanm 0:9b334a45a8ff 435 __STATIC_INLINE void GPIO_DbgSWOEnable(bool enable)
bogdanm 0:9b334a45a8ff 436 {
mbed_official 50:a417edff4437 437 #if defined( _GPIO_ROUTE_SWOPEN_MASK )
mbed_official 50:a417edff4437 438 BUS_RegBitWrite(&(GPIO->ROUTE), _GPIO_ROUTE_SWOPEN_SHIFT, enable);
mbed_official 50:a417edff4437 439 #elif defined( _GPIO_ROUTEPEN_SWVPEN_MASK )
mbed_official 50:a417edff4437 440 BUS_RegBitWrite(&(GPIO->ROUTEPEN), _GPIO_ROUTEPEN_SWVPEN_SHIFT, enable);
mbed_official 50:a417edff4437 441 #else
mbed_official 50:a417edff4437 442 #warning "ROUTE enable for SWO/SWV pin is not defined."
mbed_official 50:a417edff4437 443 #endif
bogdanm 0:9b334a45a8ff 444 }
bogdanm 0:9b334a45a8ff 445 #endif
bogdanm 0:9b334a45a8ff 446
mbed_official 50:a417edff4437 447 #if defined (_GPIO_P_CTRL_DRIVEMODE_MASK)
bogdanm 0:9b334a45a8ff 448 void GPIO_DriveModeSet(GPIO_Port_TypeDef port, GPIO_DriveMode_TypeDef mode);
mbed_official 50:a417edff4437 449 #endif
bogdanm 0:9b334a45a8ff 450
mbed_official 50:a417edff4437 451 #if defined( _GPIO_P_CTRL_DRIVESTRENGTH_MASK )
mbed_official 50:a417edff4437 452 void GPIO_DriveStrengthSet(GPIO_Port_TypeDef port, GPIO_DriveStrength_TypeDef strength);
mbed_official 50:a417edff4437 453 #endif
bogdanm 0:9b334a45a8ff 454
bogdanm 0:9b334a45a8ff 455 # if defined( _GPIO_EM4WUEN_MASK )
bogdanm 0:9b334a45a8ff 456 /**************************************************************************//**
bogdanm 0:9b334a45a8ff 457 * @brief
bogdanm 0:9b334a45a8ff 458 * Disable GPIO pin wake-up from EM4.
bogdanm 0:9b334a45a8ff 459 *
bogdanm 0:9b334a45a8ff 460 * @param[in] pinmask
bogdanm 0:9b334a45a8ff 461 * Bitmask containing the bitwise logic OR of which GPIO pin(s) to disable.
bogdanm 0:9b334a45a8ff 462 * Refer to Reference Manuals for pinmask to GPIO port/pin mapping.
bogdanm 0:9b334a45a8ff 463 *****************************************************************************/
bogdanm 0:9b334a45a8ff 464 __STATIC_INLINE void GPIO_EM4DisablePinWakeup(uint32_t pinmask)
bogdanm 0:9b334a45a8ff 465 {
bogdanm 0:9b334a45a8ff 466 EFM_ASSERT((pinmask & ~_GPIO_EM4WUEN_MASK) == 0);
bogdanm 0:9b334a45a8ff 467
bogdanm 0:9b334a45a8ff 468 GPIO->EM4WUEN &= ~pinmask;
bogdanm 0:9b334a45a8ff 469 }
bogdanm 0:9b334a45a8ff 470 #endif
bogdanm 0:9b334a45a8ff 471
bogdanm 0:9b334a45a8ff 472
mbed_official 50:a417edff4437 473 #if defined( _GPIO_EM4WUCAUSE_MASK ) || defined( _RMU_RSTCAUSE_EM4RST_MASK )
bogdanm 0:9b334a45a8ff 474 /**************************************************************************//**
bogdanm 0:9b334a45a8ff 475 * @brief
bogdanm 0:9b334a45a8ff 476 * Check which GPIO pin(s) that caused a wake-up from EM4.
bogdanm 0:9b334a45a8ff 477 *
bogdanm 0:9b334a45a8ff 478 * @return
bogdanm 0:9b334a45a8ff 479 * Bitmask containing the bitwise logic OR of which GPIO pin(s) caused the
bogdanm 0:9b334a45a8ff 480 * wake-up. Refer to Reference Manuals for pinmask to GPIO port/pin mapping.
bogdanm 0:9b334a45a8ff 481 *****************************************************************************/
bogdanm 0:9b334a45a8ff 482 __STATIC_INLINE uint32_t GPIO_EM4GetPinWakeupCause(void)
bogdanm 0:9b334a45a8ff 483 {
mbed_official 50:a417edff4437 484 #if defined( _GPIO_EM4WUCAUSE_MASK )
bogdanm 0:9b334a45a8ff 485 return GPIO->EM4WUCAUSE & _GPIO_EM4WUCAUSE_MASK;
mbed_official 50:a417edff4437 486 #else
mbed_official 50:a417edff4437 487 return RMU->RSTCAUSE & _RMU_RSTCAUSE_EM4RST_MASK;
mbed_official 50:a417edff4437 488 #endif
bogdanm 0:9b334a45a8ff 489 }
bogdanm 0:9b334a45a8ff 490 #endif
bogdanm 0:9b334a45a8ff 491
bogdanm 0:9b334a45a8ff 492
mbed_official 50:a417edff4437 493 #if defined( GPIO_CTRL_EM4RET ) || defined( _EMU_EM4CTRL_EM4IORETMODE_MASK )
bogdanm 0:9b334a45a8ff 494 /**************************************************************************//**
bogdanm 0:9b334a45a8ff 495 * @brief
bogdanm 0:9b334a45a8ff 496 * Enable GPIO pin retention of output enable, output value, pull enable and
bogdanm 0:9b334a45a8ff 497 * pull direction in EM4.
mbed_official 50:a417edff4437 498 *
mbed_official 50:a417edff4437 499 * @note
mbed_official 50:a417edff4437 500 * For platform 2 parts, EMU_EM4Init() and EMU_UnlatchPinRetention() offers
mbed_official 50:a417edff4437 501 * more pin retention features. This function implements the EM4EXIT retention
mbed_official 50:a417edff4437 502 * mode on platform 2.
bogdanm 0:9b334a45a8ff 503 *
bogdanm 0:9b334a45a8ff 504 * @param[in] enable
bogdanm 0:9b334a45a8ff 505 * @li true - enable EM4 pin retention.
bogdanm 0:9b334a45a8ff 506 * @li false - disable EM4 pin retention.
bogdanm 0:9b334a45a8ff 507 *****************************************************************************/
bogdanm 0:9b334a45a8ff 508 __STATIC_INLINE void GPIO_EM4SetPinRetention(bool enable)
bogdanm 0:9b334a45a8ff 509 {
bogdanm 0:9b334a45a8ff 510 if (enable)
bogdanm 0:9b334a45a8ff 511 {
mbed_official 50:a417edff4437 512 #if defined( GPIO_CTRL_EM4RET )
bogdanm 0:9b334a45a8ff 513 GPIO->CTRL |= GPIO_CTRL_EM4RET;
mbed_official 50:a417edff4437 514 #else
mbed_official 50:a417edff4437 515 EMU->EM4CTRL = (EMU->EM4CTRL & ~_EMU_EM4CTRL_EM4IORETMODE_MASK)
mbed_official 50:a417edff4437 516 | EMU_EM4CTRL_EM4IORETMODE_EM4EXIT;
mbed_official 50:a417edff4437 517 #endif
bogdanm 0:9b334a45a8ff 518 }
bogdanm 0:9b334a45a8ff 519 else
bogdanm 0:9b334a45a8ff 520 {
mbed_official 50:a417edff4437 521 #if defined( GPIO_CTRL_EM4RET )
bogdanm 0:9b334a45a8ff 522 GPIO->CTRL &= ~GPIO_CTRL_EM4RET;
mbed_official 50:a417edff4437 523 #else
mbed_official 50:a417edff4437 524 EMU->EM4CTRL = (EMU->EM4CTRL & ~_EMU_EM4CTRL_EM4IORETMODE_MASK)
mbed_official 50:a417edff4437 525 | EMU_EM4CTRL_EM4IORETMODE_DISABLE;
mbed_official 50:a417edff4437 526 #endif
bogdanm 0:9b334a45a8ff 527 }
bogdanm 0:9b334a45a8ff 528 }
bogdanm 0:9b334a45a8ff 529 #endif
bogdanm 0:9b334a45a8ff 530
bogdanm 0:9b334a45a8ff 531
bogdanm 0:9b334a45a8ff 532 /***************************************************************************//**
bogdanm 0:9b334a45a8ff 533 * @brief
bogdanm 0:9b334a45a8ff 534 * Enable/disable input sensing.
bogdanm 0:9b334a45a8ff 535 *
bogdanm 0:9b334a45a8ff 536 * @details
bogdanm 0:9b334a45a8ff 537 * Disabling input sensing if not used, can save some energy consumption.
bogdanm 0:9b334a45a8ff 538 *
bogdanm 0:9b334a45a8ff 539 * @param[in] val
bogdanm 0:9b334a45a8ff 540 * Bitwise logic OR of one or more of:
bogdanm 0:9b334a45a8ff 541 * @li GPIO_INSENSE_INT - interrupt input sensing.
bogdanm 0:9b334a45a8ff 542 * @li GPIO_INSENSE_PRS - peripheral reflex system input sensing.
bogdanm 0:9b334a45a8ff 543 *
bogdanm 0:9b334a45a8ff 544 * @param[in] mask
mbed_official 50:a417edff4437 545 * Mask containing bitwise logic OR of bits similar as for @p val used to
mbed_official 50:a417edff4437 546 * indicate which input sense options to disable/enable.
bogdanm 0:9b334a45a8ff 547 ******************************************************************************/
bogdanm 0:9b334a45a8ff 548 __STATIC_INLINE void GPIO_InputSenseSet(uint32_t val, uint32_t mask)
bogdanm 0:9b334a45a8ff 549 {
bogdanm 0:9b334a45a8ff 550 GPIO->INSENSE = (GPIO->INSENSE & ~mask) | (val & mask);
bogdanm 0:9b334a45a8ff 551 }
bogdanm 0:9b334a45a8ff 552
bogdanm 0:9b334a45a8ff 553
bogdanm 0:9b334a45a8ff 554 /***************************************************************************//**
bogdanm 0:9b334a45a8ff 555 * @brief
bogdanm 0:9b334a45a8ff 556 * Clear one or more pending GPIO interrupts.
bogdanm 0:9b334a45a8ff 557 *
bogdanm 0:9b334a45a8ff 558 * @param[in] flags
bogdanm 0:9b334a45a8ff 559 * Bitwise logic OR of GPIO interrupt sources to clear.
bogdanm 0:9b334a45a8ff 560 ******************************************************************************/
bogdanm 0:9b334a45a8ff 561 __STATIC_INLINE void GPIO_IntClear(uint32_t flags)
bogdanm 0:9b334a45a8ff 562 {
bogdanm 0:9b334a45a8ff 563 GPIO->IFC = flags;
bogdanm 0:9b334a45a8ff 564 }
bogdanm 0:9b334a45a8ff 565
bogdanm 0:9b334a45a8ff 566
bogdanm 0:9b334a45a8ff 567 /***************************************************************************//**
bogdanm 0:9b334a45a8ff 568 * @brief
bogdanm 0:9b334a45a8ff 569 * Disable one or more GPIO interrupts.
bogdanm 0:9b334a45a8ff 570 *
bogdanm 0:9b334a45a8ff 571 * @param[in] flags
bogdanm 0:9b334a45a8ff 572 * GPIO interrupt sources to disable.
bogdanm 0:9b334a45a8ff 573 ******************************************************************************/
bogdanm 0:9b334a45a8ff 574 __STATIC_INLINE void GPIO_IntDisable(uint32_t flags)
bogdanm 0:9b334a45a8ff 575 {
bogdanm 0:9b334a45a8ff 576 GPIO->IEN &= ~flags;
bogdanm 0:9b334a45a8ff 577 }
bogdanm 0:9b334a45a8ff 578
bogdanm 0:9b334a45a8ff 579
bogdanm 0:9b334a45a8ff 580 /***************************************************************************//**
bogdanm 0:9b334a45a8ff 581 * @brief
bogdanm 0:9b334a45a8ff 582 * Enable one or more GPIO interrupts.
bogdanm 0:9b334a45a8ff 583 *
bogdanm 0:9b334a45a8ff 584 * @note
bogdanm 0:9b334a45a8ff 585 * Depending on the use, a pending interrupt may already be set prior to
bogdanm 0:9b334a45a8ff 586 * enabling the interrupt. Consider using GPIO_IntClear() prior to enabling
bogdanm 0:9b334a45a8ff 587 * if such a pending interrupt should be ignored.
bogdanm 0:9b334a45a8ff 588 *
bogdanm 0:9b334a45a8ff 589 * @param[in] flags
bogdanm 0:9b334a45a8ff 590 * GPIO interrupt sources to enable.
bogdanm 0:9b334a45a8ff 591 ******************************************************************************/
bogdanm 0:9b334a45a8ff 592 __STATIC_INLINE void GPIO_IntEnable(uint32_t flags)
bogdanm 0:9b334a45a8ff 593 {
bogdanm 0:9b334a45a8ff 594 GPIO->IEN |= flags;
bogdanm 0:9b334a45a8ff 595 }
bogdanm 0:9b334a45a8ff 596
bogdanm 0:9b334a45a8ff 597
bogdanm 0:9b334a45a8ff 598 /***************************************************************************//**
bogdanm 0:9b334a45a8ff 599 * @brief
bogdanm 0:9b334a45a8ff 600 * Get pending GPIO interrupts.
bogdanm 0:9b334a45a8ff 601 *
bogdanm 0:9b334a45a8ff 602 * @return
bogdanm 0:9b334a45a8ff 603 * GPIO interrupt sources pending.
bogdanm 0:9b334a45a8ff 604 ******************************************************************************/
bogdanm 0:9b334a45a8ff 605 __STATIC_INLINE uint32_t GPIO_IntGet(void)
bogdanm 0:9b334a45a8ff 606 {
mbed_official 50:a417edff4437 607 return GPIO->IF;
bogdanm 0:9b334a45a8ff 608 }
bogdanm 0:9b334a45a8ff 609
bogdanm 0:9b334a45a8ff 610
bogdanm 0:9b334a45a8ff 611 /***************************************************************************//**
bogdanm 0:9b334a45a8ff 612 * @brief
bogdanm 0:9b334a45a8ff 613 * Get enabled and pending GPIO interrupt flags.
bogdanm 0:9b334a45a8ff 614 * Useful for handling more interrupt sources in the same interrupt handler.
bogdanm 0:9b334a45a8ff 615 *
bogdanm 0:9b334a45a8ff 616 * @note
bogdanm 0:9b334a45a8ff 617 * Interrupt flags are not cleared by the use of this function.
bogdanm 0:9b334a45a8ff 618 *
bogdanm 0:9b334a45a8ff 619 * @return
bogdanm 0:9b334a45a8ff 620 * Pending and enabled GPIO interrupt sources.
bogdanm 0:9b334a45a8ff 621 * The return value is the bitwise AND combination of
bogdanm 0:9b334a45a8ff 622 * - the OR combination of enabled interrupt sources in GPIO_IEN register
bogdanm 0:9b334a45a8ff 623 * and
bogdanm 0:9b334a45a8ff 624 * - the OR combination of valid interrupt flags in GPIO_IF register.
bogdanm 0:9b334a45a8ff 625 ******************************************************************************/
bogdanm 0:9b334a45a8ff 626 __STATIC_INLINE uint32_t GPIO_IntGetEnabled(void)
bogdanm 0:9b334a45a8ff 627 {
bogdanm 0:9b334a45a8ff 628 uint32_t tmp;
bogdanm 0:9b334a45a8ff 629
bogdanm 0:9b334a45a8ff 630 /* Store GPIO->IEN in temporary variable in order to define explicit order
bogdanm 0:9b334a45a8ff 631 * of volatile accesses. */
bogdanm 0:9b334a45a8ff 632 tmp = GPIO->IEN;
bogdanm 0:9b334a45a8ff 633
bogdanm 0:9b334a45a8ff 634 /* Bitwise AND of pending and enabled interrupts */
bogdanm 0:9b334a45a8ff 635 return GPIO->IF & tmp;
bogdanm 0:9b334a45a8ff 636 }
bogdanm 0:9b334a45a8ff 637
bogdanm 0:9b334a45a8ff 638
bogdanm 0:9b334a45a8ff 639 /**************************************************************************//**
bogdanm 0:9b334a45a8ff 640 * @brief
bogdanm 0:9b334a45a8ff 641 * Set one or more pending GPIO interrupts from SW.
bogdanm 0:9b334a45a8ff 642 *
bogdanm 0:9b334a45a8ff 643 * @param[in] flags
bogdanm 0:9b334a45a8ff 644 * GPIO interrupt sources to set to pending.
bogdanm 0:9b334a45a8ff 645 *****************************************************************************/
bogdanm 0:9b334a45a8ff 646 __STATIC_INLINE void GPIO_IntSet(uint32_t flags)
bogdanm 0:9b334a45a8ff 647 {
bogdanm 0:9b334a45a8ff 648 GPIO->IFS = flags;
bogdanm 0:9b334a45a8ff 649 }
bogdanm 0:9b334a45a8ff 650
bogdanm 0:9b334a45a8ff 651
bogdanm 0:9b334a45a8ff 652 /***************************************************************************//**
bogdanm 0:9b334a45a8ff 653 * @brief
bogdanm 0:9b334a45a8ff 654 * Locks the GPIO configuration.
bogdanm 0:9b334a45a8ff 655 ******************************************************************************/
bogdanm 0:9b334a45a8ff 656 __STATIC_INLINE void GPIO_Lock(void)
bogdanm 0:9b334a45a8ff 657 {
bogdanm 0:9b334a45a8ff 658 GPIO->LOCK = GPIO_LOCK_LOCKKEY_LOCK;
bogdanm 0:9b334a45a8ff 659 }
bogdanm 0:9b334a45a8ff 660
bogdanm 0:9b334a45a8ff 661
bogdanm 0:9b334a45a8ff 662 /***************************************************************************//**
bogdanm 0:9b334a45a8ff 663 * @brief
bogdanm 0:9b334a45a8ff 664 * Read the pad value for a single pin in a GPIO port.
bogdanm 0:9b334a45a8ff 665 *
bogdanm 0:9b334a45a8ff 666 * @param[in] port
bogdanm 0:9b334a45a8ff 667 * The GPIO port to access.
bogdanm 0:9b334a45a8ff 668 *
bogdanm 0:9b334a45a8ff 669 * @param[in] pin
bogdanm 0:9b334a45a8ff 670 * The pin number to read.
bogdanm 0:9b334a45a8ff 671 *
bogdanm 0:9b334a45a8ff 672 * @return
bogdanm 0:9b334a45a8ff 673 * The pin value, 0 or 1.
bogdanm 0:9b334a45a8ff 674 ******************************************************************************/
mbed_official 50:a417edff4437 675 __STATIC_INLINE unsigned int GPIO_PinInGet(GPIO_Port_TypeDef port,
mbed_official 50:a417edff4437 676 unsigned int pin)
bogdanm 0:9b334a45a8ff 677 {
mbed_official 50:a417edff4437 678 EFM_ASSERT(GPIO_PORT_PIN_VALID(port, pin));
mbed_official 50:a417edff4437 679 return BUS_RegBitRead(&GPIO->P[port].DIN, pin);
bogdanm 0:9b334a45a8ff 680 }
bogdanm 0:9b334a45a8ff 681
bogdanm 0:9b334a45a8ff 682
bogdanm 0:9b334a45a8ff 683 /***************************************************************************//**
bogdanm 0:9b334a45a8ff 684 * @brief
bogdanm 0:9b334a45a8ff 685 * Set a single pin in GPIO data out port register to 0.
bogdanm 0:9b334a45a8ff 686 *
bogdanm 0:9b334a45a8ff 687 * @note
bogdanm 0:9b334a45a8ff 688 * In order for the setting to take effect on the output pad, the pin must
bogdanm 0:9b334a45a8ff 689 * have been configured properly. If not, it will take effect whenever the
bogdanm 0:9b334a45a8ff 690 * pin has been properly configured.
bogdanm 0:9b334a45a8ff 691 *
bogdanm 0:9b334a45a8ff 692 * @param[in] port
bogdanm 0:9b334a45a8ff 693 * The GPIO port to access.
bogdanm 0:9b334a45a8ff 694 *
bogdanm 0:9b334a45a8ff 695 * @param[in] pin
bogdanm 0:9b334a45a8ff 696 * The pin to set.
bogdanm 0:9b334a45a8ff 697 ******************************************************************************/
bogdanm 0:9b334a45a8ff 698 __STATIC_INLINE void GPIO_PinOutClear(GPIO_Port_TypeDef port, unsigned int pin)
bogdanm 0:9b334a45a8ff 699 {
mbed_official 50:a417edff4437 700 EFM_ASSERT(GPIO_PORT_PIN_VALID(port, pin));
mbed_official 50:a417edff4437 701 #if defined( _GPIO_P_DOUTCLR_MASK )
bogdanm 0:9b334a45a8ff 702 GPIO->P[port].DOUTCLR = 1 << pin;
mbed_official 50:a417edff4437 703 #else
mbed_official 50:a417edff4437 704 BUS_RegBitWrite(&GPIO->P[port].DOUT, pin, 0);
mbed_official 50:a417edff4437 705 #endif
bogdanm 0:9b334a45a8ff 706 }
bogdanm 0:9b334a45a8ff 707
bogdanm 0:9b334a45a8ff 708
bogdanm 0:9b334a45a8ff 709 /***************************************************************************//**
bogdanm 0:9b334a45a8ff 710 * @brief
bogdanm 0:9b334a45a8ff 711 * Get current setting for a pin in a GPIO port data out register.
bogdanm 0:9b334a45a8ff 712 *
bogdanm 0:9b334a45a8ff 713 * @param[in] port
bogdanm 0:9b334a45a8ff 714 * The GPIO port to access.
bogdanm 0:9b334a45a8ff 715 *
bogdanm 0:9b334a45a8ff 716 * @param[in] pin
bogdanm 0:9b334a45a8ff 717 * The pin to get setting for.
bogdanm 0:9b334a45a8ff 718 *
bogdanm 0:9b334a45a8ff 719 * @return
bogdanm 0:9b334a45a8ff 720 * The DOUT setting for the requested pin, 0 or 1.
bogdanm 0:9b334a45a8ff 721 ******************************************************************************/
mbed_official 50:a417edff4437 722 __STATIC_INLINE unsigned int GPIO_PinOutGet(GPIO_Port_TypeDef port,
mbed_official 50:a417edff4437 723 unsigned int pin)
bogdanm 0:9b334a45a8ff 724 {
mbed_official 50:a417edff4437 725 EFM_ASSERT(GPIO_PORT_PIN_VALID(port, pin));
mbed_official 50:a417edff4437 726 return BUS_RegBitRead(&GPIO->P[port].DOUT, pin);
bogdanm 0:9b334a45a8ff 727 }
bogdanm 0:9b334a45a8ff 728
bogdanm 0:9b334a45a8ff 729
bogdanm 0:9b334a45a8ff 730 /***************************************************************************//**
bogdanm 0:9b334a45a8ff 731 * @brief
bogdanm 0:9b334a45a8ff 732 * Set a single pin in GPIO data out register to 1.
bogdanm 0:9b334a45a8ff 733 *
bogdanm 0:9b334a45a8ff 734 * @note
bogdanm 0:9b334a45a8ff 735 * In order for the setting to take effect on the output pad, the pin must
bogdanm 0:9b334a45a8ff 736 * have been configured properly. If not, it will take effect whenever the
bogdanm 0:9b334a45a8ff 737 * pin has been properly configured.
bogdanm 0:9b334a45a8ff 738 *
bogdanm 0:9b334a45a8ff 739 * @param[in] port
bogdanm 0:9b334a45a8ff 740 * The GPIO port to access.
bogdanm 0:9b334a45a8ff 741 *
bogdanm 0:9b334a45a8ff 742 * @param[in] pin
bogdanm 0:9b334a45a8ff 743 * The pin to set.
bogdanm 0:9b334a45a8ff 744 ******************************************************************************/
bogdanm 0:9b334a45a8ff 745 __STATIC_INLINE void GPIO_PinOutSet(GPIO_Port_TypeDef port, unsigned int pin)
bogdanm 0:9b334a45a8ff 746 {
mbed_official 50:a417edff4437 747 EFM_ASSERT(GPIO_PORT_PIN_VALID(port, pin));
mbed_official 50:a417edff4437 748 #if defined( _GPIO_P_DOUTSET_MASK )
bogdanm 0:9b334a45a8ff 749 GPIO->P[port].DOUTSET = 1 << pin;
mbed_official 50:a417edff4437 750 #else
mbed_official 50:a417edff4437 751 BUS_RegBitWrite(&GPIO->P[port].DOUT, pin, 1);
mbed_official 50:a417edff4437 752 #endif
bogdanm 0:9b334a45a8ff 753 }
bogdanm 0:9b334a45a8ff 754
bogdanm 0:9b334a45a8ff 755
bogdanm 0:9b334a45a8ff 756 /***************************************************************************//**
bogdanm 0:9b334a45a8ff 757 * @brief
bogdanm 0:9b334a45a8ff 758 * Toggle a single pin in GPIO port data out register.
bogdanm 0:9b334a45a8ff 759 *
bogdanm 0:9b334a45a8ff 760 * @note
bogdanm 0:9b334a45a8ff 761 * In order for the setting to take effect on the output pad, the pin must
bogdanm 0:9b334a45a8ff 762 * have been configured properly. If not, it will take effect whenever the
bogdanm 0:9b334a45a8ff 763 * pin has been properly configured.
bogdanm 0:9b334a45a8ff 764 *
bogdanm 0:9b334a45a8ff 765 * @param[in] port
bogdanm 0:9b334a45a8ff 766 * The GPIO port to access.
bogdanm 0:9b334a45a8ff 767 *
bogdanm 0:9b334a45a8ff 768 * @param[in] pin
bogdanm 0:9b334a45a8ff 769 * The pin to toggle.
bogdanm 0:9b334a45a8ff 770 ******************************************************************************/
bogdanm 0:9b334a45a8ff 771 __STATIC_INLINE void GPIO_PinOutToggle(GPIO_Port_TypeDef port, unsigned int pin)
bogdanm 0:9b334a45a8ff 772 {
mbed_official 50:a417edff4437 773 EFM_ASSERT(GPIO_PORT_PIN_VALID(port, pin));
bogdanm 0:9b334a45a8ff 774
bogdanm 0:9b334a45a8ff 775 GPIO->P[port].DOUTTGL = 1 << pin;
bogdanm 0:9b334a45a8ff 776 }
bogdanm 0:9b334a45a8ff 777
bogdanm 0:9b334a45a8ff 778
bogdanm 0:9b334a45a8ff 779 /***************************************************************************//**
bogdanm 0:9b334a45a8ff 780 * @brief
bogdanm 0:9b334a45a8ff 781 * Read the pad values for GPIO port.
bogdanm 0:9b334a45a8ff 782 *
bogdanm 0:9b334a45a8ff 783 * @param[in] port
bogdanm 0:9b334a45a8ff 784 * The GPIO port to access.
bogdanm 0:9b334a45a8ff 785 ******************************************************************************/
bogdanm 0:9b334a45a8ff 786 __STATIC_INLINE uint32_t GPIO_PortInGet(GPIO_Port_TypeDef port)
bogdanm 0:9b334a45a8ff 787 {
bogdanm 0:9b334a45a8ff 788 EFM_ASSERT(GPIO_PORT_VALID(port));
bogdanm 0:9b334a45a8ff 789
mbed_official 50:a417edff4437 790 return GPIO->P[port].DIN;
bogdanm 0:9b334a45a8ff 791 }
bogdanm 0:9b334a45a8ff 792
bogdanm 0:9b334a45a8ff 793
bogdanm 0:9b334a45a8ff 794 /***************************************************************************//**
bogdanm 0:9b334a45a8ff 795 * @brief
bogdanm 0:9b334a45a8ff 796 * Set bits in DOUT register for a port to 0.
bogdanm 0:9b334a45a8ff 797 *
bogdanm 0:9b334a45a8ff 798 * @note
bogdanm 0:9b334a45a8ff 799 * In order for the setting to take effect on the output pad, the pin must
bogdanm 0:9b334a45a8ff 800 * have been configured properly. If not, it will take effect whenever the
bogdanm 0:9b334a45a8ff 801 * pin has been properly configured.
bogdanm 0:9b334a45a8ff 802 *
bogdanm 0:9b334a45a8ff 803 * @param[in] port
bogdanm 0:9b334a45a8ff 804 * The GPIO port to access.
bogdanm 0:9b334a45a8ff 805 *
bogdanm 0:9b334a45a8ff 806 * @param[in] pins
bogdanm 0:9b334a45a8ff 807 * Bit mask for bits to clear in DOUT register.
bogdanm 0:9b334a45a8ff 808 ******************************************************************************/
bogdanm 0:9b334a45a8ff 809 __STATIC_INLINE void GPIO_PortOutClear(GPIO_Port_TypeDef port, uint32_t pins)
bogdanm 0:9b334a45a8ff 810 {
bogdanm 0:9b334a45a8ff 811 EFM_ASSERT(GPIO_PORT_VALID(port));
mbed_official 50:a417edff4437 812 #if defined( _GPIO_P_DOUTCLR_MASK )
mbed_official 50:a417edff4437 813 GPIO->P[port].DOUTCLR = pins;
mbed_official 50:a417edff4437 814 #else
mbed_official 50:a417edff4437 815 BUS_RegMaskedClear(&GPIO->P[port].DOUT, pins);
mbed_official 50:a417edff4437 816 #endif
bogdanm 0:9b334a45a8ff 817 }
bogdanm 0:9b334a45a8ff 818
bogdanm 0:9b334a45a8ff 819
bogdanm 0:9b334a45a8ff 820 /***************************************************************************//**
bogdanm 0:9b334a45a8ff 821 * @brief
bogdanm 0:9b334a45a8ff 822 * Get current setting for a GPIO port data out register.
bogdanm 0:9b334a45a8ff 823 *
bogdanm 0:9b334a45a8ff 824 * @param[in] port
bogdanm 0:9b334a45a8ff 825 * The GPIO port to access.
bogdanm 0:9b334a45a8ff 826 *
bogdanm 0:9b334a45a8ff 827 * @return
bogdanm 0:9b334a45a8ff 828 * The data out setting for the requested port.
bogdanm 0:9b334a45a8ff 829 ******************************************************************************/
bogdanm 0:9b334a45a8ff 830 __STATIC_INLINE uint32_t GPIO_PortOutGet(GPIO_Port_TypeDef port)
bogdanm 0:9b334a45a8ff 831 {
bogdanm 0:9b334a45a8ff 832 EFM_ASSERT(GPIO_PORT_VALID(port));
bogdanm 0:9b334a45a8ff 833
mbed_official 50:a417edff4437 834 return GPIO->P[port].DOUT;
bogdanm 0:9b334a45a8ff 835 }
bogdanm 0:9b334a45a8ff 836
bogdanm 0:9b334a45a8ff 837
bogdanm 0:9b334a45a8ff 838 /***************************************************************************//**
bogdanm 0:9b334a45a8ff 839 * @brief
bogdanm 0:9b334a45a8ff 840 * Set bits GPIO data out register to 1.
bogdanm 0:9b334a45a8ff 841 *
bogdanm 0:9b334a45a8ff 842 * @note
bogdanm 0:9b334a45a8ff 843 * In order for the setting to take effect on the respective output pads, the
bogdanm 0:9b334a45a8ff 844 * pins must have been configured properly. If not, it will take effect
bogdanm 0:9b334a45a8ff 845 * whenever the pin has been properly configured.
bogdanm 0:9b334a45a8ff 846 *
bogdanm 0:9b334a45a8ff 847 * @param[in] port
bogdanm 0:9b334a45a8ff 848 * The GPIO port to access.
bogdanm 0:9b334a45a8ff 849 *
bogdanm 0:9b334a45a8ff 850 * @param[in] pins
bogdanm 0:9b334a45a8ff 851 * Bit mask for bits to set to 1 in DOUT register.
bogdanm 0:9b334a45a8ff 852 ******************************************************************************/
bogdanm 0:9b334a45a8ff 853 __STATIC_INLINE void GPIO_PortOutSet(GPIO_Port_TypeDef port, uint32_t pins)
bogdanm 0:9b334a45a8ff 854 {
bogdanm 0:9b334a45a8ff 855 EFM_ASSERT(GPIO_PORT_VALID(port));
mbed_official 50:a417edff4437 856 #if defined( _GPIO_P_DOUTSET_MASK )
mbed_official 50:a417edff4437 857 GPIO->P[port].DOUTSET = pins;
mbed_official 50:a417edff4437 858 #else
mbed_official 50:a417edff4437 859 BUS_RegMaskedSet(&GPIO->P[port].DOUT, pins);
mbed_official 50:a417edff4437 860 #endif
bogdanm 0:9b334a45a8ff 861 }
bogdanm 0:9b334a45a8ff 862
bogdanm 0:9b334a45a8ff 863
bogdanm 0:9b334a45a8ff 864 /***************************************************************************//**
bogdanm 0:9b334a45a8ff 865 * @brief
bogdanm 0:9b334a45a8ff 866 * Set GPIO port data out register.
bogdanm 0:9b334a45a8ff 867 *
bogdanm 0:9b334a45a8ff 868 * @note
bogdanm 0:9b334a45a8ff 869 * In order for the setting to take effect on the respective output pads, the
bogdanm 0:9b334a45a8ff 870 * pins must have been configured properly. If not, it will take effect
bogdanm 0:9b334a45a8ff 871 * whenever the pin has been properly configured.
bogdanm 0:9b334a45a8ff 872 *
bogdanm 0:9b334a45a8ff 873 * @param[in] port
bogdanm 0:9b334a45a8ff 874 * The GPIO port to access.
bogdanm 0:9b334a45a8ff 875 *
bogdanm 0:9b334a45a8ff 876 * @param[in] val
bogdanm 0:9b334a45a8ff 877 * Value to write to port data out register.
bogdanm 0:9b334a45a8ff 878 *
bogdanm 0:9b334a45a8ff 879 * @param[in] mask
bogdanm 0:9b334a45a8ff 880 * Mask indicating which bits to modify.
bogdanm 0:9b334a45a8ff 881 ******************************************************************************/
mbed_official 50:a417edff4437 882 __STATIC_INLINE void GPIO_PortOutSetVal(GPIO_Port_TypeDef port,
mbed_official 50:a417edff4437 883 uint32_t val,
mbed_official 50:a417edff4437 884 uint32_t mask)
bogdanm 0:9b334a45a8ff 885 {
bogdanm 0:9b334a45a8ff 886 EFM_ASSERT(GPIO_PORT_VALID(port));
bogdanm 0:9b334a45a8ff 887
bogdanm 0:9b334a45a8ff 888 GPIO->P[port].DOUT = (GPIO->P[port].DOUT & ~mask) | (val & mask);
bogdanm 0:9b334a45a8ff 889 }
bogdanm 0:9b334a45a8ff 890
bogdanm 0:9b334a45a8ff 891
bogdanm 0:9b334a45a8ff 892 /***************************************************************************//**
bogdanm 0:9b334a45a8ff 893 * @brief
mbed_official 50:a417edff4437 894 * Toggle pins in GPIO port data out register.
bogdanm 0:9b334a45a8ff 895 *
bogdanm 0:9b334a45a8ff 896 * @note
bogdanm 0:9b334a45a8ff 897 * In order for the setting to take effect on the output pad, the pin must
bogdanm 0:9b334a45a8ff 898 * have been configured properly. If not, it will take effect whenever the
bogdanm 0:9b334a45a8ff 899 * pin has been properly configured.
bogdanm 0:9b334a45a8ff 900 *
bogdanm 0:9b334a45a8ff 901 * @param[in] port
bogdanm 0:9b334a45a8ff 902 * The GPIO port to access.
bogdanm 0:9b334a45a8ff 903 *
bogdanm 0:9b334a45a8ff 904 * @param[in] pins
bogdanm 0:9b334a45a8ff 905 * Bitmask with pins to toggle.
bogdanm 0:9b334a45a8ff 906 ******************************************************************************/
bogdanm 0:9b334a45a8ff 907 __STATIC_INLINE void GPIO_PortOutToggle(GPIO_Port_TypeDef port, uint32_t pins)
bogdanm 0:9b334a45a8ff 908 {
bogdanm 0:9b334a45a8ff 909 EFM_ASSERT(GPIO_PORT_VALID(port));
bogdanm 0:9b334a45a8ff 910
mbed_official 50:a417edff4437 911 GPIO->P[port].DOUTTGL = pins;
bogdanm 0:9b334a45a8ff 912 }
bogdanm 0:9b334a45a8ff 913
bogdanm 0:9b334a45a8ff 914
bogdanm 0:9b334a45a8ff 915 /***************************************************************************//**
bogdanm 0:9b334a45a8ff 916 * @brief
bogdanm 0:9b334a45a8ff 917 * Unlocks the GPIO configuration.
bogdanm 0:9b334a45a8ff 918 ******************************************************************************/
bogdanm 0:9b334a45a8ff 919 __STATIC_INLINE void GPIO_Unlock(void)
bogdanm 0:9b334a45a8ff 920 {
bogdanm 0:9b334a45a8ff 921 GPIO->LOCK = GPIO_LOCK_LOCKKEY_UNLOCK;
bogdanm 0:9b334a45a8ff 922 }
bogdanm 0:9b334a45a8ff 923
bogdanm 0:9b334a45a8ff 924 /** @} (end addtogroup GPIO) */
bogdanm 0:9b334a45a8ff 925 /** @} (end addtogroup EM_Library) */
bogdanm 0:9b334a45a8ff 926
bogdanm 0:9b334a45a8ff 927 #ifdef __cplusplus
bogdanm 0:9b334a45a8ff 928 }
bogdanm 0:9b334a45a8ff 929 #endif
bogdanm 0:9b334a45a8ff 930
bogdanm 0:9b334a45a8ff 931 #endif /* defined(GPIO_COUNT) && (GPIO_COUNT > 0) */
mbed_official 50:a417edff4437 932 #endif /* __SILICON_LABS_EM_GPIO_H__ */