added prescaler for 16 bit pwm in LPC1347 target
Fork of mbed-dev by
targets/hal/TARGET_ONSEMI/TARGET_NCS36510/random_map.h@144:ef7eb2e8f9f7, 2016-09-02 (annotated)
- Committer:
- <>
- Date:
- Fri Sep 02 15:07:44 2016 +0100
- Revision:
- 144:ef7eb2e8f9f7
This updates the lib to the mbed lib v125
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
<> | 144:ef7eb2e8f9f7 | 1 | /** |
<> | 144:ef7eb2e8f9f7 | 2 | ****************************************************************************** |
<> | 144:ef7eb2e8f9f7 | 3 | * @file random_map.h |
<> | 144:ef7eb2e8f9f7 | 4 | * @brief Randomizer hw module register map |
<> | 144:ef7eb2e8f9f7 | 5 | * @internal |
<> | 144:ef7eb2e8f9f7 | 6 | * @author ON Semiconductor |
<> | 144:ef7eb2e8f9f7 | 7 | * $Rev: 3283 $ |
<> | 144:ef7eb2e8f9f7 | 8 | * $Date: 2015-02-26 18:52:22 +0530 (Thu, 26 Feb 2015) $ |
<> | 144:ef7eb2e8f9f7 | 9 | ****************************************************************************** |
<> | 144:ef7eb2e8f9f7 | 10 | * @copyright (c) 2012 ON Semiconductor. All rights reserved. |
<> | 144:ef7eb2e8f9f7 | 11 | * ON Semiconductor is supplying this software for use with ON Semiconductor |
<> | 144:ef7eb2e8f9f7 | 12 | * processor based microcontrollers only. |
<> | 144:ef7eb2e8f9f7 | 13 | * |
<> | 144:ef7eb2e8f9f7 | 14 | * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED |
<> | 144:ef7eb2e8f9f7 | 15 | * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF |
<> | 144:ef7eb2e8f9f7 | 16 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. |
<> | 144:ef7eb2e8f9f7 | 17 | * ON SEMICONDUCTOR SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, |
<> | 144:ef7eb2e8f9f7 | 18 | * INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. |
<> | 144:ef7eb2e8f9f7 | 19 | * @endinternal |
<> | 144:ef7eb2e8f9f7 | 20 | * |
<> | 144:ef7eb2e8f9f7 | 21 | * @ingroup random |
<> | 144:ef7eb2e8f9f7 | 22 | * |
<> | 144:ef7eb2e8f9f7 | 23 | * @details |
<> | 144:ef7eb2e8f9f7 | 24 | */ |
<> | 144:ef7eb2e8f9f7 | 25 | |
<> | 144:ef7eb2e8f9f7 | 26 | #ifndef RANDOM_MAP_H_ |
<> | 144:ef7eb2e8f9f7 | 27 | #define RANDOM_MAP_H_ |
<> | 144:ef7eb2e8f9f7 | 28 | |
<> | 144:ef7eb2e8f9f7 | 29 | /************************************************************************************************* |
<> | 144:ef7eb2e8f9f7 | 30 | * * |
<> | 144:ef7eb2e8f9f7 | 31 | * Header files * |
<> | 144:ef7eb2e8f9f7 | 32 | * * |
<> | 144:ef7eb2e8f9f7 | 33 | *************************************************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 34 | |
<> | 144:ef7eb2e8f9f7 | 35 | #include "architecture.h" |
<> | 144:ef7eb2e8f9f7 | 36 | |
<> | 144:ef7eb2e8f9f7 | 37 | /************************************************************************************************** |
<> | 144:ef7eb2e8f9f7 | 38 | * * |
<> | 144:ef7eb2e8f9f7 | 39 | * Type definitions * |
<> | 144:ef7eb2e8f9f7 | 40 | * * |
<> | 144:ef7eb2e8f9f7 | 41 | **************************************************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 42 | |
<> | 144:ef7eb2e8f9f7 | 43 | /** Random Number Generator Control HW Structure Overlay */ |
<> | 144:ef7eb2e8f9f7 | 44 | typedef struct { |
<> | 144:ef7eb2e8f9f7 | 45 | __IO uint32_t WR_SEED_RD_RAND; /* Seed set & random read reg - 0x40011000 */ |
<> | 144:ef7eb2e8f9f7 | 46 | #ifdef REVB |
<> | 144:ef7eb2e8f9f7 | 47 | __IO uint32_t MODE; |
<> | 144:ef7eb2e8f9f7 | 48 | #endif /* REVB */ |
<> | 144:ef7eb2e8f9f7 | 49 | union { |
<> | 144:ef7eb2e8f9f7 | 50 | struct { |
<> | 144:ef7eb2e8f9f7 | 51 | __IO uint32_t MODE :1; /**<Mode Register, 0 LSFR is updated on every rising edge of PCLK, 1 LSFR is only updated on a read event of the LSFR register */ |
<> | 144:ef7eb2e8f9f7 | 52 | __IO uint32_t BYTE_SWAP :1; /**<Byte Swap Control, 0 32-bit byte swap, 1 64-bit byte swap */ |
<> | 144:ef7eb2e8f9f7 | 53 | __IO uint32_t MEATSTABLE_SPEED :1; /**<Meta-stable Latch TRNG Speed Control, 0 Slow mode, 1 Fast mode */ |
<> | 144:ef7eb2e8f9f7 | 54 | __IO uint32_t WHITENOISE_EN :1; /**<White Noise TRNG Enable, 0 Disabled, 1 Enabled */ |
<> | 144:ef7eb2e8f9f7 | 55 | __IO uint32_t METASTABLE_LATCH_EN :1; /**<Meta-stable Latch TRNG Enable, 0 Disabled, 1 Enabled */ |
<> | 144:ef7eb2e8f9f7 | 56 | __IO uint32_t JIC :1; /**<JIC */ |
<> | 144:ef7eb2e8f9f7 | 57 | } BITS; |
<> | 144:ef7eb2e8f9f7 | 58 | __IO uint32_t WORD; |
<> | 144:ef7eb2e8f9f7 | 59 | } CONTROL; /* Control register - 0x40011004 */ |
<> | 144:ef7eb2e8f9f7 | 60 | union { |
<> | 144:ef7eb2e8f9f7 | 61 | struct { |
<> | 144:ef7eb2e8f9f7 | 62 | __IO uint32_t BYTE_0 :8; /**<Byte #0*/ |
<> | 144:ef7eb2e8f9f7 | 63 | __IO uint32_t BYTE_1 :8; /**<Byte #1*/ |
<> | 144:ef7eb2e8f9f7 | 64 | __IO uint32_t BYTE_2 :8; /**<Byte #2*/ |
<> | 144:ef7eb2e8f9f7 | 65 | __IO uint32_t BYTE_3 :8; /**<Byte #3*/ |
<> | 144:ef7eb2e8f9f7 | 66 | } BITS; |
<> | 144:ef7eb2e8f9f7 | 67 | __IO uint32_t WORD; |
<> | 144:ef7eb2e8f9f7 | 68 | } WRITE_BUF_LSW; /* Byte swap write buffer Least significant word - 0x40011008 */ |
<> | 144:ef7eb2e8f9f7 | 69 | union { |
<> | 144:ef7eb2e8f9f7 | 70 | struct { |
<> | 144:ef7eb2e8f9f7 | 71 | __IO uint32_t BYTE_4 :8; /**<Byte #4*/ |
<> | 144:ef7eb2e8f9f7 | 72 | __IO uint32_t BYTE_5 :8; /**<Byte #5*/ |
<> | 144:ef7eb2e8f9f7 | 73 | __IO uint32_t BYTE_6 :8; /**<Byte #6*/ |
<> | 144:ef7eb2e8f9f7 | 74 | __IO uint32_t BYTE_7 :8; /**<Byte #7*/ |
<> | 144:ef7eb2e8f9f7 | 75 | } BITS; |
<> | 144:ef7eb2e8f9f7 | 76 | __IO uint32_t WORD; |
<> | 144:ef7eb2e8f9f7 | 77 | } WRITE_BUF_MSW; /* Byte swap write buffer Most significant word - 0x4001100C */ |
<> | 144:ef7eb2e8f9f7 | 78 | union { |
<> | 144:ef7eb2e8f9f7 | 79 | struct { |
<> | 144:ef7eb2e8f9f7 | 80 | __IO uint32_t BYTE_7_3 :8; /**<Byte Swap Control == 1? Byte #7 : Byte #3*/ |
<> | 144:ef7eb2e8f9f7 | 81 | __IO uint32_t BYTE_6_2 :8; /**<Byte Swap Control == 1? Byte #6 : Byte #2*/ |
<> | 144:ef7eb2e8f9f7 | 82 | __IO uint32_t BYTE_5_1 :8; /**<Byte Swap Control == 1? Byte #5 : Byte #1*/ |
<> | 144:ef7eb2e8f9f7 | 83 | __IO uint32_t BYTE_4_0 :8; /**<Byte Swap Control == 1? Byte #4 : Byte #0*/ |
<> | 144:ef7eb2e8f9f7 | 84 | } BITS; |
<> | 144:ef7eb2e8f9f7 | 85 | __IO uint32_t WORD; |
<> | 144:ef7eb2e8f9f7 | 86 | } READ_BUF_LSW; /* Byte swap read buffer Least significant word - 0x40011010 */ |
<> | 144:ef7eb2e8f9f7 | 87 | union { |
<> | 144:ef7eb2e8f9f7 | 88 | struct { |
<> | 144:ef7eb2e8f9f7 | 89 | __IO uint32_t BYTE_3 :8; /**<Byte #3*/ |
<> | 144:ef7eb2e8f9f7 | 90 | __IO uint32_t BYTE_2 :8; /**<Byte #2*/ |
<> | 144:ef7eb2e8f9f7 | 91 | __IO uint32_t BYTE_1 :8; /**<Byte #1*/ |
<> | 144:ef7eb2e8f9f7 | 92 | __IO uint32_t BYTE_0 :8; /**<Byte #0*/ |
<> | 144:ef7eb2e8f9f7 | 93 | } BITS; |
<> | 144:ef7eb2e8f9f7 | 94 | __IO uint32_t WORD; |
<> | 144:ef7eb2e8f9f7 | 95 | } READ_BUF_MSW; /* Byte swap read buffer Most significant word - 0x40011014 */ |
<> | 144:ef7eb2e8f9f7 | 96 | __I uint32_t METASTABLE_LATCH_VAL; /* Meta-stable latch TRNG value - 0x40011018 */ |
<> | 144:ef7eb2e8f9f7 | 97 | __I uint32_t WHITENOISE_VAL; /* White noise TRNG value - 0x4001101C */ |
<> | 144:ef7eb2e8f9f7 | 98 | } RandReg_t, *RandReg_pt; |
<> | 144:ef7eb2e8f9f7 | 99 | |
<> | 144:ef7eb2e8f9f7 | 100 | #endif /* RANDOM_MAP_H_ */ |