added prescaler for 16 bit pwm in LPC1347 target

Fork of mbed-dev by mbed official

Committer:
<>
Date:
Fri Sep 02 15:07:44 2016 +0100
Revision:
144:ef7eb2e8f9f7
This updates the lib to the mbed lib v125

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file timer_map.h
<> 144:ef7eb2e8f9f7 4 * @brief Timer HW register map
<> 144:ef7eb2e8f9f7 5 * @internal
<> 144:ef7eb2e8f9f7 6 * @author ON Semiconductor
<> 144:ef7eb2e8f9f7 7 * $Rev: 3423 $
<> 144:ef7eb2e8f9f7 8 * $Date: 2015-06-09 11:16:49 +0530 (Tue, 09 Jun 2015) $
<> 144:ef7eb2e8f9f7 9 ******************************************************************************
<> 144:ef7eb2e8f9f7 10 * @copyright (c) 2012 ON Semiconductor. All rights reserved.
<> 144:ef7eb2e8f9f7 11 * ON Semiconductor is supplying this software for use with ON Semiconductor
<> 144:ef7eb2e8f9f7 12 * processor based microcontrollers only.
<> 144:ef7eb2e8f9f7 13 *
<> 144:ef7eb2e8f9f7 14 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
<> 144:ef7eb2e8f9f7 15 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
<> 144:ef7eb2e8f9f7 16 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
<> 144:ef7eb2e8f9f7 17 * ON SEMICONDUCTOR SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL,
<> 144:ef7eb2e8f9f7 18 * INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
<> 144:ef7eb2e8f9f7 19 * @endinternal
<> 144:ef7eb2e8f9f7 20 *
<> 144:ef7eb2e8f9f7 21 * @ingroup timer
<> 144:ef7eb2e8f9f7 22 *
<> 144:ef7eb2e8f9f7 23 * @details
<> 144:ef7eb2e8f9f7 24 * <p>
<> 144:ef7eb2e8f9f7 25 * Timer HW register map description
<> 144:ef7eb2e8f9f7 26 * </p>
<> 144:ef7eb2e8f9f7 27 *
<> 144:ef7eb2e8f9f7 28 * <h1> Reference document(s) </h1>
<> 144:ef7eb2e8f9f7 29 * <p>
<> 144:ef7eb2e8f9f7 30 * <a href="../pdf/IPC7200_Timer_APB_DS_v1P2.pdf" target="_blank">
<> 144:ef7eb2e8f9f7 31 * IPC7200 APB Timer Design Specification v1.2</a>
<> 144:ef7eb2e8f9f7 32 * </p>
<> 144:ef7eb2e8f9f7 33 */
<> 144:ef7eb2e8f9f7 34
<> 144:ef7eb2e8f9f7 35 #ifndef TIMER_MAP_H_
<> 144:ef7eb2e8f9f7 36 #define TIMER_MAP_H_
<> 144:ef7eb2e8f9f7 37
<> 144:ef7eb2e8f9f7 38 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 39 extern "C" {
<> 144:ef7eb2e8f9f7 40 #endif
<> 144:ef7eb2e8f9f7 41
<> 144:ef7eb2e8f9f7 42 #include "architecture.h"
<> 144:ef7eb2e8f9f7 43
<> 144:ef7eb2e8f9f7 44 /** Timer HW Structure Overlay */
<> 144:ef7eb2e8f9f7 45 typedef struct {
<> 144:ef7eb2e8f9f7 46 __IO uint32_t LOAD; /**< 16bit counter (re-)load value */
<> 144:ef7eb2e8f9f7 47 __I uint32_t VALUE; /**< 16bit current counter value */
<> 144:ef7eb2e8f9f7 48 union {
<> 144:ef7eb2e8f9f7 49 struct {
<> 144:ef7eb2e8f9f7 50 __IO uint32_t PAD0 :2; /**< Always reads 0 */
<> 144:ef7eb2e8f9f7 51 __IO uint32_t PRESCALE :3; /**< 0:no division, 1..7: divide by 16, 256, 2, 8, 32, 128, 1024*/
<> 144:ef7eb2e8f9f7 52 __IO uint32_t PAD1 :1; /**< Always reads 0 */
<> 144:ef7eb2e8f9f7 53 __IO uint32_t MODE :1; /**< 0:free-run, 1:periodic */
<> 144:ef7eb2e8f9f7 54 __IO uint32_t ENABLE :1; /**< 0: disable, 1:enable */
<> 144:ef7eb2e8f9f7 55 __I uint32_t INT :1; /**< interrupt status */
<> 144:ef7eb2e8f9f7 56 } BITS;
<> 144:ef7eb2e8f9f7 57 __IO uint32_t WORD;
<> 144:ef7eb2e8f9f7 58 } CONTROL;
<> 144:ef7eb2e8f9f7 59 __O uint32_t CLEAR; /**< Write any value to clear the interrupt */
<> 144:ef7eb2e8f9f7 60 } TimerReg_t, *TimerReg_pt;
<> 144:ef7eb2e8f9f7 61
<> 144:ef7eb2e8f9f7 62 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 63 }
<> 144:ef7eb2e8f9f7 64 #endif
<> 144:ef7eb2e8f9f7 65
<> 144:ef7eb2e8f9f7 66 #endif /* TIMER_MAP_H_ */