added prescaler for 16 bit pwm in LPC1347 target
Fork of mbed-dev by
targets/hal/TARGET_ONSEMI/TARGET_NCS36510/reset_map.h@144:ef7eb2e8f9f7, 2016-09-02 (annotated)
- Committer:
- <>
- Date:
- Fri Sep 02 15:07:44 2016 +0100
- Revision:
- 144:ef7eb2e8f9f7
This updates the lib to the mbed lib v125
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
<> | 144:ef7eb2e8f9f7 | 1 | /** |
<> | 144:ef7eb2e8f9f7 | 2 | ****************************************************************************** |
<> | 144:ef7eb2e8f9f7 | 3 | * @file reset_map.h |
<> | 144:ef7eb2e8f9f7 | 4 | * @brief Reset hw module register map |
<> | 144:ef7eb2e8f9f7 | 5 | * @internal |
<> | 144:ef7eb2e8f9f7 | 6 | * @author ON Semiconductor |
<> | 144:ef7eb2e8f9f7 | 7 | * $Rev: 2848 $ |
<> | 144:ef7eb2e8f9f7 | 8 | * $Date: 2014-04-01 22:48:18 +0530 (Tue, 01 Apr 2014) $ |
<> | 144:ef7eb2e8f9f7 | 9 | ****************************************************************************** |
<> | 144:ef7eb2e8f9f7 | 10 | * @copyright (c) 2012 ON Semiconductor. All rights reserved. |
<> | 144:ef7eb2e8f9f7 | 11 | * ON Semiconductor is supplying this software for use with ON Semiconductor |
<> | 144:ef7eb2e8f9f7 | 12 | * processor based microcontrollers only. |
<> | 144:ef7eb2e8f9f7 | 13 | * |
<> | 144:ef7eb2e8f9f7 | 14 | * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED |
<> | 144:ef7eb2e8f9f7 | 15 | * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF |
<> | 144:ef7eb2e8f9f7 | 16 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. |
<> | 144:ef7eb2e8f9f7 | 17 | * ON SEMICONDUCTOR SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, |
<> | 144:ef7eb2e8f9f7 | 18 | * INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. |
<> | 144:ef7eb2e8f9f7 | 19 | * @endinternal |
<> | 144:ef7eb2e8f9f7 | 20 | * |
<> | 144:ef7eb2e8f9f7 | 21 | * @ingroup reset |
<> | 144:ef7eb2e8f9f7 | 22 | * |
<> | 144:ef7eb2e8f9f7 | 23 | * @details |
<> | 144:ef7eb2e8f9f7 | 24 | */ |
<> | 144:ef7eb2e8f9f7 | 25 | |
<> | 144:ef7eb2e8f9f7 | 26 | #ifndef RESET_MAP_H_ |
<> | 144:ef7eb2e8f9f7 | 27 | #define RESET_MAP_H_ |
<> | 144:ef7eb2e8f9f7 | 28 | |
<> | 144:ef7eb2e8f9f7 | 29 | /************************************************************************************************* |
<> | 144:ef7eb2e8f9f7 | 30 | * * |
<> | 144:ef7eb2e8f9f7 | 31 | * Header files * |
<> | 144:ef7eb2e8f9f7 | 32 | * * |
<> | 144:ef7eb2e8f9f7 | 33 | *************************************************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 34 | |
<> | 144:ef7eb2e8f9f7 | 35 | #include "architecture.h" |
<> | 144:ef7eb2e8f9f7 | 36 | |
<> | 144:ef7eb2e8f9f7 | 37 | /************************************************************************************************** |
<> | 144:ef7eb2e8f9f7 | 38 | * * |
<> | 144:ef7eb2e8f9f7 | 39 | * Type definitions * |
<> | 144:ef7eb2e8f9f7 | 40 | * * |
<> | 144:ef7eb2e8f9f7 | 41 | **************************************************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 42 | |
<> | 144:ef7eb2e8f9f7 | 43 | /** Reset status and clear register. |
<> | 144:ef7eb2e8f9f7 | 44 | * Also contains HW revision ID. |
<> | 144:ef7eb2e8f9f7 | 45 | */ |
<> | 144:ef7eb2e8f9f7 | 46 | typedef struct { |
<> | 144:ef7eb2e8f9f7 | 47 | union { |
<> | 144:ef7eb2e8f9f7 | 48 | struct { |
<> | 144:ef7eb2e8f9f7 | 49 | __I uint32_t LOCKUP:1; /**< 1:Core did lock up */ |
<> | 144:ef7eb2e8f9f7 | 50 | __I uint32_t WDOGRES:1; /**< 1:Watchdog reset occurred */ |
<> | 144:ef7eb2e8f9f7 | 51 | __I uint32_t EXTRESET:1; /**< 1:External reset occurred */ |
<> | 144:ef7eb2e8f9f7 | 52 | __I uint32_t SYSRESETREQ:1; /**< 1:System reset occurred */ |
<> | 144:ef7eb2e8f9f7 | 53 | __I uint32_t POR:1; /**< 1:POR reset occurred */ |
<> | 144:ef7eb2e8f9f7 | 54 | } BITS; |
<> | 144:ef7eb2e8f9f7 | 55 | __I uint32_t WORD; |
<> | 144:ef7eb2e8f9f7 | 56 | } SOURCE; |
<> | 144:ef7eb2e8f9f7 | 57 | __O uint32_t CLEARSOURCE; /**< writing any value to this register will clear the reset source register */ |
<> | 144:ef7eb2e8f9f7 | 58 | __I uint32_t HWREVID; /**< Hardware ID, 0x80215400 */ |
<> | 144:ef7eb2e8f9f7 | 59 | __IO uint32_t CONTROL; /**< External Reset & Watchdog behavior: 0 External Reset & Watchdog will reset debug logic 1 External Reset & Watchdog will not reset debug logic */ |
<> | 144:ef7eb2e8f9f7 | 60 | |
<> | 144:ef7eb2e8f9f7 | 61 | } ResetReg_t, *ResetReg_pt; |
<> | 144:ef7eb2e8f9f7 | 62 | |
<> | 144:ef7eb2e8f9f7 | 63 | #endif /* RESET_MAP_H_ */ |