added prescaler for 16 bit pwm in LPC1347 target

Fork of mbed-dev by mbed official

Committer:
<>
Date:
Fri Sep 02 15:07:44 2016 +0100
Revision:
144:ef7eb2e8f9f7
This updates the lib to the mbed lib v125

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file pwm_map.h
<> 144:ef7eb2e8f9f7 4 * @brief PWM HW register map
<> 144:ef7eb2e8f9f7 5 * @internal
<> 144:ef7eb2e8f9f7 6 * @author ON Semiconductor
<> 144:ef7eb2e8f9f7 7 * $Rev: 3378 $
<> 144:ef7eb2e8f9f7 8 * $Date: 2015-04-28 13:38:36 +0530 (Tue, 28 Apr 2015) $
<> 144:ef7eb2e8f9f7 9 ******************************************************************************
<> 144:ef7eb2e8f9f7 10 * @copyright (c) 2012 ON Semiconductor. All rights reserved.
<> 144:ef7eb2e8f9f7 11 * ON Semiconductor is supplying this software for use with ON Semiconductor
<> 144:ef7eb2e8f9f7 12 * processor based microcontrollers only.
<> 144:ef7eb2e8f9f7 13 *
<> 144:ef7eb2e8f9f7 14 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
<> 144:ef7eb2e8f9f7 15 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
<> 144:ef7eb2e8f9f7 16 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
<> 144:ef7eb2e8f9f7 17 * ON SEMICONDUCTOR SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL,
<> 144:ef7eb2e8f9f7 18 * INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
<> 144:ef7eb2e8f9f7 19 * @endinternal
<> 144:ef7eb2e8f9f7 20 *
<> 144:ef7eb2e8f9f7 21 * @ingroup pwm
<> 144:ef7eb2e8f9f7 22 *
<> 144:ef7eb2e8f9f7 23 * @details
<> 144:ef7eb2e8f9f7 24 * <p>
<> 144:ef7eb2e8f9f7 25 * PWM HW register map description
<> 144:ef7eb2e8f9f7 26 * </p>
<> 144:ef7eb2e8f9f7 27 *
<> 144:ef7eb2e8f9f7 28 * <h1> Reference document(s) </h1>
<> 144:ef7eb2e8f9f7 29 * <p>
<> 144:ef7eb2e8f9f7 30 * <a href="../../../../build/doc/pdf/IPC7205_PWM_APB_DS_v1P1.pdf" target="_blank">
<> 144:ef7eb2e8f9f7 31 * IPC7205 APB PWM Design Specification v1.1 </a>
<> 144:ef7eb2e8f9f7 32 * </p>
<> 144:ef7eb2e8f9f7 33 */
<> 144:ef7eb2e8f9f7 34
<> 144:ef7eb2e8f9f7 35 #ifndef PWM_MAP_H_
<> 144:ef7eb2e8f9f7 36 #define PWM_MAP_H_
<> 144:ef7eb2e8f9f7 37
<> 144:ef7eb2e8f9f7 38 #include "architecture.h"
<> 144:ef7eb2e8f9f7 39
<> 144:ef7eb2e8f9f7 40 /** Power management Control HW Structure Overlay */
<> 144:ef7eb2e8f9f7 41 #ifdef REVB
<> 144:ef7eb2e8f9f7 42 typedef struct {
<> 144:ef7eb2e8f9f7 43 __IO uint32_t DUTYCYCLE;
<> 144:ef7eb2e8f9f7 44 union {
<> 144:ef7eb2e8f9f7 45 struct {
<> 144:ef7eb2e8f9f7 46 __IO uint32_t ENABLED :1;/**< 1 = PWM enable , 0 = PWM disable */
<> 144:ef7eb2e8f9f7 47 __I uint32_t CURRENT :1;/**< current state of PWM enable signal */
<> 144:ef7eb2e8f9f7 48 __O uint32_t PAD1 :6; /**< Reserved. Writes have no effect; Read as 0x00. */
<> 144:ef7eb2e8f9f7 49 __O uint32_t RDPWMEN :1;/**< current state of pwmEnable configuration */
<> 144:ef7eb2e8f9f7 50 __O uint32_t RDPWMOP :1;/**< current state of PWM out signal */
<> 144:ef7eb2e8f9f7 51 __O uint32_t PAD2 :6; /**< Reserved. Writes have no effect; Read as 0x00. */
<> 144:ef7eb2e8f9f7 52 } BITS;
<> 144:ef7eb2e8f9f7 53 __I uint32_t WORD;
<> 144:ef7eb2e8f9f7 54 } PWMOUT;
<> 144:ef7eb2e8f9f7 55 __O uint32_t DISABLE;
<> 144:ef7eb2e8f9f7 56 union {
<> 144:ef7eb2e8f9f7 57 struct {
<> 144:ef7eb2e8f9f7 58 __IO uint32_t ENABLED :1;
<> 144:ef7eb2e8f9f7 59 __O uint32_t PAD1 :7; /**< Reserved. Writes have no effect */
<> 144:ef7eb2e8f9f7 60 __O uint32_t STATE :1; /**< current state of prescaler enable configuration. */
<> 144:ef7eb2e8f9f7 61 __O uint32_t PAD2 :7; /**< Reserved. Writes have no effect; Read as 0x00. */
<> 144:ef7eb2e8f9f7 62 } BITS;
<> 144:ef7eb2e8f9f7 63 __I uint32_t WORD;
<> 144:ef7eb2e8f9f7 64 } PRESCALE_EN;
<> 144:ef7eb2e8f9f7 65
<> 144:ef7eb2e8f9f7 66 __O uint32_t PRESCALE_DIS;
<> 144:ef7eb2e8f9f7 67
<> 144:ef7eb2e8f9f7 68 } PwmReg_t, *PwmReg_pt;
<> 144:ef7eb2e8f9f7 69 #endif /* REVB */
<> 144:ef7eb2e8f9f7 70
<> 144:ef7eb2e8f9f7 71 #ifdef REVD
<> 144:ef7eb2e8f9f7 72 typedef struct {
<> 144:ef7eb2e8f9f7 73 __IO uint32_t DUTYCYCLE;
<> 144:ef7eb2e8f9f7 74 union {
<> 144:ef7eb2e8f9f7 75 struct {
<> 144:ef7eb2e8f9f7 76 __O uint32_t ENABLE :8; /**< Write any value to enable PWM output */
<> 144:ef7eb2e8f9f7 77 __I uint32_t PAD :1; /** < Pad */
<> 144:ef7eb2e8f9f7 78 __I uint32_t ENABLE_STATE :1; /**< Current state of pwmEnable configuration bit. ‘1’ PWM output is enabled. ‘0’ PWN output is disabled. */
<> 144:ef7eb2e8f9f7 79 __I uint32_t OUTPUT_STATE :1; /**< Current state of PWM output */
<> 144:ef7eb2e8f9f7 80 } BITS;
<> 144:ef7eb2e8f9f7 81 __IO uint32_t WORD;
<> 144:ef7eb2e8f9f7 82 } PWM_ENABLE;
<> 144:ef7eb2e8f9f7 83 __O uint32_t PWM_DISABLE;
<> 144:ef7eb2e8f9f7 84 union {
<> 144:ef7eb2e8f9f7 85 struct {
<> 144:ef7eb2e8f9f7 86 __O uint32_t ENABLE :8; /**< Write any value to select enable the 4-bit prescaler */
<> 144:ef7eb2e8f9f7 87 __I uint32_t STATE:1; /**< Current state of the prescaler. ‘1’ the prescaler is enabled. ‘0’ the prescaler is disabled. */
<> 144:ef7eb2e8f9f7 88 } BITS;
<> 144:ef7eb2e8f9f7 89 __IO uint32_t WORD;
<> 144:ef7eb2e8f9f7 90 } PRESCALE_ENABLE;
<> 144:ef7eb2e8f9f7 91 __O uint32_t PRESCALE_DISABLE;
<> 144:ef7eb2e8f9f7 92 } PwmReg_t, *PwmReg_pt;
<> 144:ef7eb2e8f9f7 93 #endif /* REVD */
<> 144:ef7eb2e8f9f7 94 #endif /* PWM_MAP_H_ */