added prescaler for 16 bit pwm in LPC1347 target
Fork of mbed-dev by
targets/cmsis/TARGET_STM/TARGET_STM32F7/stm32f7xx_hal_usart.c@144:ef7eb2e8f9f7, 2016-09-02 (annotated)
- Committer:
- <>
- Date:
- Fri Sep 02 15:07:44 2016 +0100
- Revision:
- 144:ef7eb2e8f9f7
- Parent:
- 83:a036322b8637
This updates the lib to the mbed lib v125
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
<> | 144:ef7eb2e8f9f7 | 1 | /** |
<> | 144:ef7eb2e8f9f7 | 2 | ****************************************************************************** |
<> | 144:ef7eb2e8f9f7 | 3 | * @file stm32f7xx_hal_usart.c |
<> | 144:ef7eb2e8f9f7 | 4 | * @author MCD Application Team |
<> | 144:ef7eb2e8f9f7 | 5 | * @version V1.1.0 |
<> | 144:ef7eb2e8f9f7 | 6 | * @date 22-April-2016 |
<> | 144:ef7eb2e8f9f7 | 7 | * @brief USART HAL module driver. |
<> | 144:ef7eb2e8f9f7 | 8 | * This file provides firmware functions to manage the following |
<> | 144:ef7eb2e8f9f7 | 9 | * functionalities of the Universal Synchronous/Asynchronous Receiver Transmitter |
<> | 144:ef7eb2e8f9f7 | 10 | * Peripheral (USART). |
<> | 144:ef7eb2e8f9f7 | 11 | * + Initialization and de-initialization functions |
<> | 144:ef7eb2e8f9f7 | 12 | * + IO operation functions |
<> | 144:ef7eb2e8f9f7 | 13 | * + Peripheral Control functions |
<> | 144:ef7eb2e8f9f7 | 14 | * |
<> | 144:ef7eb2e8f9f7 | 15 | @verbatim |
<> | 144:ef7eb2e8f9f7 | 16 | =============================================================================== |
<> | 144:ef7eb2e8f9f7 | 17 | ##### How to use this driver ##### |
<> | 144:ef7eb2e8f9f7 | 18 | =============================================================================== |
<> | 144:ef7eb2e8f9f7 | 19 | [..] |
<> | 144:ef7eb2e8f9f7 | 20 | The USART HAL driver can be used as follows: |
<> | 144:ef7eb2e8f9f7 | 21 | |
<> | 144:ef7eb2e8f9f7 | 22 | (#) Declare a USART_HandleTypeDef handle structure. |
<> | 144:ef7eb2e8f9f7 | 23 | (#) Initialize the USART low level resources by implement the HAL_USART_MspInit ()API: |
<> | 144:ef7eb2e8f9f7 | 24 | (##) Enable the USARTx interface clock. |
<> | 144:ef7eb2e8f9f7 | 25 | (##) USART pins configuration: |
<> | 144:ef7eb2e8f9f7 | 26 | (+++) Enable the clock for the USART GPIOs. |
<> | 144:ef7eb2e8f9f7 | 27 | (+++) Configure these USART pins as alternate function pull-up. |
<> | 144:ef7eb2e8f9f7 | 28 | (##) NVIC configuration if you need to use interrupt process (HAL_USART_Transmit_IT(), |
<> | 144:ef7eb2e8f9f7 | 29 | HAL_USART_Receive_IT() and HAL_USART_TransmitReceive_IT() APIs): |
<> | 144:ef7eb2e8f9f7 | 30 | (+++) Configure the USARTx interrupt priority. |
<> | 144:ef7eb2e8f9f7 | 31 | (+++) Enable the NVIC USART IRQ handle. |
<> | 144:ef7eb2e8f9f7 | 32 | (+++) The specific USART interrupts (Transmission complete interrupt, |
<> | 144:ef7eb2e8f9f7 | 33 | RXNE interrupt and Error Interrupts) will be managed using the macros |
<> | 144:ef7eb2e8f9f7 | 34 | __HAL_USART_ENABLE_IT() and __HAL_USART_DISABLE_IT() inside the transmit and receive process. |
<> | 144:ef7eb2e8f9f7 | 35 | (##) DMA Configuration if you need to use DMA process (HAL_USART_Transmit_DMA() |
<> | 144:ef7eb2e8f9f7 | 36 | HAL_USART_Receive_IT() and HAL_USART_TransmitReceive_IT() APIs): |
<> | 144:ef7eb2e8f9f7 | 37 | (+++) Declare a DMA handle structure for the Tx/Rx stream. |
<> | 144:ef7eb2e8f9f7 | 38 | (+++) Enable the DMAx interface clock. |
<> | 144:ef7eb2e8f9f7 | 39 | (+++) Configure the declared DMA handle structure with the required Tx/Rx parameters. |
<> | 144:ef7eb2e8f9f7 | 40 | (+++) Configure the DMA Tx/Rx Stream. |
<> | 144:ef7eb2e8f9f7 | 41 | (+++) Associate the initialized DMA handle to the USART DMA Tx/Rx handle. |
<> | 144:ef7eb2e8f9f7 | 42 | (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the DMA Tx/Rx Stream. |
<> | 144:ef7eb2e8f9f7 | 43 | |
<> | 144:ef7eb2e8f9f7 | 44 | (#) Program the Baud Rate, Word Length, Stop Bit, Parity, Hardware |
<> | 144:ef7eb2e8f9f7 | 45 | flow control and Mode(Receiver/Transmitter) in the husart Init structure. |
<> | 144:ef7eb2e8f9f7 | 46 | |
<> | 144:ef7eb2e8f9f7 | 47 | (#) Initialize the USART registers by calling the HAL_USART_Init() API: |
<> | 144:ef7eb2e8f9f7 | 48 | (++) These API's configures also the low level Hardware (GPIO, CLOCK, CORTEX...etc) |
<> | 144:ef7eb2e8f9f7 | 49 | by calling the customed HAL_USART_MspInit(&husart) API. |
<> | 144:ef7eb2e8f9f7 | 50 | |
<> | 144:ef7eb2e8f9f7 | 51 | @endverbatim |
<> | 144:ef7eb2e8f9f7 | 52 | ****************************************************************************** |
<> | 144:ef7eb2e8f9f7 | 53 | * @attention |
<> | 144:ef7eb2e8f9f7 | 54 | * |
<> | 144:ef7eb2e8f9f7 | 55 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
<> | 144:ef7eb2e8f9f7 | 56 | * |
<> | 144:ef7eb2e8f9f7 | 57 | * Redistribution and use in source and binary forms, with or without modification, |
<> | 144:ef7eb2e8f9f7 | 58 | * are permitted provided that the following conditions are met: |
<> | 144:ef7eb2e8f9f7 | 59 | * 1. Redistributions of source code must retain the above copyright notice, |
<> | 144:ef7eb2e8f9f7 | 60 | * this list of conditions and the following disclaimer. |
<> | 144:ef7eb2e8f9f7 | 61 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
<> | 144:ef7eb2e8f9f7 | 62 | * this list of conditions and the following disclaimer in the documentation |
<> | 144:ef7eb2e8f9f7 | 63 | * and/or other materials provided with the distribution. |
<> | 144:ef7eb2e8f9f7 | 64 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
<> | 144:ef7eb2e8f9f7 | 65 | * may be used to endorse or promote products derived from this software |
<> | 144:ef7eb2e8f9f7 | 66 | * without specific prior written permission. |
<> | 144:ef7eb2e8f9f7 | 67 | * |
<> | 144:ef7eb2e8f9f7 | 68 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
<> | 144:ef7eb2e8f9f7 | 69 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
<> | 144:ef7eb2e8f9f7 | 70 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
<> | 144:ef7eb2e8f9f7 | 71 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
<> | 144:ef7eb2e8f9f7 | 72 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
<> | 144:ef7eb2e8f9f7 | 73 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
<> | 144:ef7eb2e8f9f7 | 74 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
<> | 144:ef7eb2e8f9f7 | 75 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
<> | 144:ef7eb2e8f9f7 | 76 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
<> | 144:ef7eb2e8f9f7 | 77 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
<> | 144:ef7eb2e8f9f7 | 78 | * |
<> | 144:ef7eb2e8f9f7 | 79 | ****************************************************************************** |
<> | 144:ef7eb2e8f9f7 | 80 | */ |
<> | 144:ef7eb2e8f9f7 | 81 | |
<> | 144:ef7eb2e8f9f7 | 82 | /* Includes ------------------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 83 | #include "stm32f7xx_hal.h" |
<> | 144:ef7eb2e8f9f7 | 84 | |
<> | 144:ef7eb2e8f9f7 | 85 | /** @addtogroup STM32F7xx_HAL_Driver |
<> | 144:ef7eb2e8f9f7 | 86 | * @{ |
<> | 144:ef7eb2e8f9f7 | 87 | */ |
<> | 144:ef7eb2e8f9f7 | 88 | |
<> | 144:ef7eb2e8f9f7 | 89 | /** @defgroup USART USART |
<> | 144:ef7eb2e8f9f7 | 90 | * @brief HAL USART Synchronous module driver |
<> | 144:ef7eb2e8f9f7 | 91 | * @{ |
<> | 144:ef7eb2e8f9f7 | 92 | */ |
<> | 144:ef7eb2e8f9f7 | 93 | |
<> | 144:ef7eb2e8f9f7 | 94 | #ifdef HAL_USART_MODULE_ENABLED |
<> | 144:ef7eb2e8f9f7 | 95 | |
<> | 144:ef7eb2e8f9f7 | 96 | /* Private typedef -----------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 97 | /* Private define ------------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 98 | /** @addtogroup USART_Private_Constants |
<> | 144:ef7eb2e8f9f7 | 99 | * @{ |
<> | 144:ef7eb2e8f9f7 | 100 | */ |
<> | 144:ef7eb2e8f9f7 | 101 | #define DUMMY_DATA ((uint16_t) 0xFFFFU) |
<> | 144:ef7eb2e8f9f7 | 102 | #define TEACK_REACK_TIMEOUT ((uint32_t) 1000U) |
<> | 144:ef7eb2e8f9f7 | 103 | #define USART_CR1_FIELDS ((uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | \ |
<> | 144:ef7eb2e8f9f7 | 104 | USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8)) |
<> | 144:ef7eb2e8f9f7 | 105 | #define USART_CR2_FIELDS ((uint32_t)(USART_CR2_CPHA | USART_CR2_CPOL | \ |
<> | 144:ef7eb2e8f9f7 | 106 | USART_CR2_CLKEN | USART_CR2_LBCL | USART_CR2_STOP)) |
<> | 144:ef7eb2e8f9f7 | 107 | /** |
<> | 144:ef7eb2e8f9f7 | 108 | * @} |
<> | 144:ef7eb2e8f9f7 | 109 | */ |
<> | 144:ef7eb2e8f9f7 | 110 | /* Private macro -------------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 111 | /* Private variables ---------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 112 | /* Private function prototypes -----------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 113 | /* Private functions ---------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 114 | /** @addtogroup USART_Private_Functions |
<> | 144:ef7eb2e8f9f7 | 115 | * @{ |
<> | 144:ef7eb2e8f9f7 | 116 | */ |
<> | 144:ef7eb2e8f9f7 | 117 | static void USART_DMATransmitCplt(DMA_HandleTypeDef *hdma); |
<> | 144:ef7eb2e8f9f7 | 118 | static void USART_DMAReceiveCplt(DMA_HandleTypeDef *hdma); |
<> | 144:ef7eb2e8f9f7 | 119 | static void USART_DMATxHalfCplt(DMA_HandleTypeDef *hdma); |
<> | 144:ef7eb2e8f9f7 | 120 | static void USART_DMARxHalfCplt(DMA_HandleTypeDef *hdma); |
<> | 144:ef7eb2e8f9f7 | 121 | static void USART_DMAError(DMA_HandleTypeDef *hdma); |
<> | 144:ef7eb2e8f9f7 | 122 | static void USART_DMAAbortOnError(DMA_HandleTypeDef *hdma); |
<> | 144:ef7eb2e8f9f7 | 123 | static void USART_EndTxTransfer(USART_HandleTypeDef *husart); |
<> | 144:ef7eb2e8f9f7 | 124 | static void USART_EndRxTransfer(USART_HandleTypeDef *husart); |
<> | 144:ef7eb2e8f9f7 | 125 | static HAL_StatusTypeDef USART_WaitOnFlagUntilTimeout(USART_HandleTypeDef *husart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout); |
<> | 144:ef7eb2e8f9f7 | 126 | static HAL_StatusTypeDef USART_SetConfig(USART_HandleTypeDef *husart); |
<> | 144:ef7eb2e8f9f7 | 127 | static HAL_StatusTypeDef USART_CheckIdleState(USART_HandleTypeDef *husart); |
<> | 144:ef7eb2e8f9f7 | 128 | static HAL_StatusTypeDef USART_Transmit_IT(USART_HandleTypeDef *husart); |
<> | 144:ef7eb2e8f9f7 | 129 | static HAL_StatusTypeDef USART_EndTransmit_IT(USART_HandleTypeDef *husart); |
<> | 144:ef7eb2e8f9f7 | 130 | static HAL_StatusTypeDef USART_Receive_IT(USART_HandleTypeDef *husart); |
<> | 144:ef7eb2e8f9f7 | 131 | static HAL_StatusTypeDef USART_TransmitReceive_IT(USART_HandleTypeDef *husart); |
<> | 144:ef7eb2e8f9f7 | 132 | |
<> | 144:ef7eb2e8f9f7 | 133 | /** |
<> | 144:ef7eb2e8f9f7 | 134 | * @} |
<> | 144:ef7eb2e8f9f7 | 135 | */ |
<> | 144:ef7eb2e8f9f7 | 136 | |
<> | 144:ef7eb2e8f9f7 | 137 | /* Exported functions --------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 138 | |
<> | 144:ef7eb2e8f9f7 | 139 | /** @defgroup USART_Exported_Functions USART Exported Functions |
<> | 144:ef7eb2e8f9f7 | 140 | * @{ |
<> | 144:ef7eb2e8f9f7 | 141 | */ |
<> | 144:ef7eb2e8f9f7 | 142 | |
<> | 144:ef7eb2e8f9f7 | 143 | /** @defgroup USART_Exported_Functions_Group1 USART Initialization and de-initialization functions |
<> | 144:ef7eb2e8f9f7 | 144 | * @brief Initialization and Configuration functions |
<> | 144:ef7eb2e8f9f7 | 145 | * |
<> | 144:ef7eb2e8f9f7 | 146 | @verbatim |
<> | 144:ef7eb2e8f9f7 | 147 | =============================================================================== |
<> | 144:ef7eb2e8f9f7 | 148 | ##### Initialization and Configuration functions ##### |
<> | 144:ef7eb2e8f9f7 | 149 | =============================================================================== |
<> | 144:ef7eb2e8f9f7 | 150 | [..] |
<> | 144:ef7eb2e8f9f7 | 151 | This subsection provides a set of functions allowing to initialize the USART |
<> | 144:ef7eb2e8f9f7 | 152 | in asynchronous and in synchronous modes. |
<> | 144:ef7eb2e8f9f7 | 153 | (+) For the asynchronous mode only these parameters can be configured: |
<> | 144:ef7eb2e8f9f7 | 154 | (++) Baud Rate |
<> | 144:ef7eb2e8f9f7 | 155 | (++) Word Length |
<> | 144:ef7eb2e8f9f7 | 156 | (++) Stop Bit |
<> | 144:ef7eb2e8f9f7 | 157 | (++) Parity: If the parity is enabled, then the MSB bit of the data written |
<> | 144:ef7eb2e8f9f7 | 158 | in the data register is transmitted but is changed by the parity bit. |
<> | 144:ef7eb2e8f9f7 | 159 | (++) USART polarity |
<> | 144:ef7eb2e8f9f7 | 160 | (++) USART phase |
<> | 144:ef7eb2e8f9f7 | 161 | (++) USART LastBit |
<> | 144:ef7eb2e8f9f7 | 162 | (++) Receiver/transmitter modes |
<> | 144:ef7eb2e8f9f7 | 163 | |
<> | 144:ef7eb2e8f9f7 | 164 | [..] |
<> | 144:ef7eb2e8f9f7 | 165 | The HAL_USART_Init() function follows the USART synchronous configuration |
<> | 144:ef7eb2e8f9f7 | 166 | procedure (details for the procedure are available in reference manual). |
<> | 144:ef7eb2e8f9f7 | 167 | |
<> | 144:ef7eb2e8f9f7 | 168 | @endverbatim |
<> | 144:ef7eb2e8f9f7 | 169 | |
<> | 144:ef7eb2e8f9f7 | 170 | Depending on the frame length defined by the M1 and M0 bits (7-bit, |
<> | 144:ef7eb2e8f9f7 | 171 | 8-bit or 9-bit), the possible USART frame formats are as listed in the |
<> | 144:ef7eb2e8f9f7 | 172 | following table: |
<> | 144:ef7eb2e8f9f7 | 173 | |
<> | 144:ef7eb2e8f9f7 | 174 | +---------------------------------------------------------------+ |
<> | 144:ef7eb2e8f9f7 | 175 | | M1M0 bits | PCE bit | USART frame | |
<> | 144:ef7eb2e8f9f7 | 176 | |-----------------------|---------------------------------------| |
<> | 144:ef7eb2e8f9f7 | 177 | | 10 | 0 | | SB | 7-bit data | STB | | |
<> | 144:ef7eb2e8f9f7 | 178 | |-----------|-----------|---------------------------------------| |
<> | 144:ef7eb2e8f9f7 | 179 | | 10 | 1 | | SB | 6-bit data | PB | STB | | |
<> | 144:ef7eb2e8f9f7 | 180 | +---------------------------------------------------------------+ |
<> | 144:ef7eb2e8f9f7 | 181 | |
<> | 144:ef7eb2e8f9f7 | 182 | * @{ |
<> | 144:ef7eb2e8f9f7 | 183 | */ |
<> | 144:ef7eb2e8f9f7 | 184 | |
<> | 144:ef7eb2e8f9f7 | 185 | /** |
<> | 144:ef7eb2e8f9f7 | 186 | * @brief Initializes the USART mode according to the specified |
<> | 144:ef7eb2e8f9f7 | 187 | * parameters in the USART_InitTypeDef and create the associated handle. |
<> | 144:ef7eb2e8f9f7 | 188 | * @param husart: USART handle |
<> | 144:ef7eb2e8f9f7 | 189 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 190 | */ |
<> | 144:ef7eb2e8f9f7 | 191 | HAL_StatusTypeDef HAL_USART_Init(USART_HandleTypeDef *husart) |
<> | 144:ef7eb2e8f9f7 | 192 | { |
<> | 144:ef7eb2e8f9f7 | 193 | /* Check the USART handle allocation */ |
<> | 144:ef7eb2e8f9f7 | 194 | if(husart == NULL) |
<> | 144:ef7eb2e8f9f7 | 195 | { |
<> | 144:ef7eb2e8f9f7 | 196 | return HAL_ERROR; |
<> | 144:ef7eb2e8f9f7 | 197 | } |
<> | 144:ef7eb2e8f9f7 | 198 | |
<> | 144:ef7eb2e8f9f7 | 199 | /* Check the parameters */ |
<> | 144:ef7eb2e8f9f7 | 200 | assert_param(IS_USART_INSTANCE(husart->Instance)); |
<> | 144:ef7eb2e8f9f7 | 201 | |
<> | 144:ef7eb2e8f9f7 | 202 | if(husart->State == HAL_USART_STATE_RESET) |
<> | 144:ef7eb2e8f9f7 | 203 | { |
<> | 144:ef7eb2e8f9f7 | 204 | /* Allocate lock resource and initialize it */ |
<> | 144:ef7eb2e8f9f7 | 205 | husart->Lock = HAL_UNLOCKED; |
<> | 144:ef7eb2e8f9f7 | 206 | /* Init the low level hardware : GPIO, CLOCK */ |
<> | 144:ef7eb2e8f9f7 | 207 | HAL_USART_MspInit(husart); |
<> | 144:ef7eb2e8f9f7 | 208 | } |
<> | 144:ef7eb2e8f9f7 | 209 | |
<> | 144:ef7eb2e8f9f7 | 210 | husart->State = HAL_USART_STATE_BUSY; |
<> | 144:ef7eb2e8f9f7 | 211 | |
<> | 144:ef7eb2e8f9f7 | 212 | /* Disable the Peripheral */ |
<> | 144:ef7eb2e8f9f7 | 213 | __HAL_USART_DISABLE(husart); |
<> | 144:ef7eb2e8f9f7 | 214 | |
<> | 144:ef7eb2e8f9f7 | 215 | /* Set the Usart Communication parameters */ |
<> | 144:ef7eb2e8f9f7 | 216 | if (USART_SetConfig(husart) == HAL_ERROR) |
<> | 144:ef7eb2e8f9f7 | 217 | { |
<> | 144:ef7eb2e8f9f7 | 218 | return HAL_ERROR; |
<> | 144:ef7eb2e8f9f7 | 219 | } |
<> | 144:ef7eb2e8f9f7 | 220 | |
<> | 144:ef7eb2e8f9f7 | 221 | /* In Synchronous mode, the following bits must be kept cleared: |
<> | 144:ef7eb2e8f9f7 | 222 | - LINEN bit in the USART_CR2 register |
<> | 144:ef7eb2e8f9f7 | 223 | - HDSEL, SCEN and IREN bits in the USART_CR3 register.*/ |
<> | 144:ef7eb2e8f9f7 | 224 | CLEAR_BIT(husart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); |
<> | 144:ef7eb2e8f9f7 | 225 | CLEAR_BIT(husart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); |
<> | 144:ef7eb2e8f9f7 | 226 | |
<> | 144:ef7eb2e8f9f7 | 227 | /* Enable the Peripheral */ |
<> | 144:ef7eb2e8f9f7 | 228 | __HAL_USART_ENABLE(husart); |
<> | 144:ef7eb2e8f9f7 | 229 | |
<> | 144:ef7eb2e8f9f7 | 230 | /* TEACK and/or REACK to check before moving husart->State to Ready */ |
<> | 144:ef7eb2e8f9f7 | 231 | return (USART_CheckIdleState(husart)); |
<> | 144:ef7eb2e8f9f7 | 232 | } |
<> | 144:ef7eb2e8f9f7 | 233 | |
<> | 144:ef7eb2e8f9f7 | 234 | /** |
<> | 144:ef7eb2e8f9f7 | 235 | * @brief DeInitializes the USART peripheral |
<> | 144:ef7eb2e8f9f7 | 236 | * @param husart: USART handle |
<> | 144:ef7eb2e8f9f7 | 237 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 238 | */ |
<> | 144:ef7eb2e8f9f7 | 239 | HAL_StatusTypeDef HAL_USART_DeInit(USART_HandleTypeDef *husart) |
<> | 144:ef7eb2e8f9f7 | 240 | { |
<> | 144:ef7eb2e8f9f7 | 241 | /* Check the USART handle allocation */ |
<> | 144:ef7eb2e8f9f7 | 242 | if(husart == NULL) |
<> | 144:ef7eb2e8f9f7 | 243 | { |
<> | 144:ef7eb2e8f9f7 | 244 | return HAL_ERROR; |
<> | 144:ef7eb2e8f9f7 | 245 | } |
<> | 144:ef7eb2e8f9f7 | 246 | |
<> | 144:ef7eb2e8f9f7 | 247 | /* Check the parameters */ |
<> | 144:ef7eb2e8f9f7 | 248 | assert_param(IS_USART_INSTANCE(husart->Instance)); |
<> | 144:ef7eb2e8f9f7 | 249 | |
<> | 144:ef7eb2e8f9f7 | 250 | husart->State = HAL_USART_STATE_BUSY; |
<> | 144:ef7eb2e8f9f7 | 251 | |
<> | 144:ef7eb2e8f9f7 | 252 | husart->Instance->CR1 = 0x0U; |
<> | 144:ef7eb2e8f9f7 | 253 | husart->Instance->CR2 = 0x0U; |
<> | 144:ef7eb2e8f9f7 | 254 | husart->Instance->CR3 = 0x0U; |
<> | 144:ef7eb2e8f9f7 | 255 | |
<> | 144:ef7eb2e8f9f7 | 256 | /* DeInit the low level hardware */ |
<> | 144:ef7eb2e8f9f7 | 257 | HAL_USART_MspDeInit(husart); |
<> | 144:ef7eb2e8f9f7 | 258 | |
<> | 144:ef7eb2e8f9f7 | 259 | husart->ErrorCode = HAL_USART_ERROR_NONE; |
<> | 144:ef7eb2e8f9f7 | 260 | husart->State = HAL_USART_STATE_RESET; |
<> | 144:ef7eb2e8f9f7 | 261 | |
<> | 144:ef7eb2e8f9f7 | 262 | /* Process Unlock */ |
<> | 144:ef7eb2e8f9f7 | 263 | __HAL_UNLOCK(husart); |
<> | 144:ef7eb2e8f9f7 | 264 | |
<> | 144:ef7eb2e8f9f7 | 265 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 266 | } |
<> | 144:ef7eb2e8f9f7 | 267 | |
<> | 144:ef7eb2e8f9f7 | 268 | /** |
<> | 144:ef7eb2e8f9f7 | 269 | * @brief USART MSP Init |
<> | 144:ef7eb2e8f9f7 | 270 | * @param husart: USART handle |
<> | 144:ef7eb2e8f9f7 | 271 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 272 | */ |
<> | 144:ef7eb2e8f9f7 | 273 | __weak void HAL_USART_MspInit(USART_HandleTypeDef *husart) |
<> | 144:ef7eb2e8f9f7 | 274 | { |
<> | 144:ef7eb2e8f9f7 | 275 | /* Prevent unused argument(s) compilation warning */ |
<> | 144:ef7eb2e8f9f7 | 276 | UNUSED(husart); |
<> | 144:ef7eb2e8f9f7 | 277 | |
<> | 144:ef7eb2e8f9f7 | 278 | /* NOTE : This function should not be modified, when the callback is needed, |
<> | 144:ef7eb2e8f9f7 | 279 | the HAL_USART_MspInit can be implemented in the user file |
<> | 144:ef7eb2e8f9f7 | 280 | */ |
<> | 144:ef7eb2e8f9f7 | 281 | } |
<> | 144:ef7eb2e8f9f7 | 282 | |
<> | 144:ef7eb2e8f9f7 | 283 | /** |
<> | 144:ef7eb2e8f9f7 | 284 | * @brief USART MSP DeInit |
<> | 144:ef7eb2e8f9f7 | 285 | * @param husart: USART handle |
<> | 144:ef7eb2e8f9f7 | 286 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 287 | */ |
<> | 144:ef7eb2e8f9f7 | 288 | __weak void HAL_USART_MspDeInit(USART_HandleTypeDef *husart) |
<> | 144:ef7eb2e8f9f7 | 289 | { |
<> | 144:ef7eb2e8f9f7 | 290 | /* Prevent unused argument(s) compilation warning */ |
<> | 144:ef7eb2e8f9f7 | 291 | UNUSED(husart); |
<> | 144:ef7eb2e8f9f7 | 292 | |
<> | 144:ef7eb2e8f9f7 | 293 | /* NOTE : This function should not be modified, when the callback is needed, |
<> | 144:ef7eb2e8f9f7 | 294 | the HAL_USART_MspDeInit can be implemented in the user file |
<> | 144:ef7eb2e8f9f7 | 295 | */ |
<> | 144:ef7eb2e8f9f7 | 296 | } |
<> | 144:ef7eb2e8f9f7 | 297 | |
<> | 144:ef7eb2e8f9f7 | 298 | /** |
<> | 144:ef7eb2e8f9f7 | 299 | * @} |
<> | 144:ef7eb2e8f9f7 | 300 | */ |
<> | 144:ef7eb2e8f9f7 | 301 | |
<> | 144:ef7eb2e8f9f7 | 302 | /** @defgroup USART_Exported_Functions_Group2 IO operation functions |
<> | 144:ef7eb2e8f9f7 | 303 | * @brief USART Transmit and Receive functions |
<> | 144:ef7eb2e8f9f7 | 304 | * |
<> | 144:ef7eb2e8f9f7 | 305 | @verbatim |
<> | 144:ef7eb2e8f9f7 | 306 | =============================================================================== |
<> | 144:ef7eb2e8f9f7 | 307 | ##### IO operation functions ##### |
<> | 144:ef7eb2e8f9f7 | 308 | =============================================================================== |
<> | 144:ef7eb2e8f9f7 | 309 | This subsection provides a set of functions allowing to manage the USART synchronous |
<> | 144:ef7eb2e8f9f7 | 310 | data transfers. |
<> | 144:ef7eb2e8f9f7 | 311 | |
<> | 144:ef7eb2e8f9f7 | 312 | [..] The USART supports master mode only: it cannot receive or send data related to an input |
<> | 144:ef7eb2e8f9f7 | 313 | clock (SCLK is always an output). |
<> | 144:ef7eb2e8f9f7 | 314 | |
<> | 144:ef7eb2e8f9f7 | 315 | (#) There are two mode of transfer: |
<> | 144:ef7eb2e8f9f7 | 316 | (++) Blocking mode: The communication is performed in polling mode. |
<> | 144:ef7eb2e8f9f7 | 317 | The HAL status of all data processing is returned by the same function |
<> | 144:ef7eb2e8f9f7 | 318 | after finishing transfer. |
<> | 144:ef7eb2e8f9f7 | 319 | (++) No-Blocking mode: The communication is performed using Interrupts |
<> | 144:ef7eb2e8f9f7 | 320 | or DMA, These API's return the HAL status. |
<> | 144:ef7eb2e8f9f7 | 321 | The end of the data processing will be indicated through the |
<> | 144:ef7eb2e8f9f7 | 322 | dedicated USART IRQ when using Interrupt mode or the DMA IRQ when |
<> | 144:ef7eb2e8f9f7 | 323 | using DMA mode. |
<> | 144:ef7eb2e8f9f7 | 324 | The HAL_USART_TxCpltCallback(), HAL_USART_RxCpltCallback() and HAL_USART_TxRxCpltCallback() user callbacks |
<> | 144:ef7eb2e8f9f7 | 325 | will be executed respectively at the end of the transmit or Receive process |
<> | 144:ef7eb2e8f9f7 | 326 | The HAL_USART_ErrorCallback()user callback will be executed when a communication error is detected |
<> | 144:ef7eb2e8f9f7 | 327 | |
<> | 144:ef7eb2e8f9f7 | 328 | (#) Blocking mode API's are : |
<> | 144:ef7eb2e8f9f7 | 329 | (++) HAL_USART_Transmit()in simplex mode |
<> | 144:ef7eb2e8f9f7 | 330 | (++) HAL_USART_Receive() in full duplex receive only |
<> | 144:ef7eb2e8f9f7 | 331 | (++) HAL_USART_TransmitReceive() in full duplex mode |
<> | 144:ef7eb2e8f9f7 | 332 | |
<> | 144:ef7eb2e8f9f7 | 333 | (#) Non-Blocking mode API's with Interrupt are : |
<> | 144:ef7eb2e8f9f7 | 334 | (++) HAL_USART_Transmit_IT()in simplex mode |
<> | 144:ef7eb2e8f9f7 | 335 | (++) HAL_USART_Receive_IT() in full duplex receive only |
<> | 144:ef7eb2e8f9f7 | 336 | (++) HAL_USART_TransmitReceive_IT()in full duplex mode |
<> | 144:ef7eb2e8f9f7 | 337 | (++) HAL_USART_IRQHandler() |
<> | 144:ef7eb2e8f9f7 | 338 | |
<> | 144:ef7eb2e8f9f7 | 339 | (#) No-Blocking mode functions with DMA are : |
<> | 144:ef7eb2e8f9f7 | 340 | (++) HAL_USART_Transmit_DMA()in simplex mode |
<> | 144:ef7eb2e8f9f7 | 341 | (++) HAL_USART_Receive_DMA() in full duplex receive only |
<> | 144:ef7eb2e8f9f7 | 342 | (++) HAL_USART_TransmitReceive_DMA() in full duplex mode |
<> | 144:ef7eb2e8f9f7 | 343 | (++) HAL_USART_DMAPause() |
<> | 144:ef7eb2e8f9f7 | 344 | (++) HAL_USART_DMAResume() |
<> | 144:ef7eb2e8f9f7 | 345 | (++) HAL_USART_DMAStop() |
<> | 144:ef7eb2e8f9f7 | 346 | |
<> | 144:ef7eb2e8f9f7 | 347 | (#) A set of Transfer Complete Callbacks are provided in No_Blocking mode: |
<> | 144:ef7eb2e8f9f7 | 348 | (++) HAL_USART_TxCpltCallback() |
<> | 144:ef7eb2e8f9f7 | 349 | (++) HAL_USART_RxCpltCallback() |
<> | 144:ef7eb2e8f9f7 | 350 | (++) HAL_USART_TxHalfCpltCallback() |
<> | 144:ef7eb2e8f9f7 | 351 | (++) HAL_USART_RxHalfCpltCallback() |
<> | 144:ef7eb2e8f9f7 | 352 | (++) HAL_USART_ErrorCallback() |
<> | 144:ef7eb2e8f9f7 | 353 | (++) HAL_USART_TxRxCpltCallback() |
<> | 144:ef7eb2e8f9f7 | 354 | |
<> | 144:ef7eb2e8f9f7 | 355 | @endverbatim |
<> | 144:ef7eb2e8f9f7 | 356 | * @{ |
<> | 144:ef7eb2e8f9f7 | 357 | */ |
<> | 144:ef7eb2e8f9f7 | 358 | |
<> | 144:ef7eb2e8f9f7 | 359 | /** |
<> | 144:ef7eb2e8f9f7 | 360 | * @brief Simplex Send an amount of data in blocking mode |
<> | 144:ef7eb2e8f9f7 | 361 | * @param husart: USART handle |
<> | 144:ef7eb2e8f9f7 | 362 | * @param pTxData: pointer to data buffer |
<> | 144:ef7eb2e8f9f7 | 363 | * @param Size: amount of data to be sent |
<> | 144:ef7eb2e8f9f7 | 364 | * @param Timeout : Timeout duration |
<> | 144:ef7eb2e8f9f7 | 365 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 366 | */ |
<> | 144:ef7eb2e8f9f7 | 367 | HAL_StatusTypeDef HAL_USART_Transmit(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size, uint32_t Timeout) |
<> | 144:ef7eb2e8f9f7 | 368 | { |
<> | 144:ef7eb2e8f9f7 | 369 | uint16_t* tmp; |
<> | 144:ef7eb2e8f9f7 | 370 | uint32_t tickstart = 0U; |
<> | 144:ef7eb2e8f9f7 | 371 | |
<> | 144:ef7eb2e8f9f7 | 372 | if(husart->State == HAL_USART_STATE_READY) |
<> | 144:ef7eb2e8f9f7 | 373 | { |
<> | 144:ef7eb2e8f9f7 | 374 | if((pTxData == NULL) || (Size == 0U)) |
<> | 144:ef7eb2e8f9f7 | 375 | { |
<> | 144:ef7eb2e8f9f7 | 376 | return HAL_ERROR; |
<> | 144:ef7eb2e8f9f7 | 377 | } |
<> | 144:ef7eb2e8f9f7 | 378 | |
<> | 144:ef7eb2e8f9f7 | 379 | /* Process Locked */ |
<> | 144:ef7eb2e8f9f7 | 380 | __HAL_LOCK(husart); |
<> | 144:ef7eb2e8f9f7 | 381 | |
<> | 144:ef7eb2e8f9f7 | 382 | husart->ErrorCode = HAL_USART_ERROR_NONE; |
<> | 144:ef7eb2e8f9f7 | 383 | husart->State = HAL_USART_STATE_BUSY_TX; |
<> | 144:ef7eb2e8f9f7 | 384 | |
<> | 144:ef7eb2e8f9f7 | 385 | /* Init tickstart for timeout managment*/ |
<> | 144:ef7eb2e8f9f7 | 386 | tickstart = HAL_GetTick(); |
<> | 144:ef7eb2e8f9f7 | 387 | |
<> | 144:ef7eb2e8f9f7 | 388 | husart->TxXferSize = Size; |
<> | 144:ef7eb2e8f9f7 | 389 | husart->TxXferCount = Size; |
<> | 144:ef7eb2e8f9f7 | 390 | |
<> | 144:ef7eb2e8f9f7 | 391 | /* Check the remaining data to be sent */ |
<> | 144:ef7eb2e8f9f7 | 392 | while(husart->TxXferCount > 0U) |
<> | 144:ef7eb2e8f9f7 | 393 | { |
<> | 144:ef7eb2e8f9f7 | 394 | husart->TxXferCount--; |
<> | 144:ef7eb2e8f9f7 | 395 | if(USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK) |
<> | 144:ef7eb2e8f9f7 | 396 | { |
<> | 144:ef7eb2e8f9f7 | 397 | return HAL_TIMEOUT; |
<> | 144:ef7eb2e8f9f7 | 398 | } |
<> | 144:ef7eb2e8f9f7 | 399 | if((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE)) |
<> | 144:ef7eb2e8f9f7 | 400 | { |
<> | 144:ef7eb2e8f9f7 | 401 | tmp = (uint16_t*) pTxData; |
<> | 144:ef7eb2e8f9f7 | 402 | husart->Instance->TDR = (*tmp & (uint16_t)0x01FFU); |
<> | 144:ef7eb2e8f9f7 | 403 | pTxData += 2; |
<> | 144:ef7eb2e8f9f7 | 404 | } |
<> | 144:ef7eb2e8f9f7 | 405 | else |
<> | 144:ef7eb2e8f9f7 | 406 | { |
<> | 144:ef7eb2e8f9f7 | 407 | husart->Instance->TDR = (*pTxData++ & (uint8_t)0xFFU); |
<> | 144:ef7eb2e8f9f7 | 408 | } |
<> | 144:ef7eb2e8f9f7 | 409 | } |
<> | 144:ef7eb2e8f9f7 | 410 | |
<> | 144:ef7eb2e8f9f7 | 411 | if(USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK) |
<> | 144:ef7eb2e8f9f7 | 412 | { |
<> | 144:ef7eb2e8f9f7 | 413 | return HAL_TIMEOUT; |
<> | 144:ef7eb2e8f9f7 | 414 | } |
<> | 144:ef7eb2e8f9f7 | 415 | |
<> | 144:ef7eb2e8f9f7 | 416 | husart->State = HAL_USART_STATE_READY; |
<> | 144:ef7eb2e8f9f7 | 417 | |
<> | 144:ef7eb2e8f9f7 | 418 | /* Process Unlocked */ |
<> | 144:ef7eb2e8f9f7 | 419 | __HAL_UNLOCK(husart); |
<> | 144:ef7eb2e8f9f7 | 420 | |
<> | 144:ef7eb2e8f9f7 | 421 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 422 | } |
<> | 144:ef7eb2e8f9f7 | 423 | else |
<> | 144:ef7eb2e8f9f7 | 424 | { |
<> | 144:ef7eb2e8f9f7 | 425 | return HAL_BUSY; |
<> | 144:ef7eb2e8f9f7 | 426 | } |
<> | 144:ef7eb2e8f9f7 | 427 | } |
<> | 144:ef7eb2e8f9f7 | 428 | |
<> | 144:ef7eb2e8f9f7 | 429 | /** |
<> | 144:ef7eb2e8f9f7 | 430 | * @brief Receive an amount of data in blocking mode |
<> | 144:ef7eb2e8f9f7 | 431 | * @note To receive synchronous data, dummy data are simultaneously transmitted |
<> | 144:ef7eb2e8f9f7 | 432 | * @param husart: USART handle |
<> | 144:ef7eb2e8f9f7 | 433 | * @param pRxData: pointer to data buffer |
<> | 144:ef7eb2e8f9f7 | 434 | * @param Size: amount of data to be received |
<> | 144:ef7eb2e8f9f7 | 435 | * @param Timeout : Timeout duration |
<> | 144:ef7eb2e8f9f7 | 436 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 437 | */ |
<> | 144:ef7eb2e8f9f7 | 438 | HAL_StatusTypeDef HAL_USART_Receive(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size, uint32_t Timeout) |
<> | 144:ef7eb2e8f9f7 | 439 | { |
<> | 144:ef7eb2e8f9f7 | 440 | uint16_t* tmp; |
<> | 144:ef7eb2e8f9f7 | 441 | uint16_t uhMask; |
<> | 144:ef7eb2e8f9f7 | 442 | uint32_t tickstart = 0U; |
<> | 144:ef7eb2e8f9f7 | 443 | |
<> | 144:ef7eb2e8f9f7 | 444 | if(husart->State == HAL_USART_STATE_READY) |
<> | 144:ef7eb2e8f9f7 | 445 | { |
<> | 144:ef7eb2e8f9f7 | 446 | if((pRxData == NULL) || (Size == 0U)) |
<> | 144:ef7eb2e8f9f7 | 447 | { |
<> | 144:ef7eb2e8f9f7 | 448 | return HAL_ERROR; |
<> | 144:ef7eb2e8f9f7 | 449 | } |
<> | 144:ef7eb2e8f9f7 | 450 | /* Process Locked */ |
<> | 144:ef7eb2e8f9f7 | 451 | __HAL_LOCK(husart); |
<> | 144:ef7eb2e8f9f7 | 452 | |
<> | 144:ef7eb2e8f9f7 | 453 | husart->ErrorCode = HAL_USART_ERROR_NONE; |
<> | 144:ef7eb2e8f9f7 | 454 | husart->State = HAL_USART_STATE_BUSY_RX; |
<> | 144:ef7eb2e8f9f7 | 455 | |
<> | 144:ef7eb2e8f9f7 | 456 | /* Init tickstart for timeout managment*/ |
<> | 144:ef7eb2e8f9f7 | 457 | tickstart = HAL_GetTick(); |
<> | 144:ef7eb2e8f9f7 | 458 | |
<> | 144:ef7eb2e8f9f7 | 459 | husart->RxXferSize = Size; |
<> | 144:ef7eb2e8f9f7 | 460 | husart->RxXferCount = Size; |
<> | 144:ef7eb2e8f9f7 | 461 | |
<> | 144:ef7eb2e8f9f7 | 462 | /* Computation of USART mask to apply to RDR register */ |
<> | 144:ef7eb2e8f9f7 | 463 | __HAL_USART_MASK_COMPUTATION(husart); |
<> | 144:ef7eb2e8f9f7 | 464 | uhMask = husart->Mask; |
<> | 144:ef7eb2e8f9f7 | 465 | |
<> | 144:ef7eb2e8f9f7 | 466 | /* as long as data have to be received */ |
<> | 144:ef7eb2e8f9f7 | 467 | while(husart->RxXferCount > 0U) |
<> | 144:ef7eb2e8f9f7 | 468 | { |
<> | 144:ef7eb2e8f9f7 | 469 | husart->RxXferCount--; |
<> | 144:ef7eb2e8f9f7 | 470 | |
<> | 144:ef7eb2e8f9f7 | 471 | /* Wait until TC flag is set to send dummy byte in order to generate the |
<> | 144:ef7eb2e8f9f7 | 472 | * clock for the slave to send data. |
<> | 144:ef7eb2e8f9f7 | 473 | * Whatever the frame length (7, 8 or 9-bit long), the same dummy value |
<> | 144:ef7eb2e8f9f7 | 474 | * can be written for all the cases. */ |
<> | 144:ef7eb2e8f9f7 | 475 | if(USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK) |
<> | 144:ef7eb2e8f9f7 | 476 | { |
<> | 144:ef7eb2e8f9f7 | 477 | return HAL_TIMEOUT; |
<> | 144:ef7eb2e8f9f7 | 478 | } |
<> | 144:ef7eb2e8f9f7 | 479 | husart->Instance->TDR = (DUMMY_DATA & (uint16_t)0x0FFU); |
<> | 144:ef7eb2e8f9f7 | 480 | |
<> | 144:ef7eb2e8f9f7 | 481 | /* Wait for RXNE Flag */ |
<> | 144:ef7eb2e8f9f7 | 482 | if(USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_RXNE, RESET, tickstart, Timeout) != HAL_OK) |
<> | 144:ef7eb2e8f9f7 | 483 | { |
<> | 144:ef7eb2e8f9f7 | 484 | return HAL_TIMEOUT; |
<> | 144:ef7eb2e8f9f7 | 485 | } |
<> | 144:ef7eb2e8f9f7 | 486 | |
<> | 144:ef7eb2e8f9f7 | 487 | if((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE)) |
<> | 144:ef7eb2e8f9f7 | 488 | { |
<> | 144:ef7eb2e8f9f7 | 489 | tmp = (uint16_t*) pRxData ; |
<> | 144:ef7eb2e8f9f7 | 490 | *tmp = (uint16_t)(husart->Instance->RDR & uhMask); |
<> | 144:ef7eb2e8f9f7 | 491 | pRxData +=2; |
<> | 144:ef7eb2e8f9f7 | 492 | } |
<> | 144:ef7eb2e8f9f7 | 493 | else |
<> | 144:ef7eb2e8f9f7 | 494 | { |
<> | 144:ef7eb2e8f9f7 | 495 | *pRxData++ = (uint8_t)(husart->Instance->RDR & (uint8_t)uhMask); |
<> | 144:ef7eb2e8f9f7 | 496 | } |
<> | 144:ef7eb2e8f9f7 | 497 | } |
<> | 144:ef7eb2e8f9f7 | 498 | |
<> | 144:ef7eb2e8f9f7 | 499 | husart->State = HAL_USART_STATE_READY; |
<> | 144:ef7eb2e8f9f7 | 500 | |
<> | 144:ef7eb2e8f9f7 | 501 | /* Process Unlocked */ |
<> | 144:ef7eb2e8f9f7 | 502 | __HAL_UNLOCK(husart); |
<> | 144:ef7eb2e8f9f7 | 503 | |
<> | 144:ef7eb2e8f9f7 | 504 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 505 | } |
<> | 144:ef7eb2e8f9f7 | 506 | else |
<> | 144:ef7eb2e8f9f7 | 507 | { |
<> | 144:ef7eb2e8f9f7 | 508 | return HAL_BUSY; |
<> | 144:ef7eb2e8f9f7 | 509 | } |
<> | 144:ef7eb2e8f9f7 | 510 | } |
<> | 144:ef7eb2e8f9f7 | 511 | |
<> | 144:ef7eb2e8f9f7 | 512 | /** |
<> | 144:ef7eb2e8f9f7 | 513 | * @brief Full-Duplex Send and Receive an amount of data in blocking mode |
<> | 144:ef7eb2e8f9f7 | 514 | * @param husart: USART handle |
<> | 144:ef7eb2e8f9f7 | 515 | * @param pTxData: pointer to TX data buffer |
<> | 144:ef7eb2e8f9f7 | 516 | * @param pRxData: pointer to RX data buffer |
<> | 144:ef7eb2e8f9f7 | 517 | * @param Size: amount of data to be sent (same amount to be received) |
<> | 144:ef7eb2e8f9f7 | 518 | * @param Timeout : Timeout duration |
<> | 144:ef7eb2e8f9f7 | 519 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 520 | */ |
<> | 144:ef7eb2e8f9f7 | 521 | HAL_StatusTypeDef HAL_USART_TransmitReceive(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout) |
<> | 144:ef7eb2e8f9f7 | 522 | { |
<> | 144:ef7eb2e8f9f7 | 523 | uint16_t* tmp; |
<> | 144:ef7eb2e8f9f7 | 524 | uint16_t uhMask; |
<> | 144:ef7eb2e8f9f7 | 525 | uint32_t tickstart = 0U; |
<> | 144:ef7eb2e8f9f7 | 526 | |
<> | 144:ef7eb2e8f9f7 | 527 | if(husart->State == HAL_USART_STATE_READY) |
<> | 144:ef7eb2e8f9f7 | 528 | { |
<> | 144:ef7eb2e8f9f7 | 529 | if((pTxData == NULL) || (pRxData == NULL) || (Size == 0U)) |
<> | 144:ef7eb2e8f9f7 | 530 | { |
<> | 144:ef7eb2e8f9f7 | 531 | return HAL_ERROR; |
<> | 144:ef7eb2e8f9f7 | 532 | } |
<> | 144:ef7eb2e8f9f7 | 533 | /* Process Locked */ |
<> | 144:ef7eb2e8f9f7 | 534 | __HAL_LOCK(husart); |
<> | 144:ef7eb2e8f9f7 | 535 | |
<> | 144:ef7eb2e8f9f7 | 536 | husart->ErrorCode = HAL_USART_ERROR_NONE; |
<> | 144:ef7eb2e8f9f7 | 537 | husart->State = HAL_USART_STATE_BUSY_RX; |
<> | 144:ef7eb2e8f9f7 | 538 | |
<> | 144:ef7eb2e8f9f7 | 539 | /* Init tickstart for timeout managment*/ |
<> | 144:ef7eb2e8f9f7 | 540 | tickstart = HAL_GetTick(); |
<> | 144:ef7eb2e8f9f7 | 541 | |
<> | 144:ef7eb2e8f9f7 | 542 | husart->RxXferSize = Size; |
<> | 144:ef7eb2e8f9f7 | 543 | husart->TxXferSize = Size; |
<> | 144:ef7eb2e8f9f7 | 544 | husart->TxXferCount = Size; |
<> | 144:ef7eb2e8f9f7 | 545 | husart->RxXferCount = Size; |
<> | 144:ef7eb2e8f9f7 | 546 | |
<> | 144:ef7eb2e8f9f7 | 547 | /* Computation of USART mask to apply to RDR register */ |
<> | 144:ef7eb2e8f9f7 | 548 | __HAL_USART_MASK_COMPUTATION(husart); |
<> | 144:ef7eb2e8f9f7 | 549 | uhMask = husart->Mask; |
<> | 144:ef7eb2e8f9f7 | 550 | |
<> | 144:ef7eb2e8f9f7 | 551 | /* Check the remain data to be sent */ |
<> | 144:ef7eb2e8f9f7 | 552 | while(husart->TxXferCount > 0) |
<> | 144:ef7eb2e8f9f7 | 553 | { |
<> | 144:ef7eb2e8f9f7 | 554 | husart->TxXferCount--; |
<> | 144:ef7eb2e8f9f7 | 555 | husart->RxXferCount--; |
<> | 144:ef7eb2e8f9f7 | 556 | |
<> | 144:ef7eb2e8f9f7 | 557 | /* Wait until TC flag is set to send data */ |
<> | 144:ef7eb2e8f9f7 | 558 | if(USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK) |
<> | 144:ef7eb2e8f9f7 | 559 | { |
<> | 144:ef7eb2e8f9f7 | 560 | return HAL_TIMEOUT; |
<> | 144:ef7eb2e8f9f7 | 561 | } |
<> | 144:ef7eb2e8f9f7 | 562 | if((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE)) |
<> | 144:ef7eb2e8f9f7 | 563 | { |
<> | 144:ef7eb2e8f9f7 | 564 | tmp = (uint16_t*) pTxData; |
<> | 144:ef7eb2e8f9f7 | 565 | husart->Instance->TDR = (*tmp & uhMask); |
<> | 144:ef7eb2e8f9f7 | 566 | pTxData += 2; |
<> | 144:ef7eb2e8f9f7 | 567 | } |
<> | 144:ef7eb2e8f9f7 | 568 | else |
<> | 144:ef7eb2e8f9f7 | 569 | { |
<> | 144:ef7eb2e8f9f7 | 570 | husart->Instance->TDR = (*pTxData++ & (uint8_t)uhMask); |
<> | 144:ef7eb2e8f9f7 | 571 | } |
<> | 144:ef7eb2e8f9f7 | 572 | |
<> | 144:ef7eb2e8f9f7 | 573 | /* Wait for RXNE Flag */ |
<> | 144:ef7eb2e8f9f7 | 574 | if(USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_RXNE, RESET, tickstart, Timeout) != HAL_OK) |
<> | 144:ef7eb2e8f9f7 | 575 | { |
<> | 144:ef7eb2e8f9f7 | 576 | return HAL_TIMEOUT; |
<> | 144:ef7eb2e8f9f7 | 577 | } |
<> | 144:ef7eb2e8f9f7 | 578 | |
<> | 144:ef7eb2e8f9f7 | 579 | if((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE)) |
<> | 144:ef7eb2e8f9f7 | 580 | { |
<> | 144:ef7eb2e8f9f7 | 581 | tmp = (uint16_t*) pRxData ; |
<> | 144:ef7eb2e8f9f7 | 582 | *tmp = (uint16_t)(husart->Instance->RDR & uhMask); |
<> | 144:ef7eb2e8f9f7 | 583 | pRxData +=2U; |
<> | 144:ef7eb2e8f9f7 | 584 | } |
<> | 144:ef7eb2e8f9f7 | 585 | else |
<> | 144:ef7eb2e8f9f7 | 586 | { |
<> | 144:ef7eb2e8f9f7 | 587 | *pRxData++ = (uint8_t)(husart->Instance->RDR & (uint8_t)uhMask); |
<> | 144:ef7eb2e8f9f7 | 588 | } |
<> | 144:ef7eb2e8f9f7 | 589 | } |
<> | 144:ef7eb2e8f9f7 | 590 | |
<> | 144:ef7eb2e8f9f7 | 591 | husart->State = HAL_USART_STATE_READY; |
<> | 144:ef7eb2e8f9f7 | 592 | |
<> | 144:ef7eb2e8f9f7 | 593 | /* Process Unlocked */ |
<> | 144:ef7eb2e8f9f7 | 594 | __HAL_UNLOCK(husart); |
<> | 144:ef7eb2e8f9f7 | 595 | |
<> | 144:ef7eb2e8f9f7 | 596 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 597 | } |
<> | 144:ef7eb2e8f9f7 | 598 | else |
<> | 144:ef7eb2e8f9f7 | 599 | { |
<> | 144:ef7eb2e8f9f7 | 600 | return HAL_BUSY; |
<> | 144:ef7eb2e8f9f7 | 601 | } |
<> | 144:ef7eb2e8f9f7 | 602 | } |
<> | 144:ef7eb2e8f9f7 | 603 | |
<> | 144:ef7eb2e8f9f7 | 604 | /** |
<> | 144:ef7eb2e8f9f7 | 605 | * @brief Send an amount of data in interrupt mode |
<> | 144:ef7eb2e8f9f7 | 606 | * @param husart: USART handle |
<> | 144:ef7eb2e8f9f7 | 607 | * @param pTxData: pointer to data buffer |
<> | 144:ef7eb2e8f9f7 | 608 | * @param Size: amount of data to be sent |
<> | 144:ef7eb2e8f9f7 | 609 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 610 | */ |
<> | 144:ef7eb2e8f9f7 | 611 | HAL_StatusTypeDef HAL_USART_Transmit_IT(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size) |
<> | 144:ef7eb2e8f9f7 | 612 | { |
<> | 144:ef7eb2e8f9f7 | 613 | if(husart->State == HAL_USART_STATE_READY) |
<> | 144:ef7eb2e8f9f7 | 614 | { |
<> | 144:ef7eb2e8f9f7 | 615 | if((pTxData == NULL ) || (Size == 0U)) |
<> | 144:ef7eb2e8f9f7 | 616 | { |
<> | 144:ef7eb2e8f9f7 | 617 | return HAL_ERROR; |
<> | 144:ef7eb2e8f9f7 | 618 | } |
<> | 144:ef7eb2e8f9f7 | 619 | |
<> | 144:ef7eb2e8f9f7 | 620 | /* Process Locked */ |
<> | 144:ef7eb2e8f9f7 | 621 | __HAL_LOCK(husart); |
<> | 144:ef7eb2e8f9f7 | 622 | |
<> | 144:ef7eb2e8f9f7 | 623 | husart->pTxBuffPtr = pTxData; |
<> | 144:ef7eb2e8f9f7 | 624 | husart->TxXferSize = Size; |
<> | 144:ef7eb2e8f9f7 | 625 | husart->TxXferCount = Size; |
<> | 144:ef7eb2e8f9f7 | 626 | |
<> | 144:ef7eb2e8f9f7 | 627 | husart->ErrorCode = HAL_USART_ERROR_NONE; |
<> | 144:ef7eb2e8f9f7 | 628 | husart->State = HAL_USART_STATE_BUSY_TX; |
<> | 144:ef7eb2e8f9f7 | 629 | |
<> | 144:ef7eb2e8f9f7 | 630 | /* The USART Error Interrupts: (Frame error, noise error, overrun error) |
<> | 144:ef7eb2e8f9f7 | 631 | are not managed by the USART Transmit Process to avoid the overrun interrupt |
<> | 144:ef7eb2e8f9f7 | 632 | when the usart mode is configured for transmit and receive "USART_MODE_TX_RX" |
<> | 144:ef7eb2e8f9f7 | 633 | to benefit for the frame error and noise interrupts the usart mode should be |
<> | 144:ef7eb2e8f9f7 | 634 | configured only for transmit "USART_MODE_TX" */ |
<> | 144:ef7eb2e8f9f7 | 635 | |
<> | 144:ef7eb2e8f9f7 | 636 | /* Process Unlocked */ |
<> | 144:ef7eb2e8f9f7 | 637 | __HAL_UNLOCK(husart); |
<> | 144:ef7eb2e8f9f7 | 638 | |
<> | 144:ef7eb2e8f9f7 | 639 | /* Enable the USART Transmit Data Register Empty Interrupt */ |
<> | 144:ef7eb2e8f9f7 | 640 | SET_BIT(husart->Instance->CR3, USART_CR3_EIE); |
<> | 144:ef7eb2e8f9f7 | 641 | |
<> | 144:ef7eb2e8f9f7 | 642 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 643 | } |
<> | 144:ef7eb2e8f9f7 | 644 | else |
<> | 144:ef7eb2e8f9f7 | 645 | { |
<> | 144:ef7eb2e8f9f7 | 646 | return HAL_BUSY; |
<> | 144:ef7eb2e8f9f7 | 647 | } |
<> | 144:ef7eb2e8f9f7 | 648 | } |
<> | 144:ef7eb2e8f9f7 | 649 | |
<> | 144:ef7eb2e8f9f7 | 650 | /** |
<> | 144:ef7eb2e8f9f7 | 651 | * @brief Receive an amount of data in blocking mode |
<> | 144:ef7eb2e8f9f7 | 652 | * To receive synchronous data, dummy data are simultaneously transmitted |
<> | 144:ef7eb2e8f9f7 | 653 | * @param husart: USART handle |
<> | 144:ef7eb2e8f9f7 | 654 | * @param pRxData: pointer to data buffer |
<> | 144:ef7eb2e8f9f7 | 655 | * @param Size: amount of data to be received |
<> | 144:ef7eb2e8f9f7 | 656 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 657 | */ |
<> | 144:ef7eb2e8f9f7 | 658 | HAL_StatusTypeDef HAL_USART_Receive_IT(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size) |
<> | 144:ef7eb2e8f9f7 | 659 | { |
<> | 144:ef7eb2e8f9f7 | 660 | if(husart->State == HAL_USART_STATE_READY) |
<> | 144:ef7eb2e8f9f7 | 661 | { |
<> | 144:ef7eb2e8f9f7 | 662 | if((pRxData == NULL ) || (Size == 0U)) |
<> | 144:ef7eb2e8f9f7 | 663 | { |
<> | 144:ef7eb2e8f9f7 | 664 | return HAL_ERROR; |
<> | 144:ef7eb2e8f9f7 | 665 | } |
<> | 144:ef7eb2e8f9f7 | 666 | /* Process Locked */ |
<> | 144:ef7eb2e8f9f7 | 667 | __HAL_LOCK(husart); |
<> | 144:ef7eb2e8f9f7 | 668 | |
<> | 144:ef7eb2e8f9f7 | 669 | husart->pRxBuffPtr = pRxData; |
<> | 144:ef7eb2e8f9f7 | 670 | husart->RxXferSize = Size; |
<> | 144:ef7eb2e8f9f7 | 671 | husart->RxXferCount = Size; |
<> | 144:ef7eb2e8f9f7 | 672 | |
<> | 144:ef7eb2e8f9f7 | 673 | __HAL_USART_MASK_COMPUTATION(husart); |
<> | 144:ef7eb2e8f9f7 | 674 | |
<> | 144:ef7eb2e8f9f7 | 675 | husart->ErrorCode = HAL_USART_ERROR_NONE; |
<> | 144:ef7eb2e8f9f7 | 676 | husart->State = HAL_USART_STATE_BUSY_RX; |
<> | 144:ef7eb2e8f9f7 | 677 | |
<> | 144:ef7eb2e8f9f7 | 678 | /* Enable the USART Parity Error Interrupt */ |
<> | 144:ef7eb2e8f9f7 | 679 | SET_BIT(husart->Instance->CR1, USART_CR1_PEIE); |
<> | 144:ef7eb2e8f9f7 | 680 | |
<> | 144:ef7eb2e8f9f7 | 681 | /* Enable the USART Error Interrupt: (Frame error, noise error, overrun error) */ |
<> | 144:ef7eb2e8f9f7 | 682 | SET_BIT(husart->Instance->CR3, USART_CR3_EIE); |
<> | 144:ef7eb2e8f9f7 | 683 | |
<> | 144:ef7eb2e8f9f7 | 684 | /* Enable the USART Data Register not empty Interrupt */ |
<> | 144:ef7eb2e8f9f7 | 685 | SET_BIT(husart->Instance->CR1, USART_CR1_RXNEIE); |
<> | 144:ef7eb2e8f9f7 | 686 | |
<> | 144:ef7eb2e8f9f7 | 687 | /* Process Unlocked */ |
<> | 144:ef7eb2e8f9f7 | 688 | __HAL_UNLOCK(husart); |
<> | 144:ef7eb2e8f9f7 | 689 | |
<> | 144:ef7eb2e8f9f7 | 690 | |
<> | 144:ef7eb2e8f9f7 | 691 | /* Send dummy byte in order to generate the clock for the Slave to send the next data */ |
<> | 144:ef7eb2e8f9f7 | 692 | if(husart->Init.WordLength == USART_WORDLENGTH_9B) |
<> | 144:ef7eb2e8f9f7 | 693 | { |
<> | 144:ef7eb2e8f9f7 | 694 | husart->Instance->TDR = (DUMMY_DATA & (uint16_t)0x01FFU); |
<> | 144:ef7eb2e8f9f7 | 695 | } |
<> | 144:ef7eb2e8f9f7 | 696 | else |
<> | 144:ef7eb2e8f9f7 | 697 | { |
<> | 144:ef7eb2e8f9f7 | 698 | husart->Instance->TDR = (DUMMY_DATA & (uint16_t)0x00FFU); |
<> | 144:ef7eb2e8f9f7 | 699 | } |
<> | 144:ef7eb2e8f9f7 | 700 | |
<> | 144:ef7eb2e8f9f7 | 701 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 702 | } |
<> | 144:ef7eb2e8f9f7 | 703 | else |
<> | 144:ef7eb2e8f9f7 | 704 | { |
<> | 144:ef7eb2e8f9f7 | 705 | return HAL_BUSY; |
<> | 144:ef7eb2e8f9f7 | 706 | } |
<> | 144:ef7eb2e8f9f7 | 707 | } |
<> | 144:ef7eb2e8f9f7 | 708 | |
<> | 144:ef7eb2e8f9f7 | 709 | /** |
<> | 144:ef7eb2e8f9f7 | 710 | * @brief Full-Duplex Send and Receive an amount of data in interrupt mode |
<> | 144:ef7eb2e8f9f7 | 711 | * @param husart: USART handle |
<> | 144:ef7eb2e8f9f7 | 712 | * @param pTxData: pointer to TX data buffer |
<> | 144:ef7eb2e8f9f7 | 713 | * @param pRxData: pointer to RX data buffer |
<> | 144:ef7eb2e8f9f7 | 714 | * @param Size: amount of data to be sent (same amount to be received) |
<> | 144:ef7eb2e8f9f7 | 715 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 716 | */ |
<> | 144:ef7eb2e8f9f7 | 717 | HAL_StatusTypeDef HAL_USART_TransmitReceive_IT(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size) |
<> | 144:ef7eb2e8f9f7 | 718 | { |
<> | 144:ef7eb2e8f9f7 | 719 | |
<> | 144:ef7eb2e8f9f7 | 720 | if(husart->State == HAL_USART_STATE_READY) |
<> | 144:ef7eb2e8f9f7 | 721 | { |
<> | 144:ef7eb2e8f9f7 | 722 | if((pTxData == NULL) || (pRxData == NULL) || (Size == 0U)) |
<> | 144:ef7eb2e8f9f7 | 723 | { |
<> | 144:ef7eb2e8f9f7 | 724 | return HAL_ERROR; |
<> | 144:ef7eb2e8f9f7 | 725 | } |
<> | 144:ef7eb2e8f9f7 | 726 | /* Process Locked */ |
<> | 144:ef7eb2e8f9f7 | 727 | __HAL_LOCK(husart); |
<> | 144:ef7eb2e8f9f7 | 728 | |
<> | 144:ef7eb2e8f9f7 | 729 | husart->pRxBuffPtr = pRxData; |
<> | 144:ef7eb2e8f9f7 | 730 | husart->RxXferSize = Size; |
<> | 144:ef7eb2e8f9f7 | 731 | husart->RxXferCount = Size; |
<> | 144:ef7eb2e8f9f7 | 732 | husart->pTxBuffPtr = pTxData; |
<> | 144:ef7eb2e8f9f7 | 733 | husart->TxXferSize = Size; |
<> | 144:ef7eb2e8f9f7 | 734 | husart->TxXferCount = Size; |
<> | 144:ef7eb2e8f9f7 | 735 | |
<> | 144:ef7eb2e8f9f7 | 736 | /* Computation of USART mask to apply to RDR register */ |
<> | 144:ef7eb2e8f9f7 | 737 | __HAL_USART_MASK_COMPUTATION(husart); |
<> | 144:ef7eb2e8f9f7 | 738 | |
<> | 144:ef7eb2e8f9f7 | 739 | husart->ErrorCode = HAL_USART_ERROR_NONE; |
<> | 144:ef7eb2e8f9f7 | 740 | husart->State = HAL_USART_STATE_BUSY_TX_RX; |
<> | 144:ef7eb2e8f9f7 | 741 | |
<> | 144:ef7eb2e8f9f7 | 742 | /* Enable the USART Data Register not empty Interrupt */ |
<> | 144:ef7eb2e8f9f7 | 743 | SET_BIT(husart->Instance->CR1, USART_CR1_RXNEIE); |
<> | 144:ef7eb2e8f9f7 | 744 | |
<> | 144:ef7eb2e8f9f7 | 745 | /* Enable the USART Parity Error Interrupt */ |
<> | 144:ef7eb2e8f9f7 | 746 | SET_BIT(husart->Instance->CR1, USART_CR1_PEIE); |
<> | 144:ef7eb2e8f9f7 | 747 | |
<> | 144:ef7eb2e8f9f7 | 748 | /* Enable the USART Error Interrupt: (Frame error, noise error, overrun error) */ |
<> | 144:ef7eb2e8f9f7 | 749 | SET_BIT(husart->Instance->CR3, USART_CR3_EIE); |
<> | 144:ef7eb2e8f9f7 | 750 | |
<> | 144:ef7eb2e8f9f7 | 751 | /* Process Unlocked */ |
<> | 144:ef7eb2e8f9f7 | 752 | __HAL_UNLOCK(husart); |
<> | 144:ef7eb2e8f9f7 | 753 | |
<> | 144:ef7eb2e8f9f7 | 754 | /* Enable the USART Transmit Data Register Empty Interrupt */ |
<> | 144:ef7eb2e8f9f7 | 755 | __HAL_USART_ENABLE_IT(husart, USART_IT_TXE); |
<> | 144:ef7eb2e8f9f7 | 756 | |
<> | 144:ef7eb2e8f9f7 | 757 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 758 | } |
<> | 144:ef7eb2e8f9f7 | 759 | else |
<> | 144:ef7eb2e8f9f7 | 760 | { |
<> | 144:ef7eb2e8f9f7 | 761 | return HAL_BUSY; |
<> | 144:ef7eb2e8f9f7 | 762 | } |
<> | 144:ef7eb2e8f9f7 | 763 | } |
<> | 144:ef7eb2e8f9f7 | 764 | |
<> | 144:ef7eb2e8f9f7 | 765 | /** |
<> | 144:ef7eb2e8f9f7 | 766 | * @brief Send an amount of data in DMA mode |
<> | 144:ef7eb2e8f9f7 | 767 | * @param husart: USART handle |
<> | 144:ef7eb2e8f9f7 | 768 | * @param pTxData: pointer to data buffer |
<> | 144:ef7eb2e8f9f7 | 769 | * @param Size: amount of data to be sent |
<> | 144:ef7eb2e8f9f7 | 770 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 771 | */ |
<> | 144:ef7eb2e8f9f7 | 772 | HAL_StatusTypeDef HAL_USART_Transmit_DMA(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size) |
<> | 144:ef7eb2e8f9f7 | 773 | { |
<> | 144:ef7eb2e8f9f7 | 774 | uint32_t *tmp; |
<> | 144:ef7eb2e8f9f7 | 775 | |
<> | 144:ef7eb2e8f9f7 | 776 | if(husart->State == HAL_USART_STATE_READY) |
<> | 144:ef7eb2e8f9f7 | 777 | { |
<> | 144:ef7eb2e8f9f7 | 778 | if((pTxData == NULL ) || (Size == 0U)) |
<> | 144:ef7eb2e8f9f7 | 779 | { |
<> | 144:ef7eb2e8f9f7 | 780 | return HAL_ERROR; |
<> | 144:ef7eb2e8f9f7 | 781 | } |
<> | 144:ef7eb2e8f9f7 | 782 | /* Process Locked */ |
<> | 144:ef7eb2e8f9f7 | 783 | __HAL_LOCK(husart); |
<> | 144:ef7eb2e8f9f7 | 784 | |
<> | 144:ef7eb2e8f9f7 | 785 | husart->pTxBuffPtr = pTxData; |
<> | 144:ef7eb2e8f9f7 | 786 | husart->TxXferSize = Size; |
<> | 144:ef7eb2e8f9f7 | 787 | husart->TxXferCount = Size; |
<> | 144:ef7eb2e8f9f7 | 788 | |
<> | 144:ef7eb2e8f9f7 | 789 | husart->ErrorCode = HAL_USART_ERROR_NONE; |
<> | 144:ef7eb2e8f9f7 | 790 | husart->State = HAL_USART_STATE_BUSY_TX; |
<> | 144:ef7eb2e8f9f7 | 791 | |
<> | 144:ef7eb2e8f9f7 | 792 | /* Set the USART DMA transfer complete callback */ |
<> | 144:ef7eb2e8f9f7 | 793 | husart->hdmatx->XferCpltCallback = USART_DMATransmitCplt; |
<> | 144:ef7eb2e8f9f7 | 794 | |
<> | 144:ef7eb2e8f9f7 | 795 | /* Set the USART DMA Half transfer complete callback */ |
<> | 144:ef7eb2e8f9f7 | 796 | husart->hdmatx->XferHalfCpltCallback = USART_DMATxHalfCplt; |
<> | 144:ef7eb2e8f9f7 | 797 | |
<> | 144:ef7eb2e8f9f7 | 798 | /* Set the DMA error callback */ |
<> | 144:ef7eb2e8f9f7 | 799 | husart->hdmatx->XferErrorCallback = USART_DMAError; |
<> | 144:ef7eb2e8f9f7 | 800 | |
<> | 144:ef7eb2e8f9f7 | 801 | /* Enable the USART Error Interrupt: (Frame error, noise error, overrun error) */ |
<> | 144:ef7eb2e8f9f7 | 802 | SET_BIT(husart->Instance->CR3, USART_CR3_EIE); |
<> | 144:ef7eb2e8f9f7 | 803 | SET_BIT(husart->Instance->ISR, (USART_ISR_PE | USART_ISR_FE | USART_ISR_NE | USART_ISR_ORE)); |
<> | 144:ef7eb2e8f9f7 | 804 | |
<> | 144:ef7eb2e8f9f7 | 805 | /* Enable the USART transmit DMA channel */ |
<> | 144:ef7eb2e8f9f7 | 806 | tmp = (uint32_t*)&pTxData; |
<> | 144:ef7eb2e8f9f7 | 807 | HAL_DMA_Start_IT(husart->hdmatx, *(uint32_t*)tmp, (uint32_t)&husart->Instance->TDR, Size); |
<> | 144:ef7eb2e8f9f7 | 808 | |
<> | 144:ef7eb2e8f9f7 | 809 | /* Clear the TC flag in the SR register by writing 0 to it */ |
<> | 144:ef7eb2e8f9f7 | 810 | __HAL_USART_CLEAR_IT(husart, USART_FLAG_TC); |
<> | 144:ef7eb2e8f9f7 | 811 | |
<> | 144:ef7eb2e8f9f7 | 812 | /* Process Unlocked */ |
<> | 144:ef7eb2e8f9f7 | 813 | __HAL_UNLOCK(husart); |
<> | 144:ef7eb2e8f9f7 | 814 | |
<> | 144:ef7eb2e8f9f7 | 815 | /* Enable the DMA transfer for transmit request by setting the DMAT bit |
<> | 144:ef7eb2e8f9f7 | 816 | in the USART CR3 register */ |
<> | 144:ef7eb2e8f9f7 | 817 | SET_BIT(husart->Instance->CR3, USART_CR3_DMAT); |
<> | 144:ef7eb2e8f9f7 | 818 | |
<> | 144:ef7eb2e8f9f7 | 819 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 820 | } |
<> | 144:ef7eb2e8f9f7 | 821 | else |
<> | 144:ef7eb2e8f9f7 | 822 | { |
<> | 144:ef7eb2e8f9f7 | 823 | return HAL_BUSY; |
<> | 144:ef7eb2e8f9f7 | 824 | } |
<> | 144:ef7eb2e8f9f7 | 825 | } |
<> | 144:ef7eb2e8f9f7 | 826 | |
<> | 144:ef7eb2e8f9f7 | 827 | /** |
<> | 144:ef7eb2e8f9f7 | 828 | * @brief Receive an amount of data in DMA mode |
<> | 144:ef7eb2e8f9f7 | 829 | * @param husart: USART handle |
<> | 144:ef7eb2e8f9f7 | 830 | * @param pRxData: pointer to data buffer |
<> | 144:ef7eb2e8f9f7 | 831 | * @param Size: amount of data to be received |
<> | 144:ef7eb2e8f9f7 | 832 | * @note When the USART parity is enabled (PCE = 1), the received data contain |
<> | 144:ef7eb2e8f9f7 | 833 | * the parity bit (MSB position) |
<> | 144:ef7eb2e8f9f7 | 834 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 835 | * @note The USART DMA transmit stream must be configured in order to generate the clock for the slave. |
<> | 144:ef7eb2e8f9f7 | 836 | */ |
<> | 144:ef7eb2e8f9f7 | 837 | HAL_StatusTypeDef HAL_USART_Receive_DMA(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size) |
<> | 144:ef7eb2e8f9f7 | 838 | { |
<> | 144:ef7eb2e8f9f7 | 839 | uint32_t *tmp; |
<> | 144:ef7eb2e8f9f7 | 840 | |
<> | 144:ef7eb2e8f9f7 | 841 | if(husart->State == HAL_USART_STATE_READY) |
<> | 144:ef7eb2e8f9f7 | 842 | { |
<> | 144:ef7eb2e8f9f7 | 843 | if((pRxData == NULL ) || (Size == 0U)) |
<> | 144:ef7eb2e8f9f7 | 844 | { |
<> | 144:ef7eb2e8f9f7 | 845 | return HAL_ERROR; |
<> | 144:ef7eb2e8f9f7 | 846 | } |
<> | 144:ef7eb2e8f9f7 | 847 | |
<> | 144:ef7eb2e8f9f7 | 848 | /* Process Locked */ |
<> | 144:ef7eb2e8f9f7 | 849 | __HAL_LOCK(husart); |
<> | 144:ef7eb2e8f9f7 | 850 | |
<> | 144:ef7eb2e8f9f7 | 851 | husart->pRxBuffPtr = pRxData; |
<> | 144:ef7eb2e8f9f7 | 852 | husart->RxXferSize = Size; |
<> | 144:ef7eb2e8f9f7 | 853 | husart->pTxBuffPtr = pRxData; |
<> | 144:ef7eb2e8f9f7 | 854 | husart->TxXferSize = Size; |
<> | 144:ef7eb2e8f9f7 | 855 | |
<> | 144:ef7eb2e8f9f7 | 856 | husart->ErrorCode = HAL_USART_ERROR_NONE; |
<> | 144:ef7eb2e8f9f7 | 857 | husart->State = HAL_USART_STATE_BUSY_RX; |
<> | 144:ef7eb2e8f9f7 | 858 | |
<> | 144:ef7eb2e8f9f7 | 859 | /* Set the USART DMA Rx transfer complete callback */ |
<> | 144:ef7eb2e8f9f7 | 860 | husart->hdmarx->XferCpltCallback = USART_DMAReceiveCplt; |
<> | 144:ef7eb2e8f9f7 | 861 | |
<> | 144:ef7eb2e8f9f7 | 862 | /* Set the USART DMA Half transfer complete callback */ |
<> | 144:ef7eb2e8f9f7 | 863 | husart->hdmarx->XferHalfCpltCallback = USART_DMARxHalfCplt; |
<> | 144:ef7eb2e8f9f7 | 864 | |
<> | 144:ef7eb2e8f9f7 | 865 | /* Set the USART DMA Rx transfer error callback */ |
<> | 144:ef7eb2e8f9f7 | 866 | husart->hdmarx->XferErrorCallback = USART_DMAError; |
<> | 144:ef7eb2e8f9f7 | 867 | |
<> | 144:ef7eb2e8f9f7 | 868 | /* Set the DMA abort callback */ |
<> | 144:ef7eb2e8f9f7 | 869 | husart->hdmatx->XferAbortCallback = NULL; |
<> | 144:ef7eb2e8f9f7 | 870 | |
<> | 144:ef7eb2e8f9f7 | 871 | /* Set the USART Tx DMA transfer complete callback as NULL because the communication closing |
<> | 144:ef7eb2e8f9f7 | 872 | is performed in DMA reception complete callback */ |
<> | 144:ef7eb2e8f9f7 | 873 | husart->hdmatx->XferHalfCpltCallback = NULL; |
<> | 144:ef7eb2e8f9f7 | 874 | husart->hdmatx->XferCpltCallback = NULL; |
<> | 144:ef7eb2e8f9f7 | 875 | |
<> | 144:ef7eb2e8f9f7 | 876 | /* Set the DMA error callback */ |
<> | 144:ef7eb2e8f9f7 | 877 | husart->hdmatx->XferErrorCallback = USART_DMAError; |
<> | 144:ef7eb2e8f9f7 | 878 | |
<> | 144:ef7eb2e8f9f7 | 879 | /* Enable the USART Error Interrupt: (Frame error, noise error, overrun error) */ |
<> | 144:ef7eb2e8f9f7 | 880 | SET_BIT(husart->Instance->CR3, USART_CR3_EIE); |
<> | 144:ef7eb2e8f9f7 | 881 | SET_BIT(husart->Instance->ISR, (USART_ISR_PE | USART_ISR_FE | USART_ISR_NE | USART_ISR_ORE)); |
<> | 144:ef7eb2e8f9f7 | 882 | |
<> | 144:ef7eb2e8f9f7 | 883 | /* Enable the USART receive DMA channel */ |
<> | 144:ef7eb2e8f9f7 | 884 | tmp = (uint32_t*)&pRxData; |
<> | 144:ef7eb2e8f9f7 | 885 | HAL_DMA_Start_IT(husart->hdmarx, (uint32_t)&husart->Instance->RDR, *(uint32_t*)tmp, Size); |
<> | 144:ef7eb2e8f9f7 | 886 | |
<> | 144:ef7eb2e8f9f7 | 887 | /* Enable the USART transmit DMA channel: the transmit stream is used in order |
<> | 144:ef7eb2e8f9f7 | 888 | to generate in the non-blocking mode the clock to the slave device, |
<> | 144:ef7eb2e8f9f7 | 889 | this mode isn't a simplex receive mode but a full-duplex receive mode */ |
<> | 144:ef7eb2e8f9f7 | 890 | HAL_DMA_Start_IT(husart->hdmatx, *(uint32_t*)tmp, (uint32_t)&husart->Instance->TDR, Size); |
<> | 144:ef7eb2e8f9f7 | 891 | |
<> | 144:ef7eb2e8f9f7 | 892 | /* Process Unlocked */ |
<> | 144:ef7eb2e8f9f7 | 893 | __HAL_UNLOCK(husart); |
<> | 144:ef7eb2e8f9f7 | 894 | |
<> | 144:ef7eb2e8f9f7 | 895 | /* Enable the USART Parity Error Interrupt */ |
<> | 144:ef7eb2e8f9f7 | 896 | SET_BIT(husart->Instance->CR1, USART_CR1_PEIE); |
<> | 144:ef7eb2e8f9f7 | 897 | |
<> | 144:ef7eb2e8f9f7 | 898 | /* Enable the USART Error Interrupt: (Frame error, noise error, overrun error) */ |
<> | 144:ef7eb2e8f9f7 | 899 | SET_BIT(husart->Instance->CR3, USART_CR3_EIE); |
<> | 144:ef7eb2e8f9f7 | 900 | |
<> | 144:ef7eb2e8f9f7 | 901 | /* Enable the DMA transfer for the receiver request by setting the DMAR bit |
<> | 144:ef7eb2e8f9f7 | 902 | in the USART CR3 register */ |
<> | 144:ef7eb2e8f9f7 | 903 | SET_BIT(husart->Instance->CR3, USART_CR3_DMAR); |
<> | 144:ef7eb2e8f9f7 | 904 | |
<> | 144:ef7eb2e8f9f7 | 905 | /* Enable the DMA transfer for transmit request by setting the DMAT bit |
<> | 144:ef7eb2e8f9f7 | 906 | in the USART CR3 register */ |
<> | 144:ef7eb2e8f9f7 | 907 | SET_BIT(husart->Instance->CR3, USART_CR3_DMAT); |
<> | 144:ef7eb2e8f9f7 | 908 | |
<> | 144:ef7eb2e8f9f7 | 909 | |
<> | 144:ef7eb2e8f9f7 | 910 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 911 | } |
<> | 144:ef7eb2e8f9f7 | 912 | else |
<> | 144:ef7eb2e8f9f7 | 913 | { |
<> | 144:ef7eb2e8f9f7 | 914 | return HAL_BUSY; |
<> | 144:ef7eb2e8f9f7 | 915 | } |
<> | 144:ef7eb2e8f9f7 | 916 | } |
<> | 144:ef7eb2e8f9f7 | 917 | |
<> | 144:ef7eb2e8f9f7 | 918 | /** |
<> | 144:ef7eb2e8f9f7 | 919 | * @brief Full-Duplex Transmit Receive an amount of data in non blocking mode |
<> | 144:ef7eb2e8f9f7 | 920 | * @param husart: USART handle |
<> | 144:ef7eb2e8f9f7 | 921 | * @param pTxData: pointer to TX data buffer |
<> | 144:ef7eb2e8f9f7 | 922 | * @param pRxData: pointer to RX data buffer |
<> | 144:ef7eb2e8f9f7 | 923 | * @param Size: amount of data to be received/sent |
<> | 144:ef7eb2e8f9f7 | 924 | * @note When the USART parity is enabled (PCE = 1) the data received contain the parity bit. |
<> | 144:ef7eb2e8f9f7 | 925 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 926 | */ |
<> | 144:ef7eb2e8f9f7 | 927 | HAL_StatusTypeDef HAL_USART_TransmitReceive_DMA(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size) |
<> | 144:ef7eb2e8f9f7 | 928 | { |
<> | 144:ef7eb2e8f9f7 | 929 | uint32_t *tmp; |
<> | 144:ef7eb2e8f9f7 | 930 | |
<> | 144:ef7eb2e8f9f7 | 931 | if(husart->State == HAL_USART_STATE_READY) |
<> | 144:ef7eb2e8f9f7 | 932 | { |
<> | 144:ef7eb2e8f9f7 | 933 | if((pTxData == NULL) || (pRxData == NULL) || (Size == 0U)) |
<> | 144:ef7eb2e8f9f7 | 934 | { |
<> | 144:ef7eb2e8f9f7 | 935 | return HAL_ERROR; |
<> | 144:ef7eb2e8f9f7 | 936 | } |
<> | 144:ef7eb2e8f9f7 | 937 | /* Process Locked */ |
<> | 144:ef7eb2e8f9f7 | 938 | __HAL_LOCK(husart); |
<> | 144:ef7eb2e8f9f7 | 939 | |
<> | 144:ef7eb2e8f9f7 | 940 | husart->pRxBuffPtr = pRxData; |
<> | 144:ef7eb2e8f9f7 | 941 | husart->RxXferSize = Size; |
<> | 144:ef7eb2e8f9f7 | 942 | husart->pTxBuffPtr = pTxData; |
<> | 144:ef7eb2e8f9f7 | 943 | husart->TxXferSize = Size; |
<> | 144:ef7eb2e8f9f7 | 944 | |
<> | 144:ef7eb2e8f9f7 | 945 | husart->ErrorCode = HAL_USART_ERROR_NONE; |
<> | 144:ef7eb2e8f9f7 | 946 | husart->State = HAL_USART_STATE_BUSY_TX_RX; |
<> | 144:ef7eb2e8f9f7 | 947 | |
<> | 144:ef7eb2e8f9f7 | 948 | /* Set the USART DMA Rx transfer complete callback */ |
<> | 144:ef7eb2e8f9f7 | 949 | husart->hdmarx->XferCpltCallback = USART_DMAReceiveCplt; |
<> | 144:ef7eb2e8f9f7 | 950 | |
<> | 144:ef7eb2e8f9f7 | 951 | /* Set the USART DMA Half transfer complete callback */ |
<> | 144:ef7eb2e8f9f7 | 952 | husart->hdmarx->XferHalfCpltCallback = USART_DMARxHalfCplt; |
<> | 144:ef7eb2e8f9f7 | 953 | |
<> | 144:ef7eb2e8f9f7 | 954 | /* Set the USART DMA Tx transfer complete callback */ |
<> | 144:ef7eb2e8f9f7 | 955 | husart->hdmatx->XferCpltCallback = USART_DMATransmitCplt; |
<> | 144:ef7eb2e8f9f7 | 956 | |
<> | 144:ef7eb2e8f9f7 | 957 | /* Set the USART DMA Half transfer complete callback */ |
<> | 144:ef7eb2e8f9f7 | 958 | husart->hdmatx->XferHalfCpltCallback = USART_DMATxHalfCplt; |
<> | 144:ef7eb2e8f9f7 | 959 | |
<> | 144:ef7eb2e8f9f7 | 960 | /* Set the USART DMA Tx transfer error callback */ |
<> | 144:ef7eb2e8f9f7 | 961 | husart->hdmatx->XferErrorCallback = USART_DMAError; |
<> | 144:ef7eb2e8f9f7 | 962 | |
<> | 144:ef7eb2e8f9f7 | 963 | /* Set the USART DMA Rx transfer error callback */ |
<> | 144:ef7eb2e8f9f7 | 964 | husart->hdmarx->XferErrorCallback = USART_DMAError; |
<> | 144:ef7eb2e8f9f7 | 965 | |
<> | 144:ef7eb2e8f9f7 | 966 | /* Enable the USART Error Interrupt: (Frame error, noise error, overrun error) */ |
<> | 144:ef7eb2e8f9f7 | 967 | SET_BIT(husart->Instance->CR3, USART_CR3_EIE); |
<> | 144:ef7eb2e8f9f7 | 968 | SET_BIT(husart->Instance->ISR, (USART_ISR_PE | USART_ISR_FE | USART_ISR_NE | USART_ISR_ORE)); |
<> | 144:ef7eb2e8f9f7 | 969 | |
<> | 144:ef7eb2e8f9f7 | 970 | /* Enable the USART receive DMA channel */ |
<> | 144:ef7eb2e8f9f7 | 971 | tmp = (uint32_t*)&pRxData; |
<> | 144:ef7eb2e8f9f7 | 972 | HAL_DMA_Start_IT(husart->hdmarx, (uint32_t)&husart->Instance->RDR, *(uint32_t*)tmp, Size); |
<> | 144:ef7eb2e8f9f7 | 973 | |
<> | 144:ef7eb2e8f9f7 | 974 | /* Enable the USART transmit DMA channel */ |
<> | 144:ef7eb2e8f9f7 | 975 | tmp = (uint32_t*)&pTxData; |
<> | 144:ef7eb2e8f9f7 | 976 | HAL_DMA_Start_IT(husart->hdmatx, *(uint32_t*)tmp, (uint32_t)&husart->Instance->TDR, Size); |
<> | 144:ef7eb2e8f9f7 | 977 | |
<> | 144:ef7eb2e8f9f7 | 978 | /* Clear the TC flag in the SR register by writing 0 to it */ |
<> | 144:ef7eb2e8f9f7 | 979 | __HAL_USART_CLEAR_IT(husart, USART_FLAG_TC); |
<> | 144:ef7eb2e8f9f7 | 980 | |
<> | 144:ef7eb2e8f9f7 | 981 | /* Process Unlocked */ |
<> | 144:ef7eb2e8f9f7 | 982 | __HAL_UNLOCK(husart); |
<> | 144:ef7eb2e8f9f7 | 983 | |
<> | 144:ef7eb2e8f9f7 | 984 | /* Enable the USART Parity Error Interrupt */ |
<> | 144:ef7eb2e8f9f7 | 985 | SET_BIT(husart->Instance->CR1, USART_CR1_PEIE); |
<> | 144:ef7eb2e8f9f7 | 986 | |
<> | 144:ef7eb2e8f9f7 | 987 | /* Enable the USART Error Interrupt: (Frame error, noise error, overrun error) */ |
<> | 144:ef7eb2e8f9f7 | 988 | SET_BIT(husart->Instance->CR3, USART_CR3_EIE); |
<> | 144:ef7eb2e8f9f7 | 989 | |
<> | 144:ef7eb2e8f9f7 | 990 | /* Enable the DMA transfer for the receiver request by setting the DMAR bit |
<> | 144:ef7eb2e8f9f7 | 991 | in the USART CR3 register */ |
<> | 144:ef7eb2e8f9f7 | 992 | SET_BIT(husart->Instance->CR3, USART_CR3_DMAR); |
<> | 144:ef7eb2e8f9f7 | 993 | |
<> | 144:ef7eb2e8f9f7 | 994 | /* Enable the DMA transfer for transmit request by setting the DMAT bit |
<> | 144:ef7eb2e8f9f7 | 995 | in the USART CR3 register */ |
<> | 144:ef7eb2e8f9f7 | 996 | SET_BIT(husart->Instance->CR3, USART_CR3_DMAT); |
<> | 144:ef7eb2e8f9f7 | 997 | |
<> | 144:ef7eb2e8f9f7 | 998 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 999 | } |
<> | 144:ef7eb2e8f9f7 | 1000 | else |
<> | 144:ef7eb2e8f9f7 | 1001 | { |
<> | 144:ef7eb2e8f9f7 | 1002 | return HAL_BUSY; |
<> | 144:ef7eb2e8f9f7 | 1003 | } |
<> | 144:ef7eb2e8f9f7 | 1004 | } |
<> | 144:ef7eb2e8f9f7 | 1005 | |
<> | 144:ef7eb2e8f9f7 | 1006 | /** |
<> | 144:ef7eb2e8f9f7 | 1007 | * @brief Pauses the DMA Transfer. |
<> | 144:ef7eb2e8f9f7 | 1008 | * @param husart: USART handle |
<> | 144:ef7eb2e8f9f7 | 1009 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 1010 | */ |
<> | 144:ef7eb2e8f9f7 | 1011 | HAL_StatusTypeDef HAL_USART_DMAPause(USART_HandleTypeDef *husart) |
<> | 144:ef7eb2e8f9f7 | 1012 | { |
<> | 144:ef7eb2e8f9f7 | 1013 | /* Process Locked */ |
<> | 144:ef7eb2e8f9f7 | 1014 | __HAL_LOCK(husart); |
<> | 144:ef7eb2e8f9f7 | 1015 | |
<> | 144:ef7eb2e8f9f7 | 1016 | if(husart->State == HAL_USART_STATE_BUSY_TX) |
<> | 144:ef7eb2e8f9f7 | 1017 | { |
<> | 144:ef7eb2e8f9f7 | 1018 | /* Disable the USART DMA Tx request */ |
<> | 144:ef7eb2e8f9f7 | 1019 | CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAT); |
<> | 144:ef7eb2e8f9f7 | 1020 | } |
<> | 144:ef7eb2e8f9f7 | 1021 | else if(husart->State == HAL_USART_STATE_BUSY_RX) |
<> | 144:ef7eb2e8f9f7 | 1022 | { |
<> | 144:ef7eb2e8f9f7 | 1023 | /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ |
<> | 144:ef7eb2e8f9f7 | 1024 | CLEAR_BIT(husart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); |
<> | 144:ef7eb2e8f9f7 | 1025 | CLEAR_BIT(husart->Instance->CR3, USART_CR3_EIE); |
<> | 144:ef7eb2e8f9f7 | 1026 | /* Disable the USART DMA Rx request */ |
<> | 144:ef7eb2e8f9f7 | 1027 | CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAR); |
<> | 144:ef7eb2e8f9f7 | 1028 | } |
<> | 144:ef7eb2e8f9f7 | 1029 | else if(husart->State == HAL_USART_STATE_BUSY_TX_RX) |
<> | 144:ef7eb2e8f9f7 | 1030 | { |
<> | 144:ef7eb2e8f9f7 | 1031 | /* Disable the USART DMA Tx request */ |
<> | 144:ef7eb2e8f9f7 | 1032 | CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAR); |
<> | 144:ef7eb2e8f9f7 | 1033 | /* Disable the USART DMA Rx request */ |
<> | 144:ef7eb2e8f9f7 | 1034 | CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAT); |
<> | 144:ef7eb2e8f9f7 | 1035 | } |
<> | 144:ef7eb2e8f9f7 | 1036 | |
<> | 144:ef7eb2e8f9f7 | 1037 | /* Process Unlocked */ |
<> | 144:ef7eb2e8f9f7 | 1038 | __HAL_UNLOCK(husart); |
<> | 144:ef7eb2e8f9f7 | 1039 | |
<> | 144:ef7eb2e8f9f7 | 1040 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 1041 | } |
<> | 144:ef7eb2e8f9f7 | 1042 | |
<> | 144:ef7eb2e8f9f7 | 1043 | /** |
<> | 144:ef7eb2e8f9f7 | 1044 | * @brief Resumes the DMA Transfer. |
<> | 144:ef7eb2e8f9f7 | 1045 | * @param husart: USART handle |
<> | 144:ef7eb2e8f9f7 | 1046 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 1047 | */ |
<> | 144:ef7eb2e8f9f7 | 1048 | HAL_StatusTypeDef HAL_USART_DMAResume(USART_HandleTypeDef *husart) |
<> | 144:ef7eb2e8f9f7 | 1049 | { |
<> | 144:ef7eb2e8f9f7 | 1050 | /* Process Locked */ |
<> | 144:ef7eb2e8f9f7 | 1051 | __HAL_LOCK(husart); |
<> | 144:ef7eb2e8f9f7 | 1052 | |
<> | 144:ef7eb2e8f9f7 | 1053 | if(husart->State == HAL_USART_STATE_BUSY_TX) |
<> | 144:ef7eb2e8f9f7 | 1054 | { |
<> | 144:ef7eb2e8f9f7 | 1055 | /* Enable the USART DMA Tx request */ |
<> | 144:ef7eb2e8f9f7 | 1056 | SET_BIT(husart->Instance->CR3, USART_CR3_DMAT); |
<> | 144:ef7eb2e8f9f7 | 1057 | } |
<> | 144:ef7eb2e8f9f7 | 1058 | else if(husart->State == HAL_USART_STATE_BUSY_RX) |
<> | 144:ef7eb2e8f9f7 | 1059 | { |
<> | 144:ef7eb2e8f9f7 | 1060 | /* Clear the Overrun flag before resuming the Rx transfer*/ |
<> | 144:ef7eb2e8f9f7 | 1061 | __HAL_USART_CLEAR_IT(husart, USART_CLEAR_OREF); |
<> | 144:ef7eb2e8f9f7 | 1062 | |
<> | 144:ef7eb2e8f9f7 | 1063 | /* Reenable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ |
<> | 144:ef7eb2e8f9f7 | 1064 | SET_BIT(husart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); |
<> | 144:ef7eb2e8f9f7 | 1065 | SET_BIT(husart->Instance->CR3, USART_CR3_EIE); |
<> | 144:ef7eb2e8f9f7 | 1066 | |
<> | 144:ef7eb2e8f9f7 | 1067 | /* Enable the USART DMA Rx request */ |
<> | 144:ef7eb2e8f9f7 | 1068 | SET_BIT(husart->Instance->CR3, USART_CR3_DMAR); |
<> | 144:ef7eb2e8f9f7 | 1069 | } |
<> | 144:ef7eb2e8f9f7 | 1070 | else if(husart->State == HAL_USART_STATE_BUSY_TX_RX) |
<> | 144:ef7eb2e8f9f7 | 1071 | { |
<> | 144:ef7eb2e8f9f7 | 1072 | /* Clear the Overrun flag before resuming the Rx transfer*/ |
<> | 144:ef7eb2e8f9f7 | 1073 | __HAL_USART_CLEAR_IT(husart, USART_CLEAR_OREF); |
<> | 144:ef7eb2e8f9f7 | 1074 | |
<> | 144:ef7eb2e8f9f7 | 1075 | /* Enable the USART DMA Rx request before the DMA Tx request */ |
<> | 144:ef7eb2e8f9f7 | 1076 | SET_BIT(husart->Instance->CR3, USART_CR3_DMAR); |
<> | 144:ef7eb2e8f9f7 | 1077 | |
<> | 144:ef7eb2e8f9f7 | 1078 | /* Enable the USART DMA Tx request */ |
<> | 144:ef7eb2e8f9f7 | 1079 | SET_BIT(husart->Instance->CR3, USART_CR3_DMAT); |
<> | 144:ef7eb2e8f9f7 | 1080 | } |
<> | 144:ef7eb2e8f9f7 | 1081 | |
<> | 144:ef7eb2e8f9f7 | 1082 | /* Process Unlocked */ |
<> | 144:ef7eb2e8f9f7 | 1083 | __HAL_UNLOCK(husart); |
<> | 144:ef7eb2e8f9f7 | 1084 | |
<> | 144:ef7eb2e8f9f7 | 1085 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 1086 | } |
<> | 144:ef7eb2e8f9f7 | 1087 | |
<> | 144:ef7eb2e8f9f7 | 1088 | /** |
<> | 144:ef7eb2e8f9f7 | 1089 | * @brief Stops the DMA Transfer. |
<> | 144:ef7eb2e8f9f7 | 1090 | * @param husart: USART handle |
<> | 144:ef7eb2e8f9f7 | 1091 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 1092 | */ |
<> | 144:ef7eb2e8f9f7 | 1093 | HAL_StatusTypeDef HAL_USART_DMAStop(USART_HandleTypeDef *husart) |
<> | 144:ef7eb2e8f9f7 | 1094 | { |
<> | 144:ef7eb2e8f9f7 | 1095 | /* The Lock is not implemented on this API to allow the user application |
<> | 144:ef7eb2e8f9f7 | 1096 | to call the HAL USART API under callbacks HAL_USART_TxCpltCallback() / HAL_USART_RxCpltCallback() / |
<> | 144:ef7eb2e8f9f7 | 1097 | HAL_USART_TxHalfCpltCallback / HAL_USART_RxHalfCpltCallback: |
<> | 144:ef7eb2e8f9f7 | 1098 | indeed, when HAL_DMA_Abort() API is called, the DMA TX/RX Transfer or Half Transfer complete |
<> | 144:ef7eb2e8f9f7 | 1099 | interrupt is generated if the DMA transfer interruption occurs at the middle or at the end of |
<> | 144:ef7eb2e8f9f7 | 1100 | the stream and the corresponding call back is executed. */ |
<> | 144:ef7eb2e8f9f7 | 1101 | |
<> | 144:ef7eb2e8f9f7 | 1102 | /* Stop USART DMA Tx request if ongoing */ |
<> | 144:ef7eb2e8f9f7 | 1103 | if ((husart->State == HAL_USART_STATE_BUSY_TX) && |
<> | 144:ef7eb2e8f9f7 | 1104 | (HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAT))) |
<> | 144:ef7eb2e8f9f7 | 1105 | { |
<> | 144:ef7eb2e8f9f7 | 1106 | USART_EndTxTransfer(husart); |
<> | 144:ef7eb2e8f9f7 | 1107 | |
<> | 144:ef7eb2e8f9f7 | 1108 | /* Abort the USART DMA Tx channel */ |
<> | 144:ef7eb2e8f9f7 | 1109 | if(husart->hdmatx != NULL) |
<> | 144:ef7eb2e8f9f7 | 1110 | { |
<> | 144:ef7eb2e8f9f7 | 1111 | HAL_DMA_Abort(husart->hdmatx); |
<> | 144:ef7eb2e8f9f7 | 1112 | } |
<> | 144:ef7eb2e8f9f7 | 1113 | |
<> | 144:ef7eb2e8f9f7 | 1114 | /* Disable the USART Tx DMA request */ |
<> | 144:ef7eb2e8f9f7 | 1115 | CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAT); |
<> | 144:ef7eb2e8f9f7 | 1116 | } |
<> | 144:ef7eb2e8f9f7 | 1117 | |
<> | 144:ef7eb2e8f9f7 | 1118 | /* Stop USART DMA Rx request if ongoing */ |
<> | 144:ef7eb2e8f9f7 | 1119 | if ((husart->State == HAL_USART_STATE_BUSY_RX) && |
<> | 144:ef7eb2e8f9f7 | 1120 | (HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAR))) |
<> | 144:ef7eb2e8f9f7 | 1121 | { |
<> | 144:ef7eb2e8f9f7 | 1122 | USART_EndRxTransfer(husart); |
<> | 144:ef7eb2e8f9f7 | 1123 | |
<> | 144:ef7eb2e8f9f7 | 1124 | /* Abort the USART DMA Rx channel */ |
<> | 144:ef7eb2e8f9f7 | 1125 | if(husart->hdmarx != NULL) |
<> | 144:ef7eb2e8f9f7 | 1126 | { |
<> | 144:ef7eb2e8f9f7 | 1127 | HAL_DMA_Abort(husart->hdmarx); |
<> | 144:ef7eb2e8f9f7 | 1128 | } |
<> | 144:ef7eb2e8f9f7 | 1129 | |
<> | 144:ef7eb2e8f9f7 | 1130 | /* Disable the USART Rx DMA request */ |
<> | 144:ef7eb2e8f9f7 | 1131 | CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAR); |
<> | 144:ef7eb2e8f9f7 | 1132 | } |
<> | 144:ef7eb2e8f9f7 | 1133 | |
<> | 144:ef7eb2e8f9f7 | 1134 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 1135 | } |
<> | 144:ef7eb2e8f9f7 | 1136 | |
<> | 144:ef7eb2e8f9f7 | 1137 | /** |
<> | 144:ef7eb2e8f9f7 | 1138 | * @brief This function handles USART interrupt request. |
<> | 144:ef7eb2e8f9f7 | 1139 | * @param husart: USART handle |
<> | 144:ef7eb2e8f9f7 | 1140 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 1141 | */ |
<> | 144:ef7eb2e8f9f7 | 1142 | void HAL_USART_IRQHandler(USART_HandleTypeDef *husart) |
<> | 144:ef7eb2e8f9f7 | 1143 | { |
<> | 144:ef7eb2e8f9f7 | 1144 | uint32_t isrflags = READ_REG(husart->Instance->ISR); |
<> | 144:ef7eb2e8f9f7 | 1145 | uint32_t cr1its = READ_REG(husart->Instance->CR1); |
<> | 144:ef7eb2e8f9f7 | 1146 | uint32_t cr3its = READ_REG(husart->Instance->CR3); |
<> | 144:ef7eb2e8f9f7 | 1147 | uint32_t errorflags; |
<> | 144:ef7eb2e8f9f7 | 1148 | |
<> | 144:ef7eb2e8f9f7 | 1149 | /* If no error occurs */ |
<> | 144:ef7eb2e8f9f7 | 1150 | errorflags = (isrflags & (uint32_t)(USART_ISR_PE | USART_ISR_FE | USART_ISR_ORE | USART_ISR_NE)); |
<> | 144:ef7eb2e8f9f7 | 1151 | if (errorflags == RESET) |
<> | 144:ef7eb2e8f9f7 | 1152 | { |
<> | 144:ef7eb2e8f9f7 | 1153 | /* USART in mode Receiver --------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 1154 | if(((isrflags & USART_ISR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET)) |
<> | 144:ef7eb2e8f9f7 | 1155 | { |
<> | 144:ef7eb2e8f9f7 | 1156 | if(husart->State == HAL_USART_STATE_BUSY_RX) |
<> | 144:ef7eb2e8f9f7 | 1157 | { |
<> | 144:ef7eb2e8f9f7 | 1158 | USART_Receive_IT(husart); |
<> | 144:ef7eb2e8f9f7 | 1159 | } |
<> | 144:ef7eb2e8f9f7 | 1160 | else |
<> | 144:ef7eb2e8f9f7 | 1161 | { |
<> | 144:ef7eb2e8f9f7 | 1162 | USART_TransmitReceive_IT(husart); |
<> | 144:ef7eb2e8f9f7 | 1163 | } |
<> | 144:ef7eb2e8f9f7 | 1164 | } |
<> | 144:ef7eb2e8f9f7 | 1165 | } |
<> | 144:ef7eb2e8f9f7 | 1166 | |
<> | 144:ef7eb2e8f9f7 | 1167 | /* If some errors occur */ |
<> | 144:ef7eb2e8f9f7 | 1168 | if((errorflags != RESET) && ((cr3its & (USART_CR3_EIE | USART_CR1_PEIE)) != RESET)) |
<> | 144:ef7eb2e8f9f7 | 1169 | { |
<> | 144:ef7eb2e8f9f7 | 1170 | |
<> | 144:ef7eb2e8f9f7 | 1171 | /* USART parity error interrupt occurred ------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 1172 | if(((isrflags & USART_ISR_PE) != RESET) && ((cr1its & USART_CR1_PEIE) != RESET)) |
<> | 144:ef7eb2e8f9f7 | 1173 | { |
<> | 144:ef7eb2e8f9f7 | 1174 | __HAL_USART_CLEAR_IT(husart, USART_CLEAR_PEF); |
<> | 144:ef7eb2e8f9f7 | 1175 | husart->ErrorCode |= HAL_USART_ERROR_PE; |
<> | 144:ef7eb2e8f9f7 | 1176 | } |
<> | 144:ef7eb2e8f9f7 | 1177 | |
<> | 144:ef7eb2e8f9f7 | 1178 | /* USART frame error interrupt occurred -------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 1179 | if(((isrflags & USART_ISR_FE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) |
<> | 144:ef7eb2e8f9f7 | 1180 | { |
<> | 144:ef7eb2e8f9f7 | 1181 | __HAL_USART_CLEAR_IT(husart, USART_CLEAR_FEF); |
<> | 144:ef7eb2e8f9f7 | 1182 | husart->ErrorCode |= HAL_USART_ERROR_FE; |
<> | 144:ef7eb2e8f9f7 | 1183 | } |
<> | 144:ef7eb2e8f9f7 | 1184 | |
<> | 144:ef7eb2e8f9f7 | 1185 | /* USART noise error interrupt occurred -------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 1186 | if(((isrflags & USART_ISR_NE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) |
<> | 144:ef7eb2e8f9f7 | 1187 | { |
<> | 144:ef7eb2e8f9f7 | 1188 | __HAL_USART_CLEAR_IT(husart, USART_CLEAR_NEF); |
<> | 144:ef7eb2e8f9f7 | 1189 | husart->ErrorCode |= HAL_USART_ERROR_NE; |
<> | 144:ef7eb2e8f9f7 | 1190 | } |
<> | 144:ef7eb2e8f9f7 | 1191 | |
<> | 144:ef7eb2e8f9f7 | 1192 | /* USART Over-Run interrupt occurred ----------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 1193 | if(((isrflags & USART_ISR_ORE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) |
<> | 144:ef7eb2e8f9f7 | 1194 | { |
<> | 144:ef7eb2e8f9f7 | 1195 | __HAL_USART_CLEAR_IT(husart, USART_CLEAR_OREF); |
<> | 144:ef7eb2e8f9f7 | 1196 | husart->ErrorCode |= HAL_USART_ERROR_ORE; |
<> | 144:ef7eb2e8f9f7 | 1197 | } |
<> | 144:ef7eb2e8f9f7 | 1198 | |
<> | 144:ef7eb2e8f9f7 | 1199 | /* Call USART Error Call back function if need be --------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 1200 | if(husart->ErrorCode != HAL_USART_ERROR_NONE) |
<> | 144:ef7eb2e8f9f7 | 1201 | { |
<> | 144:ef7eb2e8f9f7 | 1202 | /* USART in mode Receiver ---------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 1203 | if(((isrflags & USART_ISR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET)) |
<> | 144:ef7eb2e8f9f7 | 1204 | { |
<> | 144:ef7eb2e8f9f7 | 1205 | USART_Receive_IT(husart); |
<> | 144:ef7eb2e8f9f7 | 1206 | } |
<> | 144:ef7eb2e8f9f7 | 1207 | |
<> | 144:ef7eb2e8f9f7 | 1208 | /* If Overrun error occurs, or if any error occurs in DMA mode reception, |
<> | 144:ef7eb2e8f9f7 | 1209 | consider error as blocking */ |
<> | 144:ef7eb2e8f9f7 | 1210 | if (((husart->ErrorCode & HAL_USART_ERROR_ORE) != RESET) || |
<> | 144:ef7eb2e8f9f7 | 1211 | (HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAR))) |
<> | 144:ef7eb2e8f9f7 | 1212 | { |
<> | 144:ef7eb2e8f9f7 | 1213 | /* Blocking error : transfer is aborted |
<> | 144:ef7eb2e8f9f7 | 1214 | Set the USART state ready to be able to start again the process, |
<> | 144:ef7eb2e8f9f7 | 1215 | Disable Rx Interrupts, and disable Rx DMA request, if ongoing */ |
<> | 144:ef7eb2e8f9f7 | 1216 | USART_EndRxTransfer(husart); |
<> | 144:ef7eb2e8f9f7 | 1217 | |
<> | 144:ef7eb2e8f9f7 | 1218 | /* Disable the USART DMA Rx request if enabled */ |
<> | 144:ef7eb2e8f9f7 | 1219 | if (HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAR)) |
<> | 144:ef7eb2e8f9f7 | 1220 | { |
<> | 144:ef7eb2e8f9f7 | 1221 | CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAR); |
<> | 144:ef7eb2e8f9f7 | 1222 | |
<> | 144:ef7eb2e8f9f7 | 1223 | /* Abort the USART DMA Rx channel */ |
<> | 144:ef7eb2e8f9f7 | 1224 | if(husart->hdmarx != NULL) |
<> | 144:ef7eb2e8f9f7 | 1225 | { |
<> | 144:ef7eb2e8f9f7 | 1226 | /* Set the USART DMA Abort callback : |
<> | 144:ef7eb2e8f9f7 | 1227 | will lead to call HAL_USART_ErrorCallback() at end of DMA abort procedure */ |
<> | 144:ef7eb2e8f9f7 | 1228 | husart->hdmarx->XferAbortCallback = USART_DMAAbortOnError; |
<> | 144:ef7eb2e8f9f7 | 1229 | |
<> | 144:ef7eb2e8f9f7 | 1230 | /* Abort DMA RX */ |
<> | 144:ef7eb2e8f9f7 | 1231 | if(HAL_DMA_Abort_IT(husart->hdmarx) != HAL_OK) |
<> | 144:ef7eb2e8f9f7 | 1232 | { |
<> | 144:ef7eb2e8f9f7 | 1233 | /* Call Directly husart->hdmarx->XferAbortCallback function in case of error */ |
<> | 144:ef7eb2e8f9f7 | 1234 | husart->hdmarx->XferAbortCallback(husart->hdmarx); |
<> | 144:ef7eb2e8f9f7 | 1235 | } |
<> | 144:ef7eb2e8f9f7 | 1236 | } |
<> | 144:ef7eb2e8f9f7 | 1237 | else |
<> | 144:ef7eb2e8f9f7 | 1238 | { |
<> | 144:ef7eb2e8f9f7 | 1239 | /* Call user error callback */ |
<> | 144:ef7eb2e8f9f7 | 1240 | HAL_USART_ErrorCallback(husart); |
<> | 144:ef7eb2e8f9f7 | 1241 | } |
<> | 144:ef7eb2e8f9f7 | 1242 | } |
<> | 144:ef7eb2e8f9f7 | 1243 | else |
<> | 144:ef7eb2e8f9f7 | 1244 | { |
<> | 144:ef7eb2e8f9f7 | 1245 | /* Call user error callback */ |
<> | 144:ef7eb2e8f9f7 | 1246 | HAL_USART_ErrorCallback(husart); |
<> | 144:ef7eb2e8f9f7 | 1247 | } |
<> | 144:ef7eb2e8f9f7 | 1248 | } |
<> | 144:ef7eb2e8f9f7 | 1249 | else |
<> | 144:ef7eb2e8f9f7 | 1250 | { |
<> | 144:ef7eb2e8f9f7 | 1251 | /* Non Blocking error : transfer could go on. |
<> | 144:ef7eb2e8f9f7 | 1252 | Error is notified to user through user error callback */ |
<> | 144:ef7eb2e8f9f7 | 1253 | HAL_USART_ErrorCallback(husart); |
<> | 144:ef7eb2e8f9f7 | 1254 | husart->ErrorCode = HAL_USART_ERROR_NONE; |
<> | 144:ef7eb2e8f9f7 | 1255 | } |
<> | 144:ef7eb2e8f9f7 | 1256 | } |
<> | 144:ef7eb2e8f9f7 | 1257 | return; |
<> | 144:ef7eb2e8f9f7 | 1258 | |
<> | 144:ef7eb2e8f9f7 | 1259 | } /* End if some error occurs */ |
<> | 144:ef7eb2e8f9f7 | 1260 | |
<> | 144:ef7eb2e8f9f7 | 1261 | /* USART in mode Transmitter -----------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 1262 | if(((isrflags & USART_ISR_TXE) != RESET) && ((cr1its & USART_CR1_TXEIE) != RESET)) |
<> | 144:ef7eb2e8f9f7 | 1263 | { |
<> | 144:ef7eb2e8f9f7 | 1264 | if(husart->State == HAL_USART_STATE_BUSY_TX) |
<> | 144:ef7eb2e8f9f7 | 1265 | { |
<> | 144:ef7eb2e8f9f7 | 1266 | USART_Transmit_IT(husart); |
<> | 144:ef7eb2e8f9f7 | 1267 | } |
<> | 144:ef7eb2e8f9f7 | 1268 | else |
<> | 144:ef7eb2e8f9f7 | 1269 | { |
<> | 144:ef7eb2e8f9f7 | 1270 | USART_TransmitReceive_IT(husart); |
<> | 144:ef7eb2e8f9f7 | 1271 | } |
<> | 144:ef7eb2e8f9f7 | 1272 | return; |
<> | 144:ef7eb2e8f9f7 | 1273 | } |
<> | 144:ef7eb2e8f9f7 | 1274 | |
<> | 144:ef7eb2e8f9f7 | 1275 | /* USART in mode Transmitter (transmission end) -----------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 1276 | if(((isrflags & USART_ISR_TC) != RESET) && ((cr1its & USART_CR1_TCIE) != RESET)) |
<> | 144:ef7eb2e8f9f7 | 1277 | { |
<> | 144:ef7eb2e8f9f7 | 1278 | USART_EndTransmit_IT(husart); |
<> | 144:ef7eb2e8f9f7 | 1279 | return; |
<> | 144:ef7eb2e8f9f7 | 1280 | } |
<> | 144:ef7eb2e8f9f7 | 1281 | } |
<> | 144:ef7eb2e8f9f7 | 1282 | |
<> | 144:ef7eb2e8f9f7 | 1283 | /** |
<> | 144:ef7eb2e8f9f7 | 1284 | * @brief Tx Transfer completed callbacks |
<> | 144:ef7eb2e8f9f7 | 1285 | * @param husart: USART handle |
<> | 144:ef7eb2e8f9f7 | 1286 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 1287 | */ |
<> | 144:ef7eb2e8f9f7 | 1288 | __weak void HAL_USART_TxCpltCallback(USART_HandleTypeDef *husart) |
<> | 144:ef7eb2e8f9f7 | 1289 | { |
<> | 144:ef7eb2e8f9f7 | 1290 | /* Prevent unused argument(s) compilation warning */ |
<> | 144:ef7eb2e8f9f7 | 1291 | UNUSED(husart); |
<> | 144:ef7eb2e8f9f7 | 1292 | |
<> | 144:ef7eb2e8f9f7 | 1293 | /* NOTE : This function should not be modified, when the callback is needed, |
<> | 144:ef7eb2e8f9f7 | 1294 | the HAL_USART_TxCpltCallback can be implemented in the user file |
<> | 144:ef7eb2e8f9f7 | 1295 | */ |
<> | 144:ef7eb2e8f9f7 | 1296 | } |
<> | 144:ef7eb2e8f9f7 | 1297 | |
<> | 144:ef7eb2e8f9f7 | 1298 | /** |
<> | 144:ef7eb2e8f9f7 | 1299 | * @brief Tx Half Transfer completed callbacks. |
<> | 144:ef7eb2e8f9f7 | 1300 | * @param husart: USART handle |
<> | 144:ef7eb2e8f9f7 | 1301 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 1302 | */ |
<> | 144:ef7eb2e8f9f7 | 1303 | __weak void HAL_USART_TxHalfCpltCallback(USART_HandleTypeDef *husart) |
<> | 144:ef7eb2e8f9f7 | 1304 | { |
<> | 144:ef7eb2e8f9f7 | 1305 | /* Prevent unused argument(s) compilation warning */ |
<> | 144:ef7eb2e8f9f7 | 1306 | UNUSED(husart); |
<> | 144:ef7eb2e8f9f7 | 1307 | |
<> | 144:ef7eb2e8f9f7 | 1308 | /* NOTE: This function should not be modified, when the callback is needed, |
<> | 144:ef7eb2e8f9f7 | 1309 | the HAL_USART_TxHalfCpltCallback can be implemented in the user file |
<> | 144:ef7eb2e8f9f7 | 1310 | */ |
<> | 144:ef7eb2e8f9f7 | 1311 | } |
<> | 144:ef7eb2e8f9f7 | 1312 | |
<> | 144:ef7eb2e8f9f7 | 1313 | /** |
<> | 144:ef7eb2e8f9f7 | 1314 | * @brief Rx Transfer completed callbacks. |
<> | 144:ef7eb2e8f9f7 | 1315 | * @param husart: USART handle |
<> | 144:ef7eb2e8f9f7 | 1316 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 1317 | */ |
<> | 144:ef7eb2e8f9f7 | 1318 | __weak void HAL_USART_RxCpltCallback(USART_HandleTypeDef *husart) |
<> | 144:ef7eb2e8f9f7 | 1319 | { |
<> | 144:ef7eb2e8f9f7 | 1320 | /* Prevent unused argument(s) compilation warning */ |
<> | 144:ef7eb2e8f9f7 | 1321 | UNUSED(husart); |
<> | 144:ef7eb2e8f9f7 | 1322 | |
<> | 144:ef7eb2e8f9f7 | 1323 | /* NOTE: This function should not be modified, when the callback is needed, |
<> | 144:ef7eb2e8f9f7 | 1324 | the HAL_USART_RxCpltCallback can be implemented in the user file |
<> | 144:ef7eb2e8f9f7 | 1325 | */ |
<> | 144:ef7eb2e8f9f7 | 1326 | } |
<> | 144:ef7eb2e8f9f7 | 1327 | |
<> | 144:ef7eb2e8f9f7 | 1328 | /** |
<> | 144:ef7eb2e8f9f7 | 1329 | * @brief Rx Half Transfer completed callbacks |
<> | 144:ef7eb2e8f9f7 | 1330 | * @param husart: usart handle |
<> | 144:ef7eb2e8f9f7 | 1331 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 1332 | */ |
<> | 144:ef7eb2e8f9f7 | 1333 | __weak void HAL_USART_RxHalfCpltCallback(USART_HandleTypeDef *husart) |
<> | 144:ef7eb2e8f9f7 | 1334 | { |
<> | 144:ef7eb2e8f9f7 | 1335 | /* Prevent unused argument(s) compilation warning */ |
<> | 144:ef7eb2e8f9f7 | 1336 | UNUSED(husart); |
<> | 144:ef7eb2e8f9f7 | 1337 | |
<> | 144:ef7eb2e8f9f7 | 1338 | /* NOTE : This function should not be modified, when the callback is needed, |
<> | 144:ef7eb2e8f9f7 | 1339 | the HAL_USART_RxHalfCpltCallback can be implemented in the user file |
<> | 144:ef7eb2e8f9f7 | 1340 | */ |
<> | 144:ef7eb2e8f9f7 | 1341 | } |
<> | 144:ef7eb2e8f9f7 | 1342 | |
<> | 144:ef7eb2e8f9f7 | 1343 | /** |
<> | 144:ef7eb2e8f9f7 | 1344 | * @brief Tx/Rx Transfers completed callback for the non-blocking process |
<> | 144:ef7eb2e8f9f7 | 1345 | * @param husart: USART handle |
<> | 144:ef7eb2e8f9f7 | 1346 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 1347 | */ |
<> | 144:ef7eb2e8f9f7 | 1348 | __weak void HAL_USART_TxRxCpltCallback(USART_HandleTypeDef *husart) |
<> | 144:ef7eb2e8f9f7 | 1349 | { |
<> | 144:ef7eb2e8f9f7 | 1350 | /* Prevent unused argument(s) compilation warning */ |
<> | 144:ef7eb2e8f9f7 | 1351 | UNUSED(husart); |
<> | 144:ef7eb2e8f9f7 | 1352 | |
<> | 144:ef7eb2e8f9f7 | 1353 | /* NOTE : This function should not be modified, when the callback is needed, |
<> | 144:ef7eb2e8f9f7 | 1354 | the HAL_USART_TxRxCpltCallback can be implemented in the user file |
<> | 144:ef7eb2e8f9f7 | 1355 | */ |
<> | 144:ef7eb2e8f9f7 | 1356 | } |
<> | 144:ef7eb2e8f9f7 | 1357 | |
<> | 144:ef7eb2e8f9f7 | 1358 | /** |
<> | 144:ef7eb2e8f9f7 | 1359 | * @brief USART error callbacks |
<> | 144:ef7eb2e8f9f7 | 1360 | * @param husart: USART handle |
<> | 144:ef7eb2e8f9f7 | 1361 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 1362 | */ |
<> | 144:ef7eb2e8f9f7 | 1363 | __weak void HAL_USART_ErrorCallback(USART_HandleTypeDef *husart) |
<> | 144:ef7eb2e8f9f7 | 1364 | { |
<> | 144:ef7eb2e8f9f7 | 1365 | /* Prevent unused argument(s) compilation warning */ |
<> | 144:ef7eb2e8f9f7 | 1366 | UNUSED(husart); |
<> | 144:ef7eb2e8f9f7 | 1367 | |
<> | 144:ef7eb2e8f9f7 | 1368 | /* NOTE : This function should not be modified, when the callback is needed, |
<> | 144:ef7eb2e8f9f7 | 1369 | the HAL_USART_ErrorCallback can be implemented in the user file |
<> | 144:ef7eb2e8f9f7 | 1370 | */ |
<> | 144:ef7eb2e8f9f7 | 1371 | } |
<> | 144:ef7eb2e8f9f7 | 1372 | |
<> | 144:ef7eb2e8f9f7 | 1373 | /** |
<> | 144:ef7eb2e8f9f7 | 1374 | * @} |
<> | 144:ef7eb2e8f9f7 | 1375 | */ |
<> | 144:ef7eb2e8f9f7 | 1376 | |
<> | 144:ef7eb2e8f9f7 | 1377 | /** @defgroup USART_Exported_Functions_Group3 Peripheral State and Errors functions |
<> | 144:ef7eb2e8f9f7 | 1378 | * @brief USART State and Errors functions |
<> | 144:ef7eb2e8f9f7 | 1379 | * |
<> | 144:ef7eb2e8f9f7 | 1380 | @verbatim |
<> | 144:ef7eb2e8f9f7 | 1381 | ============================================================================== |
<> | 144:ef7eb2e8f9f7 | 1382 | ##### Peripheral State and Errors functions ##### |
<> | 144:ef7eb2e8f9f7 | 1383 | ============================================================================== |
<> | 144:ef7eb2e8f9f7 | 1384 | [..] |
<> | 144:ef7eb2e8f9f7 | 1385 | This subsection provides a set of functions allowing to return the State of |
<> | 144:ef7eb2e8f9f7 | 1386 | USART communication |
<> | 144:ef7eb2e8f9f7 | 1387 | process, return Peripheral Errors occurred during communication process |
<> | 144:ef7eb2e8f9f7 | 1388 | (+) HAL_USART_GetState() API can be helpful to check in run-time the state |
<> | 144:ef7eb2e8f9f7 | 1389 | of the USART peripheral. |
<> | 144:ef7eb2e8f9f7 | 1390 | (+) HAL_USART_GetError() check in run-time errors that could be occurred during |
<> | 144:ef7eb2e8f9f7 | 1391 | communication. |
<> | 144:ef7eb2e8f9f7 | 1392 | @endverbatim |
<> | 144:ef7eb2e8f9f7 | 1393 | * @{ |
<> | 144:ef7eb2e8f9f7 | 1394 | */ |
<> | 144:ef7eb2e8f9f7 | 1395 | |
<> | 144:ef7eb2e8f9f7 | 1396 | /** |
<> | 144:ef7eb2e8f9f7 | 1397 | * @brief return the USART state |
<> | 144:ef7eb2e8f9f7 | 1398 | * @param husart: USART handle |
<> | 144:ef7eb2e8f9f7 | 1399 | * @retval HAL state |
<> | 144:ef7eb2e8f9f7 | 1400 | */ |
<> | 144:ef7eb2e8f9f7 | 1401 | HAL_USART_StateTypeDef HAL_USART_GetState(USART_HandleTypeDef *husart) |
<> | 144:ef7eb2e8f9f7 | 1402 | { |
<> | 144:ef7eb2e8f9f7 | 1403 | return husart->State; |
<> | 144:ef7eb2e8f9f7 | 1404 | } |
<> | 144:ef7eb2e8f9f7 | 1405 | |
<> | 144:ef7eb2e8f9f7 | 1406 | /** |
<> | 144:ef7eb2e8f9f7 | 1407 | * @brief Return the USART error code |
<> | 144:ef7eb2e8f9f7 | 1408 | * @param husart : pointer to a USART_HandleTypeDef structure that contains |
<> | 144:ef7eb2e8f9f7 | 1409 | * the configuration information for the specified USART. |
<> | 144:ef7eb2e8f9f7 | 1410 | * @retval USART Error Code |
<> | 144:ef7eb2e8f9f7 | 1411 | */ |
<> | 144:ef7eb2e8f9f7 | 1412 | uint32_t HAL_USART_GetError(USART_HandleTypeDef *husart) |
<> | 144:ef7eb2e8f9f7 | 1413 | { |
<> | 144:ef7eb2e8f9f7 | 1414 | return husart->ErrorCode; |
<> | 144:ef7eb2e8f9f7 | 1415 | } |
<> | 144:ef7eb2e8f9f7 | 1416 | |
<> | 144:ef7eb2e8f9f7 | 1417 | /** |
<> | 144:ef7eb2e8f9f7 | 1418 | * @} |
<> | 144:ef7eb2e8f9f7 | 1419 | */ |
<> | 144:ef7eb2e8f9f7 | 1420 | |
<> | 144:ef7eb2e8f9f7 | 1421 | |
<> | 144:ef7eb2e8f9f7 | 1422 | /** |
<> | 144:ef7eb2e8f9f7 | 1423 | * @brief Simplex Send an amount of data in non-blocking mode. |
<> | 144:ef7eb2e8f9f7 | 1424 | * @note Function called under interruption only, once |
<> | 144:ef7eb2e8f9f7 | 1425 | * interruptions have been enabled by HAL_USART_Transmit_IT(). |
<> | 144:ef7eb2e8f9f7 | 1426 | * @param husart: USART handle |
<> | 144:ef7eb2e8f9f7 | 1427 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 1428 | * @note The USART errors are not managed to avoid the overrun error. |
<> | 144:ef7eb2e8f9f7 | 1429 | */ |
<> | 144:ef7eb2e8f9f7 | 1430 | static HAL_StatusTypeDef USART_Transmit_IT(USART_HandleTypeDef *husart) |
<> | 144:ef7eb2e8f9f7 | 1431 | { |
<> | 144:ef7eb2e8f9f7 | 1432 | uint16_t* tmp; |
<> | 144:ef7eb2e8f9f7 | 1433 | |
<> | 144:ef7eb2e8f9f7 | 1434 | if(husart->State == HAL_USART_STATE_BUSY_TX) |
<> | 144:ef7eb2e8f9f7 | 1435 | { |
<> | 144:ef7eb2e8f9f7 | 1436 | |
<> | 144:ef7eb2e8f9f7 | 1437 | if(husart->TxXferCount == 0U) |
<> | 144:ef7eb2e8f9f7 | 1438 | { |
<> | 144:ef7eb2e8f9f7 | 1439 | /* Disable the USART Transmit data register empty interrupt */ |
<> | 144:ef7eb2e8f9f7 | 1440 | __HAL_USART_DISABLE_IT(husart, USART_IT_TXE); |
<> | 144:ef7eb2e8f9f7 | 1441 | |
<> | 144:ef7eb2e8f9f7 | 1442 | /* Enable the USART Transmit Complete Interrupt */ |
<> | 144:ef7eb2e8f9f7 | 1443 | __HAL_USART_ENABLE_IT(husart, USART_IT_TC); |
<> | 144:ef7eb2e8f9f7 | 1444 | |
<> | 144:ef7eb2e8f9f7 | 1445 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 1446 | } |
<> | 144:ef7eb2e8f9f7 | 1447 | else |
<> | 144:ef7eb2e8f9f7 | 1448 | { |
<> | 144:ef7eb2e8f9f7 | 1449 | if((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE)) |
<> | 144:ef7eb2e8f9f7 | 1450 | { |
<> | 144:ef7eb2e8f9f7 | 1451 | tmp = (uint16_t*) husart->pTxBuffPtr; |
<> | 144:ef7eb2e8f9f7 | 1452 | husart->Instance->TDR = (*tmp & (uint16_t)0x01FFU); |
<> | 144:ef7eb2e8f9f7 | 1453 | husart->pTxBuffPtr += 2U; |
<> | 144:ef7eb2e8f9f7 | 1454 | } |
<> | 144:ef7eb2e8f9f7 | 1455 | else |
<> | 144:ef7eb2e8f9f7 | 1456 | { |
<> | 144:ef7eb2e8f9f7 | 1457 | husart->Instance->TDR = (uint8_t)(*husart->pTxBuffPtr++ & (uint8_t)0xFF); |
<> | 144:ef7eb2e8f9f7 | 1458 | } |
<> | 144:ef7eb2e8f9f7 | 1459 | |
<> | 144:ef7eb2e8f9f7 | 1460 | husart->TxXferCount--; |
<> | 144:ef7eb2e8f9f7 | 1461 | |
<> | 144:ef7eb2e8f9f7 | 1462 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 1463 | } |
<> | 144:ef7eb2e8f9f7 | 1464 | } |
<> | 144:ef7eb2e8f9f7 | 1465 | else |
<> | 144:ef7eb2e8f9f7 | 1466 | { |
<> | 144:ef7eb2e8f9f7 | 1467 | return HAL_BUSY; |
<> | 144:ef7eb2e8f9f7 | 1468 | } |
<> | 144:ef7eb2e8f9f7 | 1469 | } |
<> | 144:ef7eb2e8f9f7 | 1470 | |
<> | 144:ef7eb2e8f9f7 | 1471 | /** |
<> | 144:ef7eb2e8f9f7 | 1472 | * @brief Wraps up transmission in non-blocking mode. |
<> | 144:ef7eb2e8f9f7 | 1473 | * @param husart: pointer to a USART_HandleTypeDef structure that contains |
<> | 144:ef7eb2e8f9f7 | 1474 | * the configuration information for the specified USART module. |
<> | 144:ef7eb2e8f9f7 | 1475 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 1476 | */ |
<> | 144:ef7eb2e8f9f7 | 1477 | static HAL_StatusTypeDef USART_EndTransmit_IT(USART_HandleTypeDef *husart) |
<> | 144:ef7eb2e8f9f7 | 1478 | { |
<> | 144:ef7eb2e8f9f7 | 1479 | /* Disable the USART Transmit Complete Interrupt */ |
<> | 144:ef7eb2e8f9f7 | 1480 | CLEAR_BIT(husart->Instance->CR1, USART_CR1_TCIE); |
<> | 144:ef7eb2e8f9f7 | 1481 | |
<> | 144:ef7eb2e8f9f7 | 1482 | /* Disable the USART Error Interrupt: (Frame error, noise error, overrun error) */ |
<> | 144:ef7eb2e8f9f7 | 1483 | CLEAR_BIT(husart->Instance->CR3, USART_CR3_EIE); |
<> | 144:ef7eb2e8f9f7 | 1484 | |
<> | 144:ef7eb2e8f9f7 | 1485 | husart->State = HAL_USART_STATE_READY; |
<> | 144:ef7eb2e8f9f7 | 1486 | |
<> | 144:ef7eb2e8f9f7 | 1487 | HAL_USART_TxCpltCallback(husart); |
<> | 144:ef7eb2e8f9f7 | 1488 | |
<> | 144:ef7eb2e8f9f7 | 1489 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 1490 | } |
<> | 144:ef7eb2e8f9f7 | 1491 | |
<> | 144:ef7eb2e8f9f7 | 1492 | /** |
<> | 144:ef7eb2e8f9f7 | 1493 | * @brief Simplex Receive an amount of data in non-blocking mode. |
<> | 144:ef7eb2e8f9f7 | 1494 | * Function called under interruption only, once |
<> | 144:ef7eb2e8f9f7 | 1495 | * interruptions have been enabled by HAL_USART_Receive_IT() |
<> | 144:ef7eb2e8f9f7 | 1496 | * @param husart: USART handle |
<> | 144:ef7eb2e8f9f7 | 1497 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 1498 | */ |
<> | 144:ef7eb2e8f9f7 | 1499 | static HAL_StatusTypeDef USART_Receive_IT(USART_HandleTypeDef *husart) |
<> | 144:ef7eb2e8f9f7 | 1500 | { |
<> | 144:ef7eb2e8f9f7 | 1501 | uint16_t* tmp; |
<> | 144:ef7eb2e8f9f7 | 1502 | uint16_t uhMask = husart->Mask; |
<> | 144:ef7eb2e8f9f7 | 1503 | |
<> | 144:ef7eb2e8f9f7 | 1504 | if(husart->State == HAL_USART_STATE_BUSY_RX) |
<> | 144:ef7eb2e8f9f7 | 1505 | { |
<> | 144:ef7eb2e8f9f7 | 1506 | |
<> | 144:ef7eb2e8f9f7 | 1507 | if((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE)) |
<> | 144:ef7eb2e8f9f7 | 1508 | { |
<> | 144:ef7eb2e8f9f7 | 1509 | tmp = (uint16_t*) husart->pRxBuffPtr; |
<> | 144:ef7eb2e8f9f7 | 1510 | *tmp = (uint16_t)(husart->Instance->RDR & uhMask); |
<> | 144:ef7eb2e8f9f7 | 1511 | husart->pRxBuffPtr += 2U; |
<> | 144:ef7eb2e8f9f7 | 1512 | } |
<> | 144:ef7eb2e8f9f7 | 1513 | else |
<> | 144:ef7eb2e8f9f7 | 1514 | { |
<> | 144:ef7eb2e8f9f7 | 1515 | *husart->pRxBuffPtr++ = (uint8_t)(husart->Instance->RDR & (uint8_t)uhMask); |
<> | 144:ef7eb2e8f9f7 | 1516 | } |
<> | 144:ef7eb2e8f9f7 | 1517 | /* Send dummy byte in order to generate the clock for the Slave to Send the next data */ |
<> | 144:ef7eb2e8f9f7 | 1518 | husart->Instance->TDR = (DUMMY_DATA & (uint16_t)0x00FFU); |
<> | 144:ef7eb2e8f9f7 | 1519 | |
<> | 144:ef7eb2e8f9f7 | 1520 | if(--husart->RxXferCount == 0U) |
<> | 144:ef7eb2e8f9f7 | 1521 | { |
<> | 144:ef7eb2e8f9f7 | 1522 | CLEAR_BIT(husart->Instance->CR1, USART_CR1_RXNEIE); |
<> | 144:ef7eb2e8f9f7 | 1523 | |
<> | 144:ef7eb2e8f9f7 | 1524 | /* Disable the USART Parity Error Interrupt */ |
<> | 144:ef7eb2e8f9f7 | 1525 | CLEAR_BIT(husart->Instance->CR1, USART_CR1_PEIE); |
<> | 144:ef7eb2e8f9f7 | 1526 | |
<> | 144:ef7eb2e8f9f7 | 1527 | /* Disable the USART Error Interrupt: (Frame error, noise error, overrun error) */ |
<> | 144:ef7eb2e8f9f7 | 1528 | CLEAR_BIT(husart->Instance->CR3, USART_CR3_EIE); |
<> | 144:ef7eb2e8f9f7 | 1529 | |
<> | 144:ef7eb2e8f9f7 | 1530 | husart->State = HAL_USART_STATE_READY; |
<> | 144:ef7eb2e8f9f7 | 1531 | |
<> | 144:ef7eb2e8f9f7 | 1532 | HAL_USART_RxCpltCallback(husart); |
<> | 144:ef7eb2e8f9f7 | 1533 | |
<> | 144:ef7eb2e8f9f7 | 1534 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 1535 | } |
<> | 144:ef7eb2e8f9f7 | 1536 | |
<> | 144:ef7eb2e8f9f7 | 1537 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 1538 | } |
<> | 144:ef7eb2e8f9f7 | 1539 | else |
<> | 144:ef7eb2e8f9f7 | 1540 | { |
<> | 144:ef7eb2e8f9f7 | 1541 | return HAL_BUSY; |
<> | 144:ef7eb2e8f9f7 | 1542 | } |
<> | 144:ef7eb2e8f9f7 | 1543 | } |
<> | 144:ef7eb2e8f9f7 | 1544 | |
<> | 144:ef7eb2e8f9f7 | 1545 | /** |
<> | 144:ef7eb2e8f9f7 | 1546 | * @brief Full-Duplex Send receive an amount of data in full-duplex mode (non-blocking). |
<> | 144:ef7eb2e8f9f7 | 1547 | * Function called under interruption only, once |
<> | 144:ef7eb2e8f9f7 | 1548 | * interruptions have been enabled by HAL_USART_TransmitReceive_IT() |
<> | 144:ef7eb2e8f9f7 | 1549 | * @param husart: USART handle |
<> | 144:ef7eb2e8f9f7 | 1550 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 1551 | */ |
<> | 144:ef7eb2e8f9f7 | 1552 | static HAL_StatusTypeDef USART_TransmitReceive_IT(USART_HandleTypeDef *husart) |
<> | 144:ef7eb2e8f9f7 | 1553 | { |
<> | 144:ef7eb2e8f9f7 | 1554 | uint16_t* tmp; |
<> | 144:ef7eb2e8f9f7 | 1555 | uint16_t uhMask = husart->Mask; |
<> | 144:ef7eb2e8f9f7 | 1556 | |
<> | 144:ef7eb2e8f9f7 | 1557 | if(husart->State == HAL_USART_STATE_BUSY_TX_RX) |
<> | 144:ef7eb2e8f9f7 | 1558 | { |
<> | 144:ef7eb2e8f9f7 | 1559 | if(husart->TxXferCount != 0x00U) |
<> | 144:ef7eb2e8f9f7 | 1560 | { |
<> | 144:ef7eb2e8f9f7 | 1561 | if(__HAL_USART_GET_FLAG(husart, USART_FLAG_TXE) != RESET) |
<> | 144:ef7eb2e8f9f7 | 1562 | { |
<> | 144:ef7eb2e8f9f7 | 1563 | if((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE)) |
<> | 144:ef7eb2e8f9f7 | 1564 | { |
<> | 144:ef7eb2e8f9f7 | 1565 | tmp = (uint16_t*) husart->pTxBuffPtr; |
<> | 144:ef7eb2e8f9f7 | 1566 | husart->Instance->TDR = (uint16_t)(*tmp & uhMask); |
<> | 144:ef7eb2e8f9f7 | 1567 | husart->pTxBuffPtr += 2U; |
<> | 144:ef7eb2e8f9f7 | 1568 | } |
<> | 144:ef7eb2e8f9f7 | 1569 | else |
<> | 144:ef7eb2e8f9f7 | 1570 | { |
<> | 144:ef7eb2e8f9f7 | 1571 | husart->Instance->TDR = (uint8_t)(*husart->pTxBuffPtr++ & (uint8_t)uhMask); |
<> | 144:ef7eb2e8f9f7 | 1572 | } |
<> | 144:ef7eb2e8f9f7 | 1573 | husart->TxXferCount--; |
<> | 144:ef7eb2e8f9f7 | 1574 | |
<> | 144:ef7eb2e8f9f7 | 1575 | /* Check the latest data transmitted */ |
<> | 144:ef7eb2e8f9f7 | 1576 | if(husart->TxXferCount == 0U) |
<> | 144:ef7eb2e8f9f7 | 1577 | { |
<> | 144:ef7eb2e8f9f7 | 1578 | CLEAR_BIT(husart->Instance->CR1, USART_CR1_TXEIE); |
<> | 144:ef7eb2e8f9f7 | 1579 | } |
<> | 144:ef7eb2e8f9f7 | 1580 | } |
<> | 144:ef7eb2e8f9f7 | 1581 | } |
<> | 144:ef7eb2e8f9f7 | 1582 | |
<> | 144:ef7eb2e8f9f7 | 1583 | if(husart->RxXferCount != 0x00U) |
<> | 144:ef7eb2e8f9f7 | 1584 | { |
<> | 144:ef7eb2e8f9f7 | 1585 | if(__HAL_USART_GET_FLAG(husart, USART_FLAG_RXNE) != RESET) |
<> | 144:ef7eb2e8f9f7 | 1586 | { |
<> | 144:ef7eb2e8f9f7 | 1587 | if((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE)) |
<> | 144:ef7eb2e8f9f7 | 1588 | { |
<> | 144:ef7eb2e8f9f7 | 1589 | tmp = (uint16_t*) husart->pRxBuffPtr; |
<> | 144:ef7eb2e8f9f7 | 1590 | *tmp = (uint16_t)(husart->Instance->RDR & uhMask); |
<> | 144:ef7eb2e8f9f7 | 1591 | husart->pRxBuffPtr += 2U; |
<> | 144:ef7eb2e8f9f7 | 1592 | } |
<> | 144:ef7eb2e8f9f7 | 1593 | else |
<> | 144:ef7eb2e8f9f7 | 1594 | { |
<> | 144:ef7eb2e8f9f7 | 1595 | *husart->pRxBuffPtr++ = (uint8_t)(husart->Instance->RDR & (uint8_t)uhMask); |
<> | 144:ef7eb2e8f9f7 | 1596 | } |
<> | 144:ef7eb2e8f9f7 | 1597 | husart->RxXferCount--; |
<> | 144:ef7eb2e8f9f7 | 1598 | } |
<> | 144:ef7eb2e8f9f7 | 1599 | } |
<> | 144:ef7eb2e8f9f7 | 1600 | |
<> | 144:ef7eb2e8f9f7 | 1601 | /* Check the latest data received */ |
<> | 144:ef7eb2e8f9f7 | 1602 | if(husart->RxXferCount == 0U) |
<> | 144:ef7eb2e8f9f7 | 1603 | { |
<> | 144:ef7eb2e8f9f7 | 1604 | CLEAR_BIT(husart->Instance->CR1, USART_CR1_RXNEIE); |
<> | 144:ef7eb2e8f9f7 | 1605 | |
<> | 144:ef7eb2e8f9f7 | 1606 | /* Disable the USART Parity Error Interrupt */ |
<> | 144:ef7eb2e8f9f7 | 1607 | CLEAR_BIT(husart->Instance->CR1, USART_CR1_PEIE); |
<> | 144:ef7eb2e8f9f7 | 1608 | |
<> | 144:ef7eb2e8f9f7 | 1609 | /* Disable the USART Error Interrupt: (Frame error, noise error, overrun error) */ |
<> | 144:ef7eb2e8f9f7 | 1610 | CLEAR_BIT(husart->Instance->CR3, USART_CR3_EIE); |
<> | 144:ef7eb2e8f9f7 | 1611 | |
<> | 144:ef7eb2e8f9f7 | 1612 | husart->State = HAL_USART_STATE_READY; |
<> | 144:ef7eb2e8f9f7 | 1613 | |
<> | 144:ef7eb2e8f9f7 | 1614 | HAL_USART_TxRxCpltCallback(husart); |
<> | 144:ef7eb2e8f9f7 | 1615 | |
<> | 144:ef7eb2e8f9f7 | 1616 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 1617 | } |
<> | 144:ef7eb2e8f9f7 | 1618 | |
<> | 144:ef7eb2e8f9f7 | 1619 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 1620 | } |
<> | 144:ef7eb2e8f9f7 | 1621 | else |
<> | 144:ef7eb2e8f9f7 | 1622 | { |
<> | 144:ef7eb2e8f9f7 | 1623 | return HAL_BUSY; |
<> | 144:ef7eb2e8f9f7 | 1624 | } |
<> | 144:ef7eb2e8f9f7 | 1625 | } |
<> | 144:ef7eb2e8f9f7 | 1626 | |
<> | 144:ef7eb2e8f9f7 | 1627 | /** |
<> | 144:ef7eb2e8f9f7 | 1628 | * @brief This function handles USART Communication Timeout. |
<> | 144:ef7eb2e8f9f7 | 1629 | * @param husart USART handle |
<> | 144:ef7eb2e8f9f7 | 1630 | * @param Flag specifies the USART flag to check. |
<> | 144:ef7eb2e8f9f7 | 1631 | * @param Status The new Flag status (SET or RESET). |
<> | 144:ef7eb2e8f9f7 | 1632 | * @param Tickstart Tick start value |
<> | 144:ef7eb2e8f9f7 | 1633 | * @param Timeout Timeout duration |
<> | 144:ef7eb2e8f9f7 | 1634 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 1635 | */ |
<> | 144:ef7eb2e8f9f7 | 1636 | static HAL_StatusTypeDef USART_WaitOnFlagUntilTimeout(USART_HandleTypeDef *husart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout) |
<> | 144:ef7eb2e8f9f7 | 1637 | { |
<> | 144:ef7eb2e8f9f7 | 1638 | /* Wait until flag is set */ |
<> | 144:ef7eb2e8f9f7 | 1639 | while((__HAL_USART_GET_FLAG(husart, Flag) ? SET : RESET) == Status) |
<> | 144:ef7eb2e8f9f7 | 1640 | { |
<> | 144:ef7eb2e8f9f7 | 1641 | /* Check for the Timeout */ |
<> | 144:ef7eb2e8f9f7 | 1642 | if(Timeout != HAL_MAX_DELAY) |
<> | 144:ef7eb2e8f9f7 | 1643 | { |
<> | 144:ef7eb2e8f9f7 | 1644 | if((Timeout == 0U)||((HAL_GetTick()-Tickstart) >= Timeout)) |
<> | 144:ef7eb2e8f9f7 | 1645 | { |
<> | 144:ef7eb2e8f9f7 | 1646 | /* Disable the USART Transmit Complete Interrupt */ |
<> | 144:ef7eb2e8f9f7 | 1647 | CLEAR_BIT(husart->Instance->CR1, USART_CR1_TXEIE); |
<> | 144:ef7eb2e8f9f7 | 1648 | |
<> | 144:ef7eb2e8f9f7 | 1649 | /* Disable the USART RXNE Interrupt */ |
<> | 144:ef7eb2e8f9f7 | 1650 | CLEAR_BIT(husart->Instance->CR1, USART_CR1_RXNEIE); |
<> | 144:ef7eb2e8f9f7 | 1651 | |
<> | 144:ef7eb2e8f9f7 | 1652 | /* Disable the USART Parity Error Interrupt */ |
<> | 144:ef7eb2e8f9f7 | 1653 | CLEAR_BIT(husart->Instance->CR1, USART_CR1_PEIE); |
<> | 144:ef7eb2e8f9f7 | 1654 | |
<> | 144:ef7eb2e8f9f7 | 1655 | /* Disable the USART Error Interrupt: (Frame error, noise error, overrun error) */ |
<> | 144:ef7eb2e8f9f7 | 1656 | CLEAR_BIT(husart->Instance->CR3, USART_CR3_EIE); |
<> | 144:ef7eb2e8f9f7 | 1657 | |
<> | 144:ef7eb2e8f9f7 | 1658 | husart->State= HAL_USART_STATE_READY; |
<> | 144:ef7eb2e8f9f7 | 1659 | |
<> | 144:ef7eb2e8f9f7 | 1660 | /* Process Unlocked */ |
<> | 144:ef7eb2e8f9f7 | 1661 | __HAL_UNLOCK(husart); |
<> | 144:ef7eb2e8f9f7 | 1662 | |
<> | 144:ef7eb2e8f9f7 | 1663 | return HAL_TIMEOUT; |
<> | 144:ef7eb2e8f9f7 | 1664 | } |
<> | 144:ef7eb2e8f9f7 | 1665 | } |
<> | 144:ef7eb2e8f9f7 | 1666 | } |
<> | 144:ef7eb2e8f9f7 | 1667 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 1668 | } |
<> | 144:ef7eb2e8f9f7 | 1669 | |
<> | 144:ef7eb2e8f9f7 | 1670 | |
<> | 144:ef7eb2e8f9f7 | 1671 | /** |
<> | 144:ef7eb2e8f9f7 | 1672 | * @brief DMA USART transmit process complete callback |
<> | 144:ef7eb2e8f9f7 | 1673 | * @param hdma: DMA handle |
<> | 144:ef7eb2e8f9f7 | 1674 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 1675 | */ |
<> | 144:ef7eb2e8f9f7 | 1676 | static void USART_DMATransmitCplt(DMA_HandleTypeDef *hdma) |
<> | 144:ef7eb2e8f9f7 | 1677 | { |
<> | 144:ef7eb2e8f9f7 | 1678 | USART_HandleTypeDef* husart = ( USART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
<> | 144:ef7eb2e8f9f7 | 1679 | |
<> | 144:ef7eb2e8f9f7 | 1680 | /* DMA Normal mode */ |
<> | 144:ef7eb2e8f9f7 | 1681 | if((hdma->Instance->CR & DMA_SxCR_CIRC) == 0U) |
<> | 144:ef7eb2e8f9f7 | 1682 | { |
<> | 144:ef7eb2e8f9f7 | 1683 | husart->TxXferCount = 0U; |
<> | 144:ef7eb2e8f9f7 | 1684 | |
<> | 144:ef7eb2e8f9f7 | 1685 | if(husart->State == HAL_USART_STATE_BUSY_TX) |
<> | 144:ef7eb2e8f9f7 | 1686 | { |
<> | 144:ef7eb2e8f9f7 | 1687 | /* Disable the DMA transfer for transmit request by resetting the DMAT bit |
<> | 144:ef7eb2e8f9f7 | 1688 | in the USART CR3 register */ |
<> | 144:ef7eb2e8f9f7 | 1689 | CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAT); |
<> | 144:ef7eb2e8f9f7 | 1690 | |
<> | 144:ef7eb2e8f9f7 | 1691 | /* Enable the USART Transmit Complete Interrupt */ |
<> | 144:ef7eb2e8f9f7 | 1692 | SET_BIT(husart->Instance->CR1, USART_CR1_TCIE); |
<> | 144:ef7eb2e8f9f7 | 1693 | } |
<> | 144:ef7eb2e8f9f7 | 1694 | } |
<> | 144:ef7eb2e8f9f7 | 1695 | /* DMA Circular mode */ |
<> | 144:ef7eb2e8f9f7 | 1696 | else |
<> | 144:ef7eb2e8f9f7 | 1697 | { |
<> | 144:ef7eb2e8f9f7 | 1698 | if(husart->State == HAL_USART_STATE_BUSY_TX) |
<> | 144:ef7eb2e8f9f7 | 1699 | { |
<> | 144:ef7eb2e8f9f7 | 1700 | HAL_USART_TxCpltCallback(husart); |
<> | 144:ef7eb2e8f9f7 | 1701 | } |
<> | 144:ef7eb2e8f9f7 | 1702 | } |
<> | 144:ef7eb2e8f9f7 | 1703 | } |
<> | 144:ef7eb2e8f9f7 | 1704 | |
<> | 144:ef7eb2e8f9f7 | 1705 | |
<> | 144:ef7eb2e8f9f7 | 1706 | /** |
<> | 144:ef7eb2e8f9f7 | 1707 | * @brief DMA USART transmit process half complete callback |
<> | 144:ef7eb2e8f9f7 | 1708 | * @param hdma : DMA handle |
<> | 144:ef7eb2e8f9f7 | 1709 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 1710 | */ |
<> | 144:ef7eb2e8f9f7 | 1711 | static void USART_DMATxHalfCplt(DMA_HandleTypeDef *hdma) |
<> | 144:ef7eb2e8f9f7 | 1712 | { |
<> | 144:ef7eb2e8f9f7 | 1713 | USART_HandleTypeDef* husart = (USART_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; |
<> | 144:ef7eb2e8f9f7 | 1714 | |
<> | 144:ef7eb2e8f9f7 | 1715 | HAL_USART_TxHalfCpltCallback(husart); |
<> | 144:ef7eb2e8f9f7 | 1716 | } |
<> | 144:ef7eb2e8f9f7 | 1717 | |
<> | 144:ef7eb2e8f9f7 | 1718 | /** |
<> | 144:ef7eb2e8f9f7 | 1719 | * @brief DMA USART receive process complete callback |
<> | 144:ef7eb2e8f9f7 | 1720 | * @param hdma: DMA handle |
<> | 144:ef7eb2e8f9f7 | 1721 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 1722 | */ |
<> | 144:ef7eb2e8f9f7 | 1723 | static void USART_DMAReceiveCplt(DMA_HandleTypeDef *hdma) |
<> | 144:ef7eb2e8f9f7 | 1724 | { |
<> | 144:ef7eb2e8f9f7 | 1725 | USART_HandleTypeDef* husart = ( USART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
<> | 144:ef7eb2e8f9f7 | 1726 | |
<> | 144:ef7eb2e8f9f7 | 1727 | /* DMA Normal mode */ |
<> | 144:ef7eb2e8f9f7 | 1728 | if((hdma->Instance->CR & DMA_SxCR_CIRC) == 0U) |
<> | 144:ef7eb2e8f9f7 | 1729 | { |
<> | 144:ef7eb2e8f9f7 | 1730 | husart->RxXferCount = 0U; |
<> | 144:ef7eb2e8f9f7 | 1731 | |
<> | 144:ef7eb2e8f9f7 | 1732 | /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ |
<> | 144:ef7eb2e8f9f7 | 1733 | CLEAR_BIT(husart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); |
<> | 144:ef7eb2e8f9f7 | 1734 | CLEAR_BIT(husart->Instance->CR3, USART_CR3_EIE); |
<> | 144:ef7eb2e8f9f7 | 1735 | |
<> | 144:ef7eb2e8f9f7 | 1736 | /* Disable the DMA RX transfer for the receiver request by resetting the DMAR bit |
<> | 144:ef7eb2e8f9f7 | 1737 | in USART CR3 register */ |
<> | 144:ef7eb2e8f9f7 | 1738 | CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAR); |
<> | 144:ef7eb2e8f9f7 | 1739 | /* similarly, disable the DMA TX transfer that was started to provide the |
<> | 144:ef7eb2e8f9f7 | 1740 | clock to the slave device */ |
<> | 144:ef7eb2e8f9f7 | 1741 | CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAT); |
<> | 144:ef7eb2e8f9f7 | 1742 | |
<> | 144:ef7eb2e8f9f7 | 1743 | if(husart->State == HAL_USART_STATE_BUSY_RX) |
<> | 144:ef7eb2e8f9f7 | 1744 | { |
<> | 144:ef7eb2e8f9f7 | 1745 | HAL_USART_RxCpltCallback(husart); |
<> | 144:ef7eb2e8f9f7 | 1746 | } |
<> | 144:ef7eb2e8f9f7 | 1747 | /* The USART state is HAL_USART_STATE_BUSY_TX_RX */ |
<> | 144:ef7eb2e8f9f7 | 1748 | else |
<> | 144:ef7eb2e8f9f7 | 1749 | { |
<> | 144:ef7eb2e8f9f7 | 1750 | HAL_USART_TxRxCpltCallback(husart); |
<> | 144:ef7eb2e8f9f7 | 1751 | } |
<> | 144:ef7eb2e8f9f7 | 1752 | husart->State= HAL_USART_STATE_READY; |
<> | 144:ef7eb2e8f9f7 | 1753 | } |
<> | 144:ef7eb2e8f9f7 | 1754 | /* DMA circular mode */ |
<> | 144:ef7eb2e8f9f7 | 1755 | else |
<> | 144:ef7eb2e8f9f7 | 1756 | { |
<> | 144:ef7eb2e8f9f7 | 1757 | if(husart->State == HAL_USART_STATE_BUSY_RX) |
<> | 144:ef7eb2e8f9f7 | 1758 | { |
<> | 144:ef7eb2e8f9f7 | 1759 | HAL_USART_RxCpltCallback(husart); |
<> | 144:ef7eb2e8f9f7 | 1760 | } |
<> | 144:ef7eb2e8f9f7 | 1761 | /* The USART state is HAL_USART_STATE_BUSY_TX_RX */ |
<> | 144:ef7eb2e8f9f7 | 1762 | else |
<> | 144:ef7eb2e8f9f7 | 1763 | { |
<> | 144:ef7eb2e8f9f7 | 1764 | HAL_USART_TxRxCpltCallback(husart); |
<> | 144:ef7eb2e8f9f7 | 1765 | } |
<> | 144:ef7eb2e8f9f7 | 1766 | } |
<> | 144:ef7eb2e8f9f7 | 1767 | } |
<> | 144:ef7eb2e8f9f7 | 1768 | |
<> | 144:ef7eb2e8f9f7 | 1769 | /** |
<> | 144:ef7eb2e8f9f7 | 1770 | * @brief DMA USART receive process half complete callback |
<> | 144:ef7eb2e8f9f7 | 1771 | * @param hdma : DMA handle |
<> | 144:ef7eb2e8f9f7 | 1772 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 1773 | */ |
<> | 144:ef7eb2e8f9f7 | 1774 | static void USART_DMARxHalfCplt(DMA_HandleTypeDef *hdma) |
<> | 144:ef7eb2e8f9f7 | 1775 | { |
<> | 144:ef7eb2e8f9f7 | 1776 | USART_HandleTypeDef* husart = (USART_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; |
<> | 144:ef7eb2e8f9f7 | 1777 | |
<> | 144:ef7eb2e8f9f7 | 1778 | HAL_USART_RxHalfCpltCallback(husart); |
<> | 144:ef7eb2e8f9f7 | 1779 | } |
<> | 144:ef7eb2e8f9f7 | 1780 | |
<> | 144:ef7eb2e8f9f7 | 1781 | /** |
<> | 144:ef7eb2e8f9f7 | 1782 | * @brief DMA USART communication error callback |
<> | 144:ef7eb2e8f9f7 | 1783 | * @param hdma: DMA handle |
<> | 144:ef7eb2e8f9f7 | 1784 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 1785 | */ |
<> | 144:ef7eb2e8f9f7 | 1786 | static void USART_DMAError(DMA_HandleTypeDef *hdma) |
<> | 144:ef7eb2e8f9f7 | 1787 | { |
<> | 144:ef7eb2e8f9f7 | 1788 | USART_HandleTypeDef* husart = ( USART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
<> | 144:ef7eb2e8f9f7 | 1789 | |
<> | 144:ef7eb2e8f9f7 | 1790 | husart->RxXferCount = 0U; |
<> | 144:ef7eb2e8f9f7 | 1791 | husart->TxXferCount = 0U; |
<> | 144:ef7eb2e8f9f7 | 1792 | |
<> | 144:ef7eb2e8f9f7 | 1793 | /* Stop USART DMA Tx request if ongoing */ |
<> | 144:ef7eb2e8f9f7 | 1794 | if((husart->State == HAL_USART_STATE_BUSY_TX) |
<> | 144:ef7eb2e8f9f7 | 1795 | &&(HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAT))) |
<> | 144:ef7eb2e8f9f7 | 1796 | { |
<> | 144:ef7eb2e8f9f7 | 1797 | USART_EndTxTransfer(husart); |
<> | 144:ef7eb2e8f9f7 | 1798 | } |
<> | 144:ef7eb2e8f9f7 | 1799 | |
<> | 144:ef7eb2e8f9f7 | 1800 | /* Stop USART DMA Rx request if ongoing */ |
<> | 144:ef7eb2e8f9f7 | 1801 | if((husart->State == HAL_USART_STATE_BUSY_RX) |
<> | 144:ef7eb2e8f9f7 | 1802 | &&(HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAR))) |
<> | 144:ef7eb2e8f9f7 | 1803 | { |
<> | 144:ef7eb2e8f9f7 | 1804 | USART_EndRxTransfer(husart); |
<> | 144:ef7eb2e8f9f7 | 1805 | } |
<> | 144:ef7eb2e8f9f7 | 1806 | |
<> | 144:ef7eb2e8f9f7 | 1807 | husart->ErrorCode |= HAL_USART_ERROR_DMA; |
<> | 144:ef7eb2e8f9f7 | 1808 | husart->State= HAL_USART_STATE_READY; |
<> | 144:ef7eb2e8f9f7 | 1809 | |
<> | 144:ef7eb2e8f9f7 | 1810 | HAL_USART_ErrorCallback(husart); |
<> | 144:ef7eb2e8f9f7 | 1811 | } |
<> | 144:ef7eb2e8f9f7 | 1812 | |
<> | 144:ef7eb2e8f9f7 | 1813 | /** |
<> | 144:ef7eb2e8f9f7 | 1814 | * @brief DMA USART communication abort callback |
<> | 144:ef7eb2e8f9f7 | 1815 | * (To be called at end of DMA Abort procedure). |
<> | 144:ef7eb2e8f9f7 | 1816 | * @param hdma: DMA handle. |
<> | 144:ef7eb2e8f9f7 | 1817 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 1818 | */ |
<> | 144:ef7eb2e8f9f7 | 1819 | static void USART_DMAAbortOnError(DMA_HandleTypeDef *hdma) |
<> | 144:ef7eb2e8f9f7 | 1820 | { |
<> | 144:ef7eb2e8f9f7 | 1821 | USART_HandleTypeDef* husart = (USART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
<> | 144:ef7eb2e8f9f7 | 1822 | husart->RxXferCount = 0U; |
<> | 144:ef7eb2e8f9f7 | 1823 | husart->TxXferCount = 0U; |
<> | 144:ef7eb2e8f9f7 | 1824 | |
<> | 144:ef7eb2e8f9f7 | 1825 | HAL_USART_ErrorCallback(husart); |
<> | 144:ef7eb2e8f9f7 | 1826 | } |
<> | 144:ef7eb2e8f9f7 | 1827 | |
<> | 144:ef7eb2e8f9f7 | 1828 | /** |
<> | 144:ef7eb2e8f9f7 | 1829 | * @brief End ongoing Tx transfer on USART peripheral (following error detection or Transmit completion). |
<> | 144:ef7eb2e8f9f7 | 1830 | * @param husart: USART handle. |
<> | 144:ef7eb2e8f9f7 | 1831 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 1832 | */ |
<> | 144:ef7eb2e8f9f7 | 1833 | static void USART_EndTxTransfer(USART_HandleTypeDef *husart) |
<> | 144:ef7eb2e8f9f7 | 1834 | { |
<> | 144:ef7eb2e8f9f7 | 1835 | /* At end of Tx process, restore husart->State to Ready */ |
<> | 144:ef7eb2e8f9f7 | 1836 | husart->State = HAL_USART_STATE_READY; |
<> | 144:ef7eb2e8f9f7 | 1837 | |
<> | 144:ef7eb2e8f9f7 | 1838 | /* Disable TXEIE and TCIE interrupts */ |
<> | 144:ef7eb2e8f9f7 | 1839 | CLEAR_BIT(husart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE)); |
<> | 144:ef7eb2e8f9f7 | 1840 | } |
<> | 144:ef7eb2e8f9f7 | 1841 | |
<> | 144:ef7eb2e8f9f7 | 1842 | /** |
<> | 144:ef7eb2e8f9f7 | 1843 | * @brief End ongoing Rx transfer on USART peripheral (following error detection or Reception completion). |
<> | 144:ef7eb2e8f9f7 | 1844 | * @param husart: USART handle. |
<> | 144:ef7eb2e8f9f7 | 1845 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 1846 | */ |
<> | 144:ef7eb2e8f9f7 | 1847 | static void USART_EndRxTransfer(USART_HandleTypeDef *husart) |
<> | 144:ef7eb2e8f9f7 | 1848 | { |
<> | 144:ef7eb2e8f9f7 | 1849 | /* At end of Rx process, restore husart->RxState to Ready */ |
<> | 144:ef7eb2e8f9f7 | 1850 | husart->State = HAL_USART_STATE_READY; |
<> | 144:ef7eb2e8f9f7 | 1851 | |
<> | 144:ef7eb2e8f9f7 | 1852 | /* Disable RXNE, PE and ERR interrupts */ |
<> | 144:ef7eb2e8f9f7 | 1853 | CLEAR_BIT(husart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); |
<> | 144:ef7eb2e8f9f7 | 1854 | CLEAR_BIT(husart->Instance->CR3, USART_CR3_EIE); |
<> | 144:ef7eb2e8f9f7 | 1855 | } |
<> | 144:ef7eb2e8f9f7 | 1856 | |
<> | 144:ef7eb2e8f9f7 | 1857 | /** |
<> | 144:ef7eb2e8f9f7 | 1858 | * @brief Configure the USART peripheral |
<> | 144:ef7eb2e8f9f7 | 1859 | * @param husart: USART handle |
<> | 144:ef7eb2e8f9f7 | 1860 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 1861 | */ |
<> | 144:ef7eb2e8f9f7 | 1862 | static HAL_StatusTypeDef USART_SetConfig(USART_HandleTypeDef *husart) |
<> | 144:ef7eb2e8f9f7 | 1863 | { |
<> | 144:ef7eb2e8f9f7 | 1864 | uint32_t tmpreg = 0x0U; |
<> | 144:ef7eb2e8f9f7 | 1865 | USART_ClockSourceTypeDef clocksource = USART_CLOCKSOURCE_UNDEFINED; |
<> | 144:ef7eb2e8f9f7 | 1866 | HAL_StatusTypeDef ret = HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 1867 | uint16_t brrtemp = 0x0000U; |
<> | 144:ef7eb2e8f9f7 | 1868 | uint16_t usartdiv = 0x0000U; |
<> | 144:ef7eb2e8f9f7 | 1869 | |
<> | 144:ef7eb2e8f9f7 | 1870 | /* Check the parameters */ |
<> | 144:ef7eb2e8f9f7 | 1871 | assert_param(IS_USART_POLARITY(husart->Init.CLKPolarity)); |
<> | 144:ef7eb2e8f9f7 | 1872 | assert_param(IS_USART_PHASE(husart->Init.CLKPhase)); |
<> | 144:ef7eb2e8f9f7 | 1873 | assert_param(IS_USART_LASTBIT(husart->Init.CLKLastBit)); |
<> | 144:ef7eb2e8f9f7 | 1874 | assert_param(IS_USART_BAUDRATE(husart->Init.BaudRate)); |
<> | 144:ef7eb2e8f9f7 | 1875 | assert_param(IS_USART_WORD_LENGTH(husart->Init.WordLength)); |
<> | 144:ef7eb2e8f9f7 | 1876 | assert_param(IS_USART_STOPBITS(husart->Init.StopBits)); |
<> | 144:ef7eb2e8f9f7 | 1877 | assert_param(IS_USART_PARITY(husart->Init.Parity)); |
<> | 144:ef7eb2e8f9f7 | 1878 | assert_param(IS_USART_MODE(husart->Init.Mode)); |
<> | 144:ef7eb2e8f9f7 | 1879 | assert_param(IS_USART_OVERSAMPLING(husart->Init.OverSampling)); |
<> | 144:ef7eb2e8f9f7 | 1880 | |
<> | 144:ef7eb2e8f9f7 | 1881 | |
<> | 144:ef7eb2e8f9f7 | 1882 | /*-------------------------- USART CR1 Configuration -----------------------*/ |
<> | 144:ef7eb2e8f9f7 | 1883 | /* Clear M, PCE, PS, TE and RE bits and configure |
<> | 144:ef7eb2e8f9f7 | 1884 | * the USART Word Length, Parity, Mode and OverSampling: |
<> | 144:ef7eb2e8f9f7 | 1885 | * set the M bits according to husart->Init.WordLength value |
<> | 144:ef7eb2e8f9f7 | 1886 | * set PCE and PS bits according to husart->Init.Parity value |
<> | 144:ef7eb2e8f9f7 | 1887 | * set TE and RE bits according to husart->Init.Mode value |
<> | 144:ef7eb2e8f9f7 | 1888 | * force OVER8 to 1 to allow to reach the maximum speed (Fclock/8) */ |
<> | 144:ef7eb2e8f9f7 | 1889 | tmpreg = (uint32_t)husart->Init.WordLength | husart->Init.Parity | husart->Init.Mode | USART_CR1_OVER8; |
<> | 144:ef7eb2e8f9f7 | 1890 | MODIFY_REG(husart->Instance->CR1, USART_CR1_FIELDS, tmpreg); |
<> | 144:ef7eb2e8f9f7 | 1891 | |
<> | 144:ef7eb2e8f9f7 | 1892 | /*---------------------------- USART CR2 Configuration ---------------------*/ |
<> | 144:ef7eb2e8f9f7 | 1893 | /* Clear and configure the USART Clock, CPOL, CPHA, LBCL and STOP bits: |
<> | 144:ef7eb2e8f9f7 | 1894 | * set CPOL bit according to husart->Init.CLKPolarity value |
<> | 144:ef7eb2e8f9f7 | 1895 | * set CPHA bit according to husart->Init.CLKPhase value |
<> | 144:ef7eb2e8f9f7 | 1896 | * set LBCL bit according to husart->Init.CLKLastBit value |
<> | 144:ef7eb2e8f9f7 | 1897 | * set STOP[13:12] bits according to husart->Init.StopBits value */ |
<> | 144:ef7eb2e8f9f7 | 1898 | tmpreg = (uint32_t)(USART_CLOCK_ENABLE); |
<> | 144:ef7eb2e8f9f7 | 1899 | tmpreg |= ((uint32_t)husart->Init.CLKPolarity | (uint32_t)husart->Init.CLKPhase); |
<> | 144:ef7eb2e8f9f7 | 1900 | tmpreg |= ((uint32_t)husart->Init.CLKLastBit | (uint32_t)husart->Init.StopBits); |
<> | 144:ef7eb2e8f9f7 | 1901 | MODIFY_REG(husart->Instance->CR2, USART_CR2_FIELDS, tmpreg); |
<> | 144:ef7eb2e8f9f7 | 1902 | |
<> | 144:ef7eb2e8f9f7 | 1903 | /*-------------------------- USART CR3 Configuration -----------------------*/ |
<> | 144:ef7eb2e8f9f7 | 1904 | /* no CR3 register configuration */ |
<> | 144:ef7eb2e8f9f7 | 1905 | |
<> | 144:ef7eb2e8f9f7 | 1906 | /*-------------------------- USART BRR Configuration -----------------------*/ |
<> | 144:ef7eb2e8f9f7 | 1907 | /* BRR is filled-up according to OVER8 bit setting which is forced to 1 */ |
<> | 144:ef7eb2e8f9f7 | 1908 | USART_GETCLOCKSOURCE(husart, clocksource); |
<> | 144:ef7eb2e8f9f7 | 1909 | switch (clocksource) |
<> | 144:ef7eb2e8f9f7 | 1910 | { |
<> | 144:ef7eb2e8f9f7 | 1911 | case USART_CLOCKSOURCE_PCLK1: |
<> | 144:ef7eb2e8f9f7 | 1912 | usartdiv = (uint16_t)(((2*HAL_RCC_GetPCLK1Freq()) + (husart->Init.BaudRate/2))/ husart->Init.BaudRate); |
<> | 144:ef7eb2e8f9f7 | 1913 | break; |
<> | 144:ef7eb2e8f9f7 | 1914 | case USART_CLOCKSOURCE_PCLK2: |
<> | 144:ef7eb2e8f9f7 | 1915 | usartdiv = (uint16_t)(((2*HAL_RCC_GetPCLK2Freq()) + (husart->Init.BaudRate/2))/ husart->Init.BaudRate); |
<> | 144:ef7eb2e8f9f7 | 1916 | break; |
<> | 144:ef7eb2e8f9f7 | 1917 | case USART_CLOCKSOURCE_HSI: |
<> | 144:ef7eb2e8f9f7 | 1918 | usartdiv = (uint16_t)(((2*HSI_VALUE) + (husart->Init.BaudRate/2))/ husart->Init.BaudRate); |
<> | 144:ef7eb2e8f9f7 | 1919 | break; |
<> | 144:ef7eb2e8f9f7 | 1920 | case USART_CLOCKSOURCE_SYSCLK: |
<> | 144:ef7eb2e8f9f7 | 1921 | usartdiv = (uint16_t)(((2*HAL_RCC_GetSysClockFreq()) + (husart->Init.BaudRate/2))/ husart->Init.BaudRate); |
<> | 144:ef7eb2e8f9f7 | 1922 | break; |
<> | 144:ef7eb2e8f9f7 | 1923 | case USART_CLOCKSOURCE_LSE: |
<> | 144:ef7eb2e8f9f7 | 1924 | usartdiv = (uint16_t)(((2*LSE_VALUE) + (husart->Init.BaudRate/2))/ husart->Init.BaudRate); |
<> | 144:ef7eb2e8f9f7 | 1925 | break; |
<> | 144:ef7eb2e8f9f7 | 1926 | case USART_CLOCKSOURCE_UNDEFINED: |
<> | 144:ef7eb2e8f9f7 | 1927 | default: |
<> | 144:ef7eb2e8f9f7 | 1928 | ret = HAL_ERROR; |
<> | 144:ef7eb2e8f9f7 | 1929 | break; |
<> | 144:ef7eb2e8f9f7 | 1930 | } |
<> | 144:ef7eb2e8f9f7 | 1931 | |
<> | 144:ef7eb2e8f9f7 | 1932 | brrtemp = usartdiv & 0xFFF0U; |
<> | 144:ef7eb2e8f9f7 | 1933 | brrtemp |= (uint16_t)((usartdiv & (uint16_t)0x000FU) >> 1U); |
<> | 144:ef7eb2e8f9f7 | 1934 | husart->Instance->BRR = brrtemp; |
<> | 144:ef7eb2e8f9f7 | 1935 | |
<> | 144:ef7eb2e8f9f7 | 1936 | return ret; |
<> | 144:ef7eb2e8f9f7 | 1937 | } |
<> | 144:ef7eb2e8f9f7 | 1938 | |
<> | 144:ef7eb2e8f9f7 | 1939 | /** |
<> | 144:ef7eb2e8f9f7 | 1940 | * @brief Check the USART Idle State |
<> | 144:ef7eb2e8f9f7 | 1941 | * @param husart: USART handle |
<> | 144:ef7eb2e8f9f7 | 1942 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 1943 | */ |
<> | 144:ef7eb2e8f9f7 | 1944 | static HAL_StatusTypeDef USART_CheckIdleState(USART_HandleTypeDef *husart) |
<> | 144:ef7eb2e8f9f7 | 1945 | { |
<> | 144:ef7eb2e8f9f7 | 1946 | uint32_t tickstart = 0U; |
<> | 144:ef7eb2e8f9f7 | 1947 | |
<> | 144:ef7eb2e8f9f7 | 1948 | /* Initialize the USART ErrorCode */ |
<> | 144:ef7eb2e8f9f7 | 1949 | husart->ErrorCode = HAL_USART_ERROR_NONE; |
<> | 144:ef7eb2e8f9f7 | 1950 | |
<> | 144:ef7eb2e8f9f7 | 1951 | /* Init tickstart for timeout managment*/ |
<> | 144:ef7eb2e8f9f7 | 1952 | tickstart = HAL_GetTick(); |
<> | 144:ef7eb2e8f9f7 | 1953 | |
<> | 144:ef7eb2e8f9f7 | 1954 | /* Check if the Transmitter is enabled */ |
<> | 144:ef7eb2e8f9f7 | 1955 | if((husart->Instance->CR1 & USART_CR1_TE) == USART_CR1_TE) |
<> | 144:ef7eb2e8f9f7 | 1956 | { |
<> | 144:ef7eb2e8f9f7 | 1957 | /* Wait until TEACK flag is set */ |
<> | 144:ef7eb2e8f9f7 | 1958 | if(USART_WaitOnFlagUntilTimeout(husart, USART_ISR_TEACK, RESET, tickstart, TEACK_REACK_TIMEOUT) != HAL_OK) |
<> | 144:ef7eb2e8f9f7 | 1959 | { |
<> | 144:ef7eb2e8f9f7 | 1960 | husart->State= HAL_USART_STATE_TIMEOUT; |
<> | 144:ef7eb2e8f9f7 | 1961 | return HAL_TIMEOUT; |
<> | 144:ef7eb2e8f9f7 | 1962 | } |
<> | 144:ef7eb2e8f9f7 | 1963 | } |
<> | 144:ef7eb2e8f9f7 | 1964 | /* Check if the Receiver is enabled */ |
<> | 144:ef7eb2e8f9f7 | 1965 | if((husart->Instance->CR1 & USART_CR1_RE) == USART_CR1_RE) |
<> | 144:ef7eb2e8f9f7 | 1966 | { |
<> | 144:ef7eb2e8f9f7 | 1967 | /* Wait until REACK flag is set */ |
<> | 144:ef7eb2e8f9f7 | 1968 | if(USART_WaitOnFlagUntilTimeout(husart, USART_ISR_REACK, RESET, tickstart, TEACK_REACK_TIMEOUT) != HAL_OK) |
<> | 144:ef7eb2e8f9f7 | 1969 | { |
<> | 144:ef7eb2e8f9f7 | 1970 | husart->State= HAL_USART_STATE_TIMEOUT; |
<> | 144:ef7eb2e8f9f7 | 1971 | return HAL_TIMEOUT; |
<> | 144:ef7eb2e8f9f7 | 1972 | } |
<> | 144:ef7eb2e8f9f7 | 1973 | } |
<> | 144:ef7eb2e8f9f7 | 1974 | |
<> | 144:ef7eb2e8f9f7 | 1975 | /* Initialize the USART state*/ |
<> | 144:ef7eb2e8f9f7 | 1976 | husart->State= HAL_USART_STATE_READY; |
<> | 144:ef7eb2e8f9f7 | 1977 | |
<> | 144:ef7eb2e8f9f7 | 1978 | /* Process Unlocked */ |
<> | 144:ef7eb2e8f9f7 | 1979 | __HAL_UNLOCK(husart); |
<> | 144:ef7eb2e8f9f7 | 1980 | |
<> | 144:ef7eb2e8f9f7 | 1981 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 1982 | } |
<> | 144:ef7eb2e8f9f7 | 1983 | |
<> | 144:ef7eb2e8f9f7 | 1984 | /** |
<> | 144:ef7eb2e8f9f7 | 1985 | * @} |
<> | 144:ef7eb2e8f9f7 | 1986 | */ |
<> | 144:ef7eb2e8f9f7 | 1987 | |
<> | 144:ef7eb2e8f9f7 | 1988 | #endif /* HAL_USART_MODULE_ENABLED */ |
<> | 144:ef7eb2e8f9f7 | 1989 | /** |
<> | 144:ef7eb2e8f9f7 | 1990 | * @} |
<> | 144:ef7eb2e8f9f7 | 1991 | */ |
<> | 144:ef7eb2e8f9f7 | 1992 | |
<> | 144:ef7eb2e8f9f7 | 1993 | /** |
<> | 144:ef7eb2e8f9f7 | 1994 | * @} |
<> | 144:ef7eb2e8f9f7 | 1995 | */ |
<> | 144:ef7eb2e8f9f7 | 1996 | |
<> | 144:ef7eb2e8f9f7 | 1997 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |