Johannes Stratmann / mbed-dev

added prescaler for 16 bit pwm in LPC1347 target

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targets/cmsis/TARGET_STM/TARGET_STM32F7/stm32f7xx_hal_mdios.c@144:ef7eb2e8f9f7, 2016-09-02 (annotated)

Committer:
<>
Date:
Fri Sep 02 15:07:44 2016 +0100
Revision:
144:ef7eb2e8f9f7
This updates the lib to the mbed lib v125

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file stm32f7xx_hal_mdios.c
<> 144:ef7eb2e8f9f7 4 * @author MCD Application Team
<> 144:ef7eb2e8f9f7 5 * @version V1.1.0
<> 144:ef7eb2e8f9f7 6 * @date 22-April-2016
<> 144:ef7eb2e8f9f7 7 * @brief MDIOS HAL module driver.
<> 144:ef7eb2e8f9f7 8 *
<> 144:ef7eb2e8f9f7 9 * This file provides firmware functions to manage the following
<> 144:ef7eb2e8f9f7 10 * functionalities of the MDIOS Peripheral.
<> 144:ef7eb2e8f9f7 11 * + Initialization and de-initialization functions
<> 144:ef7eb2e8f9f7 12 * + IO operation functions
<> 144:ef7eb2e8f9f7 13 * + Peripheral Control functions
<> 144:ef7eb2e8f9f7 14 *
<> 144:ef7eb2e8f9f7 15 *
<> 144:ef7eb2e8f9f7 16 @verbatim
<> 144:ef7eb2e8f9f7 17 ===============================================================================
<> 144:ef7eb2e8f9f7 18 ##### How to use this driver #####
<> 144:ef7eb2e8f9f7 19 ===============================================================================
<> 144:ef7eb2e8f9f7 20 [..]
<> 144:ef7eb2e8f9f7 21 The MDIOS HAL driver can be used as follow:
<> 144:ef7eb2e8f9f7 22
<> 144:ef7eb2e8f9f7 23 (#) Declare a MDIOS_HandleTypeDef handle structure.
<> 144:ef7eb2e8f9f7 24
<> 144:ef7eb2e8f9f7 25 (#) Initialize the MDIOS low level resources by implementing the HAL_MDIOS_MspInit() API:
<> 144:ef7eb2e8f9f7 26 (##) Enable the MDIOS interface clock.
<> 144:ef7eb2e8f9f7 27 (##) MDIOS pins configuration:
<> 144:ef7eb2e8f9f7 28 (+++) Enable clocks for the MDIOS GPIOs.
<> 144:ef7eb2e8f9f7 29 (+++) Configure the MDIOS pins as alternate function.
<> 144:ef7eb2e8f9f7 30 (##) NVIC configuration if you need to use interrupt process:
<> 144:ef7eb2e8f9f7 31 (+++) Configure the MDIOS interrupt priority.
<> 144:ef7eb2e8f9f7 32 (+++) Enable the NVIC MDIOS IRQ handle.
<> 144:ef7eb2e8f9f7 33
<> 144:ef7eb2e8f9f7 34 (#) Program the Port Address and the Preamble Check in the Init structure.
<> 144:ef7eb2e8f9f7 35
<> 144:ef7eb2e8f9f7 36 (#) Initialize the MDIOS registers by calling the HAL_MDIOS_Init() API.
<> 144:ef7eb2e8f9f7 37
<> 144:ef7eb2e8f9f7 38 (#) Perform direct slave read/write operations using the following APIs:
<> 144:ef7eb2e8f9f7 39 (##) Read the value of a DINn register: HAL_MDIOS_ReadReg()
<> 144:ef7eb2e8f9f7 40 (##) Write a value to a DOUTn register: HAL_MDIOS_WriteReg()
<> 144:ef7eb2e8f9f7 41
<> 144:ef7eb2e8f9f7 42 (#) Get the Master read/write operations flags using the following APIs:
<> 144:ef7eb2e8f9f7 43 (##) Bit map of DOUTn registers read by Master: HAL_MDIOS_GetReadRegAddress()
<> 144:ef7eb2e8f9f7 44 (##) Bit map of DINn registers written by Master : HAL_MDIOS_GetWrittenRegAddress()
<> 144:ef7eb2e8f9f7 45
<> 144:ef7eb2e8f9f7 46 (#) Clear the read/write flags using the following APIs:
<> 144:ef7eb2e8f9f7 47 (##) Clear read flags of a set of registers: HAL_MDIOS_ClearReadRegAddress()
<> 144:ef7eb2e8f9f7 48 (##) Clear write flags of a set of registers: HAL_MDIOS_ClearWriteRegAddress()
<> 144:ef7eb2e8f9f7 49
<> 144:ef7eb2e8f9f7 50 (#) Enable interrupts on events using HAL_MDIOS_EnableEvents(), when called
<> 144:ef7eb2e8f9f7 51 the MDIOS will generate an interrupt in the following cases:
<> 144:ef7eb2e8f9f7 52 (##) a DINn register written by the Master
<> 144:ef7eb2e8f9f7 53 (##) a DOUTn register read by the Master
<> 144:ef7eb2e8f9f7 54 (##) an error occur
<> 144:ef7eb2e8f9f7 55
<> 144:ef7eb2e8f9f7 56 (@) A callback is executed for each genereted interrupt, so the driver provide the following
<> 144:ef7eb2e8f9f7 57 HAL_MDIOS_WriteCpltCallback(), HAL_MDIOS_ReadCpltCallback() and HAL_MDIOS_ErrorCallback()
<> 144:ef7eb2e8f9f7 58 (@) HAL_MDIOS_IRQHandler() must be called from the MDIOS IRQ Handler, to handle the interrupt
<> 144:ef7eb2e8f9f7 59 and execute the previous callbacks
<> 144:ef7eb2e8f9f7 60
<> 144:ef7eb2e8f9f7 61 (#) Reset the MDIOS peripheral and all related ressources by calling the HAL_MDIOS_DeInit() API.
<> 144:ef7eb2e8f9f7 62 (##) HAL_MDIOS_MspDeInit() must be implemented to reset low level ressources
<> 144:ef7eb2e8f9f7 63 (GPIO, Clocks, NVIC configuration ...)
<> 144:ef7eb2e8f9f7 64
<> 144:ef7eb2e8f9f7 65
<> 144:ef7eb2e8f9f7 66 @endverbatim
<> 144:ef7eb2e8f9f7 67 ******************************************************************************
<> 144:ef7eb2e8f9f7 68 * @attention
<> 144:ef7eb2e8f9f7 69 *
<> 144:ef7eb2e8f9f7 70 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 144:ef7eb2e8f9f7 71 *
<> 144:ef7eb2e8f9f7 72 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 73 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 74 * 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 75 * this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 76 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 77 * this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 78 * and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 79 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 80 * may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 81 * without specific prior written permission.
<> 144:ef7eb2e8f9f7 82 *
<> 144:ef7eb2e8f9f7 83 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 84 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 85 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 86 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 87 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 88 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 89 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 90 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 91 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 92 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 93 *
<> 144:ef7eb2e8f9f7 94 ******************************************************************************
<> 144:ef7eb2e8f9f7 95 */
<> 144:ef7eb2e8f9f7 96
<> 144:ef7eb2e8f9f7 97 /* Includes ------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 98 #include "stm32f7xx_hal.h"
<> 144:ef7eb2e8f9f7 99
<> 144:ef7eb2e8f9f7 100 /** @addtogroup STM32F7xx_HAL_Driver
<> 144:ef7eb2e8f9f7 101 * @{
<> 144:ef7eb2e8f9f7 102 */
<> 144:ef7eb2e8f9f7 103
<> 144:ef7eb2e8f9f7 104 /** @defgroup MDIOS MDIOS
<> 144:ef7eb2e8f9f7 105 * @brief HAL MDIOS module driver
<> 144:ef7eb2e8f9f7 106 * @{
<> 144:ef7eb2e8f9f7 107 */
<> 144:ef7eb2e8f9f7 108 #ifdef HAL_MDIOS_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 109
<> 144:ef7eb2e8f9f7 110 #if defined (MDIOS)
<> 144:ef7eb2e8f9f7 111
<> 144:ef7eb2e8f9f7 112 /* Private typedef -----------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 113 /* Private define ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 114 #define MDIOS_PORT_ADDRESS_SHIFT ((uint32_t)8)
<> 144:ef7eb2e8f9f7 115 #define MDIOS_ALL_REG_FLAG ((uint32_t)0xFFFFFFFFU)
<> 144:ef7eb2e8f9f7 116 #define MDIOS_ALL_ERRORS_FLAG ((uint32_t)(MDIOS_SR_PERF | MDIOS_SR_SERF | MDIOS_SR_TERF))
<> 144:ef7eb2e8f9f7 117
<> 144:ef7eb2e8f9f7 118 #define MDIOS_DIN_BASE_ADDR (MDIOS_BASE + 0x100)
<> 144:ef7eb2e8f9f7 119 #define MDIOS_DOUT_BASE_ADDR (MDIOS_BASE + 0x180)
<> 144:ef7eb2e8f9f7 120
<> 144:ef7eb2e8f9f7 121 /* Private macro -------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 122 /* Private variables ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 123 /* Private function prototypes -----------------------------------------------*/
<> 144:ef7eb2e8f9f7 124 /* Private functions ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 125 /* Exported functions --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 126 /** @defgroup MDIOS_Exported_Functions MDIOS Exported Functions
<> 144:ef7eb2e8f9f7 127 * @{
<> 144:ef7eb2e8f9f7 128 */
<> 144:ef7eb2e8f9f7 129
<> 144:ef7eb2e8f9f7 130 /** @defgroup MDIOS_Exported_Functions_Group1 Initialization/de-initialization functions
<> 144:ef7eb2e8f9f7 131 * @brief Initialization and Configuration functions
<> 144:ef7eb2e8f9f7 132 *
<> 144:ef7eb2e8f9f7 133 @verbatim
<> 144:ef7eb2e8f9f7 134 ===============================================================================
<> 144:ef7eb2e8f9f7 135 ##### Initialization and Configuration functions #####
<> 144:ef7eb2e8f9f7 136 ===============================================================================
<> 144:ef7eb2e8f9f7 137 [..]
<> 144:ef7eb2e8f9f7 138 This subsection provides a set of functions allowing to initialize the MDIOS
<> 144:ef7eb2e8f9f7 139 (+) The following parameters can be configured:
<> 144:ef7eb2e8f9f7 140 (++) Port Address
<> 144:ef7eb2e8f9f7 141 (++) Preamble Check
<> 144:ef7eb2e8f9f7 142
<> 144:ef7eb2e8f9f7 143 @endverbatim
<> 144:ef7eb2e8f9f7 144 * @{
<> 144:ef7eb2e8f9f7 145 */
<> 144:ef7eb2e8f9f7 146
<> 144:ef7eb2e8f9f7 147 /**
<> 144:ef7eb2e8f9f7 148 * @brief Initializes the MDIOS according to the specified parameters in
<> 144:ef7eb2e8f9f7 149 * the MDIOS_InitTypeDef and creates the associated handle .
<> 144:ef7eb2e8f9f7 150 * @param hmdios: pointer to a MDIOS_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 151 * the configuration information for MDIOS module
<> 144:ef7eb2e8f9f7 152 * @retval HAL status
<> 144:ef7eb2e8f9f7 153 */
<> 144:ef7eb2e8f9f7 154 HAL_StatusTypeDef HAL_MDIOS_Init(MDIOS_HandleTypeDef *hmdios)
<> 144:ef7eb2e8f9f7 155 {
<> 144:ef7eb2e8f9f7 156 uint32_t tmpcr = 0;
<> 144:ef7eb2e8f9f7 157
<> 144:ef7eb2e8f9f7 158 /* Check the MDIOS handle allocation */
<> 144:ef7eb2e8f9f7 159 if(hmdios == NULL)
<> 144:ef7eb2e8f9f7 160 {
<> 144:ef7eb2e8f9f7 161 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 162 }
<> 144:ef7eb2e8f9f7 163
<> 144:ef7eb2e8f9f7 164 /* Check the parameters */
<> 144:ef7eb2e8f9f7 165 assert_param(IS_MDIOS_ALL_INSTANCE(hmdios->Instance));
<> 144:ef7eb2e8f9f7 166 assert_param(IS_MDIOS_PORTADDRESS(hmdios->Init.PortAddress));
<> 144:ef7eb2e8f9f7 167 assert_param(IS_MDIOS_PREAMBLECHECK(hmdios->Init.PreambleCheck));
<> 144:ef7eb2e8f9f7 168
<> 144:ef7eb2e8f9f7 169 /* Process Locked */
<> 144:ef7eb2e8f9f7 170 __HAL_LOCK(hmdios);
<> 144:ef7eb2e8f9f7 171
<> 144:ef7eb2e8f9f7 172 if(hmdios->State == HAL_MDIOS_STATE_RESET)
<> 144:ef7eb2e8f9f7 173 {
<> 144:ef7eb2e8f9f7 174 /* Init the low level hardware */
<> 144:ef7eb2e8f9f7 175 HAL_MDIOS_MspInit(hmdios);
<> 144:ef7eb2e8f9f7 176 }
<> 144:ef7eb2e8f9f7 177
<> 144:ef7eb2e8f9f7 178 /* Change the MDIOS state */
<> 144:ef7eb2e8f9f7 179 hmdios->State = HAL_MDIOS_STATE_BUSY;
<> 144:ef7eb2e8f9f7 180
<> 144:ef7eb2e8f9f7 181 /* Get the MDIOS CR value */
<> 144:ef7eb2e8f9f7 182 tmpcr = hmdios->Instance->CR;
<> 144:ef7eb2e8f9f7 183
<> 144:ef7eb2e8f9f7 184 /* Clear PORT_ADDRESS, DPC and EN bits */
<> 144:ef7eb2e8f9f7 185 tmpcr &= ((uint32_t)~(MDIOS_CR_EN | MDIOS_CR_DPC | MDIOS_CR_PORT_ADDRESS));
<> 144:ef7eb2e8f9f7 186
<> 144:ef7eb2e8f9f7 187 /* Set MDIOS control parametrs and enable the peripheral */
<> 144:ef7eb2e8f9f7 188 tmpcr |= (uint32_t)(((hmdios->Init.PortAddress) << MDIOS_PORT_ADDRESS_SHIFT) |\
<> 144:ef7eb2e8f9f7 189 (hmdios->Init.PreambleCheck) | \
<> 144:ef7eb2e8f9f7 190 (MDIOS_CR_EN));
<> 144:ef7eb2e8f9f7 191
<> 144:ef7eb2e8f9f7 192 /* Write the MDIOS CR */
<> 144:ef7eb2e8f9f7 193 hmdios->Instance->CR = tmpcr;
<> 144:ef7eb2e8f9f7 194
<> 144:ef7eb2e8f9f7 195 /* Change the MDIOS state */
<> 144:ef7eb2e8f9f7 196 hmdios->State = HAL_MDIOS_STATE_READY;
<> 144:ef7eb2e8f9f7 197
<> 144:ef7eb2e8f9f7 198 /* Release Lock */
<> 144:ef7eb2e8f9f7 199 __HAL_UNLOCK(hmdios);
<> 144:ef7eb2e8f9f7 200
<> 144:ef7eb2e8f9f7 201 /* Return function status */
<> 144:ef7eb2e8f9f7 202 return HAL_OK;
<> 144:ef7eb2e8f9f7 203
<> 144:ef7eb2e8f9f7 204 }
<> 144:ef7eb2e8f9f7 205
<> 144:ef7eb2e8f9f7 206 /**
<> 144:ef7eb2e8f9f7 207 * @brief DeInitializes the MDIOS peripheral.
<> 144:ef7eb2e8f9f7 208 * @param hmdios: MDIOS handle
<> 144:ef7eb2e8f9f7 209 * @retval HAL status
<> 144:ef7eb2e8f9f7 210 */
<> 144:ef7eb2e8f9f7 211 HAL_StatusTypeDef HAL_MDIOS_DeInit(MDIOS_HandleTypeDef *hmdios)
<> 144:ef7eb2e8f9f7 212 {
<> 144:ef7eb2e8f9f7 213 /* Check the MDIOS handle allocation */
<> 144:ef7eb2e8f9f7 214 if(hmdios == NULL)
<> 144:ef7eb2e8f9f7 215 {
<> 144:ef7eb2e8f9f7 216 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 217 }
<> 144:ef7eb2e8f9f7 218
<> 144:ef7eb2e8f9f7 219 /* Check the parameters */
<> 144:ef7eb2e8f9f7 220 assert_param(IS_MDIOS_ALL_INSTANCE(hmdios->Instance));
<> 144:ef7eb2e8f9f7 221
<> 144:ef7eb2e8f9f7 222 /* Change the MDIOS state */
<> 144:ef7eb2e8f9f7 223 hmdios->State = HAL_MDIOS_STATE_BUSY;
<> 144:ef7eb2e8f9f7 224
<> 144:ef7eb2e8f9f7 225 /* Disable the Peripheral */
<> 144:ef7eb2e8f9f7 226 __HAL_MDIOS_DISABLE(hmdios);
<> 144:ef7eb2e8f9f7 227
<> 144:ef7eb2e8f9f7 228 /* DeInit the low level hardware */
<> 144:ef7eb2e8f9f7 229 HAL_MDIOS_MspDeInit(hmdios);
<> 144:ef7eb2e8f9f7 230
<> 144:ef7eb2e8f9f7 231 /* Change the MDIOS state */
<> 144:ef7eb2e8f9f7 232 hmdios->State = HAL_MDIOS_STATE_RESET;
<> 144:ef7eb2e8f9f7 233
<> 144:ef7eb2e8f9f7 234 /* Release Lock */
<> 144:ef7eb2e8f9f7 235 __HAL_UNLOCK(hmdios);
<> 144:ef7eb2e8f9f7 236
<> 144:ef7eb2e8f9f7 237 /* Return function status */
<> 144:ef7eb2e8f9f7 238 return HAL_OK;
<> 144:ef7eb2e8f9f7 239 }
<> 144:ef7eb2e8f9f7 240
<> 144:ef7eb2e8f9f7 241 /**
<> 144:ef7eb2e8f9f7 242 * @brief MDIOS MSP Init
<> 144:ef7eb2e8f9f7 243 * @param hmdios: mdios handle
<> 144:ef7eb2e8f9f7 244 * @retval None
<> 144:ef7eb2e8f9f7 245 */
<> 144:ef7eb2e8f9f7 246 __weak void HAL_MDIOS_MspInit(MDIOS_HandleTypeDef *hmdios)
<> 144:ef7eb2e8f9f7 247 {
<> 144:ef7eb2e8f9f7 248 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 249 UNUSED(hmdios);
<> 144:ef7eb2e8f9f7 250
<> 144:ef7eb2e8f9f7 251 /* NOTE : This function should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 252 the HAL_MDIOS_MspInit can be implemented in the user file
<> 144:ef7eb2e8f9f7 253 */
<> 144:ef7eb2e8f9f7 254 }
<> 144:ef7eb2e8f9f7 255
<> 144:ef7eb2e8f9f7 256 /**
<> 144:ef7eb2e8f9f7 257 * @brief MDIOS MSP DeInit
<> 144:ef7eb2e8f9f7 258 * @param hmdios: mdios handle
<> 144:ef7eb2e8f9f7 259 * @retval None
<> 144:ef7eb2e8f9f7 260 */
<> 144:ef7eb2e8f9f7 261 __weak void HAL_MDIOS_MspDeInit(MDIOS_HandleTypeDef *hmdios)
<> 144:ef7eb2e8f9f7 262 {
<> 144:ef7eb2e8f9f7 263 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 264 UNUSED(hmdios);
<> 144:ef7eb2e8f9f7 265
<> 144:ef7eb2e8f9f7 266 /* NOTE : This function should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 267 the HAL_MDIOS_MspDeInit can be implemented in the user file
<> 144:ef7eb2e8f9f7 268 */
<> 144:ef7eb2e8f9f7 269 }
<> 144:ef7eb2e8f9f7 270 /**
<> 144:ef7eb2e8f9f7 271 * @}
<> 144:ef7eb2e8f9f7 272 */
<> 144:ef7eb2e8f9f7 273
<> 144:ef7eb2e8f9f7 274 /** @defgroup MDIOS_Exported_Functions_Group2 IO operation functions
<> 144:ef7eb2e8f9f7 275 * @brief MDIOS Read/Write functions
<> 144:ef7eb2e8f9f7 276 *
<> 144:ef7eb2e8f9f7 277 @verbatim
<> 144:ef7eb2e8f9f7 278 ===============================================================================
<> 144:ef7eb2e8f9f7 279 ##### IO operation functions #####
<> 144:ef7eb2e8f9f7 280 ===============================================================================
<> 144:ef7eb2e8f9f7 281 This subsection provides a set of functions allowing to manage the MDIOS
<> 144:ef7eb2e8f9f7 282 read and write operations.
<> 144:ef7eb2e8f9f7 283
<> 144:ef7eb2e8f9f7 284 (#) APIs that allow to the MDIOS to read/write from/to the
<> 144:ef7eb2e8f9f7 285 values of one of the DINn/DOUTn registers:
<> 144:ef7eb2e8f9f7 286 (+) Read the value of a DINn register: HAL_MDIOS_ReadReg()
<> 144:ef7eb2e8f9f7 287 (+) Write a value to a DOUTn register: HAL_MDIOS_WriteReg()
<> 144:ef7eb2e8f9f7 288
<> 144:ef7eb2e8f9f7 289 (#) APIs that provide if there are some Slave registres have been
<> 144:ef7eb2e8f9f7 290 read or written by the Master:
<> 144:ef7eb2e8f9f7 291 (+) DOUTn registers read by Master: HAL_MDIOS_GetReadRegAddress()
<> 144:ef7eb2e8f9f7 292 (+) DINn registers written by Master : HAL_MDIOS_GetWrittenRegAddress()
<> 144:ef7eb2e8f9f7 293
<> 144:ef7eb2e8f9f7 294 (#) APIs that Clear the read/write flags:
<> 144:ef7eb2e8f9f7 295 (+) Clear read registers flags: HAL_MDIOS_ClearReadRegAddress()
<> 144:ef7eb2e8f9f7 296 (+) Clear write registers flags: HAL_MDIOS_ClearWriteRegAddress()
<> 144:ef7eb2e8f9f7 297
<> 144:ef7eb2e8f9f7 298 (#) A set of Callbacks are provided:
<> 144:ef7eb2e8f9f7 299 (+) HAL_MDIOS_WriteCpltCallback()
<> 144:ef7eb2e8f9f7 300 (+) HAL_MDIOS_ReadCpltCallback()
<> 144:ef7eb2e8f9f7 301 (+) HAL_MDIOS_ErrorCallback()
<> 144:ef7eb2e8f9f7 302
<> 144:ef7eb2e8f9f7 303 @endverbatim
<> 144:ef7eb2e8f9f7 304 * @{
<> 144:ef7eb2e8f9f7 305 */
<> 144:ef7eb2e8f9f7 306
<> 144:ef7eb2e8f9f7 307 /**
<> 144:ef7eb2e8f9f7 308 * @brief Writes to an MDIOS output register
<> 144:ef7eb2e8f9f7 309 * @param hmdios: mdios handle
<> 144:ef7eb2e8f9f7 310 * @param RegNum: MDIOS input register number
<> 144:ef7eb2e8f9f7 311 * @param Data: Data to write
<> 144:ef7eb2e8f9f7 312 * @retval HAL status
<> 144:ef7eb2e8f9f7 313 */
<> 144:ef7eb2e8f9f7 314 HAL_StatusTypeDef HAL_MDIOS_WriteReg(MDIOS_HandleTypeDef *hmdios, uint32_t RegNum, uint16_t Data)
<> 144:ef7eb2e8f9f7 315 {
<> 144:ef7eb2e8f9f7 316 uint32_t tmpreg;
<> 144:ef7eb2e8f9f7 317
<> 144:ef7eb2e8f9f7 318 /* Check the parameters */
<> 144:ef7eb2e8f9f7 319 assert_param(IS_MDIOS_REGISTER(RegNum));
<> 144:ef7eb2e8f9f7 320
<> 144:ef7eb2e8f9f7 321 /* Process Locked */
<> 144:ef7eb2e8f9f7 322 __HAL_LOCK(hmdios);
<> 144:ef7eb2e8f9f7 323
<> 144:ef7eb2e8f9f7 324 /* Get the addr of output register to be written by the MDIOS */
<> 144:ef7eb2e8f9f7 325 tmpreg = MDIOS_DOUT_BASE_ADDR + (4 * RegNum);
<> 144:ef7eb2e8f9f7 326
<> 144:ef7eb2e8f9f7 327 /* Write to DOUTn register */
<> 144:ef7eb2e8f9f7 328 *((uint32_t *)tmpreg) = Data;
<> 144:ef7eb2e8f9f7 329
<> 144:ef7eb2e8f9f7 330 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 331 __HAL_UNLOCK(hmdios);
<> 144:ef7eb2e8f9f7 332
<> 144:ef7eb2e8f9f7 333 return HAL_OK;
<> 144:ef7eb2e8f9f7 334 }
<> 144:ef7eb2e8f9f7 335
<> 144:ef7eb2e8f9f7 336 /**
<> 144:ef7eb2e8f9f7 337 * @brief Reads an MDIOS input register
<> 144:ef7eb2e8f9f7 338 * @param hmdios: mdios handle
<> 144:ef7eb2e8f9f7 339 * @param RegNum: MDIOS input register number
<> 144:ef7eb2e8f9f7 340 * @param pData: pointer to Data
<> 144:ef7eb2e8f9f7 341 * @retval HAL status
<> 144:ef7eb2e8f9f7 342 */
<> 144:ef7eb2e8f9f7 343 HAL_StatusTypeDef HAL_MDIOS_ReadReg(MDIOS_HandleTypeDef *hmdios, uint32_t RegNum, uint16_t *pData)
<> 144:ef7eb2e8f9f7 344 {
<> 144:ef7eb2e8f9f7 345 uint32_t tmpreg;
<> 144:ef7eb2e8f9f7 346
<> 144:ef7eb2e8f9f7 347 /* Check the parameters */
<> 144:ef7eb2e8f9f7 348 assert_param(IS_MDIOS_REGISTER(RegNum));
<> 144:ef7eb2e8f9f7 349
<> 144:ef7eb2e8f9f7 350 /* Process Locked */
<> 144:ef7eb2e8f9f7 351 __HAL_LOCK(hmdios);
<> 144:ef7eb2e8f9f7 352
<> 144:ef7eb2e8f9f7 353 /* Get the addr of input register to be read by the MDIOS */
<> 144:ef7eb2e8f9f7 354 tmpreg = MDIOS_DIN_BASE_ADDR + (4 * RegNum);
<> 144:ef7eb2e8f9f7 355
<> 144:ef7eb2e8f9f7 356 /* Read DINn register */
<> 144:ef7eb2e8f9f7 357 *pData = (uint16_t)(*((uint32_t *)tmpreg));
<> 144:ef7eb2e8f9f7 358
<> 144:ef7eb2e8f9f7 359 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 360 __HAL_UNLOCK(hmdios);
<> 144:ef7eb2e8f9f7 361
<> 144:ef7eb2e8f9f7 362 return HAL_OK;
<> 144:ef7eb2e8f9f7 363 }
<> 144:ef7eb2e8f9f7 364
<> 144:ef7eb2e8f9f7 365 /**
<> 144:ef7eb2e8f9f7 366 * @brief Gets Written registers by MDIO master
<> 144:ef7eb2e8f9f7 367 * @param hmdios: mdios handle
<> 144:ef7eb2e8f9f7 368 * @retval bit map of written registers addresses
<> 144:ef7eb2e8f9f7 369 */
<> 144:ef7eb2e8f9f7 370 uint32_t HAL_MDIOS_GetWrittenRegAddress(MDIOS_HandleTypeDef *hmdios)
<> 144:ef7eb2e8f9f7 371 {
<> 144:ef7eb2e8f9f7 372 return hmdios->Instance->WRFR;
<> 144:ef7eb2e8f9f7 373 }
<> 144:ef7eb2e8f9f7 374
<> 144:ef7eb2e8f9f7 375 /**
<> 144:ef7eb2e8f9f7 376 * @brief Gets Read registers by MDIO master
<> 144:ef7eb2e8f9f7 377 * @param hmdios: mdios handle
<> 144:ef7eb2e8f9f7 378 * @retval bit map of read registers addresses
<> 144:ef7eb2e8f9f7 379 */
<> 144:ef7eb2e8f9f7 380 uint32_t HAL_MDIOS_GetReadRegAddress(MDIOS_HandleTypeDef *hmdios)
<> 144:ef7eb2e8f9f7 381 {
<> 144:ef7eb2e8f9f7 382 return hmdios->Instance->RDFR;
<> 144:ef7eb2e8f9f7 383 }
<> 144:ef7eb2e8f9f7 384
<> 144:ef7eb2e8f9f7 385 /**
<> 144:ef7eb2e8f9f7 386 * @brief Clears Write registers flag
<> 144:ef7eb2e8f9f7 387 * @param hmdios: mdios handle
<> 144:ef7eb2e8f9f7 388 * @param RegNum: registers addresses to be cleared
<> 144:ef7eb2e8f9f7 389 * @retval HAL status
<> 144:ef7eb2e8f9f7 390 */
<> 144:ef7eb2e8f9f7 391 HAL_StatusTypeDef HAL_MDIOS_ClearWriteRegAddress(MDIOS_HandleTypeDef *hmdios, uint32_t RegNum)
<> 144:ef7eb2e8f9f7 392 {
<> 144:ef7eb2e8f9f7 393 /* Check the parameters */
<> 144:ef7eb2e8f9f7 394 assert_param(IS_MDIOS_REGISTER(RegNum));
<> 144:ef7eb2e8f9f7 395
<> 144:ef7eb2e8f9f7 396 /* Process Locked */
<> 144:ef7eb2e8f9f7 397 __HAL_LOCK(hmdios);
<> 144:ef7eb2e8f9f7 398
<> 144:ef7eb2e8f9f7 399 /* Clear write registers flags */
<> 144:ef7eb2e8f9f7 400 hmdios->Instance->CWRFR |= (RegNum);
<> 144:ef7eb2e8f9f7 401
<> 144:ef7eb2e8f9f7 402 /* Release Lock */
<> 144:ef7eb2e8f9f7 403 __HAL_UNLOCK(hmdios);
<> 144:ef7eb2e8f9f7 404
<> 144:ef7eb2e8f9f7 405 return HAL_OK;
<> 144:ef7eb2e8f9f7 406 }
<> 144:ef7eb2e8f9f7 407
<> 144:ef7eb2e8f9f7 408 /**
<> 144:ef7eb2e8f9f7 409 * @brief Clears Read register flag
<> 144:ef7eb2e8f9f7 410 * @param hmdios: mdios handle
<> 144:ef7eb2e8f9f7 411 * @param RegNum: registers addresses to be cleared
<> 144:ef7eb2e8f9f7 412 * @retval HAL status
<> 144:ef7eb2e8f9f7 413 */
<> 144:ef7eb2e8f9f7 414 HAL_StatusTypeDef HAL_MDIOS_ClearReadRegAddress(MDIOS_HandleTypeDef *hmdios, uint32_t RegNum)
<> 144:ef7eb2e8f9f7 415 {
<> 144:ef7eb2e8f9f7 416 /* Check the parameters */
<> 144:ef7eb2e8f9f7 417 assert_param(IS_MDIOS_REGISTER(RegNum));
<> 144:ef7eb2e8f9f7 418
<> 144:ef7eb2e8f9f7 419 /* Process Locked */
<> 144:ef7eb2e8f9f7 420 __HAL_LOCK(hmdios);
<> 144:ef7eb2e8f9f7 421
<> 144:ef7eb2e8f9f7 422 /* Clear read registers flags */
<> 144:ef7eb2e8f9f7 423 hmdios->Instance->CRDFR |= (RegNum);
<> 144:ef7eb2e8f9f7 424
<> 144:ef7eb2e8f9f7 425 /* Release Lock */
<> 144:ef7eb2e8f9f7 426 __HAL_UNLOCK(hmdios);
<> 144:ef7eb2e8f9f7 427
<> 144:ef7eb2e8f9f7 428 return HAL_OK;
<> 144:ef7eb2e8f9f7 429 }
<> 144:ef7eb2e8f9f7 430
<> 144:ef7eb2e8f9f7 431 /**
<> 144:ef7eb2e8f9f7 432 * @brief Enables Events for MDIOS peripheral
<> 144:ef7eb2e8f9f7 433 * @param hmdios: mdios handle
<> 144:ef7eb2e8f9f7 434 * @retval HAL status
<> 144:ef7eb2e8f9f7 435 */
<> 144:ef7eb2e8f9f7 436 HAL_StatusTypeDef HAL_MDIOS_EnableEvents(MDIOS_HandleTypeDef *hmdios)
<> 144:ef7eb2e8f9f7 437 {
<> 144:ef7eb2e8f9f7 438 /* Process Locked */
<> 144:ef7eb2e8f9f7 439 __HAL_LOCK(hmdios);
<> 144:ef7eb2e8f9f7 440
<> 144:ef7eb2e8f9f7 441 /* Enable MDIOS interrupts: Register Write, Register Read and Error ITs */
<> 144:ef7eb2e8f9f7 442 __HAL_MDIOS_ENABLE_IT(hmdios, (MDIOS_IT_WRITE | MDIOS_IT_READ | MDIOS_IT_ERROR));
<> 144:ef7eb2e8f9f7 443
<> 144:ef7eb2e8f9f7 444 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 445 __HAL_UNLOCK(hmdios);
<> 144:ef7eb2e8f9f7 446
<> 144:ef7eb2e8f9f7 447 return HAL_OK;
<> 144:ef7eb2e8f9f7 448 }
<> 144:ef7eb2e8f9f7 449
<> 144:ef7eb2e8f9f7 450 /**
<> 144:ef7eb2e8f9f7 451 * @brief This function handles MDIOS interrupt request.
<> 144:ef7eb2e8f9f7 452 * @param hmdios: MDIOS handle
<> 144:ef7eb2e8f9f7 453 * @retval None
<> 144:ef7eb2e8f9f7 454 */
<> 144:ef7eb2e8f9f7 455 void HAL_MDIOS_IRQHandler(MDIOS_HandleTypeDef *hmdios)
<> 144:ef7eb2e8f9f7 456 {
<> 144:ef7eb2e8f9f7 457 /* Write Register Interrupt enabled ? */
<> 144:ef7eb2e8f9f7 458 if(__HAL_MDIOS_GET_IT_SOURCE(hmdios, MDIOS_IT_WRITE) != RESET)
<> 144:ef7eb2e8f9f7 459 {
<> 144:ef7eb2e8f9f7 460 /* Write register flag */
<> 144:ef7eb2e8f9f7 461 if(HAL_MDIOS_GetWrittenRegAddress(hmdios) != RESET)
<> 144:ef7eb2e8f9f7 462 {
<> 144:ef7eb2e8f9f7 463 /* Write callback function */
<> 144:ef7eb2e8f9f7 464 HAL_MDIOS_WriteCpltCallback(hmdios);
<> 144:ef7eb2e8f9f7 465
<> 144:ef7eb2e8f9f7 466 /* Clear write register flag */
<> 144:ef7eb2e8f9f7 467 HAL_MDIOS_ClearWriteRegAddress(hmdios, MDIOS_ALL_REG_FLAG);
<> 144:ef7eb2e8f9f7 468 }
<> 144:ef7eb2e8f9f7 469 }
<> 144:ef7eb2e8f9f7 470
<> 144:ef7eb2e8f9f7 471 /* Read Register Interrupt enabled ? */
<> 144:ef7eb2e8f9f7 472 if(__HAL_MDIOS_GET_IT_SOURCE(hmdios, MDIOS_IT_READ) != RESET)
<> 144:ef7eb2e8f9f7 473 {
<> 144:ef7eb2e8f9f7 474 /* Read register flag */
<> 144:ef7eb2e8f9f7 475 if(HAL_MDIOS_GetReadRegAddress(hmdios) != RESET)
<> 144:ef7eb2e8f9f7 476 {
<> 144:ef7eb2e8f9f7 477 /* Read callback function */
<> 144:ef7eb2e8f9f7 478 HAL_MDIOS_ReadCpltCallback(hmdios);
<> 144:ef7eb2e8f9f7 479
<> 144:ef7eb2e8f9f7 480 /* Clear read register flag */
<> 144:ef7eb2e8f9f7 481 HAL_MDIOS_ClearReadRegAddress(hmdios, MDIOS_ALL_REG_FLAG);
<> 144:ef7eb2e8f9f7 482 }
<> 144:ef7eb2e8f9f7 483 }
<> 144:ef7eb2e8f9f7 484
<> 144:ef7eb2e8f9f7 485 /* Error Interrupt enabled ? */
<> 144:ef7eb2e8f9f7 486 if(__HAL_MDIOS_GET_IT_SOURCE(hmdios, MDIOS_IT_ERROR) != RESET)
<> 144:ef7eb2e8f9f7 487 {
<> 144:ef7eb2e8f9f7 488 /* All Errors Flag */
<> 144:ef7eb2e8f9f7 489 if(__HAL_MDIOS_GET_ERROR_FLAG(hmdios, MDIOS_ALL_ERRORS_FLAG) !=RESET)
<> 144:ef7eb2e8f9f7 490 {
<> 144:ef7eb2e8f9f7 491 /* Error Callback */
<> 144:ef7eb2e8f9f7 492 HAL_MDIOS_ErrorCallback(hmdios);
<> 144:ef7eb2e8f9f7 493
<> 144:ef7eb2e8f9f7 494 /* Clear errors flag */
<> 144:ef7eb2e8f9f7 495 __HAL_MDIOS_CLEAR_ERROR_FLAG(hmdios, MDIOS_ALL_ERRORS_FLAG);
<> 144:ef7eb2e8f9f7 496 }
<> 144:ef7eb2e8f9f7 497 }
<> 144:ef7eb2e8f9f7 498
<> 144:ef7eb2e8f9f7 499 /* check MDIOS WAKEUP exti flag */
<> 144:ef7eb2e8f9f7 500 if(__HAL_MDIOS_WAKEUP_EXTI_GET_FLAG() != RESET)
<> 144:ef7eb2e8f9f7 501 {
<> 144:ef7eb2e8f9f7 502 /* MDIOS WAKEUP interrupt user callback */
<> 144:ef7eb2e8f9f7 503 HAL_MDIOS_WakeUpCallback(hmdios);
<> 144:ef7eb2e8f9f7 504
<> 144:ef7eb2e8f9f7 505 /* Clear MDIOS WAKEUP Exti pending bit */
<> 144:ef7eb2e8f9f7 506 __HAL_MDIOS_WAKEUP_EXTI_CLEAR_FLAG();
<> 144:ef7eb2e8f9f7 507 }
<> 144:ef7eb2e8f9f7 508 }
<> 144:ef7eb2e8f9f7 509
<> 144:ef7eb2e8f9f7 510 /**
<> 144:ef7eb2e8f9f7 511 * @brief Write Complete Callback
<> 144:ef7eb2e8f9f7 512 * @param hmdios: mdios handle
<> 144:ef7eb2e8f9f7 513 * @retval None
<> 144:ef7eb2e8f9f7 514 */
<> 144:ef7eb2e8f9f7 515 __weak void HAL_MDIOS_WriteCpltCallback(MDIOS_HandleTypeDef *hmdios)
<> 144:ef7eb2e8f9f7 516 {
<> 144:ef7eb2e8f9f7 517 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 518 UNUSED(hmdios);
<> 144:ef7eb2e8f9f7 519
<> 144:ef7eb2e8f9f7 520 /* NOTE : This function should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 521 the HAL_MDIOS_WriteCpltCallback can be implemented in the user file
<> 144:ef7eb2e8f9f7 522 */
<> 144:ef7eb2e8f9f7 523 }
<> 144:ef7eb2e8f9f7 524
<> 144:ef7eb2e8f9f7 525 /**
<> 144:ef7eb2e8f9f7 526 * @brief Read Complete Callback
<> 144:ef7eb2e8f9f7 527 * @param hmdios: mdios handle
<> 144:ef7eb2e8f9f7 528 * @retval None
<> 144:ef7eb2e8f9f7 529 */
<> 144:ef7eb2e8f9f7 530 __weak void HAL_MDIOS_ReadCpltCallback(MDIOS_HandleTypeDef *hmdios)
<> 144:ef7eb2e8f9f7 531 {
<> 144:ef7eb2e8f9f7 532 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 533 UNUSED(hmdios);
<> 144:ef7eb2e8f9f7 534
<> 144:ef7eb2e8f9f7 535 /* NOTE : This function should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 536 the HAL_MDIOS_ReadCpltCallback can be implemented in the user file
<> 144:ef7eb2e8f9f7 537 */
<> 144:ef7eb2e8f9f7 538 }
<> 144:ef7eb2e8f9f7 539
<> 144:ef7eb2e8f9f7 540 /**
<> 144:ef7eb2e8f9f7 541 * @brief Error Callback
<> 144:ef7eb2e8f9f7 542 * @param hmdios: mdios handle
<> 144:ef7eb2e8f9f7 543 * @retval None
<> 144:ef7eb2e8f9f7 544 */
<> 144:ef7eb2e8f9f7 545 __weak void HAL_MDIOS_ErrorCallback(MDIOS_HandleTypeDef *hmdios)
<> 144:ef7eb2e8f9f7 546 {
<> 144:ef7eb2e8f9f7 547 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 548 UNUSED(hmdios);
<> 144:ef7eb2e8f9f7 549
<> 144:ef7eb2e8f9f7 550 /* NOTE : This function should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 551 the HAL_MDIOS_ErrorCallback can be implemented in the user file
<> 144:ef7eb2e8f9f7 552 */
<> 144:ef7eb2e8f9f7 553 }
<> 144:ef7eb2e8f9f7 554
<> 144:ef7eb2e8f9f7 555 /**
<> 144:ef7eb2e8f9f7 556 * @brief MDIOS WAKEUP interrupt callback
<> 144:ef7eb2e8f9f7 557 * @param hmdios: mdios handle
<> 144:ef7eb2e8f9f7 558 * @retval None
<> 144:ef7eb2e8f9f7 559 */
<> 144:ef7eb2e8f9f7 560 __weak void HAL_MDIOS_WakeUpCallback(MDIOS_HandleTypeDef *hmdios)
<> 144:ef7eb2e8f9f7 561 {
<> 144:ef7eb2e8f9f7 562 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 563 UNUSED(hmdios);
<> 144:ef7eb2e8f9f7 564
<> 144:ef7eb2e8f9f7 565 /* NOTE : This function Should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 566 the HAL_MDIOS_WakeUpCallback could be implemented in the user file
<> 144:ef7eb2e8f9f7 567 */
<> 144:ef7eb2e8f9f7 568 }
<> 144:ef7eb2e8f9f7 569
<> 144:ef7eb2e8f9f7 570 /**
<> 144:ef7eb2e8f9f7 571 * @}
<> 144:ef7eb2e8f9f7 572 */
<> 144:ef7eb2e8f9f7 573
<> 144:ef7eb2e8f9f7 574 /** @defgroup MDIOS_Exported_Functions_Group3 Peripheral Control functions
<> 144:ef7eb2e8f9f7 575 * @brief MDIOS control functions
<> 144:ef7eb2e8f9f7 576 *
<> 144:ef7eb2e8f9f7 577 @verbatim
<> 144:ef7eb2e8f9f7 578 ===============================================================================
<> 144:ef7eb2e8f9f7 579 ##### Peripheral Control functions #####
<> 144:ef7eb2e8f9f7 580 ===============================================================================
<> 144:ef7eb2e8f9f7 581 [..]
<> 144:ef7eb2e8f9f7 582 This subsection provides a set of functions allowing to control the MDIOS.
<> 144:ef7eb2e8f9f7 583 (+) HAL_MDIOS_GetState() API, helpful to check in run-time the state.
<> 144:ef7eb2e8f9f7 584 (+) HAL_MDIOS_GetError() API, returns the errors occured during data transfer.
<> 144:ef7eb2e8f9f7 585
<> 144:ef7eb2e8f9f7 586 @endverbatim
<> 144:ef7eb2e8f9f7 587 * @{
<> 144:ef7eb2e8f9f7 588 */
<> 144:ef7eb2e8f9f7 589
<> 144:ef7eb2e8f9f7 590 /**
<> 144:ef7eb2e8f9f7 591 * @brief Gets MDIOS error flags
<> 144:ef7eb2e8f9f7 592 * @param hmdios: mdios handle
<> 144:ef7eb2e8f9f7 593 * @retval bit map of occured errors
<> 144:ef7eb2e8f9f7 594 */
<> 144:ef7eb2e8f9f7 595 uint32_t HAL_MDIOS_GetError(MDIOS_HandleTypeDef *hmdios)
<> 144:ef7eb2e8f9f7 596 {
<> 144:ef7eb2e8f9f7 597 /* return errors flags on status register */
<> 144:ef7eb2e8f9f7 598 return hmdios->Instance->SR;
<> 144:ef7eb2e8f9f7 599 }
<> 144:ef7eb2e8f9f7 600
<> 144:ef7eb2e8f9f7 601 /**
<> 144:ef7eb2e8f9f7 602 * @brief Return the MDIOS HAL state
<> 144:ef7eb2e8f9f7 603 * @param hmdios: mdios handle
<> 144:ef7eb2e8f9f7 604 * @retval MDIOS state
<> 144:ef7eb2e8f9f7 605 */
<> 144:ef7eb2e8f9f7 606 HAL_MDIOS_StateTypeDef HAL_MDIOS_GetState(MDIOS_HandleTypeDef *hmdios)
<> 144:ef7eb2e8f9f7 607 {
<> 144:ef7eb2e8f9f7 608 /* Return MDIOS state */
<> 144:ef7eb2e8f9f7 609 return hmdios->State;
<> 144:ef7eb2e8f9f7 610 }
<> 144:ef7eb2e8f9f7 611
<> 144:ef7eb2e8f9f7 612 /**
<> 144:ef7eb2e8f9f7 613 * @}
<> 144:ef7eb2e8f9f7 614 */
<> 144:ef7eb2e8f9f7 615
<> 144:ef7eb2e8f9f7 616 /**
<> 144:ef7eb2e8f9f7 617 * @}
<> 144:ef7eb2e8f9f7 618 */
<> 144:ef7eb2e8f9f7 619 #endif /* MDIOS */
<> 144:ef7eb2e8f9f7 620 #endif /* HAL_MDIOS_MODULE_ENABLED */
<> 144:ef7eb2e8f9f7 621 /**
<> 144:ef7eb2e8f9f7 622 * @}
<> 144:ef7eb2e8f9f7 623 */
<> 144:ef7eb2e8f9f7 624
<> 144:ef7eb2e8f9f7 625 /**
<> 144:ef7eb2e8f9f7 626 * @}
<> 144:ef7eb2e8f9f7 627 */
<> 144:ef7eb2e8f9f7 628
<> 144:ef7eb2e8f9f7 629 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/