added prescaler for 16 bit pwm in LPC1347 target

Fork of mbed-dev by mbed official

Committer:
<>
Date:
Fri Sep 02 15:07:44 2016 +0100
Revision:
144:ef7eb2e8f9f7
Parent:
83:a036322b8637
This updates the lib to the mbed lib v125

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file stm32f7xx_hal_hash.h
<> 144:ef7eb2e8f9f7 4 * @author MCD Application Team
<> 144:ef7eb2e8f9f7 5 * @version V1.1.0
<> 144:ef7eb2e8f9f7 6 * @date 22-April-2016
<> 144:ef7eb2e8f9f7 7 * @brief Header file of HASH HAL module.
<> 144:ef7eb2e8f9f7 8 ******************************************************************************
<> 144:ef7eb2e8f9f7 9 * @attention
<> 144:ef7eb2e8f9f7 10 *
<> 144:ef7eb2e8f9f7 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 144:ef7eb2e8f9f7 12 *
<> 144:ef7eb2e8f9f7 13 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 14 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 15 * 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 16 * this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 18 * this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 19 * and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 21 * may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 22 * without specific prior written permission.
<> 144:ef7eb2e8f9f7 23 *
<> 144:ef7eb2e8f9f7 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 34 *
<> 144:ef7eb2e8f9f7 35 ******************************************************************************
<> 144:ef7eb2e8f9f7 36 */
<> 144:ef7eb2e8f9f7 37
<> 144:ef7eb2e8f9f7 38 /* Define to prevent recursive inclusion -------------------------------------*/
<> 144:ef7eb2e8f9f7 39 #ifndef __STM32F7xx_HAL_HASH_H
<> 144:ef7eb2e8f9f7 40 #define __STM32F7xx_HAL_HASH_H
<> 144:ef7eb2e8f9f7 41
<> 144:ef7eb2e8f9f7 42 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 43 extern "C" {
<> 144:ef7eb2e8f9f7 44 #endif
<> 144:ef7eb2e8f9f7 45
<> 144:ef7eb2e8f9f7 46 #if defined (STM32F756xx) || defined (STM32F777xx) || defined (STM32F779xx)
<> 144:ef7eb2e8f9f7 47 /* Includes ------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 48 #include "stm32f7xx_hal_def.h"
<> 144:ef7eb2e8f9f7 49
<> 144:ef7eb2e8f9f7 50 /** @addtogroup STM32F7xx_HAL_Driver
<> 144:ef7eb2e8f9f7 51 * @{
<> 144:ef7eb2e8f9f7 52 */
<> 144:ef7eb2e8f9f7 53
<> 144:ef7eb2e8f9f7 54 /** @addtogroup HASH
<> 144:ef7eb2e8f9f7 55 * @brief HASH HAL module driver
<> 144:ef7eb2e8f9f7 56 * @{
<> 144:ef7eb2e8f9f7 57 */
<> 144:ef7eb2e8f9f7 58
<> 144:ef7eb2e8f9f7 59 /* Exported types ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 60 /** @defgroup HASH_Exported_Types HASH Exported Types
<> 144:ef7eb2e8f9f7 61 * @{
<> 144:ef7eb2e8f9f7 62 */
<> 144:ef7eb2e8f9f7 63
<> 144:ef7eb2e8f9f7 64 /** @defgroup HASH_Exported_Types_Group1 HASH Configuration Structure definition
<> 144:ef7eb2e8f9f7 65 * @{
<> 144:ef7eb2e8f9f7 66 */
<> 144:ef7eb2e8f9f7 67
<> 144:ef7eb2e8f9f7 68 typedef struct
<> 144:ef7eb2e8f9f7 69 {
<> 144:ef7eb2e8f9f7 70 uint32_t DataType; /*!< 32-bit data, 16-bit data, 8-bit data or 1-bit string.
<> 144:ef7eb2e8f9f7 71 This parameter can be a value of @ref HASH_Data_Type */
<> 144:ef7eb2e8f9f7 72
<> 144:ef7eb2e8f9f7 73 uint32_t KeySize; /*!< The key size is used only in HMAC operation */
<> 144:ef7eb2e8f9f7 74
<> 144:ef7eb2e8f9f7 75 uint8_t* pKey; /*!< The key is used only in HMAC operation */
<> 144:ef7eb2e8f9f7 76 }HASH_InitTypeDef;
<> 144:ef7eb2e8f9f7 77
<> 144:ef7eb2e8f9f7 78 /**
<> 144:ef7eb2e8f9f7 79 * @}
<> 144:ef7eb2e8f9f7 80 */
<> 144:ef7eb2e8f9f7 81
<> 144:ef7eb2e8f9f7 82 /** @defgroup HASH_Exported_Types_Group2 HASH State structures definition
<> 144:ef7eb2e8f9f7 83 * @{
<> 144:ef7eb2e8f9f7 84 */
<> 144:ef7eb2e8f9f7 85
<> 144:ef7eb2e8f9f7 86 typedef enum
<> 144:ef7eb2e8f9f7 87 {
<> 144:ef7eb2e8f9f7 88 HAL_HASH_STATE_RESET = 0x00U, /*!< HASH not yet initialized or disabled */
<> 144:ef7eb2e8f9f7 89 HAL_HASH_STATE_READY = 0x01U, /*!< HASH initialized and ready for use */
<> 144:ef7eb2e8f9f7 90 HAL_HASH_STATE_BUSY = 0x02U, /*!< HASH internal process is ongoing */
<> 144:ef7eb2e8f9f7 91 HAL_HASH_STATE_TIMEOUT = 0x03U, /*!< HASH timeout state */
<> 144:ef7eb2e8f9f7 92 HAL_HASH_STATE_ERROR = 0x04U /*!< HASH error state */
<> 144:ef7eb2e8f9f7 93 }HAL_HASH_StateTypeDef;
<> 144:ef7eb2e8f9f7 94
<> 144:ef7eb2e8f9f7 95 /**
<> 144:ef7eb2e8f9f7 96 * @}
<> 144:ef7eb2e8f9f7 97 */
<> 144:ef7eb2e8f9f7 98
<> 144:ef7eb2e8f9f7 99 /** @defgroup HASH_Exported_Types_Group3 HASH phase structures definition
<> 144:ef7eb2e8f9f7 100 * @{
<> 144:ef7eb2e8f9f7 101 */
<> 144:ef7eb2e8f9f7 102
<> 144:ef7eb2e8f9f7 103 typedef enum
<> 144:ef7eb2e8f9f7 104 {
<> 144:ef7eb2e8f9f7 105 HAL_HASH_PHASE_READY = 0x01U, /*!< HASH peripheral is ready for initialization */
<> 144:ef7eb2e8f9f7 106 HAL_HASH_PHASE_PROCESS = 0x02U, /*!< HASH peripheral is in processing phase */
<> 144:ef7eb2e8f9f7 107 }HAL_HASHPhaseTypeDef;
<> 144:ef7eb2e8f9f7 108
<> 144:ef7eb2e8f9f7 109 /**
<> 144:ef7eb2e8f9f7 110 * @}
<> 144:ef7eb2e8f9f7 111 */
<> 144:ef7eb2e8f9f7 112
<> 144:ef7eb2e8f9f7 113 /** @defgroup HASH_Exported_Types_Group4 HASH Handle structures definition
<> 144:ef7eb2e8f9f7 114 * @{
<> 144:ef7eb2e8f9f7 115 */
<> 144:ef7eb2e8f9f7 116
<> 144:ef7eb2e8f9f7 117 typedef struct
<> 144:ef7eb2e8f9f7 118 {
<> 144:ef7eb2e8f9f7 119 HASH_InitTypeDef Init; /*!< HASH required parameters */
<> 144:ef7eb2e8f9f7 120
<> 144:ef7eb2e8f9f7 121 uint8_t *pHashInBuffPtr; /*!< Pointer to input buffer */
<> 144:ef7eb2e8f9f7 122
<> 144:ef7eb2e8f9f7 123 uint8_t *pHashOutBuffPtr; /*!< Pointer to input buffer */
<> 144:ef7eb2e8f9f7 124
<> 144:ef7eb2e8f9f7 125 __IO uint32_t HashBuffSize; /*!< Size of buffer to be processed */
<> 144:ef7eb2e8f9f7 126
<> 144:ef7eb2e8f9f7 127 __IO uint32_t HashInCount; /*!< Counter of inputed data */
<> 144:ef7eb2e8f9f7 128
<> 144:ef7eb2e8f9f7 129 __IO uint32_t HashITCounter; /*!< Counter of issued interrupts */
<> 144:ef7eb2e8f9f7 130
<> 144:ef7eb2e8f9f7 131 HAL_StatusTypeDef Status; /*!< HASH peripheral status */
<> 144:ef7eb2e8f9f7 132
<> 144:ef7eb2e8f9f7 133 HAL_HASH_PhaseTypeDef Phase; /*!< HASH peripheral phase */
<> 144:ef7eb2e8f9f7 134
<> 144:ef7eb2e8f9f7 135 DMA_HandleTypeDef *hdmain; /*!< HASH In DMA handle parameters */
<> 144:ef7eb2e8f9f7 136
<> 144:ef7eb2e8f9f7 137 HAL_LockTypeDef Lock; /*!< HASH locking object */
<> 144:ef7eb2e8f9f7 138
<> 144:ef7eb2e8f9f7 139 __IO HAL_HASH_StateTypeDef State; /*!< HASH peripheral state */
<> 144:ef7eb2e8f9f7 140 } HASH_HandleTypeDef;
<> 144:ef7eb2e8f9f7 141
<> 144:ef7eb2e8f9f7 142 /**
<> 144:ef7eb2e8f9f7 143 * @}
<> 144:ef7eb2e8f9f7 144 */
<> 144:ef7eb2e8f9f7 145
<> 144:ef7eb2e8f9f7 146
<> 144:ef7eb2e8f9f7 147 /**
<> 144:ef7eb2e8f9f7 148 * @}
<> 144:ef7eb2e8f9f7 149 */
<> 144:ef7eb2e8f9f7 150
<> 144:ef7eb2e8f9f7 151 /* Exported constants --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 152 /** @defgroup HASH_Exported_Constants HASH Exported Constants
<> 144:ef7eb2e8f9f7 153 * @{
<> 144:ef7eb2e8f9f7 154 */
<> 144:ef7eb2e8f9f7 155
<> 144:ef7eb2e8f9f7 156 /** @defgroup HASH_Exported_Constants_Group1 HASH Algorithm Selection
<> 144:ef7eb2e8f9f7 157 * @{
<> 144:ef7eb2e8f9f7 158 */
<> 144:ef7eb2e8f9f7 159 #define HASH_ALGOSELECTION_SHA1 ((uint32_t)0x0000U) /*!< HASH function is SHA1 */
<> 144:ef7eb2e8f9f7 160 #define HASH_ALGOSELECTION_SHA224 HASH_CR_ALGO_1 /*!< HASH function is SHA224 */
<> 144:ef7eb2e8f9f7 161 #define HASH_ALGOSELECTION_SHA256 HASH_CR_ALGO /*!< HASH function is SHA256 */
<> 144:ef7eb2e8f9f7 162 #define HASH_ALGOSELECTION_MD5 HASH_CR_ALGO_0 /*!< HASH function is MD5 */
<> 144:ef7eb2e8f9f7 163 /**
<> 144:ef7eb2e8f9f7 164 * @}
<> 144:ef7eb2e8f9f7 165 */
<> 144:ef7eb2e8f9f7 166
<> 144:ef7eb2e8f9f7 167 /** @defgroup HASH_Exported_Constants_Group2 HASH Algorithm Mode
<> 144:ef7eb2e8f9f7 168 * @{
<> 144:ef7eb2e8f9f7 169 */
<> 144:ef7eb2e8f9f7 170 #define HASH_ALGOMODE_HASH ((uint32_t)0x00000000U) /*!< Algorithm is HASH */
<> 144:ef7eb2e8f9f7 171 #define HASH_ALGOMODE_HMAC HASH_CR_MODE /*!< Algorithm is HMAC */
<> 144:ef7eb2e8f9f7 172 /**
<> 144:ef7eb2e8f9f7 173 * @}
<> 144:ef7eb2e8f9f7 174 */
<> 144:ef7eb2e8f9f7 175
<> 144:ef7eb2e8f9f7 176 /** @defgroup HASH_Data_Type HASH Data Type
<> 144:ef7eb2e8f9f7 177 * @{
<> 144:ef7eb2e8f9f7 178 */
<> 144:ef7eb2e8f9f7 179 #define HASH_DATATYPE_32B ((uint32_t)0x0000U) /*!< 32-bit data. No swapping */
<> 144:ef7eb2e8f9f7 180 #define HASH_DATATYPE_16B HASH_CR_DATATYPE_0 /*!< 16-bit data. Each half word is swapped */
<> 144:ef7eb2e8f9f7 181 #define HASH_DATATYPE_8B HASH_CR_DATATYPE_1 /*!< 8-bit data. All bytes are swapped */
<> 144:ef7eb2e8f9f7 182 #define HASH_DATATYPE_1B HASH_CR_DATATYPE /*!< 1-bit data. In the word all bits are swapped */
<> 144:ef7eb2e8f9f7 183 /**
<> 144:ef7eb2e8f9f7 184 * @}
<> 144:ef7eb2e8f9f7 185 */
<> 144:ef7eb2e8f9f7 186
<> 144:ef7eb2e8f9f7 187 /** @defgroup HASH_Exported_Constants_Group4 HASH HMAC Long key
<> 144:ef7eb2e8f9f7 188 * @brief HASH HMAC Long key used only for HMAC mode
<> 144:ef7eb2e8f9f7 189 * @{
<> 144:ef7eb2e8f9f7 190 */
<> 144:ef7eb2e8f9f7 191 #define HASH_HMAC_KEYTYPE_SHORTKEY ((uint32_t)0x00000000U) /*!< HMAC Key is <= 64 bytes */
<> 144:ef7eb2e8f9f7 192 #define HASH_HMAC_KEYTYPE_LONGKEY HASH_CR_LKEY /*!< HMAC Key is > 64 bytes */
<> 144:ef7eb2e8f9f7 193 /**
<> 144:ef7eb2e8f9f7 194 * @}
<> 144:ef7eb2e8f9f7 195 */
<> 144:ef7eb2e8f9f7 196
<> 144:ef7eb2e8f9f7 197 /** @defgroup HASH_Exported_Constants_Group5 HASH Flags definition
<> 144:ef7eb2e8f9f7 198 * @{
<> 144:ef7eb2e8f9f7 199 */
<> 144:ef7eb2e8f9f7 200 #define HASH_FLAG_DINIS HASH_SR_DINIS /*!< 16 locations are free in the DIN : A new block can be entered into the input buffer */
<> 144:ef7eb2e8f9f7 201 #define HASH_FLAG_DCIS HASH_SR_DCIS /*!< Digest calculation complete */
<> 144:ef7eb2e8f9f7 202 #define HASH_FLAG_DMAS HASH_SR_DMAS /*!< DMA interface is enabled (DMAE=1) or a transfer is ongoing */
<> 144:ef7eb2e8f9f7 203 #define HASH_FLAG_BUSY HASH_SR_BUSY /*!< The hash core is Busy : processing a block of data */
<> 144:ef7eb2e8f9f7 204 #define HASH_FLAG_DINNE HASH_CR_DINNE /*!< DIN not empty : The input buffer contains at least one word of data */
<> 144:ef7eb2e8f9f7 205 /**
<> 144:ef7eb2e8f9f7 206 * @}
<> 144:ef7eb2e8f9f7 207 */
<> 144:ef7eb2e8f9f7 208
<> 144:ef7eb2e8f9f7 209 /** @defgroup HASH_Exported_Constants_Group6 HASH Interrupts definition
<> 144:ef7eb2e8f9f7 210 * @{
<> 144:ef7eb2e8f9f7 211 */
<> 144:ef7eb2e8f9f7 212 #define HASH_IT_DINI HASH_IMR_DINIE /*!< A new block can be entered into the input buffer (DIN) */
<> 144:ef7eb2e8f9f7 213 #define HASH_IT_DCI HASH_IMR_DCIE /*!< Digest calculation complete */
<> 144:ef7eb2e8f9f7 214 /**
<> 144:ef7eb2e8f9f7 215 * @}
<> 144:ef7eb2e8f9f7 216 */
<> 144:ef7eb2e8f9f7 217
<> 144:ef7eb2e8f9f7 218 /**
<> 144:ef7eb2e8f9f7 219 * @}
<> 144:ef7eb2e8f9f7 220 */
<> 144:ef7eb2e8f9f7 221
<> 144:ef7eb2e8f9f7 222 /* Exported macro ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 223 /** @defgroup HASH_Exported_Macros HASH Exported Macros
<> 144:ef7eb2e8f9f7 224 * @{
<> 144:ef7eb2e8f9f7 225 */
<> 144:ef7eb2e8f9f7 226
<> 144:ef7eb2e8f9f7 227 /** @brief Reset HASH handle state
<> 144:ef7eb2e8f9f7 228 * @param __HANDLE__: specifies the HASH handle.
<> 144:ef7eb2e8f9f7 229 * @retval None
<> 144:ef7eb2e8f9f7 230 */
<> 144:ef7eb2e8f9f7 231 #define __HAL_HASH_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_HASH_STATE_RESET)
<> 144:ef7eb2e8f9f7 232
<> 144:ef7eb2e8f9f7 233 /** @brief Check whether the specified HASH flag is set or not.
<> 144:ef7eb2e8f9f7 234 * @param __FLAG__: specifies the flag to check.
<> 144:ef7eb2e8f9f7 235 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 236 * @arg HASH_FLAG_DINIS: A new block can be entered into the input buffer.
<> 144:ef7eb2e8f9f7 237 * @arg HASH_FLAG_DCIS: Digest calculation complete
<> 144:ef7eb2e8f9f7 238 * @arg HASH_FLAG_DMAS: DMA interface is enabled (DMAE=1) or a transfer is ongoing
<> 144:ef7eb2e8f9f7 239 * @arg HASH_FLAG_BUSY: The hash core is Busy : processing a block of data
<> 144:ef7eb2e8f9f7 240 * @arg HASH_FLAG_DINNE: DIN not empty : The input buffer contains at least one word of data
<> 144:ef7eb2e8f9f7 241 * @retval The new state of __FLAG__ (TRUE or FALSE).
<> 144:ef7eb2e8f9f7 242 */
<> 144:ef7eb2e8f9f7 243 #define __HAL_HASH_GET_FLAG(__FLAG__) (((__FLAG__) > 8U) ? ((HASH->CR & (__FLAG__)) == (__FLAG__)) :\
<> 144:ef7eb2e8f9f7 244 ((HASH->SR & (__FLAG__)) == (__FLAG__)))
<> 144:ef7eb2e8f9f7 245
<> 144:ef7eb2e8f9f7 246 /**
<> 144:ef7eb2e8f9f7 247 * @brief Enable the multiple DMA mode.
<> 144:ef7eb2e8f9f7 248 * This feature is available only in STM32F429x and STM32F439x devices.
<> 144:ef7eb2e8f9f7 249 * @retval None
<> 144:ef7eb2e8f9f7 250 */
<> 144:ef7eb2e8f9f7 251 #define __HAL_HASH_SET_MDMAT() HASH->CR |= HASH_CR_MDMAT
<> 144:ef7eb2e8f9f7 252
<> 144:ef7eb2e8f9f7 253 /**
<> 144:ef7eb2e8f9f7 254 * @brief Disable the multiple DMA mode.
<> 144:ef7eb2e8f9f7 255 * @retval None
<> 144:ef7eb2e8f9f7 256 */
<> 144:ef7eb2e8f9f7 257 #define __HAL_HASH_RESET_MDMAT() HASH->CR &= (uint32_t)(~HASH_CR_MDMAT)
<> 144:ef7eb2e8f9f7 258
<> 144:ef7eb2e8f9f7 259 /**
<> 144:ef7eb2e8f9f7 260 * @brief Start the digest computation
<> 144:ef7eb2e8f9f7 261 * @retval None
<> 144:ef7eb2e8f9f7 262 */
<> 144:ef7eb2e8f9f7 263 #define __HAL_HASH_START_DIGEST() HASH->STR |= HASH_STR_DCAL
<> 144:ef7eb2e8f9f7 264
<> 144:ef7eb2e8f9f7 265 /**
<> 144:ef7eb2e8f9f7 266 * @brief Set the number of valid bits in last word written in Data register
<> 144:ef7eb2e8f9f7 267 * @param SIZE: size in byte of last data written in Data register.
<> 144:ef7eb2e8f9f7 268 * @retval None
<> 144:ef7eb2e8f9f7 269 */
<> 144:ef7eb2e8f9f7 270 #define __HAL_HASH_SET_NBVALIDBITS(SIZE) do{HASH->STR &= ~(HASH_STR_NBW);\
<> 144:ef7eb2e8f9f7 271 HASH->STR |= 8 * ((SIZE) % 4);\
<> 144:ef7eb2e8f9f7 272 }while(0)
<> 144:ef7eb2e8f9f7 273
<> 144:ef7eb2e8f9f7 274 /**
<> 144:ef7eb2e8f9f7 275 * @}
<> 144:ef7eb2e8f9f7 276 */
<> 144:ef7eb2e8f9f7 277
<> 144:ef7eb2e8f9f7 278 /* Include HASH HAL Extension module */
<> 144:ef7eb2e8f9f7 279 #include "stm32f7xx_hal_hash_ex.h"
<> 144:ef7eb2e8f9f7 280 /* Exported functions --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 281
<> 144:ef7eb2e8f9f7 282 /** @defgroup HASH_Exported_Functions HASH Exported Functions
<> 144:ef7eb2e8f9f7 283 * @{
<> 144:ef7eb2e8f9f7 284 */
<> 144:ef7eb2e8f9f7 285
<> 144:ef7eb2e8f9f7 286 /** @addtogroup HASH_Exported_Functions_Group1
<> 144:ef7eb2e8f9f7 287 * @{
<> 144:ef7eb2e8f9f7 288 */
<> 144:ef7eb2e8f9f7 289 HAL_StatusTypeDef HAL_HASH_Init(HASH_HandleTypeDef *hhash);
<> 144:ef7eb2e8f9f7 290 HAL_StatusTypeDef HAL_HASH_DeInit(HASH_HandleTypeDef *hhash);
<> 144:ef7eb2e8f9f7 291 /**
<> 144:ef7eb2e8f9f7 292 * @}
<> 144:ef7eb2e8f9f7 293 */
<> 144:ef7eb2e8f9f7 294
<> 144:ef7eb2e8f9f7 295 /** @addtogroup HASH_Exported_Functions_Group2
<> 144:ef7eb2e8f9f7 296 * @{
<> 144:ef7eb2e8f9f7 297 */
<> 144:ef7eb2e8f9f7 298 HAL_StatusTypeDef HAL_HASH_SHA1_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer, uint32_t Timeout);
<> 144:ef7eb2e8f9f7 299 HAL_StatusTypeDef HAL_HASH_MD5_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer, uint32_t Timeout);
<> 144:ef7eb2e8f9f7 300 HAL_StatusTypeDef HAL_HASH_MD5_Accumulate(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size);
<> 144:ef7eb2e8f9f7 301 HAL_StatusTypeDef HAL_HASH_SHA1_Accumulate(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size);
<> 144:ef7eb2e8f9f7 302 /**
<> 144:ef7eb2e8f9f7 303 * @}
<> 144:ef7eb2e8f9f7 304 */
<> 144:ef7eb2e8f9f7 305
<> 144:ef7eb2e8f9f7 306 /** @addtogroup HASH_Exported_Functions_Group3
<> 144:ef7eb2e8f9f7 307 * @{
<> 144:ef7eb2e8f9f7 308 */
<> 144:ef7eb2e8f9f7 309 HAL_StatusTypeDef HAL_HMAC_SHA1_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer, uint32_t Timeout);
<> 144:ef7eb2e8f9f7 310 HAL_StatusTypeDef HAL_HMAC_MD5_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer, uint32_t Timeout);
<> 144:ef7eb2e8f9f7 311 /**
<> 144:ef7eb2e8f9f7 312 * @}
<> 144:ef7eb2e8f9f7 313 */
<> 144:ef7eb2e8f9f7 314
<> 144:ef7eb2e8f9f7 315 /** @addtogroup HASH_Exported_Functions_Group4
<> 144:ef7eb2e8f9f7 316 * @{
<> 144:ef7eb2e8f9f7 317 */
<> 144:ef7eb2e8f9f7 318 HAL_StatusTypeDef HAL_HASH_SHA1_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer);
<> 144:ef7eb2e8f9f7 319 HAL_StatusTypeDef HAL_HASH_MD5_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer);
<> 144:ef7eb2e8f9f7 320 /**
<> 144:ef7eb2e8f9f7 321 * @}
<> 144:ef7eb2e8f9f7 322 */
<> 144:ef7eb2e8f9f7 323
<> 144:ef7eb2e8f9f7 324 /** @addtogroup HASH_Exported_Functions_Group5
<> 144:ef7eb2e8f9f7 325 * @{
<> 144:ef7eb2e8f9f7 326 */
<> 144:ef7eb2e8f9f7 327 HAL_StatusTypeDef HAL_HASH_SHA1_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size);
<> 144:ef7eb2e8f9f7 328 HAL_StatusTypeDef HAL_HASH_SHA1_Finish(HASH_HandleTypeDef *hhash, uint8_t* pOutBuffer, uint32_t Timeout);
<> 144:ef7eb2e8f9f7 329 HAL_StatusTypeDef HAL_HASH_MD5_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size);
<> 144:ef7eb2e8f9f7 330 HAL_StatusTypeDef HAL_HASH_MD5_Finish(HASH_HandleTypeDef *hhash, uint8_t* pOutBuffer, uint32_t Timeout);
<> 144:ef7eb2e8f9f7 331 /**
<> 144:ef7eb2e8f9f7 332 * @}
<> 144:ef7eb2e8f9f7 333 */
<> 144:ef7eb2e8f9f7 334
<> 144:ef7eb2e8f9f7 335 /** @addtogroup HASH_Exported_Functions_Group6
<> 144:ef7eb2e8f9f7 336 * @{
<> 144:ef7eb2e8f9f7 337 */
<> 144:ef7eb2e8f9f7 338 HAL_StatusTypeDef HAL_HMAC_SHA1_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size);
<> 144:ef7eb2e8f9f7 339 HAL_StatusTypeDef HAL_HMAC_MD5_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size);
<> 144:ef7eb2e8f9f7 340 /**
<> 144:ef7eb2e8f9f7 341 * @}
<> 144:ef7eb2e8f9f7 342 */
<> 144:ef7eb2e8f9f7 343
<> 144:ef7eb2e8f9f7 344 /** @addtogroup HASH_Exported_Functions_Group7
<> 144:ef7eb2e8f9f7 345 * @{
<> 144:ef7eb2e8f9f7 346 */
<> 144:ef7eb2e8f9f7 347 void HAL_HASH_IRQHandler(HASH_HandleTypeDef *hhash);
<> 144:ef7eb2e8f9f7 348 /**
<> 144:ef7eb2e8f9f7 349 * @}
<> 144:ef7eb2e8f9f7 350 */
<> 144:ef7eb2e8f9f7 351
<> 144:ef7eb2e8f9f7 352 /** @addtogroup HASH_Exported_Functions_Group8
<> 144:ef7eb2e8f9f7 353 * @{
<> 144:ef7eb2e8f9f7 354 */
<> 144:ef7eb2e8f9f7 355 HAL_HASH_StateTypeDef HAL_HASH_GetState(HASH_HandleTypeDef *hhash);
<> 144:ef7eb2e8f9f7 356 void HAL_HASH_MspInit(HASH_HandleTypeDef *hhash);
<> 144:ef7eb2e8f9f7 357 void HAL_HASH_MspDeInit(HASH_HandleTypeDef *hhash);
<> 144:ef7eb2e8f9f7 358 void HAL_HASH_InCpltCallback(HASH_HandleTypeDef *hhash);
<> 144:ef7eb2e8f9f7 359 void HAL_HASH_DgstCpltCallback(HASH_HandleTypeDef *hhash);
<> 144:ef7eb2e8f9f7 360 void HAL_HASH_ErrorCallback(HASH_HandleTypeDef *hhash);
<> 144:ef7eb2e8f9f7 361 /**
<> 144:ef7eb2e8f9f7 362 * @}
<> 144:ef7eb2e8f9f7 363 */
<> 144:ef7eb2e8f9f7 364
<> 144:ef7eb2e8f9f7 365 /**
<> 144:ef7eb2e8f9f7 366 * @}
<> 144:ef7eb2e8f9f7 367 */
<> 144:ef7eb2e8f9f7 368
<> 144:ef7eb2e8f9f7 369 /* Private types -------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 370 /** @defgroup HASH_Private_Types HASH Private Types
<> 144:ef7eb2e8f9f7 371 * @{
<> 144:ef7eb2e8f9f7 372 */
<> 144:ef7eb2e8f9f7 373
<> 144:ef7eb2e8f9f7 374 /**
<> 144:ef7eb2e8f9f7 375 * @}
<> 144:ef7eb2e8f9f7 376 */
<> 144:ef7eb2e8f9f7 377
<> 144:ef7eb2e8f9f7 378 /* Private variables ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 379 /** @defgroup HASH_Private_Variables HASH Private Variables
<> 144:ef7eb2e8f9f7 380 * @{
<> 144:ef7eb2e8f9f7 381 */
<> 144:ef7eb2e8f9f7 382
<> 144:ef7eb2e8f9f7 383 /**
<> 144:ef7eb2e8f9f7 384 * @}
<> 144:ef7eb2e8f9f7 385 */
<> 144:ef7eb2e8f9f7 386
<> 144:ef7eb2e8f9f7 387 /* Private constants ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 388 /** @defgroup HASH_Private_Constants HASH Private Constants
<> 144:ef7eb2e8f9f7 389 * @{
<> 144:ef7eb2e8f9f7 390 */
<> 144:ef7eb2e8f9f7 391
<> 144:ef7eb2e8f9f7 392 /**
<> 144:ef7eb2e8f9f7 393 * @}
<> 144:ef7eb2e8f9f7 394 */
<> 144:ef7eb2e8f9f7 395
<> 144:ef7eb2e8f9f7 396 /* Private macros ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 397 /** @defgroup HASH_Private_Macros HASH Private Macros
<> 144:ef7eb2e8f9f7 398 * @{
<> 144:ef7eb2e8f9f7 399 */
<> 144:ef7eb2e8f9f7 400 #define IS_HASH_ALGOSELECTION(__ALGOSELECTION__) (((__ALGOSELECTION__) == HASH_ALGOSELECTION_SHA1) || \
<> 144:ef7eb2e8f9f7 401 ((__ALGOSELECTION__) == HASH_ALGOSELECTION_SHA224) || \
<> 144:ef7eb2e8f9f7 402 ((__ALGOSELECTION__) == HASH_ALGOSELECTION_SHA256) || \
<> 144:ef7eb2e8f9f7 403 ((__ALGOSELECTION__) == HASH_ALGOSELECTION_MD5))
<> 144:ef7eb2e8f9f7 404
<> 144:ef7eb2e8f9f7 405
<> 144:ef7eb2e8f9f7 406 #define IS_HASH_ALGOMODE(__ALGOMODE__) (((__ALGOMODE__) == HASH_ALGOMODE_HASH) || \
<> 144:ef7eb2e8f9f7 407 ((__ALGOMODE__) == HASH_ALGOMODE_HMAC))
<> 144:ef7eb2e8f9f7 408
<> 144:ef7eb2e8f9f7 409
<> 144:ef7eb2e8f9f7 410 #define IS_HASH_DATATYPE(__DATATYPE__) (((__DATATYPE__) == HASH_DATATYPE_32B)|| \
<> 144:ef7eb2e8f9f7 411 ((__DATATYPE__) == HASH_DATATYPE_16B)|| \
<> 144:ef7eb2e8f9f7 412 ((__DATATYPE__) == HASH_DATATYPE_8B) || \
<> 144:ef7eb2e8f9f7 413 ((__DATATYPE__) == HASH_DATATYPE_1B))
<> 144:ef7eb2e8f9f7 414
<> 144:ef7eb2e8f9f7 415
<> 144:ef7eb2e8f9f7 416 #define IS_HASH_HMAC_KEYTYPE(__KEYTYPE__) (((__KEYTYPE__) == HASH_HMAC_KEYTYPE_SHORTKEY) || \
<> 144:ef7eb2e8f9f7 417 ((__KEYTYPE__) == HASH_HMAC_KEYTYPE_LONGKEY))
<> 144:ef7eb2e8f9f7 418
<> 144:ef7eb2e8f9f7 419 #define IS_HASH_SHA1_BUFFER_SIZE(__SIZE__) ((((__SIZE__)%4) != 0)? 0U: 1U)
<> 144:ef7eb2e8f9f7 420
<> 144:ef7eb2e8f9f7 421
<> 144:ef7eb2e8f9f7 422 /**
<> 144:ef7eb2e8f9f7 423 * @}
<> 144:ef7eb2e8f9f7 424 */
<> 144:ef7eb2e8f9f7 425
<> 144:ef7eb2e8f9f7 426 /* Private functions ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 427 /** @defgroup HASH_Private_Functions HASH Private Functions
<> 144:ef7eb2e8f9f7 428 * @{
<> 144:ef7eb2e8f9f7 429 */
<> 144:ef7eb2e8f9f7 430
<> 144:ef7eb2e8f9f7 431 /**
<> 144:ef7eb2e8f9f7 432 * @}
<> 144:ef7eb2e8f9f7 433 */
<> 144:ef7eb2e8f9f7 434
<> 144:ef7eb2e8f9f7 435 /**
<> 144:ef7eb2e8f9f7 436 * @}
<> 144:ef7eb2e8f9f7 437 */
<> 144:ef7eb2e8f9f7 438 #endif /* STM32F756xx || STM32F777xx || STM32F779xx */
<> 144:ef7eb2e8f9f7 439 /**
<> 144:ef7eb2e8f9f7 440 * @}
<> 144:ef7eb2e8f9f7 441 */
<> 144:ef7eb2e8f9f7 442
<> 144:ef7eb2e8f9f7 443 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 444 }
<> 144:ef7eb2e8f9f7 445 #endif
<> 144:ef7eb2e8f9f7 446
<> 144:ef7eb2e8f9f7 447
<> 144:ef7eb2e8f9f7 448 #endif /* __STM32F7xx_HAL_HASH_H */
<> 144:ef7eb2e8f9f7 449
<> 144:ef7eb2e8f9f7 450 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/