added prescaler for 16 bit pwm in LPC1347 target

Fork of mbed-dev by mbed official

Committer:
<>
Date:
Fri Sep 02 15:07:44 2016 +0100
Revision:
144:ef7eb2e8f9f7
Parent:
83:a036322b8637
This updates the lib to the mbed lib v125

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file stm32f7xx_hal_dcmi.c
<> 144:ef7eb2e8f9f7 4 * @author MCD Application Team
<> 144:ef7eb2e8f9f7 5 * @version V1.1.0
<> 144:ef7eb2e8f9f7 6 * @date 22-April-2016
<> 144:ef7eb2e8f9f7 7 * @brief DCMI HAL module driver
<> 144:ef7eb2e8f9f7 8 * This file provides firmware functions to manage the following
<> 144:ef7eb2e8f9f7 9 * functionalities of the Digital Camera Interface (DCMI) peripheral:
<> 144:ef7eb2e8f9f7 10 * + Initialization and de-initialization functions
<> 144:ef7eb2e8f9f7 11 * + IO operation functions
<> 144:ef7eb2e8f9f7 12 * + Peripheral Control functions
<> 144:ef7eb2e8f9f7 13 * + Peripheral State and Error functions
<> 144:ef7eb2e8f9f7 14 *
<> 144:ef7eb2e8f9f7 15 @verbatim
<> 144:ef7eb2e8f9f7 16 ==============================================================================
<> 144:ef7eb2e8f9f7 17 ##### How to use this driver #####
<> 144:ef7eb2e8f9f7 18 ==============================================================================
<> 144:ef7eb2e8f9f7 19 [..]
<> 144:ef7eb2e8f9f7 20 The sequence below describes how to use this driver to capture image
<> 144:ef7eb2e8f9f7 21 from a camera module connected to the DCMI Interface.
<> 144:ef7eb2e8f9f7 22 This sequence does not take into account the configuration of the
<> 144:ef7eb2e8f9f7 23 camera module, which should be made before to configure and enable
<> 144:ef7eb2e8f9f7 24 the DCMI to capture images.
<> 144:ef7eb2e8f9f7 25
<> 144:ef7eb2e8f9f7 26 (#) Program the required configuration through following parameters:
<> 144:ef7eb2e8f9f7 27 horizontal and vertical polarity, pixel clock polarity, Capture Rate,
<> 144:ef7eb2e8f9f7 28 Synchronization Mode, code of the frame delimiter and data width
<> 144:ef7eb2e8f9f7 29 using HAL_DCMI_Init() function.
<> 144:ef7eb2e8f9f7 30
<> 144:ef7eb2e8f9f7 31 (#) Configure the DMA2_Stream1 channel1 to transfer Data from DCMI DR
<> 144:ef7eb2e8f9f7 32 register to the destination memory buffer.
<> 144:ef7eb2e8f9f7 33
<> 144:ef7eb2e8f9f7 34 (#) Program the required configuration through following parameters:
<> 144:ef7eb2e8f9f7 35 DCMI mode, destination memory Buffer address and the data length
<> 144:ef7eb2e8f9f7 36 and enable capture using HAL_DCMI_Start_DMA() function.
<> 144:ef7eb2e8f9f7 37
<> 144:ef7eb2e8f9f7 38 (#) Optionally, configure and Enable the CROP feature to select a rectangular
<> 144:ef7eb2e8f9f7 39 window from the received image using HAL_DCMI_ConfigCrop()
<> 144:ef7eb2e8f9f7 40 and HAL_DCMI_EnableCROP() functions
<> 144:ef7eb2e8f9f7 41
<> 144:ef7eb2e8f9f7 42 (#) The capture can be stopped using HAL_DCMI_Stop() function.
<> 144:ef7eb2e8f9f7 43
<> 144:ef7eb2e8f9f7 44 (#) To control DCMI state you can use the function HAL_DCMI_GetState().
<> 144:ef7eb2e8f9f7 45
<> 144:ef7eb2e8f9f7 46 *** DCMI HAL driver macros list ***
<> 144:ef7eb2e8f9f7 47 =============================================
<> 144:ef7eb2e8f9f7 48 [..]
<> 144:ef7eb2e8f9f7 49 Below the list of most used macros in DCMI HAL driver.
<> 144:ef7eb2e8f9f7 50
<> 144:ef7eb2e8f9f7 51 (+) __HAL_DCMI_ENABLE: Enable the DCMI peripheral.
<> 144:ef7eb2e8f9f7 52 (+) __HAL_DCMI_DISABLE: Disable the DCMI peripheral.
<> 144:ef7eb2e8f9f7 53 (+) __HAL_DCMI_GET_FLAG: Get the DCMI pending flags.
<> 144:ef7eb2e8f9f7 54 (+) __HAL_DCMI_CLEAR_FLAG: Clear the DCMI pending flags.
<> 144:ef7eb2e8f9f7 55 (+) __HAL_DCMI_ENABLE_IT: Enable the specified DCMI interrupts.
<> 144:ef7eb2e8f9f7 56 (+) __HAL_DCMI_DISABLE_IT: Disable the specified DCMI interrupts.
<> 144:ef7eb2e8f9f7 57 (+) __HAL_DCMI_GET_IT_SOURCE: Check whether the specified DCMI interrupt has occurred or not.
<> 144:ef7eb2e8f9f7 58
<> 144:ef7eb2e8f9f7 59 [..]
<> 144:ef7eb2e8f9f7 60 (@) You can refer to the DCMI HAL driver header file for more useful macros
<> 144:ef7eb2e8f9f7 61
<> 144:ef7eb2e8f9f7 62 @endverbatim
<> 144:ef7eb2e8f9f7 63 ******************************************************************************
<> 144:ef7eb2e8f9f7 64 * @attention
<> 144:ef7eb2e8f9f7 65 *
<> 144:ef7eb2e8f9f7 66 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 144:ef7eb2e8f9f7 67 *
<> 144:ef7eb2e8f9f7 68 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 69 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 70 * 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 71 * this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 72 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 73 * this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 74 * and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 75 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 76 * may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 77 * without specific prior written permission.
<> 144:ef7eb2e8f9f7 78 *
<> 144:ef7eb2e8f9f7 79 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 80 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 81 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 82 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 83 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 84 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 85 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 86 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 87 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 88 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 89 *
<> 144:ef7eb2e8f9f7 90 ******************************************************************************
<> 144:ef7eb2e8f9f7 91 */
<> 144:ef7eb2e8f9f7 92
<> 144:ef7eb2e8f9f7 93 /* Includes ------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 94 #include "stm32f7xx_hal.h"
<> 144:ef7eb2e8f9f7 95
<> 144:ef7eb2e8f9f7 96 /** @addtogroup STM32F7xx_HAL_Driver
<> 144:ef7eb2e8f9f7 97 * @{
<> 144:ef7eb2e8f9f7 98 */
<> 144:ef7eb2e8f9f7 99 /** @defgroup DCMI DCMI
<> 144:ef7eb2e8f9f7 100 * @brief DCMI HAL module driver
<> 144:ef7eb2e8f9f7 101 * @{
<> 144:ef7eb2e8f9f7 102 */
<> 144:ef7eb2e8f9f7 103
<> 144:ef7eb2e8f9f7 104 #ifdef HAL_DCMI_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 105
<> 144:ef7eb2e8f9f7 106 /* Private typedef -----------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 107 /* Private define ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 108 #define HAL_TIMEOUT_DCMI_STOP ((uint32_t)1000) /* Set timeout to 1s */
<> 144:ef7eb2e8f9f7 109
<> 144:ef7eb2e8f9f7 110 #define DCMI_POSITION_CWSIZE_VLINE (uint32_t)POSITION_VAL(DCMI_CWSIZE_VLINE) /*!< Required left shift to set crop window vertical line count */
<> 144:ef7eb2e8f9f7 111 #define DCMI_POSITION_CWSTRT_VST (uint32_t)POSITION_VAL(DCMI_CWSTRT_VST) /*!< Required left shift to set crop window vertical start line count */
<> 144:ef7eb2e8f9f7 112
<> 144:ef7eb2e8f9f7 113 #define DCMI_POSITION_ESCR_LSC (uint32_t)POSITION_VAL(DCMI_ESCR_LSC) /*!< Required left shift to set line start delimiter */
<> 144:ef7eb2e8f9f7 114 #define DCMI_POSITION_ESCR_LEC (uint32_t)POSITION_VAL(DCMI_ESCR_LEC) /*!< Required left shift to set line end delimiter */
<> 144:ef7eb2e8f9f7 115 #define DCMI_POSITION_ESCR_FEC (uint32_t)POSITION_VAL(DCMI_ESCR_FEC) /*!< Required left shift to set frame end delimiter */
<> 144:ef7eb2e8f9f7 116
<> 144:ef7eb2e8f9f7 117 /* Private macro -------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 118 /* Private variables ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 119 /* Private function prototypes -----------------------------------------------*/
<> 144:ef7eb2e8f9f7 120 static void DCMI_DMAXferCplt(DMA_HandleTypeDef *hdma);
<> 144:ef7eb2e8f9f7 121 static void DCMI_DMAError(DMA_HandleTypeDef *hdma);
<> 144:ef7eb2e8f9f7 122
<> 144:ef7eb2e8f9f7 123 /* Exported functions --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 124
<> 144:ef7eb2e8f9f7 125 /** @defgroup DCMI_Exported_Functions DCMI Exported Functions
<> 144:ef7eb2e8f9f7 126 * @{
<> 144:ef7eb2e8f9f7 127 */
<> 144:ef7eb2e8f9f7 128
<> 144:ef7eb2e8f9f7 129 /** @defgroup DCMI_Exported_Functions_Group1 Initialization and Configuration functions
<> 144:ef7eb2e8f9f7 130 * @brief Initialization and Configuration functions
<> 144:ef7eb2e8f9f7 131 *
<> 144:ef7eb2e8f9f7 132 @verbatim
<> 144:ef7eb2e8f9f7 133 ===============================================================================
<> 144:ef7eb2e8f9f7 134 ##### Initialization and Configuration functions #####
<> 144:ef7eb2e8f9f7 135 ===============================================================================
<> 144:ef7eb2e8f9f7 136 [..] This section provides functions allowing to:
<> 144:ef7eb2e8f9f7 137 (+) Initialize and configure the DCMI
<> 144:ef7eb2e8f9f7 138 (+) De-initialize the DCMI
<> 144:ef7eb2e8f9f7 139
<> 144:ef7eb2e8f9f7 140 @endverbatim
<> 144:ef7eb2e8f9f7 141 * @{
<> 144:ef7eb2e8f9f7 142 */
<> 144:ef7eb2e8f9f7 143
<> 144:ef7eb2e8f9f7 144 /**
<> 144:ef7eb2e8f9f7 145 * @brief Initializes the DCMI according to the specified
<> 144:ef7eb2e8f9f7 146 * parameters in the DCMI_InitTypeDef and create the associated handle.
<> 144:ef7eb2e8f9f7 147 * @param hdcmi: pointer to a DCMI_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 148 * the configuration information for DCMI.
<> 144:ef7eb2e8f9f7 149 * @retval HAL status
<> 144:ef7eb2e8f9f7 150 */
<> 144:ef7eb2e8f9f7 151 HAL_StatusTypeDef HAL_DCMI_Init(DCMI_HandleTypeDef *hdcmi)
<> 144:ef7eb2e8f9f7 152 {
<> 144:ef7eb2e8f9f7 153 /* Check the DCMI peripheral state */
<> 144:ef7eb2e8f9f7 154 if(hdcmi == NULL)
<> 144:ef7eb2e8f9f7 155 {
<> 144:ef7eb2e8f9f7 156 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 157 }
<> 144:ef7eb2e8f9f7 158
<> 144:ef7eb2e8f9f7 159 /* Check function parameters */
<> 144:ef7eb2e8f9f7 160 assert_param(IS_DCMI_ALL_INSTANCE(hdcmi->Instance));
<> 144:ef7eb2e8f9f7 161 assert_param(IS_DCMI_PCKPOLARITY(hdcmi->Init.PCKPolarity));
<> 144:ef7eb2e8f9f7 162 assert_param(IS_DCMI_VSPOLARITY(hdcmi->Init.VSPolarity));
<> 144:ef7eb2e8f9f7 163 assert_param(IS_DCMI_HSPOLARITY(hdcmi->Init.HSPolarity));
<> 144:ef7eb2e8f9f7 164 assert_param(IS_DCMI_SYNCHRO(hdcmi->Init.SynchroMode));
<> 144:ef7eb2e8f9f7 165 assert_param(IS_DCMI_CAPTURE_RATE(hdcmi->Init.CaptureRate));
<> 144:ef7eb2e8f9f7 166 assert_param(IS_DCMI_EXTENDED_DATA(hdcmi->Init.ExtendedDataMode));
<> 144:ef7eb2e8f9f7 167 assert_param(IS_DCMI_MODE_JPEG(hdcmi->Init.JPEGMode));
<> 144:ef7eb2e8f9f7 168
<> 144:ef7eb2e8f9f7 169 assert_param(IS_DCMI_BYTE_SELECT_MODE(hdcmi->Init.ByteSelectMode));
<> 144:ef7eb2e8f9f7 170 assert_param(IS_DCMI_BYTE_SELECT_START(hdcmi->Init.ByteSelectStart));
<> 144:ef7eb2e8f9f7 171 assert_param(IS_DCMI_LINE_SELECT_MODE(hdcmi->Init.LineSelectMode));
<> 144:ef7eb2e8f9f7 172 assert_param(IS_DCMI_LINE_SELECT_START(hdcmi->Init.LineSelectStart));
<> 144:ef7eb2e8f9f7 173
<> 144:ef7eb2e8f9f7 174 if(hdcmi->State == HAL_DCMI_STATE_RESET)
<> 144:ef7eb2e8f9f7 175 {
<> 144:ef7eb2e8f9f7 176 /* Init the low level hardware */
<> 144:ef7eb2e8f9f7 177 HAL_DCMI_MspInit(hdcmi);
<> 144:ef7eb2e8f9f7 178 }
<> 144:ef7eb2e8f9f7 179
<> 144:ef7eb2e8f9f7 180 /* Change the DCMI state */
<> 144:ef7eb2e8f9f7 181 hdcmi->State = HAL_DCMI_STATE_BUSY;
<> 144:ef7eb2e8f9f7 182 /* Configures the HS, VS, DE and PC polarity */
<> 144:ef7eb2e8f9f7 183 hdcmi->Instance->CR &= ~(DCMI_CR_PCKPOL | DCMI_CR_HSPOL | DCMI_CR_VSPOL | DCMI_CR_EDM_0 |\
<> 144:ef7eb2e8f9f7 184 DCMI_CR_EDM_1 | DCMI_CR_FCRC_0 | DCMI_CR_FCRC_1 | DCMI_CR_JPEG |\
<> 144:ef7eb2e8f9f7 185 DCMI_CR_ESS | DCMI_CR_BSM_0 | DCMI_CR_BSM_1 | DCMI_CR_OEBS |\
<> 144:ef7eb2e8f9f7 186 DCMI_CR_LSM | DCMI_CR_OELS);
<> 144:ef7eb2e8f9f7 187
<> 144:ef7eb2e8f9f7 188 hdcmi->Instance->CR |= (uint32_t)(hdcmi->Init.SynchroMode | hdcmi->Init.CaptureRate |\
<> 144:ef7eb2e8f9f7 189 hdcmi->Init.VSPolarity | hdcmi->Init.HSPolarity |\
<> 144:ef7eb2e8f9f7 190 hdcmi->Init.PCKPolarity | hdcmi->Init.ExtendedDataMode |\
<> 144:ef7eb2e8f9f7 191 hdcmi->Init.JPEGMode | hdcmi->Init.ByteSelectMode |\
<> 144:ef7eb2e8f9f7 192 hdcmi->Init.ByteSelectStart | hdcmi->Init.LineSelectMode |\
<> 144:ef7eb2e8f9f7 193 hdcmi->Init.LineSelectStart);
<> 144:ef7eb2e8f9f7 194
<> 144:ef7eb2e8f9f7 195 if(hdcmi->Init.SynchroMode == DCMI_SYNCHRO_EMBEDDED)
<> 144:ef7eb2e8f9f7 196 {
<> 144:ef7eb2e8f9f7 197 hdcmi->Instance->ESCR = (((uint32_t)hdcmi->Init.SyncroCode.FrameStartCode) |\
<> 144:ef7eb2e8f9f7 198 ((uint32_t)hdcmi->Init.SyncroCode.LineStartCode << DCMI_POSITION_ESCR_LSC)|\
<> 144:ef7eb2e8f9f7 199 ((uint32_t)hdcmi->Init.SyncroCode.LineEndCode << DCMI_POSITION_ESCR_LEC) |\
<> 144:ef7eb2e8f9f7 200 ((uint32_t)hdcmi->Init.SyncroCode.FrameEndCode << DCMI_POSITION_ESCR_FEC));
<> 144:ef7eb2e8f9f7 201
<> 144:ef7eb2e8f9f7 202 }
<> 144:ef7eb2e8f9f7 203
<> 144:ef7eb2e8f9f7 204 /* Enable the Line, Vsync, Error and Overrun interrupts */
<> 144:ef7eb2e8f9f7 205 __HAL_DCMI_ENABLE_IT(hdcmi, DCMI_IT_LINE | DCMI_IT_VSYNC | DCMI_IT_ERR | DCMI_IT_OVR);
<> 144:ef7eb2e8f9f7 206
<> 144:ef7eb2e8f9f7 207 /* Update error code */
<> 144:ef7eb2e8f9f7 208 hdcmi->ErrorCode = HAL_DCMI_ERROR_NONE;
<> 144:ef7eb2e8f9f7 209
<> 144:ef7eb2e8f9f7 210 /* Initialize the DCMI state*/
<> 144:ef7eb2e8f9f7 211 hdcmi->State = HAL_DCMI_STATE_READY;
<> 144:ef7eb2e8f9f7 212
<> 144:ef7eb2e8f9f7 213 return HAL_OK;
<> 144:ef7eb2e8f9f7 214 }
<> 144:ef7eb2e8f9f7 215
<> 144:ef7eb2e8f9f7 216 /**
<> 144:ef7eb2e8f9f7 217 * @brief Deinitializes the DCMI peripheral registers to their default reset
<> 144:ef7eb2e8f9f7 218 * values.
<> 144:ef7eb2e8f9f7 219 * @param hdcmi: pointer to a DCMI_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 220 * the configuration information for DCMI.
<> 144:ef7eb2e8f9f7 221 * @retval HAL status
<> 144:ef7eb2e8f9f7 222 */
<> 144:ef7eb2e8f9f7 223
<> 144:ef7eb2e8f9f7 224 HAL_StatusTypeDef HAL_DCMI_DeInit(DCMI_HandleTypeDef *hdcmi)
<> 144:ef7eb2e8f9f7 225 {
<> 144:ef7eb2e8f9f7 226 /* DeInit the low level hardware */
<> 144:ef7eb2e8f9f7 227 HAL_DCMI_MspDeInit(hdcmi);
<> 144:ef7eb2e8f9f7 228
<> 144:ef7eb2e8f9f7 229 /* Update error code */
<> 144:ef7eb2e8f9f7 230 hdcmi->ErrorCode = HAL_DCMI_ERROR_NONE;
<> 144:ef7eb2e8f9f7 231
<> 144:ef7eb2e8f9f7 232 /* Initialize the DCMI state*/
<> 144:ef7eb2e8f9f7 233 hdcmi->State = HAL_DCMI_STATE_RESET;
<> 144:ef7eb2e8f9f7 234
<> 144:ef7eb2e8f9f7 235 /* Release Lock */
<> 144:ef7eb2e8f9f7 236 __HAL_UNLOCK(hdcmi);
<> 144:ef7eb2e8f9f7 237
<> 144:ef7eb2e8f9f7 238 return HAL_OK;
<> 144:ef7eb2e8f9f7 239 }
<> 144:ef7eb2e8f9f7 240
<> 144:ef7eb2e8f9f7 241 /**
<> 144:ef7eb2e8f9f7 242 * @brief Initializes the DCMI MSP.
<> 144:ef7eb2e8f9f7 243 * @param hdcmi: pointer to a DCMI_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 244 * the configuration information for DCMI.
<> 144:ef7eb2e8f9f7 245 * @retval None
<> 144:ef7eb2e8f9f7 246 */
<> 144:ef7eb2e8f9f7 247 __weak void HAL_DCMI_MspInit(DCMI_HandleTypeDef* hdcmi)
<> 144:ef7eb2e8f9f7 248 {
<> 144:ef7eb2e8f9f7 249 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 250 UNUSED(hdcmi);
<> 144:ef7eb2e8f9f7 251
<> 144:ef7eb2e8f9f7 252 /* NOTE : This function Should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 253 the HAL_DCMI_MspInit could be implemented in the user file
<> 144:ef7eb2e8f9f7 254 */
<> 144:ef7eb2e8f9f7 255 }
<> 144:ef7eb2e8f9f7 256
<> 144:ef7eb2e8f9f7 257 /**
<> 144:ef7eb2e8f9f7 258 * @brief DeInitializes the DCMI MSP.
<> 144:ef7eb2e8f9f7 259 * @param hdcmi: pointer to a DCMI_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 260 * the configuration information for DCMI.
<> 144:ef7eb2e8f9f7 261 * @retval None
<> 144:ef7eb2e8f9f7 262 */
<> 144:ef7eb2e8f9f7 263 __weak void HAL_DCMI_MspDeInit(DCMI_HandleTypeDef* hdcmi)
<> 144:ef7eb2e8f9f7 264 {
<> 144:ef7eb2e8f9f7 265 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 266 UNUSED(hdcmi);
<> 144:ef7eb2e8f9f7 267
<> 144:ef7eb2e8f9f7 268 /* NOTE : This function Should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 269 the HAL_DCMI_MspDeInit could be implemented in the user file
<> 144:ef7eb2e8f9f7 270 */
<> 144:ef7eb2e8f9f7 271 }
<> 144:ef7eb2e8f9f7 272
<> 144:ef7eb2e8f9f7 273 /**
<> 144:ef7eb2e8f9f7 274 * @}
<> 144:ef7eb2e8f9f7 275 */
<> 144:ef7eb2e8f9f7 276 /** @defgroup DCMI_Exported_Functions_Group2 IO operation functions
<> 144:ef7eb2e8f9f7 277 * @brief IO operation functions
<> 144:ef7eb2e8f9f7 278 *
<> 144:ef7eb2e8f9f7 279 @verbatim
<> 144:ef7eb2e8f9f7 280 ===============================================================================
<> 144:ef7eb2e8f9f7 281 ##### IO operation functions #####
<> 144:ef7eb2e8f9f7 282 ===============================================================================
<> 144:ef7eb2e8f9f7 283 [..] This section provides functions allowing to:
<> 144:ef7eb2e8f9f7 284 (+) Configure destination address and data length and
<> 144:ef7eb2e8f9f7 285 Enables DCMI DMA request and enables DCMI capture
<> 144:ef7eb2e8f9f7 286 (+) Stop the DCMI capture.
<> 144:ef7eb2e8f9f7 287 (+) Handles DCMI interrupt request.
<> 144:ef7eb2e8f9f7 288
<> 144:ef7eb2e8f9f7 289 @endverbatim
<> 144:ef7eb2e8f9f7 290 * @{
<> 144:ef7eb2e8f9f7 291 */
<> 144:ef7eb2e8f9f7 292
<> 144:ef7eb2e8f9f7 293 /**
<> 144:ef7eb2e8f9f7 294 * @brief Enables DCMI DMA request and enables DCMI capture
<> 144:ef7eb2e8f9f7 295 * @param hdcmi: pointer to a DCMI_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 296 * the configuration information for DCMI.
<> 144:ef7eb2e8f9f7 297 * @param DCMI_Mode: DCMI capture mode snapshot or continuous grab.
<> 144:ef7eb2e8f9f7 298 * @param pData: The destination memory Buffer address (LCD Frame buffer).
<> 144:ef7eb2e8f9f7 299 * @param Length: The length of capture to be transferred.
<> 144:ef7eb2e8f9f7 300 * @retval HAL status
<> 144:ef7eb2e8f9f7 301 */
<> 144:ef7eb2e8f9f7 302 HAL_StatusTypeDef HAL_DCMI_Start_DMA(DCMI_HandleTypeDef* hdcmi, uint32_t DCMI_Mode, uint32_t pData, uint32_t Length)
<> 144:ef7eb2e8f9f7 303 {
<> 144:ef7eb2e8f9f7 304 /* Initialize the second memory address */
<> 144:ef7eb2e8f9f7 305 uint32_t SecondMemAddress = 0;
<> 144:ef7eb2e8f9f7 306
<> 144:ef7eb2e8f9f7 307 /* Check function parameters */
<> 144:ef7eb2e8f9f7 308 assert_param(IS_DCMI_CAPTURE_MODE(DCMI_Mode));
<> 144:ef7eb2e8f9f7 309
<> 144:ef7eb2e8f9f7 310 /* Process Locked */
<> 144:ef7eb2e8f9f7 311 __HAL_LOCK(hdcmi);
<> 144:ef7eb2e8f9f7 312
<> 144:ef7eb2e8f9f7 313 /* Lock the DCMI peripheral state */
<> 144:ef7eb2e8f9f7 314 hdcmi->State = HAL_DCMI_STATE_BUSY;
<> 144:ef7eb2e8f9f7 315
<> 144:ef7eb2e8f9f7 316 /* Enable DCMI by setting DCMIEN bit */
<> 144:ef7eb2e8f9f7 317 __HAL_DCMI_ENABLE(hdcmi);
<> 144:ef7eb2e8f9f7 318
<> 144:ef7eb2e8f9f7 319 /* Configure the DCMI Mode */
<> 144:ef7eb2e8f9f7 320 hdcmi->Instance->CR &= ~(DCMI_CR_CM);
<> 144:ef7eb2e8f9f7 321 hdcmi->Instance->CR |= (uint32_t)(DCMI_Mode);
<> 144:ef7eb2e8f9f7 322
<> 144:ef7eb2e8f9f7 323 /* Set the DMA memory0 conversion complete callback */
<> 144:ef7eb2e8f9f7 324 hdcmi->DMA_Handle->XferCpltCallback = DCMI_DMAXferCplt;
<> 144:ef7eb2e8f9f7 325
<> 144:ef7eb2e8f9f7 326 /* Set the DMA error callback */
<> 144:ef7eb2e8f9f7 327 hdcmi->DMA_Handle->XferErrorCallback = DCMI_DMAError;
<> 144:ef7eb2e8f9f7 328
<> 144:ef7eb2e8f9f7 329 /* Set the dma abort callback */
<> 144:ef7eb2e8f9f7 330 hdcmi->DMA_Handle->XferAbortCallback = NULL;
<> 144:ef7eb2e8f9f7 331
<> 144:ef7eb2e8f9f7 332 /* Reset transfer counters value */
<> 144:ef7eb2e8f9f7 333 hdcmi->XferCount = 0;
<> 144:ef7eb2e8f9f7 334 hdcmi->XferTransferNumber = 0;
<> 144:ef7eb2e8f9f7 335
<> 144:ef7eb2e8f9f7 336 if(Length <= 0xFFFF)
<> 144:ef7eb2e8f9f7 337 {
<> 144:ef7eb2e8f9f7 338 /* Enable the DMA Stream */
<> 144:ef7eb2e8f9f7 339 HAL_DMA_Start_IT(hdcmi->DMA_Handle, (uint32_t)&hdcmi->Instance->DR, (uint32_t)pData, Length);
<> 144:ef7eb2e8f9f7 340 }
<> 144:ef7eb2e8f9f7 341 else /* DCMI_DOUBLE_BUFFER Mode */
<> 144:ef7eb2e8f9f7 342 {
<> 144:ef7eb2e8f9f7 343 /* Set the DMA memory1 conversion complete callback */
<> 144:ef7eb2e8f9f7 344 hdcmi->DMA_Handle->XferM1CpltCallback = DCMI_DMAXferCplt;
<> 144:ef7eb2e8f9f7 345
<> 144:ef7eb2e8f9f7 346 /* Initialize transfer parameters */
<> 144:ef7eb2e8f9f7 347 hdcmi->XferCount = 1;
<> 144:ef7eb2e8f9f7 348 hdcmi->XferSize = Length;
<> 144:ef7eb2e8f9f7 349 hdcmi->pBuffPtr = pData;
<> 144:ef7eb2e8f9f7 350
<> 144:ef7eb2e8f9f7 351 /* Get the number of buffer */
<> 144:ef7eb2e8f9f7 352 while(hdcmi->XferSize > 0xFFFF)
<> 144:ef7eb2e8f9f7 353 {
<> 144:ef7eb2e8f9f7 354 hdcmi->XferSize = (hdcmi->XferSize/2);
<> 144:ef7eb2e8f9f7 355 hdcmi->XferCount = hdcmi->XferCount*2;
<> 144:ef7eb2e8f9f7 356 }
<> 144:ef7eb2e8f9f7 357
<> 144:ef7eb2e8f9f7 358 /* Update DCMI counter and transfer number*/
<> 144:ef7eb2e8f9f7 359 hdcmi->XferCount = (hdcmi->XferCount - 2);
<> 144:ef7eb2e8f9f7 360 hdcmi->XferTransferNumber = hdcmi->XferCount;
<> 144:ef7eb2e8f9f7 361
<> 144:ef7eb2e8f9f7 362 /* Update second memory address */
<> 144:ef7eb2e8f9f7 363 SecondMemAddress = (uint32_t)(pData + (4*hdcmi->XferSize));
<> 144:ef7eb2e8f9f7 364
<> 144:ef7eb2e8f9f7 365 /* Start DMA multi buffer transfer */
<> 144:ef7eb2e8f9f7 366 HAL_DMAEx_MultiBufferStart_IT(hdcmi->DMA_Handle, (uint32_t)&hdcmi->Instance->DR, (uint32_t)pData, SecondMemAddress, hdcmi->XferSize);
<> 144:ef7eb2e8f9f7 367 }
<> 144:ef7eb2e8f9f7 368
<> 144:ef7eb2e8f9f7 369 /* Enable Capture */
<> 144:ef7eb2e8f9f7 370 hdcmi->Instance->CR |= DCMI_CR_CAPTURE;
<> 144:ef7eb2e8f9f7 371
<> 144:ef7eb2e8f9f7 372 /* Release Lock */
<> 144:ef7eb2e8f9f7 373 __HAL_UNLOCK(hdcmi);
<> 144:ef7eb2e8f9f7 374
<> 144:ef7eb2e8f9f7 375 /* Return function status */
<> 144:ef7eb2e8f9f7 376 return HAL_OK;
<> 144:ef7eb2e8f9f7 377 }
<> 144:ef7eb2e8f9f7 378
<> 144:ef7eb2e8f9f7 379 /**
<> 144:ef7eb2e8f9f7 380 * @brief Disable DCMI DMA request and Disable DCMI capture
<> 144:ef7eb2e8f9f7 381 * @param hdcmi: pointer to a DCMI_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 382 * the configuration information for DCMI.
<> 144:ef7eb2e8f9f7 383 * @retval HAL status
<> 144:ef7eb2e8f9f7 384 */
<> 144:ef7eb2e8f9f7 385 HAL_StatusTypeDef HAL_DCMI_Stop(DCMI_HandleTypeDef* hdcmi)
<> 144:ef7eb2e8f9f7 386 {
<> 144:ef7eb2e8f9f7 387 register uint32_t count = HAL_TIMEOUT_DCMI_STOP * (SystemCoreClock /8/1000);
<> 144:ef7eb2e8f9f7 388 HAL_StatusTypeDef status = HAL_OK;
<> 144:ef7eb2e8f9f7 389
<> 144:ef7eb2e8f9f7 390 /* Process locked */
<> 144:ef7eb2e8f9f7 391 __HAL_LOCK(hdcmi);
<> 144:ef7eb2e8f9f7 392
<> 144:ef7eb2e8f9f7 393 /* Lock the DCMI peripheral state */
<> 144:ef7eb2e8f9f7 394 hdcmi->State = HAL_DCMI_STATE_BUSY;
<> 144:ef7eb2e8f9f7 395
<> 144:ef7eb2e8f9f7 396 /* Disable Capture */
<> 144:ef7eb2e8f9f7 397 hdcmi->Instance->CR &= ~(DCMI_CR_CAPTURE);
<> 144:ef7eb2e8f9f7 398
<> 144:ef7eb2e8f9f7 399 /* Check if the DCMI capture effectively disabled */
<> 144:ef7eb2e8f9f7 400 do
<> 144:ef7eb2e8f9f7 401 {
<> 144:ef7eb2e8f9f7 402 if (count-- == 0)
<> 144:ef7eb2e8f9f7 403 {
<> 144:ef7eb2e8f9f7 404 /* Update error code */
<> 144:ef7eb2e8f9f7 405 hdcmi->ErrorCode |= HAL_DCMI_ERROR_TIMEOUT;
<> 144:ef7eb2e8f9f7 406
<> 144:ef7eb2e8f9f7 407 status = HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 408 break;
<> 144:ef7eb2e8f9f7 409 }
<> 144:ef7eb2e8f9f7 410 }
<> 144:ef7eb2e8f9f7 411 while((hdcmi->Instance->CR & DCMI_CR_CAPTURE) != 0);
<> 144:ef7eb2e8f9f7 412
<> 144:ef7eb2e8f9f7 413 /* Disable the DCMI */
<> 144:ef7eb2e8f9f7 414 __HAL_DCMI_DISABLE(hdcmi);
<> 144:ef7eb2e8f9f7 415
<> 144:ef7eb2e8f9f7 416 /* Disable the DMA */
<> 144:ef7eb2e8f9f7 417 HAL_DMA_Abort(hdcmi->DMA_Handle);
<> 144:ef7eb2e8f9f7 418
<> 144:ef7eb2e8f9f7 419 /* Update error code */
<> 144:ef7eb2e8f9f7 420 hdcmi->ErrorCode |= HAL_DCMI_ERROR_NONE;
<> 144:ef7eb2e8f9f7 421
<> 144:ef7eb2e8f9f7 422 /* Change DCMI state */
<> 144:ef7eb2e8f9f7 423 hdcmi->State = HAL_DCMI_STATE_READY;
<> 144:ef7eb2e8f9f7 424
<> 144:ef7eb2e8f9f7 425 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 426 __HAL_UNLOCK(hdcmi);
<> 144:ef7eb2e8f9f7 427
<> 144:ef7eb2e8f9f7 428 /* Return function status */
<> 144:ef7eb2e8f9f7 429 return status;
<> 144:ef7eb2e8f9f7 430 }
<> 144:ef7eb2e8f9f7 431
<> 144:ef7eb2e8f9f7 432 /**
<> 144:ef7eb2e8f9f7 433 * @brief Suspend DCMI capture
<> 144:ef7eb2e8f9f7 434 * @param hdcmi: pointer to a DCMI_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 435 * the configuration information for DCMI.
<> 144:ef7eb2e8f9f7 436 * @retval HAL status
<> 144:ef7eb2e8f9f7 437 */
<> 144:ef7eb2e8f9f7 438 HAL_StatusTypeDef HAL_DCMI_Suspend(DCMI_HandleTypeDef* hdcmi)
<> 144:ef7eb2e8f9f7 439 {
<> 144:ef7eb2e8f9f7 440 register uint32_t count = HAL_TIMEOUT_DCMI_STOP * (SystemCoreClock /8/1000);
<> 144:ef7eb2e8f9f7 441 HAL_StatusTypeDef status = HAL_OK;
<> 144:ef7eb2e8f9f7 442
<> 144:ef7eb2e8f9f7 443 /* Process locked */
<> 144:ef7eb2e8f9f7 444 __HAL_LOCK(hdcmi);
<> 144:ef7eb2e8f9f7 445
<> 144:ef7eb2e8f9f7 446 if(hdcmi->State == HAL_DCMI_STATE_BUSY)
<> 144:ef7eb2e8f9f7 447 {
<> 144:ef7eb2e8f9f7 448 /* Change DCMI state */
<> 144:ef7eb2e8f9f7 449 hdcmi->State = HAL_DCMI_STATE_SUSPENDED;
<> 144:ef7eb2e8f9f7 450
<> 144:ef7eb2e8f9f7 451 /* Disable Capture */
<> 144:ef7eb2e8f9f7 452 hdcmi->Instance->CR &= ~(DCMI_CR_CAPTURE);
<> 144:ef7eb2e8f9f7 453
<> 144:ef7eb2e8f9f7 454 /* Check if the DCMI capture effectively disabled */
<> 144:ef7eb2e8f9f7 455 do
<> 144:ef7eb2e8f9f7 456 {
<> 144:ef7eb2e8f9f7 457 if (count-- == 0)
<> 144:ef7eb2e8f9f7 458 {
<> 144:ef7eb2e8f9f7 459 /* Update error code */
<> 144:ef7eb2e8f9f7 460 hdcmi->ErrorCode |= HAL_DCMI_ERROR_TIMEOUT;
<> 144:ef7eb2e8f9f7 461
<> 144:ef7eb2e8f9f7 462 /* Change DCMI state */
<> 144:ef7eb2e8f9f7 463 hdcmi->State = HAL_DCMI_STATE_READY;
<> 144:ef7eb2e8f9f7 464
<> 144:ef7eb2e8f9f7 465 status = HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 466 break;
<> 144:ef7eb2e8f9f7 467 }
<> 144:ef7eb2e8f9f7 468 }
<> 144:ef7eb2e8f9f7 469 while((hdcmi->Instance->CR & DCMI_CR_CAPTURE) != 0);
<> 144:ef7eb2e8f9f7 470 }
<> 144:ef7eb2e8f9f7 471 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 472 __HAL_UNLOCK(hdcmi);
<> 144:ef7eb2e8f9f7 473
<> 144:ef7eb2e8f9f7 474 /* Return function status */
<> 144:ef7eb2e8f9f7 475 return status;
<> 144:ef7eb2e8f9f7 476 }
<> 144:ef7eb2e8f9f7 477
<> 144:ef7eb2e8f9f7 478 /**
<> 144:ef7eb2e8f9f7 479 * @brief Resume DCMI capture
<> 144:ef7eb2e8f9f7 480 * @param hdcmi: pointer to a DCMI_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 481 * the configuration information for DCMI.
<> 144:ef7eb2e8f9f7 482 * @retval HAL status
<> 144:ef7eb2e8f9f7 483 */
<> 144:ef7eb2e8f9f7 484 HAL_StatusTypeDef HAL_DCMI_Resume(DCMI_HandleTypeDef* hdcmi)
<> 144:ef7eb2e8f9f7 485 {
<> 144:ef7eb2e8f9f7 486 /* Process locked */
<> 144:ef7eb2e8f9f7 487 __HAL_LOCK(hdcmi);
<> 144:ef7eb2e8f9f7 488
<> 144:ef7eb2e8f9f7 489 if(hdcmi->State == HAL_DCMI_STATE_SUSPENDED)
<> 144:ef7eb2e8f9f7 490 {
<> 144:ef7eb2e8f9f7 491 /* Change DCMI state */
<> 144:ef7eb2e8f9f7 492 hdcmi->State = HAL_DCMI_STATE_BUSY;
<> 144:ef7eb2e8f9f7 493
<> 144:ef7eb2e8f9f7 494 /* Disable Capture */
<> 144:ef7eb2e8f9f7 495 hdcmi->Instance->CR |= DCMI_CR_CAPTURE;
<> 144:ef7eb2e8f9f7 496 }
<> 144:ef7eb2e8f9f7 497 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 498 __HAL_UNLOCK(hdcmi);
<> 144:ef7eb2e8f9f7 499
<> 144:ef7eb2e8f9f7 500 /* Return function status */
<> 144:ef7eb2e8f9f7 501 return HAL_OK;
<> 144:ef7eb2e8f9f7 502 }
<> 144:ef7eb2e8f9f7 503
<> 144:ef7eb2e8f9f7 504 /**
<> 144:ef7eb2e8f9f7 505 * @brief Handles DCMI interrupt request.
<> 144:ef7eb2e8f9f7 506 * @param hdcmi: pointer to a DCMI_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 507 * the configuration information for the DCMI.
<> 144:ef7eb2e8f9f7 508 * @retval None
<> 144:ef7eb2e8f9f7 509 */
<> 144:ef7eb2e8f9f7 510 void HAL_DCMI_IRQHandler(DCMI_HandleTypeDef *hdcmi)
<> 144:ef7eb2e8f9f7 511 {
<> 144:ef7eb2e8f9f7 512 uint32_t isr_value = READ_REG(hdcmi->Instance->MISR);
<> 144:ef7eb2e8f9f7 513
<> 144:ef7eb2e8f9f7 514 /* Synchronization error interrupt management *******************************/
<> 144:ef7eb2e8f9f7 515 if((isr_value & DCMI_FLAG_ERRRI) == DCMI_FLAG_ERRRI)
<> 144:ef7eb2e8f9f7 516 {
<> 144:ef7eb2e8f9f7 517 /* Clear the Synchronization error flag */
<> 144:ef7eb2e8f9f7 518 __HAL_DCMI_CLEAR_FLAG(hdcmi, DCMI_FLAG_ERRRI);
<> 144:ef7eb2e8f9f7 519
<> 144:ef7eb2e8f9f7 520 /* Update error code */
<> 144:ef7eb2e8f9f7 521 hdcmi->ErrorCode |= HAL_DCMI_ERROR_SYNC;
<> 144:ef7eb2e8f9f7 522
<> 144:ef7eb2e8f9f7 523 /* Change DCMI state */
<> 144:ef7eb2e8f9f7 524 hdcmi->State = HAL_DCMI_STATE_ERROR;
<> 144:ef7eb2e8f9f7 525
<> 144:ef7eb2e8f9f7 526 /* Set the synchronization error callback */
<> 144:ef7eb2e8f9f7 527 hdcmi->DMA_Handle->XferAbortCallback = DCMI_DMAError;
<> 144:ef7eb2e8f9f7 528
<> 144:ef7eb2e8f9f7 529 /* Abort the DMA Transfer */
<> 144:ef7eb2e8f9f7 530 HAL_DMA_Abort_IT(hdcmi->DMA_Handle);
<> 144:ef7eb2e8f9f7 531 }
<> 144:ef7eb2e8f9f7 532 /* Overflow interrupt management ********************************************/
<> 144:ef7eb2e8f9f7 533 if((isr_value & DCMI_FLAG_OVRRI) == DCMI_FLAG_OVRRI)
<> 144:ef7eb2e8f9f7 534 {
<> 144:ef7eb2e8f9f7 535 /* Clear the Overflow flag */
<> 144:ef7eb2e8f9f7 536 __HAL_DCMI_CLEAR_FLAG(hdcmi, DCMI_FLAG_OVRRI);
<> 144:ef7eb2e8f9f7 537
<> 144:ef7eb2e8f9f7 538 /* Update error code */
<> 144:ef7eb2e8f9f7 539 hdcmi->ErrorCode |= HAL_DCMI_ERROR_OVR;
<> 144:ef7eb2e8f9f7 540
<> 144:ef7eb2e8f9f7 541 /* Change DCMI state */
<> 144:ef7eb2e8f9f7 542 hdcmi->State = HAL_DCMI_STATE_ERROR;
<> 144:ef7eb2e8f9f7 543
<> 144:ef7eb2e8f9f7 544 /* Set the overflow callback */
<> 144:ef7eb2e8f9f7 545 hdcmi->DMA_Handle->XferAbortCallback = DCMI_DMAError;
<> 144:ef7eb2e8f9f7 546
<> 144:ef7eb2e8f9f7 547 /* Abort the DMA Transfer */
<> 144:ef7eb2e8f9f7 548 HAL_DMA_Abort_IT(hdcmi->DMA_Handle);
<> 144:ef7eb2e8f9f7 549 }
<> 144:ef7eb2e8f9f7 550 /* Line Interrupt management ************************************************/
<> 144:ef7eb2e8f9f7 551 if((isr_value & DCMI_FLAG_LINERI) == DCMI_FLAG_LINERI)
<> 144:ef7eb2e8f9f7 552 {
<> 144:ef7eb2e8f9f7 553 /* Clear the Line interrupt flag */
<> 144:ef7eb2e8f9f7 554 __HAL_DCMI_CLEAR_FLAG(hdcmi, DCMI_FLAG_LINERI);
<> 144:ef7eb2e8f9f7 555
<> 144:ef7eb2e8f9f7 556 /* Line interrupt Callback */
<> 144:ef7eb2e8f9f7 557 HAL_DCMI_LineEventCallback(hdcmi);
<> 144:ef7eb2e8f9f7 558 }
<> 144:ef7eb2e8f9f7 559 /* VSYNC interrupt management ***********************************************/
<> 144:ef7eb2e8f9f7 560 if((isr_value & DCMI_FLAG_VSYNCRI) == DCMI_FLAG_VSYNCRI)
<> 144:ef7eb2e8f9f7 561 {
<> 144:ef7eb2e8f9f7 562 /* Clear the VSYNC flag */
<> 144:ef7eb2e8f9f7 563 __HAL_DCMI_CLEAR_FLAG(hdcmi, DCMI_FLAG_VSYNCRI);
<> 144:ef7eb2e8f9f7 564
<> 144:ef7eb2e8f9f7 565 /* VSYNC Callback */
<> 144:ef7eb2e8f9f7 566 HAL_DCMI_VsyncEventCallback(hdcmi);
<> 144:ef7eb2e8f9f7 567 }
<> 144:ef7eb2e8f9f7 568 /* FRAME interrupt management ***********************************************/
<> 144:ef7eb2e8f9f7 569 if((isr_value & DCMI_FLAG_FRAMERI) == DCMI_FLAG_FRAMERI)
<> 144:ef7eb2e8f9f7 570 {
<> 144:ef7eb2e8f9f7 571 /* When snapshot mode, disable Vsync, Error and Overrun interrupts */
<> 144:ef7eb2e8f9f7 572 if((hdcmi->Instance->CR & DCMI_CR_CM) == DCMI_MODE_SNAPSHOT)
<> 144:ef7eb2e8f9f7 573 {
<> 144:ef7eb2e8f9f7 574 /* Disable the Line, Vsync, Error and Overrun interrupts */
<> 144:ef7eb2e8f9f7 575 __HAL_DCMI_DISABLE_IT(hdcmi, DCMI_IT_LINE | DCMI_IT_VSYNC | DCMI_IT_ERR | DCMI_IT_OVR);
<> 144:ef7eb2e8f9f7 576 }
<> 144:ef7eb2e8f9f7 577
<> 144:ef7eb2e8f9f7 578 /* Disable the Frame interrupt */
<> 144:ef7eb2e8f9f7 579 __HAL_DCMI_DISABLE_IT(hdcmi, DCMI_IT_FRAME);
<> 144:ef7eb2e8f9f7 580
<> 144:ef7eb2e8f9f7 581 /* Clear the End of Frame flag */
<> 144:ef7eb2e8f9f7 582 __HAL_DCMI_CLEAR_FLAG(hdcmi, DCMI_FLAG_FRAMERI);
<> 144:ef7eb2e8f9f7 583
<> 144:ef7eb2e8f9f7 584 /* Frame Callback */
<> 144:ef7eb2e8f9f7 585 HAL_DCMI_FrameEventCallback(hdcmi);
<> 144:ef7eb2e8f9f7 586 }
<> 144:ef7eb2e8f9f7 587 }
<> 144:ef7eb2e8f9f7 588
<> 144:ef7eb2e8f9f7 589 /**
<> 144:ef7eb2e8f9f7 590 * @brief Error DCMI callback.
<> 144:ef7eb2e8f9f7 591 * @param hdcmi: pointer to a DCMI_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 592 * the configuration information for DCMI.
<> 144:ef7eb2e8f9f7 593 * @retval None
<> 144:ef7eb2e8f9f7 594 */
<> 144:ef7eb2e8f9f7 595 __weak void HAL_DCMI_ErrorCallback(DCMI_HandleTypeDef *hdcmi)
<> 144:ef7eb2e8f9f7 596 {
<> 144:ef7eb2e8f9f7 597 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 598 UNUSED(hdcmi);
<> 144:ef7eb2e8f9f7 599
<> 144:ef7eb2e8f9f7 600 /* NOTE : This function Should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 601 the HAL_DCMI_ErrorCallback could be implemented in the user file
<> 144:ef7eb2e8f9f7 602 */
<> 144:ef7eb2e8f9f7 603 }
<> 144:ef7eb2e8f9f7 604
<> 144:ef7eb2e8f9f7 605 /**
<> 144:ef7eb2e8f9f7 606 * @brief Line Event callback.
<> 144:ef7eb2e8f9f7 607 * @param hdcmi: pointer to a DCMI_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 608 * the configuration information for DCMI.
<> 144:ef7eb2e8f9f7 609 * @retval None
<> 144:ef7eb2e8f9f7 610 */
<> 144:ef7eb2e8f9f7 611 __weak void HAL_DCMI_LineEventCallback(DCMI_HandleTypeDef *hdcmi)
<> 144:ef7eb2e8f9f7 612 {
<> 144:ef7eb2e8f9f7 613 /* NOTE : This function Should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 614 the HAL_DCMI_LineEventCallback could be implemented in the user file
<> 144:ef7eb2e8f9f7 615 */
<> 144:ef7eb2e8f9f7 616 }
<> 144:ef7eb2e8f9f7 617
<> 144:ef7eb2e8f9f7 618 /**
<> 144:ef7eb2e8f9f7 619 * @brief VSYNC Event callback.
<> 144:ef7eb2e8f9f7 620 * @param hdcmi: pointer to a DCMI_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 621 * the configuration information for DCMI.
<> 144:ef7eb2e8f9f7 622 * @retval None
<> 144:ef7eb2e8f9f7 623 */
<> 144:ef7eb2e8f9f7 624 __weak void HAL_DCMI_VsyncEventCallback(DCMI_HandleTypeDef *hdcmi)
<> 144:ef7eb2e8f9f7 625 {
<> 144:ef7eb2e8f9f7 626 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 627 UNUSED(hdcmi);
<> 144:ef7eb2e8f9f7 628
<> 144:ef7eb2e8f9f7 629 /* NOTE : This function Should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 630 the HAL_DCMI_VsyncEventCallback could be implemented in the user file
<> 144:ef7eb2e8f9f7 631 */
<> 144:ef7eb2e8f9f7 632 }
<> 144:ef7eb2e8f9f7 633
<> 144:ef7eb2e8f9f7 634 /**
<> 144:ef7eb2e8f9f7 635 * @brief Frame Event callback.
<> 144:ef7eb2e8f9f7 636 * @param hdcmi: pointer to a DCMI_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 637 * the configuration information for DCMI.
<> 144:ef7eb2e8f9f7 638 * @retval None
<> 144:ef7eb2e8f9f7 639 */
<> 144:ef7eb2e8f9f7 640 __weak void HAL_DCMI_FrameEventCallback(DCMI_HandleTypeDef *hdcmi)
<> 144:ef7eb2e8f9f7 641 {
<> 144:ef7eb2e8f9f7 642 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 643 UNUSED(hdcmi);
<> 144:ef7eb2e8f9f7 644
<> 144:ef7eb2e8f9f7 645 /* NOTE : This function Should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 646 the HAL_DCMI_FrameEventCallback could be implemented in the user file
<> 144:ef7eb2e8f9f7 647 */
<> 144:ef7eb2e8f9f7 648 }
<> 144:ef7eb2e8f9f7 649
<> 144:ef7eb2e8f9f7 650 /**
<> 144:ef7eb2e8f9f7 651 * @}
<> 144:ef7eb2e8f9f7 652 */
<> 144:ef7eb2e8f9f7 653
<> 144:ef7eb2e8f9f7 654 /** @defgroup DCMI_Exported_Functions_Group3 Peripheral Control functions
<> 144:ef7eb2e8f9f7 655 * @brief Peripheral Control functions
<> 144:ef7eb2e8f9f7 656 *
<> 144:ef7eb2e8f9f7 657 @verbatim
<> 144:ef7eb2e8f9f7 658 ===============================================================================
<> 144:ef7eb2e8f9f7 659 ##### Peripheral Control functions #####
<> 144:ef7eb2e8f9f7 660 ===============================================================================
<> 144:ef7eb2e8f9f7 661 [..] This section provides functions allowing to:
<> 144:ef7eb2e8f9f7 662 (+) Configure the CROP feature.
<> 144:ef7eb2e8f9f7 663 (+) Enable/Disable the CROP feature.
<> 144:ef7eb2e8f9f7 664 (+) Set embedded synchronization delimiters unmasks.
<> 144:ef7eb2e8f9f7 665
<> 144:ef7eb2e8f9f7 666 @endverbatim
<> 144:ef7eb2e8f9f7 667 * @{
<> 144:ef7eb2e8f9f7 668 */
<> 144:ef7eb2e8f9f7 669
<> 144:ef7eb2e8f9f7 670 /**
<> 144:ef7eb2e8f9f7 671 * @brief Configure the DCMI CROP coordinate.
<> 144:ef7eb2e8f9f7 672 * @param hdcmi: pointer to a DCMI_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 673 * the configuration information for DCMI.
<> 144:ef7eb2e8f9f7 674 * @param YSize: DCMI Line number
<> 144:ef7eb2e8f9f7 675 * @param XSize: DCMI Pixel per line
<> 144:ef7eb2e8f9f7 676 * @param X0: DCMI window X offset
<> 144:ef7eb2e8f9f7 677 * @param Y0: DCMI window Y offset
<> 144:ef7eb2e8f9f7 678 * @retval HAL status
<> 144:ef7eb2e8f9f7 679 */
<> 144:ef7eb2e8f9f7 680 HAL_StatusTypeDef HAL_DCMI_ConfigCrop(DCMI_HandleTypeDef *hdcmi, uint32_t X0, uint32_t Y0, uint32_t XSize, uint32_t YSize)
<> 144:ef7eb2e8f9f7 681 {
<> 144:ef7eb2e8f9f7 682 /* Process Locked */
<> 144:ef7eb2e8f9f7 683 __HAL_LOCK(hdcmi);
<> 144:ef7eb2e8f9f7 684
<> 144:ef7eb2e8f9f7 685 /* Lock the DCMI peripheral state */
<> 144:ef7eb2e8f9f7 686 hdcmi->State = HAL_DCMI_STATE_BUSY;
<> 144:ef7eb2e8f9f7 687
<> 144:ef7eb2e8f9f7 688 /* Check the parameters */
<> 144:ef7eb2e8f9f7 689 assert_param(IS_DCMI_WINDOW_COORDINATE(X0));
<> 144:ef7eb2e8f9f7 690 assert_param(IS_DCMI_WINDOW_HEIGHT(Y0));
<> 144:ef7eb2e8f9f7 691 assert_param(IS_DCMI_WINDOW_COORDINATE(XSize));
<> 144:ef7eb2e8f9f7 692 assert_param(IS_DCMI_WINDOW_COORDINATE(YSize));
<> 144:ef7eb2e8f9f7 693
<> 144:ef7eb2e8f9f7 694 /* Configure CROP */
<> 144:ef7eb2e8f9f7 695 hdcmi->Instance->CWSIZER = (XSize | (YSize << DCMI_POSITION_CWSIZE_VLINE));
<> 144:ef7eb2e8f9f7 696 hdcmi->Instance->CWSTRTR = (X0 | (Y0 << DCMI_POSITION_CWSTRT_VST));
<> 144:ef7eb2e8f9f7 697
<> 144:ef7eb2e8f9f7 698 /* Initialize the DCMI state*/
<> 144:ef7eb2e8f9f7 699 hdcmi->State = HAL_DCMI_STATE_READY;
<> 144:ef7eb2e8f9f7 700
<> 144:ef7eb2e8f9f7 701 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 702 __HAL_UNLOCK(hdcmi);
<> 144:ef7eb2e8f9f7 703
<> 144:ef7eb2e8f9f7 704 return HAL_OK;
<> 144:ef7eb2e8f9f7 705 }
<> 144:ef7eb2e8f9f7 706
<> 144:ef7eb2e8f9f7 707 /**
<> 144:ef7eb2e8f9f7 708 * @brief Disable the Crop feature.
<> 144:ef7eb2e8f9f7 709 * @param hdcmi: pointer to a DCMI_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 710 * the configuration information for DCMI.
<> 144:ef7eb2e8f9f7 711 * @retval HAL status
<> 144:ef7eb2e8f9f7 712 */
<> 144:ef7eb2e8f9f7 713 HAL_StatusTypeDef HAL_DCMI_DisableCrop(DCMI_HandleTypeDef *hdcmi)
<> 144:ef7eb2e8f9f7 714 {
<> 144:ef7eb2e8f9f7 715 /* Process Locked */
<> 144:ef7eb2e8f9f7 716 __HAL_LOCK(hdcmi);
<> 144:ef7eb2e8f9f7 717
<> 144:ef7eb2e8f9f7 718 /* Lock the DCMI peripheral state */
<> 144:ef7eb2e8f9f7 719 hdcmi->State = HAL_DCMI_STATE_BUSY;
<> 144:ef7eb2e8f9f7 720
<> 144:ef7eb2e8f9f7 721 /* Disable DCMI Crop feature */
<> 144:ef7eb2e8f9f7 722 hdcmi->Instance->CR &= ~(uint32_t)DCMI_CR_CROP;
<> 144:ef7eb2e8f9f7 723
<> 144:ef7eb2e8f9f7 724 /* Change the DCMI state*/
<> 144:ef7eb2e8f9f7 725 hdcmi->State = HAL_DCMI_STATE_READY;
<> 144:ef7eb2e8f9f7 726
<> 144:ef7eb2e8f9f7 727 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 728 __HAL_UNLOCK(hdcmi);
<> 144:ef7eb2e8f9f7 729
<> 144:ef7eb2e8f9f7 730 return HAL_OK;
<> 144:ef7eb2e8f9f7 731 }
<> 144:ef7eb2e8f9f7 732
<> 144:ef7eb2e8f9f7 733 /**
<> 144:ef7eb2e8f9f7 734 * @brief Enable the Crop feature.
<> 144:ef7eb2e8f9f7 735 * @param hdcmi: pointer to a DCMI_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 736 * the configuration information for DCMI.
<> 144:ef7eb2e8f9f7 737 * @retval HAL status
<> 144:ef7eb2e8f9f7 738 */
<> 144:ef7eb2e8f9f7 739 HAL_StatusTypeDef HAL_DCMI_EnableCrop(DCMI_HandleTypeDef *hdcmi)
<> 144:ef7eb2e8f9f7 740 {
<> 144:ef7eb2e8f9f7 741 /* Process Locked */
<> 144:ef7eb2e8f9f7 742 __HAL_LOCK(hdcmi);
<> 144:ef7eb2e8f9f7 743
<> 144:ef7eb2e8f9f7 744 /* Lock the DCMI peripheral state */
<> 144:ef7eb2e8f9f7 745 hdcmi->State = HAL_DCMI_STATE_BUSY;
<> 144:ef7eb2e8f9f7 746
<> 144:ef7eb2e8f9f7 747 /* Enable DCMI Crop feature */
<> 144:ef7eb2e8f9f7 748 hdcmi->Instance->CR |= (uint32_t)DCMI_CR_CROP;
<> 144:ef7eb2e8f9f7 749
<> 144:ef7eb2e8f9f7 750 /* Change the DCMI state*/
<> 144:ef7eb2e8f9f7 751 hdcmi->State = HAL_DCMI_STATE_READY;
<> 144:ef7eb2e8f9f7 752
<> 144:ef7eb2e8f9f7 753 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 754 __HAL_UNLOCK(hdcmi);
<> 144:ef7eb2e8f9f7 755
<> 144:ef7eb2e8f9f7 756 return HAL_OK;
<> 144:ef7eb2e8f9f7 757 }
<> 144:ef7eb2e8f9f7 758
<> 144:ef7eb2e8f9f7 759 /**
<> 144:ef7eb2e8f9f7 760 * @}
<> 144:ef7eb2e8f9f7 761 */
<> 144:ef7eb2e8f9f7 762
<> 144:ef7eb2e8f9f7 763 /** @defgroup DCMI_Exported_Functions_Group4 Peripheral State functions
<> 144:ef7eb2e8f9f7 764 * @brief Peripheral State functions
<> 144:ef7eb2e8f9f7 765 *
<> 144:ef7eb2e8f9f7 766 @verbatim
<> 144:ef7eb2e8f9f7 767 ===============================================================================
<> 144:ef7eb2e8f9f7 768 ##### Peripheral State and Errors functions #####
<> 144:ef7eb2e8f9f7 769 ===============================================================================
<> 144:ef7eb2e8f9f7 770 [..]
<> 144:ef7eb2e8f9f7 771 This subsection provides functions allowing to
<> 144:ef7eb2e8f9f7 772 (+) Check the DCMI state.
<> 144:ef7eb2e8f9f7 773 (+) Get the specific DCMI error flag.
<> 144:ef7eb2e8f9f7 774
<> 144:ef7eb2e8f9f7 775 @endverbatim
<> 144:ef7eb2e8f9f7 776 * @{
<> 144:ef7eb2e8f9f7 777 */
<> 144:ef7eb2e8f9f7 778
<> 144:ef7eb2e8f9f7 779 /**
<> 144:ef7eb2e8f9f7 780 * @brief Return the DCMI state
<> 144:ef7eb2e8f9f7 781 * @param hdcmi: pointer to a DCMI_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 782 * the configuration information for DCMI.
<> 144:ef7eb2e8f9f7 783 * @retval HAL state
<> 144:ef7eb2e8f9f7 784 */
<> 144:ef7eb2e8f9f7 785 HAL_DCMI_StateTypeDef HAL_DCMI_GetState(DCMI_HandleTypeDef *hdcmi)
<> 144:ef7eb2e8f9f7 786 {
<> 144:ef7eb2e8f9f7 787 return hdcmi->State;
<> 144:ef7eb2e8f9f7 788 }
<> 144:ef7eb2e8f9f7 789
<> 144:ef7eb2e8f9f7 790 /**
<> 144:ef7eb2e8f9f7 791 * @brief Return the DCMI error code
<> 144:ef7eb2e8f9f7 792 * @param hdcmi : pointer to a DCMI_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 793 * the configuration information for DCMI.
<> 144:ef7eb2e8f9f7 794 * @retval DCMI Error Code
<> 144:ef7eb2e8f9f7 795 */
<> 144:ef7eb2e8f9f7 796 uint32_t HAL_DCMI_GetError(DCMI_HandleTypeDef *hdcmi)
<> 144:ef7eb2e8f9f7 797 {
<> 144:ef7eb2e8f9f7 798 return hdcmi->ErrorCode;
<> 144:ef7eb2e8f9f7 799 }
<> 144:ef7eb2e8f9f7 800
<> 144:ef7eb2e8f9f7 801 /**
<> 144:ef7eb2e8f9f7 802 * @}
<> 144:ef7eb2e8f9f7 803 */
<> 144:ef7eb2e8f9f7 804 /* Private functions ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 805 /** @defgroup DCMI_Private_Functions DCMI Private Functions
<> 144:ef7eb2e8f9f7 806 * @{
<> 144:ef7eb2e8f9f7 807 */
<> 144:ef7eb2e8f9f7 808 /**
<> 144:ef7eb2e8f9f7 809 * @brief DMA conversion complete callback.
<> 144:ef7eb2e8f9f7 810 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 811 * the configuration information for the specified DMA module.
<> 144:ef7eb2e8f9f7 812 * @retval None
<> 144:ef7eb2e8f9f7 813 */
<> 144:ef7eb2e8f9f7 814 static void DCMI_DMAXferCplt(DMA_HandleTypeDef *hdma)
<> 144:ef7eb2e8f9f7 815 {
<> 144:ef7eb2e8f9f7 816 uint32_t tmp = 0;
<> 144:ef7eb2e8f9f7 817
<> 144:ef7eb2e8f9f7 818 DCMI_HandleTypeDef* hdcmi = ( DCMI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
<> 144:ef7eb2e8f9f7 819
<> 144:ef7eb2e8f9f7 820 if(hdcmi->XferCount != 0)
<> 144:ef7eb2e8f9f7 821 {
<> 144:ef7eb2e8f9f7 822 /* Update memory 0 address location */
<> 144:ef7eb2e8f9f7 823 tmp = ((hdcmi->DMA_Handle->Instance->CR) & DMA_SxCR_CT);
<> 144:ef7eb2e8f9f7 824 if(((hdcmi->XferCount % 2) == 0) && (tmp != 0))
<> 144:ef7eb2e8f9f7 825 {
<> 144:ef7eb2e8f9f7 826 tmp = hdcmi->DMA_Handle->Instance->M0AR;
<> 144:ef7eb2e8f9f7 827 HAL_DMAEx_ChangeMemory(hdcmi->DMA_Handle, (tmp + (8*hdcmi->XferSize)), MEMORY0);
<> 144:ef7eb2e8f9f7 828 hdcmi->XferCount--;
<> 144:ef7eb2e8f9f7 829 }
<> 144:ef7eb2e8f9f7 830 /* Update memory 1 address location */
<> 144:ef7eb2e8f9f7 831 else if((hdcmi->DMA_Handle->Instance->CR & DMA_SxCR_CT) == 0)
<> 144:ef7eb2e8f9f7 832 {
<> 144:ef7eb2e8f9f7 833 tmp = hdcmi->DMA_Handle->Instance->M1AR;
<> 144:ef7eb2e8f9f7 834 HAL_DMAEx_ChangeMemory(hdcmi->DMA_Handle, (tmp + (8*hdcmi->XferSize)), MEMORY1);
<> 144:ef7eb2e8f9f7 835 hdcmi->XferCount--;
<> 144:ef7eb2e8f9f7 836 }
<> 144:ef7eb2e8f9f7 837 }
<> 144:ef7eb2e8f9f7 838 /* Update memory 0 address location */
<> 144:ef7eb2e8f9f7 839 else if((hdcmi->DMA_Handle->Instance->CR & DMA_SxCR_CT) != 0)
<> 144:ef7eb2e8f9f7 840 {
<> 144:ef7eb2e8f9f7 841 hdcmi->DMA_Handle->Instance->M0AR = hdcmi->pBuffPtr;
<> 144:ef7eb2e8f9f7 842 }
<> 144:ef7eb2e8f9f7 843 /* Update memory 1 address location */
<> 144:ef7eb2e8f9f7 844 else if((hdcmi->DMA_Handle->Instance->CR & DMA_SxCR_CT) == 0)
<> 144:ef7eb2e8f9f7 845 {
<> 144:ef7eb2e8f9f7 846 tmp = hdcmi->pBuffPtr;
<> 144:ef7eb2e8f9f7 847 hdcmi->DMA_Handle->Instance->M1AR = (tmp + (4*hdcmi->XferSize));
<> 144:ef7eb2e8f9f7 848 hdcmi->XferCount = hdcmi->XferTransferNumber;
<> 144:ef7eb2e8f9f7 849 }
<> 144:ef7eb2e8f9f7 850
<> 144:ef7eb2e8f9f7 851 /* Check if the frame is transferred */
<> 144:ef7eb2e8f9f7 852 if(hdcmi->XferCount == hdcmi->XferTransferNumber)
<> 144:ef7eb2e8f9f7 853 {
<> 144:ef7eb2e8f9f7 854 /* Enable the Frame interrupt */
<> 144:ef7eb2e8f9f7 855 __HAL_DCMI_ENABLE_IT(hdcmi, DCMI_IT_FRAME);
<> 144:ef7eb2e8f9f7 856
<> 144:ef7eb2e8f9f7 857 /* When snapshot mode, set dcmi state to ready */
<> 144:ef7eb2e8f9f7 858 if((hdcmi->Instance->CR & DCMI_CR_CM) == DCMI_MODE_SNAPSHOT)
<> 144:ef7eb2e8f9f7 859 {
<> 144:ef7eb2e8f9f7 860 hdcmi->State= HAL_DCMI_STATE_READY;
<> 144:ef7eb2e8f9f7 861 }
<> 144:ef7eb2e8f9f7 862 }
<> 144:ef7eb2e8f9f7 863 }
<> 144:ef7eb2e8f9f7 864
<> 144:ef7eb2e8f9f7 865 /**
<> 144:ef7eb2e8f9f7 866 * @brief DMA error callback
<> 144:ef7eb2e8f9f7 867 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 868 * the configuration information for the specified DMA module.
<> 144:ef7eb2e8f9f7 869 * @retval None
<> 144:ef7eb2e8f9f7 870 */
<> 144:ef7eb2e8f9f7 871 static void DCMI_DMAError(DMA_HandleTypeDef *hdma)
<> 144:ef7eb2e8f9f7 872 {
<> 144:ef7eb2e8f9f7 873 DCMI_HandleTypeDef* hdcmi = ( DCMI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
<> 144:ef7eb2e8f9f7 874
<> 144:ef7eb2e8f9f7 875 if(hdcmi->DMA_Handle->ErrorCode != HAL_DMA_ERROR_FE)
<> 144:ef7eb2e8f9f7 876 {
<> 144:ef7eb2e8f9f7 877 /* Initialize the DCMI state*/
<> 144:ef7eb2e8f9f7 878 hdcmi->State = HAL_DCMI_STATE_READY;
<> 144:ef7eb2e8f9f7 879
<> 144:ef7eb2e8f9f7 880 /* Set DCMI Error Code */
<> 144:ef7eb2e8f9f7 881 hdcmi->ErrorCode |= HAL_DCMI_ERROR_DMA;
<> 144:ef7eb2e8f9f7 882 }
<> 144:ef7eb2e8f9f7 883
<> 144:ef7eb2e8f9f7 884 /* DCMI error Callback */
<> 144:ef7eb2e8f9f7 885 HAL_DCMI_ErrorCallback(hdcmi);
<> 144:ef7eb2e8f9f7 886 }
<> 144:ef7eb2e8f9f7 887
<> 144:ef7eb2e8f9f7 888 /**
<> 144:ef7eb2e8f9f7 889 * @}
<> 144:ef7eb2e8f9f7 890 */
<> 144:ef7eb2e8f9f7 891
<> 144:ef7eb2e8f9f7 892 /**
<> 144:ef7eb2e8f9f7 893 * @}
<> 144:ef7eb2e8f9f7 894 */
<> 144:ef7eb2e8f9f7 895 #endif /* HAL_DCMI_MODULE_ENABLED */
<> 144:ef7eb2e8f9f7 896 /**
<> 144:ef7eb2e8f9f7 897 * @}
<> 144:ef7eb2e8f9f7 898 */
<> 144:ef7eb2e8f9f7 899
<> 144:ef7eb2e8f9f7 900 /**
<> 144:ef7eb2e8f9f7 901 * @}
<> 144:ef7eb2e8f9f7 902 */
<> 144:ef7eb2e8f9f7 903
<> 144:ef7eb2e8f9f7 904 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/