added prescaler for 16 bit pwm in LPC1347 target

Fork of mbed-dev by mbed official

Committer:
<>
Date:
Fri Sep 02 15:07:44 2016 +0100
Revision:
144:ef7eb2e8f9f7
Parent:
83:a036322b8637
This updates the lib to the mbed lib v125

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file stm32f7xx_hal_dac_ex.c
<> 144:ef7eb2e8f9f7 4 * @author MCD Application Team
<> 144:ef7eb2e8f9f7 5 * @version V1.1.0
<> 144:ef7eb2e8f9f7 6 * @date 22-April-2016
<> 144:ef7eb2e8f9f7 7 * @brief Extended DAC HAL module driver.
<> 144:ef7eb2e8f9f7 8 * This file provides firmware functions to manage the following
<> 144:ef7eb2e8f9f7 9 * functionalities of DAC extension peripheral:
<> 144:ef7eb2e8f9f7 10 * + Extended features functions
<> 144:ef7eb2e8f9f7 11 *
<> 144:ef7eb2e8f9f7 12 *
<> 144:ef7eb2e8f9f7 13 @verbatim
<> 144:ef7eb2e8f9f7 14 ==============================================================================
<> 144:ef7eb2e8f9f7 15 ##### How to use this driver #####
<> 144:ef7eb2e8f9f7 16 ==============================================================================
<> 144:ef7eb2e8f9f7 17 [..]
<> 144:ef7eb2e8f9f7 18 (+) When Dual mode is enabled (i.e DAC Channel1 and Channel2 are used simultaneously) :
<> 144:ef7eb2e8f9f7 19 Use HAL_DACEx_DualGetValue() to get digital data to be converted and use
<> 144:ef7eb2e8f9f7 20 HAL_DACEx_DualSetValue() to set digital value to converted simultaneously in Channel 1 and Channel 2.
<> 144:ef7eb2e8f9f7 21 (+) Use HAL_DACEx_TriangleWaveGenerate() to generate Triangle signal.
<> 144:ef7eb2e8f9f7 22 (+) Use HAL_DACEx_NoiseWaveGenerate() to generate Noise signal.
<> 144:ef7eb2e8f9f7 23
<> 144:ef7eb2e8f9f7 24 @endverbatim
<> 144:ef7eb2e8f9f7 25 ******************************************************************************
<> 144:ef7eb2e8f9f7 26 * @attention
<> 144:ef7eb2e8f9f7 27 *
<> 144:ef7eb2e8f9f7 28 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 144:ef7eb2e8f9f7 29 *
<> 144:ef7eb2e8f9f7 30 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 31 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 32 * 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 33 * this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 34 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 35 * this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 36 * and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 37 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 38 * may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 39 * without specific prior written permission.
<> 144:ef7eb2e8f9f7 40 *
<> 144:ef7eb2e8f9f7 41 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 42 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 43 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 44 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 45 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 46 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 47 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 48 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 49 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 50 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 51 *
<> 144:ef7eb2e8f9f7 52 ******************************************************************************
<> 144:ef7eb2e8f9f7 53 */
<> 144:ef7eb2e8f9f7 54
<> 144:ef7eb2e8f9f7 55
<> 144:ef7eb2e8f9f7 56 /* Includes ------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 57 #include "stm32f7xx_hal.h"
<> 144:ef7eb2e8f9f7 58
<> 144:ef7eb2e8f9f7 59 /** @addtogroup STM32F7xx_HAL_Driver
<> 144:ef7eb2e8f9f7 60 * @{
<> 144:ef7eb2e8f9f7 61 */
<> 144:ef7eb2e8f9f7 62
<> 144:ef7eb2e8f9f7 63 /** @defgroup DACEx DACEx
<> 144:ef7eb2e8f9f7 64 * @brief DAC driver modules
<> 144:ef7eb2e8f9f7 65 * @{
<> 144:ef7eb2e8f9f7 66 */
<> 144:ef7eb2e8f9f7 67
<> 144:ef7eb2e8f9f7 68 #ifdef HAL_DAC_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 69
<> 144:ef7eb2e8f9f7 70 /* Private typedef -----------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 71 /* Private define ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 72 /* Private macro -------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 73 /* Private variables ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 74 /* Private function prototypes -----------------------------------------------*/
<> 144:ef7eb2e8f9f7 75 /* Private functions ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 76 /* Exported functions --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 77 /** @defgroup DACEx_Exported_Functions DAC Exported Functions
<> 144:ef7eb2e8f9f7 78 * @{
<> 144:ef7eb2e8f9f7 79 */
<> 144:ef7eb2e8f9f7 80
<> 144:ef7eb2e8f9f7 81 /** @defgroup DACEx_Exported_Functions_Group1 Extended features functions
<> 144:ef7eb2e8f9f7 82 * @brief Extended features functions
<> 144:ef7eb2e8f9f7 83 *
<> 144:ef7eb2e8f9f7 84 @verbatim
<> 144:ef7eb2e8f9f7 85 ==============================================================================
<> 144:ef7eb2e8f9f7 86 ##### Extended features functions #####
<> 144:ef7eb2e8f9f7 87 ==============================================================================
<> 144:ef7eb2e8f9f7 88 [..] This section provides functions allowing to:
<> 144:ef7eb2e8f9f7 89 (+) Start conversion.
<> 144:ef7eb2e8f9f7 90 (+) Stop conversion.
<> 144:ef7eb2e8f9f7 91 (+) Start conversion and enable DMA transfer.
<> 144:ef7eb2e8f9f7 92 (+) Stop conversion and disable DMA transfer.
<> 144:ef7eb2e8f9f7 93 (+) Get result of conversion.
<> 144:ef7eb2e8f9f7 94 (+) Get result of dual mode conversion.
<> 144:ef7eb2e8f9f7 95
<> 144:ef7eb2e8f9f7 96 @endverbatim
<> 144:ef7eb2e8f9f7 97 * @{
<> 144:ef7eb2e8f9f7 98 */
<> 144:ef7eb2e8f9f7 99
<> 144:ef7eb2e8f9f7 100 /**
<> 144:ef7eb2e8f9f7 101 * @brief Returns the last data output value of the selected DAC channel.
<> 144:ef7eb2e8f9f7 102 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 103 * the configuration information for the specified DAC.
<> 144:ef7eb2e8f9f7 104 * @retval The selected DAC channel data output value.
<> 144:ef7eb2e8f9f7 105 */
<> 144:ef7eb2e8f9f7 106 uint32_t HAL_DACEx_DualGetValue(DAC_HandleTypeDef* hdac)
<> 144:ef7eb2e8f9f7 107 {
<> 144:ef7eb2e8f9f7 108 uint32_t tmp = 0;
<> 144:ef7eb2e8f9f7 109
<> 144:ef7eb2e8f9f7 110 tmp |= hdac->Instance->DOR1;
<> 144:ef7eb2e8f9f7 111
<> 144:ef7eb2e8f9f7 112 tmp |= hdac->Instance->DOR2 << 16;
<> 144:ef7eb2e8f9f7 113
<> 144:ef7eb2e8f9f7 114 /* Returns the DAC channel data output register value */
<> 144:ef7eb2e8f9f7 115 return tmp;
<> 144:ef7eb2e8f9f7 116 }
<> 144:ef7eb2e8f9f7 117
<> 144:ef7eb2e8f9f7 118 /**
<> 144:ef7eb2e8f9f7 119 * @brief Enables or disables the selected DAC channel wave generation.
<> 144:ef7eb2e8f9f7 120 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 121 * the configuration information for the specified DAC.
<> 144:ef7eb2e8f9f7 122 * @param Channel: The selected DAC channel.
<> 144:ef7eb2e8f9f7 123 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 124 * @arg DAC_CHANNEL_1: DAC Channel1 selected
<> 144:ef7eb2e8f9f7 125 * @arg DAC_CHANNEL_2: DAC Channel2 selected
<> 144:ef7eb2e8f9f7 126 * @param Amplitude: Select max triangle amplitude.
<> 144:ef7eb2e8f9f7 127 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 128 * @arg DAC_TRIANGLEAMPLITUDE_1: Select max triangle amplitude of 1
<> 144:ef7eb2e8f9f7 129 * @arg DAC_TRIANGLEAMPLITUDE_3: Select max triangle amplitude of 3
<> 144:ef7eb2e8f9f7 130 * @arg DAC_TRIANGLEAMPLITUDE_7: Select max triangle amplitude of 7
<> 144:ef7eb2e8f9f7 131 * @arg DAC_TRIANGLEAMPLITUDE_15: Select max triangle amplitude of 15
<> 144:ef7eb2e8f9f7 132 * @arg DAC_TRIANGLEAMPLITUDE_31: Select max triangle amplitude of 31
<> 144:ef7eb2e8f9f7 133 * @arg DAC_TRIANGLEAMPLITUDE_63: Select max triangle amplitude of 63
<> 144:ef7eb2e8f9f7 134 * @arg DAC_TRIANGLEAMPLITUDE_127: Select max triangle amplitude of 127
<> 144:ef7eb2e8f9f7 135 * @arg DAC_TRIANGLEAMPLITUDE_255: Select max triangle amplitude of 255
<> 144:ef7eb2e8f9f7 136 * @arg DAC_TRIANGLEAMPLITUDE_511: Select max triangle amplitude of 511
<> 144:ef7eb2e8f9f7 137 * @arg DAC_TRIANGLEAMPLITUDE_1023: Select max triangle amplitude of 1023
<> 144:ef7eb2e8f9f7 138 * @arg DAC_TRIANGLEAMPLITUDE_2047: Select max triangle amplitude of 2047
<> 144:ef7eb2e8f9f7 139 * @arg DAC_TRIANGLEAMPLITUDE_4095: Select max triangle amplitude of 4095
<> 144:ef7eb2e8f9f7 140 * @retval HAL status
<> 144:ef7eb2e8f9f7 141 */
<> 144:ef7eb2e8f9f7 142 HAL_StatusTypeDef HAL_DACEx_TriangleWaveGenerate(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Amplitude)
<> 144:ef7eb2e8f9f7 143 {
<> 144:ef7eb2e8f9f7 144 /* Check the parameters */
<> 144:ef7eb2e8f9f7 145 assert_param(IS_DAC_CHANNEL(Channel));
<> 144:ef7eb2e8f9f7 146 assert_param(IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(Amplitude));
<> 144:ef7eb2e8f9f7 147
<> 144:ef7eb2e8f9f7 148 /* Process locked */
<> 144:ef7eb2e8f9f7 149 __HAL_LOCK(hdac);
<> 144:ef7eb2e8f9f7 150
<> 144:ef7eb2e8f9f7 151 /* Change DAC state */
<> 144:ef7eb2e8f9f7 152 hdac->State = HAL_DAC_STATE_BUSY;
<> 144:ef7eb2e8f9f7 153
<> 144:ef7eb2e8f9f7 154 /* Enable the selected wave generation for the selected DAC channel */
<> 144:ef7eb2e8f9f7 155 MODIFY_REG(hdac->Instance->CR, (DAC_CR_WAVE1 | DAC_CR_MAMP1) << Channel, (DAC_CR_WAVE1_1 | Amplitude) << Channel);
<> 144:ef7eb2e8f9f7 156
<> 144:ef7eb2e8f9f7 157 /* Change DAC state */
<> 144:ef7eb2e8f9f7 158 hdac->State = HAL_DAC_STATE_READY;
<> 144:ef7eb2e8f9f7 159
<> 144:ef7eb2e8f9f7 160 /* Process unlocked */
<> 144:ef7eb2e8f9f7 161 __HAL_UNLOCK(hdac);
<> 144:ef7eb2e8f9f7 162
<> 144:ef7eb2e8f9f7 163 /* Return function status */
<> 144:ef7eb2e8f9f7 164 return HAL_OK;
<> 144:ef7eb2e8f9f7 165 }
<> 144:ef7eb2e8f9f7 166
<> 144:ef7eb2e8f9f7 167 /**
<> 144:ef7eb2e8f9f7 168 * @brief Enables or disables the selected DAC channel wave generation.
<> 144:ef7eb2e8f9f7 169 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 170 * the configuration information for the specified DAC.
<> 144:ef7eb2e8f9f7 171 * @param Channel: The selected DAC channel.
<> 144:ef7eb2e8f9f7 172 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 173 * @arg DAC_CHANNEL_1: DAC Channel1 selected
<> 144:ef7eb2e8f9f7 174 * @arg DAC_CHANNEL_2: DAC Channel2 selected
<> 144:ef7eb2e8f9f7 175 * @param Amplitude: Unmask DAC channel LFSR for noise wave generation.
<> 144:ef7eb2e8f9f7 176 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 177 * @arg DAC_LFSRUNMASK_BIT0: Unmask DAC channel LFSR bit0 for noise wave generation
<> 144:ef7eb2e8f9f7 178 * @arg DAC_LFSRUNMASK_BITS1_0: Unmask DAC channel LFSR bit[1:0] for noise wave generation
<> 144:ef7eb2e8f9f7 179 * @arg DAC_LFSRUNMASK_BITS2_0: Unmask DAC channel LFSR bit[2:0] for noise wave generation
<> 144:ef7eb2e8f9f7 180 * @arg DAC_LFSRUNMASK_BITS3_0: Unmask DAC channel LFSR bit[3:0] for noise wave generation
<> 144:ef7eb2e8f9f7 181 * @arg DAC_LFSRUNMASK_BITS4_0: Unmask DAC channel LFSR bit[4:0] for noise wave generation
<> 144:ef7eb2e8f9f7 182 * @arg DAC_LFSRUNMASK_BITS5_0: Unmask DAC channel LFSR bit[5:0] for noise wave generation
<> 144:ef7eb2e8f9f7 183 * @arg DAC_LFSRUNMASK_BITS6_0: Unmask DAC channel LFSR bit[6:0] for noise wave generation
<> 144:ef7eb2e8f9f7 184 * @arg DAC_LFSRUNMASK_BITS7_0: Unmask DAC channel LFSR bit[7:0] for noise wave generation
<> 144:ef7eb2e8f9f7 185 * @arg DAC_LFSRUNMASK_BITS8_0: Unmask DAC channel LFSR bit[8:0] for noise wave generation
<> 144:ef7eb2e8f9f7 186 * @arg DAC_LFSRUNMASK_BITS9_0: Unmask DAC channel LFSR bit[9:0] for noise wave generation
<> 144:ef7eb2e8f9f7 187 * @arg DAC_LFSRUNMASK_BITS10_0: Unmask DAC channel LFSR bit[10:0] for noise wave generation
<> 144:ef7eb2e8f9f7 188 * @arg DAC_LFSRUNMASK_BITS11_0: Unmask DAC channel LFSR bit[11:0] for noise wave generation
<> 144:ef7eb2e8f9f7 189 * @retval HAL status
<> 144:ef7eb2e8f9f7 190 */
<> 144:ef7eb2e8f9f7 191 HAL_StatusTypeDef HAL_DACEx_NoiseWaveGenerate(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Amplitude)
<> 144:ef7eb2e8f9f7 192 {
<> 144:ef7eb2e8f9f7 193 /* Check the parameters */
<> 144:ef7eb2e8f9f7 194 assert_param(IS_DAC_CHANNEL(Channel));
<> 144:ef7eb2e8f9f7 195 assert_param(IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(Amplitude));
<> 144:ef7eb2e8f9f7 196
<> 144:ef7eb2e8f9f7 197 /* Process locked */
<> 144:ef7eb2e8f9f7 198 __HAL_LOCK(hdac);
<> 144:ef7eb2e8f9f7 199
<> 144:ef7eb2e8f9f7 200 /* Change DAC state */
<> 144:ef7eb2e8f9f7 201 hdac->State = HAL_DAC_STATE_BUSY;
<> 144:ef7eb2e8f9f7 202
<> 144:ef7eb2e8f9f7 203 /* Enable the selected wave generation for the selected DAC channel */
<> 144:ef7eb2e8f9f7 204 MODIFY_REG(hdac->Instance->CR, (DAC_CR_WAVE1 | DAC_CR_MAMP1) << Channel, (DAC_CR_WAVE1_0 | Amplitude) << Channel);
<> 144:ef7eb2e8f9f7 205
<> 144:ef7eb2e8f9f7 206 /* Change DAC state */
<> 144:ef7eb2e8f9f7 207 hdac->State = HAL_DAC_STATE_READY;
<> 144:ef7eb2e8f9f7 208
<> 144:ef7eb2e8f9f7 209 /* Process unlocked */
<> 144:ef7eb2e8f9f7 210 __HAL_UNLOCK(hdac);
<> 144:ef7eb2e8f9f7 211
<> 144:ef7eb2e8f9f7 212 /* Return function status */
<> 144:ef7eb2e8f9f7 213 return HAL_OK;
<> 144:ef7eb2e8f9f7 214 }
<> 144:ef7eb2e8f9f7 215
<> 144:ef7eb2e8f9f7 216 /**
<> 144:ef7eb2e8f9f7 217 * @brief Set the specified data holding register value for dual DAC channel.
<> 144:ef7eb2e8f9f7 218 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 219 * the configuration information for the specified DAC.
<> 144:ef7eb2e8f9f7 220 * @param Alignment: Specifies the data alignment for dual channel DAC.
<> 144:ef7eb2e8f9f7 221 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 222 * DAC_ALIGN_8B_R: 8bit right data alignment selected
<> 144:ef7eb2e8f9f7 223 * DAC_ALIGN_12B_L: 12bit left data alignment selected
<> 144:ef7eb2e8f9f7 224 * DAC_ALIGN_12B_R: 12bit right data alignment selected
<> 144:ef7eb2e8f9f7 225 * @param Data1: Data for DAC Channel2 to be loaded in the selected data holding register.
<> 144:ef7eb2e8f9f7 226 * @param Data2: Data for DAC Channel1 to be loaded in the selected data holding register.
<> 144:ef7eb2e8f9f7 227 * @note In dual mode, a unique register access is required to write in both
<> 144:ef7eb2e8f9f7 228 * DAC channels at the same time.
<> 144:ef7eb2e8f9f7 229 * @retval HAL status
<> 144:ef7eb2e8f9f7 230 */
<> 144:ef7eb2e8f9f7 231 HAL_StatusTypeDef HAL_DACEx_DualSetValue(DAC_HandleTypeDef* hdac, uint32_t Alignment, uint32_t Data1, uint32_t Data2)
<> 144:ef7eb2e8f9f7 232 {
<> 144:ef7eb2e8f9f7 233 uint32_t data = 0, tmp = 0;
<> 144:ef7eb2e8f9f7 234
<> 144:ef7eb2e8f9f7 235 /* Check the parameters */
<> 144:ef7eb2e8f9f7 236 assert_param(IS_DAC_ALIGN(Alignment));
<> 144:ef7eb2e8f9f7 237 assert_param(IS_DAC_DATA(Data1));
<> 144:ef7eb2e8f9f7 238 assert_param(IS_DAC_DATA(Data2));
<> 144:ef7eb2e8f9f7 239
<> 144:ef7eb2e8f9f7 240 /* Calculate and set dual DAC data holding register value */
<> 144:ef7eb2e8f9f7 241 if (Alignment == DAC_ALIGN_8B_R)
<> 144:ef7eb2e8f9f7 242 {
<> 144:ef7eb2e8f9f7 243 data = ((uint32_t)Data2 << 8) | Data1;
<> 144:ef7eb2e8f9f7 244 }
<> 144:ef7eb2e8f9f7 245 else
<> 144:ef7eb2e8f9f7 246 {
<> 144:ef7eb2e8f9f7 247 data = ((uint32_t)Data2 << 16) | Data1;
<> 144:ef7eb2e8f9f7 248 }
<> 144:ef7eb2e8f9f7 249
<> 144:ef7eb2e8f9f7 250 tmp = (uint32_t)hdac->Instance;
<> 144:ef7eb2e8f9f7 251 tmp += DAC_DHR12RD_ALIGNMENT(Alignment);
<> 144:ef7eb2e8f9f7 252
<> 144:ef7eb2e8f9f7 253 /* Set the dual DAC selected data holding register */
<> 144:ef7eb2e8f9f7 254 *(__IO uint32_t *)tmp = data;
<> 144:ef7eb2e8f9f7 255
<> 144:ef7eb2e8f9f7 256 /* Return function status */
<> 144:ef7eb2e8f9f7 257 return HAL_OK;
<> 144:ef7eb2e8f9f7 258 }
<> 144:ef7eb2e8f9f7 259
<> 144:ef7eb2e8f9f7 260 /**
<> 144:ef7eb2e8f9f7 261 * @}
<> 144:ef7eb2e8f9f7 262 */
<> 144:ef7eb2e8f9f7 263
<> 144:ef7eb2e8f9f7 264 /**
<> 144:ef7eb2e8f9f7 265 * @brief Conversion complete callback in non blocking mode for Channel2
<> 144:ef7eb2e8f9f7 266 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 267 * the configuration information for the specified DAC.
<> 144:ef7eb2e8f9f7 268 * @retval None
<> 144:ef7eb2e8f9f7 269 */
<> 144:ef7eb2e8f9f7 270 __weak void HAL_DACEx_ConvCpltCallbackCh2(DAC_HandleTypeDef* hdac)
<> 144:ef7eb2e8f9f7 271 {
<> 144:ef7eb2e8f9f7 272 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 273 UNUSED(hdac);
<> 144:ef7eb2e8f9f7 274
<> 144:ef7eb2e8f9f7 275 /* NOTE : This function Should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 276 the HAL_DAC_ConvCpltCallbackCh2 could be implemented in the user file
<> 144:ef7eb2e8f9f7 277 */
<> 144:ef7eb2e8f9f7 278 }
<> 144:ef7eb2e8f9f7 279
<> 144:ef7eb2e8f9f7 280 /**
<> 144:ef7eb2e8f9f7 281 * @brief Conversion half DMA transfer callback in non blocking mode for Channel2
<> 144:ef7eb2e8f9f7 282 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 283 * the configuration information for the specified DAC.
<> 144:ef7eb2e8f9f7 284 * @retval None
<> 144:ef7eb2e8f9f7 285 */
<> 144:ef7eb2e8f9f7 286 __weak void HAL_DACEx_ConvHalfCpltCallbackCh2(DAC_HandleTypeDef* hdac)
<> 144:ef7eb2e8f9f7 287 {
<> 144:ef7eb2e8f9f7 288 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 289 UNUSED(hdac);
<> 144:ef7eb2e8f9f7 290
<> 144:ef7eb2e8f9f7 291 /* NOTE : This function Should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 292 the HAL_DACEx_ConvHalfCpltCallbackCh2 could be implemented in the user file
<> 144:ef7eb2e8f9f7 293 */
<> 144:ef7eb2e8f9f7 294 }
<> 144:ef7eb2e8f9f7 295
<> 144:ef7eb2e8f9f7 296 /**
<> 144:ef7eb2e8f9f7 297 * @brief Error DAC callback for Channel2.
<> 144:ef7eb2e8f9f7 298 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 299 * the configuration information for the specified DAC.
<> 144:ef7eb2e8f9f7 300 * @retval None
<> 144:ef7eb2e8f9f7 301 */
<> 144:ef7eb2e8f9f7 302 __weak void HAL_DACEx_ErrorCallbackCh2(DAC_HandleTypeDef *hdac)
<> 144:ef7eb2e8f9f7 303 {
<> 144:ef7eb2e8f9f7 304 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 305 UNUSED(hdac);
<> 144:ef7eb2e8f9f7 306
<> 144:ef7eb2e8f9f7 307 /* NOTE : This function Should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 308 the HAL_DACEx_ErrorCallbackCh2 could be implemented in the user file
<> 144:ef7eb2e8f9f7 309 */
<> 144:ef7eb2e8f9f7 310 }
<> 144:ef7eb2e8f9f7 311
<> 144:ef7eb2e8f9f7 312 /**
<> 144:ef7eb2e8f9f7 313 * @brief DMA underrun DAC callback for channel2.
<> 144:ef7eb2e8f9f7 314 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 315 * the configuration information for the specified DAC.
<> 144:ef7eb2e8f9f7 316 * @retval None
<> 144:ef7eb2e8f9f7 317 */
<> 144:ef7eb2e8f9f7 318 __weak void HAL_DACEx_DMAUnderrunCallbackCh2(DAC_HandleTypeDef *hdac)
<> 144:ef7eb2e8f9f7 319 {
<> 144:ef7eb2e8f9f7 320 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 321 UNUSED(hdac);
<> 144:ef7eb2e8f9f7 322
<> 144:ef7eb2e8f9f7 323 /* NOTE : This function Should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 324 the HAL_DACEx_DMAUnderrunCallbackCh2 could be implemented in the user file
<> 144:ef7eb2e8f9f7 325 */
<> 144:ef7eb2e8f9f7 326 }
<> 144:ef7eb2e8f9f7 327
<> 144:ef7eb2e8f9f7 328 /**
<> 144:ef7eb2e8f9f7 329 * @brief DMA conversion complete callback.
<> 144:ef7eb2e8f9f7 330 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 331 * the configuration information for the specified DMA module.
<> 144:ef7eb2e8f9f7 332 * @retval None
<> 144:ef7eb2e8f9f7 333 */
<> 144:ef7eb2e8f9f7 334 void DAC_DMAConvCpltCh2(DMA_HandleTypeDef *hdma)
<> 144:ef7eb2e8f9f7 335 {
<> 144:ef7eb2e8f9f7 336 DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
<> 144:ef7eb2e8f9f7 337
<> 144:ef7eb2e8f9f7 338 HAL_DACEx_ConvCpltCallbackCh2(hdac);
<> 144:ef7eb2e8f9f7 339
<> 144:ef7eb2e8f9f7 340 hdac->State= HAL_DAC_STATE_READY;
<> 144:ef7eb2e8f9f7 341 }
<> 144:ef7eb2e8f9f7 342
<> 144:ef7eb2e8f9f7 343 /**
<> 144:ef7eb2e8f9f7 344 * @brief DMA half transfer complete callback.
<> 144:ef7eb2e8f9f7 345 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 346 * the configuration information for the specified DMA module.
<> 144:ef7eb2e8f9f7 347 * @retval None
<> 144:ef7eb2e8f9f7 348 */
<> 144:ef7eb2e8f9f7 349 void DAC_DMAHalfConvCpltCh2(DMA_HandleTypeDef *hdma)
<> 144:ef7eb2e8f9f7 350 {
<> 144:ef7eb2e8f9f7 351 DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
<> 144:ef7eb2e8f9f7 352 /* Conversion complete callback */
<> 144:ef7eb2e8f9f7 353 HAL_DACEx_ConvHalfCpltCallbackCh2(hdac);
<> 144:ef7eb2e8f9f7 354 }
<> 144:ef7eb2e8f9f7 355
<> 144:ef7eb2e8f9f7 356 /**
<> 144:ef7eb2e8f9f7 357 * @brief DMA error callback
<> 144:ef7eb2e8f9f7 358 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 359 * the configuration information for the specified DMA module.
<> 144:ef7eb2e8f9f7 360 * @retval None
<> 144:ef7eb2e8f9f7 361 */
<> 144:ef7eb2e8f9f7 362 void DAC_DMAErrorCh2(DMA_HandleTypeDef *hdma)
<> 144:ef7eb2e8f9f7 363 {
<> 144:ef7eb2e8f9f7 364 DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
<> 144:ef7eb2e8f9f7 365
<> 144:ef7eb2e8f9f7 366 /* Set DAC error code to DMA error */
<> 144:ef7eb2e8f9f7 367 hdac->ErrorCode |= HAL_DAC_ERROR_DMA;
<> 144:ef7eb2e8f9f7 368
<> 144:ef7eb2e8f9f7 369 HAL_DACEx_ErrorCallbackCh2(hdac);
<> 144:ef7eb2e8f9f7 370
<> 144:ef7eb2e8f9f7 371 hdac->State= HAL_DAC_STATE_READY;
<> 144:ef7eb2e8f9f7 372 }
<> 144:ef7eb2e8f9f7 373
<> 144:ef7eb2e8f9f7 374 /**
<> 144:ef7eb2e8f9f7 375 * @}
<> 144:ef7eb2e8f9f7 376 */
<> 144:ef7eb2e8f9f7 377
<> 144:ef7eb2e8f9f7 378 #endif /* HAL_DAC_MODULE_ENABLED */
<> 144:ef7eb2e8f9f7 379
<> 144:ef7eb2e8f9f7 380 /**
<> 144:ef7eb2e8f9f7 381 * @}
<> 144:ef7eb2e8f9f7 382 */
<> 144:ef7eb2e8f9f7 383
<> 144:ef7eb2e8f9f7 384 /**
<> 144:ef7eb2e8f9f7 385 * @}
<> 144:ef7eb2e8f9f7 386 */
<> 144:ef7eb2e8f9f7 387
<> 144:ef7eb2e8f9f7 388 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/