added prescaler for 16 bit pwm in LPC1347 target
Fork of mbed-dev by
targets/cmsis/TARGET_STM/TARGET_STM32F7/stm32f7xx_hal.h@144:ef7eb2e8f9f7, 2016-09-02 (annotated)
- Committer:
- <>
- Date:
- Fri Sep 02 15:07:44 2016 +0100
- Revision:
- 144:ef7eb2e8f9f7
- Parent:
- 83:a036322b8637
This updates the lib to the mbed lib v125
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
<> | 144:ef7eb2e8f9f7 | 1 | /** |
<> | 144:ef7eb2e8f9f7 | 2 | ****************************************************************************** |
<> | 144:ef7eb2e8f9f7 | 3 | * @file stm32f7xx_hal.h |
<> | 144:ef7eb2e8f9f7 | 4 | * @author MCD Application Team |
<> | 144:ef7eb2e8f9f7 | 5 | * @version V1.1.0 |
<> | 144:ef7eb2e8f9f7 | 6 | * @date 22-April-2016 |
<> | 144:ef7eb2e8f9f7 | 7 | * @brief This file contains all the functions prototypes for the HAL |
<> | 144:ef7eb2e8f9f7 | 8 | * module driver. |
<> | 144:ef7eb2e8f9f7 | 9 | ****************************************************************************** |
<> | 144:ef7eb2e8f9f7 | 10 | * @attention |
<> | 144:ef7eb2e8f9f7 | 11 | * |
<> | 144:ef7eb2e8f9f7 | 12 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
<> | 144:ef7eb2e8f9f7 | 13 | * |
<> | 144:ef7eb2e8f9f7 | 14 | * Redistribution and use in source and binary forms, with or without modification, |
<> | 144:ef7eb2e8f9f7 | 15 | * are permitted provided that the following conditions are met: |
<> | 144:ef7eb2e8f9f7 | 16 | * 1. Redistributions of source code must retain the above copyright notice, |
<> | 144:ef7eb2e8f9f7 | 17 | * this list of conditions and the following disclaimer. |
<> | 144:ef7eb2e8f9f7 | 18 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
<> | 144:ef7eb2e8f9f7 | 19 | * this list of conditions and the following disclaimer in the documentation |
<> | 144:ef7eb2e8f9f7 | 20 | * and/or other materials provided with the distribution. |
<> | 144:ef7eb2e8f9f7 | 21 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
<> | 144:ef7eb2e8f9f7 | 22 | * may be used to endorse or promote products derived from this software |
<> | 144:ef7eb2e8f9f7 | 23 | * without specific prior written permission. |
<> | 144:ef7eb2e8f9f7 | 24 | * |
<> | 144:ef7eb2e8f9f7 | 25 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
<> | 144:ef7eb2e8f9f7 | 26 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
<> | 144:ef7eb2e8f9f7 | 27 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
<> | 144:ef7eb2e8f9f7 | 28 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
<> | 144:ef7eb2e8f9f7 | 29 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
<> | 144:ef7eb2e8f9f7 | 30 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
<> | 144:ef7eb2e8f9f7 | 31 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
<> | 144:ef7eb2e8f9f7 | 32 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
<> | 144:ef7eb2e8f9f7 | 33 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
<> | 144:ef7eb2e8f9f7 | 34 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
<> | 144:ef7eb2e8f9f7 | 35 | * |
<> | 144:ef7eb2e8f9f7 | 36 | ****************************************************************************** |
<> | 144:ef7eb2e8f9f7 | 37 | */ |
<> | 144:ef7eb2e8f9f7 | 38 | |
<> | 144:ef7eb2e8f9f7 | 39 | /* Define to prevent recursive inclusion -------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 40 | #ifndef __STM32F7xx_HAL_H |
<> | 144:ef7eb2e8f9f7 | 41 | #define __STM32F7xx_HAL_H |
<> | 144:ef7eb2e8f9f7 | 42 | |
<> | 144:ef7eb2e8f9f7 | 43 | #ifdef __cplusplus |
<> | 144:ef7eb2e8f9f7 | 44 | extern "C" { |
<> | 144:ef7eb2e8f9f7 | 45 | #endif |
<> | 144:ef7eb2e8f9f7 | 46 | |
<> | 144:ef7eb2e8f9f7 | 47 | /* Includes ------------------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 48 | #include "stm32f7xx_hal_conf.h" |
<> | 144:ef7eb2e8f9f7 | 49 | |
<> | 144:ef7eb2e8f9f7 | 50 | /** @addtogroup STM32F7xx_HAL_Driver |
<> | 144:ef7eb2e8f9f7 | 51 | * @{ |
<> | 144:ef7eb2e8f9f7 | 52 | */ |
<> | 144:ef7eb2e8f9f7 | 53 | |
<> | 144:ef7eb2e8f9f7 | 54 | /** @addtogroup HAL |
<> | 144:ef7eb2e8f9f7 | 55 | * @{ |
<> | 144:ef7eb2e8f9f7 | 56 | */ |
<> | 144:ef7eb2e8f9f7 | 57 | |
<> | 144:ef7eb2e8f9f7 | 58 | /* Exported types ------------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 59 | /* Exported constants --------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 60 | /** @defgroup SYSCFG_Exported_Constants SYSCFG Exported Constants |
<> | 144:ef7eb2e8f9f7 | 61 | * @{ |
<> | 144:ef7eb2e8f9f7 | 62 | */ |
<> | 144:ef7eb2e8f9f7 | 63 | |
<> | 144:ef7eb2e8f9f7 | 64 | /** @defgroup SYSCFG_BootMode Boot Mode |
<> | 144:ef7eb2e8f9f7 | 65 | * @{ |
<> | 144:ef7eb2e8f9f7 | 66 | */ |
<> | 144:ef7eb2e8f9f7 | 67 | #define SYSCFG_MEM_BOOT_ADD0 ((uint32_t)0x00000000U) |
<> | 144:ef7eb2e8f9f7 | 68 | #define SYSCFG_MEM_BOOT_ADD1 SYSCFG_MEMRMP_MEM_BOOT |
<> | 144:ef7eb2e8f9f7 | 69 | /** |
<> | 144:ef7eb2e8f9f7 | 70 | * @} |
<> | 144:ef7eb2e8f9f7 | 71 | */ |
<> | 144:ef7eb2e8f9f7 | 72 | |
<> | 144:ef7eb2e8f9f7 | 73 | /** |
<> | 144:ef7eb2e8f9f7 | 74 | * @} |
<> | 144:ef7eb2e8f9f7 | 75 | */ |
<> | 144:ef7eb2e8f9f7 | 76 | |
<> | 144:ef7eb2e8f9f7 | 77 | /* Exported macro ------------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 78 | /** @defgroup HAL_Exported_Macros HAL Exported Macros |
<> | 144:ef7eb2e8f9f7 | 79 | * @{ |
<> | 144:ef7eb2e8f9f7 | 80 | */ |
<> | 144:ef7eb2e8f9f7 | 81 | |
<> | 144:ef7eb2e8f9f7 | 82 | /** @brief Freeze/Unfreeze Peripherals in Debug mode |
<> | 144:ef7eb2e8f9f7 | 83 | */ |
<> | 144:ef7eb2e8f9f7 | 84 | #define __HAL_DBGMCU_FREEZE_TIM2() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM2_STOP)) |
<> | 144:ef7eb2e8f9f7 | 85 | #define __HAL_DBGMCU_FREEZE_TIM3() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM3_STOP)) |
<> | 144:ef7eb2e8f9f7 | 86 | #define __HAL_DBGMCU_FREEZE_TIM4() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM4_STOP)) |
<> | 144:ef7eb2e8f9f7 | 87 | #define __HAL_DBGMCU_FREEZE_TIM5() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM5_STOP)) |
<> | 144:ef7eb2e8f9f7 | 88 | #define __HAL_DBGMCU_FREEZE_TIM6() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM6_STOP)) |
<> | 144:ef7eb2e8f9f7 | 89 | #define __HAL_DBGMCU_FREEZE_TIM7() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM7_STOP)) |
<> | 144:ef7eb2e8f9f7 | 90 | #define __HAL_DBGMCU_FREEZE_TIM12() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM12_STOP)) |
<> | 144:ef7eb2e8f9f7 | 91 | #define __HAL_DBGMCU_FREEZE_TIM13() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM13_STOP)) |
<> | 144:ef7eb2e8f9f7 | 92 | #define __HAL_DBGMCU_FREEZE_TIM14() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM14_STOP)) |
<> | 144:ef7eb2e8f9f7 | 93 | #define __HAL_DBGMCU_FREEZE_LPTIM1() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_LPTIM1_STOP)) |
<> | 144:ef7eb2e8f9f7 | 94 | #define __HAL_DBGMCU_FREEZE_RTC() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_RTC_STOP)) |
<> | 144:ef7eb2e8f9f7 | 95 | #define __HAL_DBGMCU_FREEZE_WWDG() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_WWDG_STOP)) |
<> | 144:ef7eb2e8f9f7 | 96 | #define __HAL_DBGMCU_FREEZE_IWDG() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_IWDG_STOP)) |
<> | 144:ef7eb2e8f9f7 | 97 | #define __HAL_DBGMCU_FREEZE_I2C1_TIMEOUT() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT)) |
<> | 144:ef7eb2e8f9f7 | 98 | #define __HAL_DBGMCU_FREEZE_I2C2_TIMEOUT() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT)) |
<> | 144:ef7eb2e8f9f7 | 99 | #define __HAL_DBGMCU_FREEZE_I2C3_TIMEOUT() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C3_SMBUS_TIMEOUT)) |
<> | 144:ef7eb2e8f9f7 | 100 | #define __HAL_DBGMCU_FREEZE_I2C4_TIMEOUT() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C4_SMBUS_TIMEOUT)) |
<> | 144:ef7eb2e8f9f7 | 101 | #define __HAL_DBGMCU_FREEZE_CAN1() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_CAN1_STOP)) |
<> | 144:ef7eb2e8f9f7 | 102 | #define __HAL_DBGMCU_FREEZE_CAN2() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_CAN2_STOP)) |
<> | 144:ef7eb2e8f9f7 | 103 | #define __HAL_DBGMCU_FREEZE_TIM1() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM1_STOP)) |
<> | 144:ef7eb2e8f9f7 | 104 | #define __HAL_DBGMCU_FREEZE_TIM8() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM8_STOP)) |
<> | 144:ef7eb2e8f9f7 | 105 | #define __HAL_DBGMCU_FREEZE_TIM9() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM9_STOP)) |
<> | 144:ef7eb2e8f9f7 | 106 | #define __HAL_DBGMCU_FREEZE_TIM10() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM10_STOP)) |
<> | 144:ef7eb2e8f9f7 | 107 | #define __HAL_DBGMCU_FREEZE_TIM11() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM11_STOP)) |
<> | 144:ef7eb2e8f9f7 | 108 | |
<> | 144:ef7eb2e8f9f7 | 109 | #define __HAL_DBGMCU_UNFREEZE_TIM2() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM2_STOP)) |
<> | 144:ef7eb2e8f9f7 | 110 | #define __HAL_DBGMCU_UNFREEZE_TIM3() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM3_STOP)) |
<> | 144:ef7eb2e8f9f7 | 111 | #define __HAL_DBGMCU_UNFREEZE_TIM4() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM4_STOP)) |
<> | 144:ef7eb2e8f9f7 | 112 | #define __HAL_DBGMCU_UNFREEZE_TIM5() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM5_STOP)) |
<> | 144:ef7eb2e8f9f7 | 113 | #define __HAL_DBGMCU_UNFREEZE_TIM6() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM6_STOP)) |
<> | 144:ef7eb2e8f9f7 | 114 | #define __HAL_DBGMCU_UNFREEZE_TIM7() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM7_STOP)) |
<> | 144:ef7eb2e8f9f7 | 115 | #define __HAL_DBGMCU_UNFREEZE_TIM12() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM12_STOP)) |
<> | 144:ef7eb2e8f9f7 | 116 | #define __HAL_DBGMCU_UNFREEZE_TIM13() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM13_STOP)) |
<> | 144:ef7eb2e8f9f7 | 117 | #define __HAL_DBGMCU_UNFREEZE_TIM14() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM14_STOP)) |
<> | 144:ef7eb2e8f9f7 | 118 | #define __HAL_DBGMCU_UNFREEZE_LPTIM1() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_LPTIM1_STOP)) |
<> | 144:ef7eb2e8f9f7 | 119 | #define __HAL_DBGMCU_UNFREEZE_RTC() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_RTC_STOP)) |
<> | 144:ef7eb2e8f9f7 | 120 | #define __HAL_DBGMCU_UNFREEZE_WWDG() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_WWDG_STOP)) |
<> | 144:ef7eb2e8f9f7 | 121 | #define __HAL_DBGMCU_UNFREEZE_IWDG() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_IWDG_STOP)) |
<> | 144:ef7eb2e8f9f7 | 122 | #define __HAL_DBGMCU_UNFREEZE_I2C1_TIMEOUT() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT)) |
<> | 144:ef7eb2e8f9f7 | 123 | #define __HAL_DBGMCU_UNFREEZE_I2C2_TIMEOUT() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT)) |
<> | 144:ef7eb2e8f9f7 | 124 | #define __HAL_DBGMCU_UNFREEZE_I2C3_TIMEOUT() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C3_SMBUS_TIMEOUT)) |
<> | 144:ef7eb2e8f9f7 | 125 | #define __HAL_DBGMCU_UNFREEZE_I2C4_TIMEOUT() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C4_SMBUS_TIMEOUT)) |
<> | 144:ef7eb2e8f9f7 | 126 | #define __HAL_DBGMCU_UNFREEZE_CAN1() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_CAN1_STOP)) |
<> | 144:ef7eb2e8f9f7 | 127 | #define __HAL_DBGMCU_UNFREEZE_CAN2() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_CAN2_STOP)) |
<> | 144:ef7eb2e8f9f7 | 128 | #define __HAL_DBGMCU_UNFREEZE_TIM1() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM1_STOP)) |
<> | 144:ef7eb2e8f9f7 | 129 | #define __HAL_DBGMCU_UNFREEZE_TIM8() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM8_STOP)) |
<> | 144:ef7eb2e8f9f7 | 130 | #define __HAL_DBGMCU_UNFREEZE_TIM9() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM9_STOP)) |
<> | 144:ef7eb2e8f9f7 | 131 | #define __HAL_DBGMCU_UNFREEZE_TIM10() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM10_STOP)) |
<> | 144:ef7eb2e8f9f7 | 132 | #define __HAL_DBGMCU_UNFREEZE_TIM11() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM11_STOP)) |
<> | 144:ef7eb2e8f9f7 | 133 | |
<> | 144:ef7eb2e8f9f7 | 134 | |
<> | 144:ef7eb2e8f9f7 | 135 | /** @brief FMC (NOR/RAM) mapped at 0x60000000 and SDRAM mapped at 0xC0000000 |
<> | 144:ef7eb2e8f9f7 | 136 | */ |
<> | 144:ef7eb2e8f9f7 | 137 | #define __HAL_SYSCFG_REMAPMEMORY_FMC() (SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_SWP_FMC)) |
<> | 144:ef7eb2e8f9f7 | 138 | |
<> | 144:ef7eb2e8f9f7 | 139 | |
<> | 144:ef7eb2e8f9f7 | 140 | /** @brief FMC/SDRAM mapped at 0x60000000 (NOR/RAM) mapped at 0xC0000000 |
<> | 144:ef7eb2e8f9f7 | 141 | */ |
<> | 144:ef7eb2e8f9f7 | 142 | #define __HAL_SYSCFG_REMAPMEMORY_FMC_SDRAM() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_SWP_FMC);\ |
<> | 144:ef7eb2e8f9f7 | 143 | SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_SWP_FMC_0);\ |
<> | 144:ef7eb2e8f9f7 | 144 | }while(0); |
<> | 144:ef7eb2e8f9f7 | 145 | /** |
<> | 144:ef7eb2e8f9f7 | 146 | * @brief Return the memory boot mapping as configured by user. |
<> | 144:ef7eb2e8f9f7 | 147 | * @retval The boot mode as configured by user. The returned value can be one |
<> | 144:ef7eb2e8f9f7 | 148 | * of the following values: |
<> | 144:ef7eb2e8f9f7 | 149 | * @arg @ref SYSCFG_MEM_BOOT_ADD0 |
<> | 144:ef7eb2e8f9f7 | 150 | * @arg @ref SYSCFG_MEM_BOOT_ADD1 |
<> | 144:ef7eb2e8f9f7 | 151 | */ |
<> | 144:ef7eb2e8f9f7 | 152 | #define __HAL_SYSCFG_GET_BOOT_MODE() READ_BIT(SYSCFG->MEMRMP, SYSCFG_MEMRMP_MEM_BOOT) |
<> | 144:ef7eb2e8f9f7 | 153 | |
<> | 144:ef7eb2e8f9f7 | 154 | #if defined (STM32F765xx) || defined (STM32F767xx) || defined (STM32F769xx) || defined (STM32F777xx) || defined (STM32F779xx) |
<> | 144:ef7eb2e8f9f7 | 155 | /** @brief SYSCFG Break Cortex-M7 Lockup lock. |
<> | 144:ef7eb2e8f9f7 | 156 | * Enable and lock the connection of Cortex-M7 LOCKUP (Hardfault) output to TIM1/8 Break input. |
<> | 144:ef7eb2e8f9f7 | 157 | * @note The selected configuration is locked and can be unlocked only by system reset. |
<> | 144:ef7eb2e8f9f7 | 158 | */ |
<> | 144:ef7eb2e8f9f7 | 159 | #define __HAL_SYSCFG_BREAK_LOCKUP_LOCK() SET_BIT(SYSCFG->CBR, SYSCFG_CBR_CLL) |
<> | 144:ef7eb2e8f9f7 | 160 | |
<> | 144:ef7eb2e8f9f7 | 161 | /** @brief SYSCFG Break PVD lock. |
<> | 144:ef7eb2e8f9f7 | 162 | * Enable and lock the PVD connection to Timer1/8 Break input, as well as the PVDE and PLS[2:0] in the PWR_CR1 register. |
<> | 144:ef7eb2e8f9f7 | 163 | * @note The selected configuration is locked and can be unlocked only by system reset. |
<> | 144:ef7eb2e8f9f7 | 164 | */ |
<> | 144:ef7eb2e8f9f7 | 165 | #define __HAL_SYSCFG_BREAK_PVD_LOCK() SET_BIT(SYSCFG->CBR, SYSCFG_CBR_PVDL) |
<> | 144:ef7eb2e8f9f7 | 166 | #endif /* STM32F765xx || STM32F767xx || STM32F769xx || STM32F777xx || STM32F779xx */ |
<> | 144:ef7eb2e8f9f7 | 167 | |
<> | 144:ef7eb2e8f9f7 | 168 | /** |
<> | 144:ef7eb2e8f9f7 | 169 | * @} |
<> | 144:ef7eb2e8f9f7 | 170 | */ |
<> | 144:ef7eb2e8f9f7 | 171 | |
<> | 144:ef7eb2e8f9f7 | 172 | /* Exported functions --------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 173 | /** @addtogroup HAL_Exported_Functions |
<> | 144:ef7eb2e8f9f7 | 174 | * @{ |
<> | 144:ef7eb2e8f9f7 | 175 | */ |
<> | 144:ef7eb2e8f9f7 | 176 | /** @addtogroup HAL_Exported_Functions_Group1 |
<> | 144:ef7eb2e8f9f7 | 177 | * @{ |
<> | 144:ef7eb2e8f9f7 | 178 | */ |
<> | 144:ef7eb2e8f9f7 | 179 | /* Initialization and de-initialization functions ******************************/ |
<> | 144:ef7eb2e8f9f7 | 180 | HAL_StatusTypeDef HAL_Init(void); |
<> | 144:ef7eb2e8f9f7 | 181 | HAL_StatusTypeDef HAL_DeInit(void); |
<> | 144:ef7eb2e8f9f7 | 182 | void HAL_MspInit(void); |
<> | 144:ef7eb2e8f9f7 | 183 | void HAL_MspDeInit(void); |
<> | 144:ef7eb2e8f9f7 | 184 | HAL_StatusTypeDef HAL_InitTick (uint32_t TickPriority); |
<> | 144:ef7eb2e8f9f7 | 185 | /** |
<> | 144:ef7eb2e8f9f7 | 186 | * @} |
<> | 144:ef7eb2e8f9f7 | 187 | */ |
<> | 144:ef7eb2e8f9f7 | 188 | |
<> | 144:ef7eb2e8f9f7 | 189 | /** @addtogroup HAL_Exported_Functions_Group2 |
<> | 144:ef7eb2e8f9f7 | 190 | * @{ |
<> | 144:ef7eb2e8f9f7 | 191 | */ |
<> | 144:ef7eb2e8f9f7 | 192 | /* Peripheral Control functions ************************************************/ |
<> | 144:ef7eb2e8f9f7 | 193 | void HAL_IncTick(void); |
<> | 144:ef7eb2e8f9f7 | 194 | void HAL_Delay(__IO uint32_t Delay); |
<> | 144:ef7eb2e8f9f7 | 195 | uint32_t HAL_GetTick(void); |
<> | 144:ef7eb2e8f9f7 | 196 | void HAL_SuspendTick(void); |
<> | 144:ef7eb2e8f9f7 | 197 | void HAL_ResumeTick(void); |
<> | 144:ef7eb2e8f9f7 | 198 | uint32_t HAL_GetHalVersion(void); |
<> | 144:ef7eb2e8f9f7 | 199 | uint32_t HAL_GetREVID(void); |
<> | 144:ef7eb2e8f9f7 | 200 | uint32_t HAL_GetDEVID(void); |
<> | 144:ef7eb2e8f9f7 | 201 | void HAL_DBGMCU_EnableDBGSleepMode(void); |
<> | 144:ef7eb2e8f9f7 | 202 | void HAL_DBGMCU_DisableDBGSleepMode(void); |
<> | 144:ef7eb2e8f9f7 | 203 | void HAL_DBGMCU_EnableDBGStopMode(void); |
<> | 144:ef7eb2e8f9f7 | 204 | void HAL_DBGMCU_DisableDBGStopMode(void); |
<> | 144:ef7eb2e8f9f7 | 205 | void HAL_DBGMCU_EnableDBGStandbyMode(void); |
<> | 144:ef7eb2e8f9f7 | 206 | void HAL_DBGMCU_DisableDBGStandbyMode(void); |
<> | 144:ef7eb2e8f9f7 | 207 | void HAL_EnableCompensationCell(void); |
<> | 144:ef7eb2e8f9f7 | 208 | void HAL_DisableCompensationCell(void); |
<> | 144:ef7eb2e8f9f7 | 209 | void HAL_EnableFMCMemorySwapping(void); |
<> | 144:ef7eb2e8f9f7 | 210 | void HAL_DisableFMCMemorySwapping(void); |
<> | 144:ef7eb2e8f9f7 | 211 | #if defined (STM32F765xx) || defined (STM32F767xx) || defined (STM32F769xx) || defined (STM32F777xx) || defined (STM32F779xx) |
<> | 144:ef7eb2e8f9f7 | 212 | void HAL_EnableMemorySwappingBank(void); |
<> | 144:ef7eb2e8f9f7 | 213 | void HAL_DisableMemorySwappingBank(void); |
<> | 144:ef7eb2e8f9f7 | 214 | #endif /* STM32F765xx || STM32F767xx || STM32F769xx || STM32F777xx || STM32F779xx */ |
<> | 144:ef7eb2e8f9f7 | 215 | /** |
<> | 144:ef7eb2e8f9f7 | 216 | * @} |
<> | 144:ef7eb2e8f9f7 | 217 | */ |
<> | 144:ef7eb2e8f9f7 | 218 | |
<> | 144:ef7eb2e8f9f7 | 219 | /** |
<> | 144:ef7eb2e8f9f7 | 220 | * @} |
<> | 144:ef7eb2e8f9f7 | 221 | */ |
<> | 144:ef7eb2e8f9f7 | 222 | /* Private types -------------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 223 | /* Private variables ---------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 224 | /** @defgroup HAL_Private_Variables HAL Private Variables |
<> | 144:ef7eb2e8f9f7 | 225 | * @{ |
<> | 144:ef7eb2e8f9f7 | 226 | */ |
<> | 144:ef7eb2e8f9f7 | 227 | /** |
<> | 144:ef7eb2e8f9f7 | 228 | * @} |
<> | 144:ef7eb2e8f9f7 | 229 | */ |
<> | 144:ef7eb2e8f9f7 | 230 | /* Private constants ---------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 231 | /** @defgroup HAL_Private_Constants HAL Private Constants |
<> | 144:ef7eb2e8f9f7 | 232 | * @{ |
<> | 144:ef7eb2e8f9f7 | 233 | */ |
<> | 144:ef7eb2e8f9f7 | 234 | /** |
<> | 144:ef7eb2e8f9f7 | 235 | * @} |
<> | 144:ef7eb2e8f9f7 | 236 | */ |
<> | 144:ef7eb2e8f9f7 | 237 | /* Private macros ------------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 238 | /* Private functions ---------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 239 | /** |
<> | 144:ef7eb2e8f9f7 | 240 | * @} |
<> | 144:ef7eb2e8f9f7 | 241 | */ |
<> | 144:ef7eb2e8f9f7 | 242 | |
<> | 144:ef7eb2e8f9f7 | 243 | /** |
<> | 144:ef7eb2e8f9f7 | 244 | * @} |
<> | 144:ef7eb2e8f9f7 | 245 | */ |
<> | 144:ef7eb2e8f9f7 | 246 | |
<> | 144:ef7eb2e8f9f7 | 247 | #ifdef __cplusplus |
<> | 144:ef7eb2e8f9f7 | 248 | } |
<> | 144:ef7eb2e8f9f7 | 249 | #endif |
<> | 144:ef7eb2e8f9f7 | 250 | |
<> | 144:ef7eb2e8f9f7 | 251 | #endif /* __STM32F7xx_HAL_H */ |
<> | 144:ef7eb2e8f9f7 | 252 | |
<> | 144:ef7eb2e8f9f7 | 253 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |