Johannes Stratmann / mbed-dev

added prescaler for 16 bit pwm in LPC1347 target

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targets/cmsis/TARGET_STM/TARGET_STM32F2/stm32f2xx_hal_uart.c@144:ef7eb2e8f9f7, 2016-09-02 (annotated)

Committer:
<>
Date:
Fri Sep 02 15:07:44 2016 +0100
Revision:
144:ef7eb2e8f9f7
This updates the lib to the mbed lib v125

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file stm32f2xx_hal_uart.c
<> 144:ef7eb2e8f9f7 4 * @author MCD Application Team
<> 144:ef7eb2e8f9f7 5 * @version V1.1.3
<> 144:ef7eb2e8f9f7 6 * @date 29-June-2016
<> 144:ef7eb2e8f9f7 7 * @brief UART HAL module driver.
<> 144:ef7eb2e8f9f7 8 * This file provides firmware functions to manage the following
<> 144:ef7eb2e8f9f7 9 * functionalities of the Universal Asynchronous Receiver Transmitter (UART) peripheral:
<> 144:ef7eb2e8f9f7 10 * + Initialization and de-initialization functions
<> 144:ef7eb2e8f9f7 11 * + IO operation functions
<> 144:ef7eb2e8f9f7 12 * + Peripheral Control functions
<> 144:ef7eb2e8f9f7 13 * + Peripheral State and Errors functions
<> 144:ef7eb2e8f9f7 14 *
<> 144:ef7eb2e8f9f7 15 @verbatim
<> 144:ef7eb2e8f9f7 16 ==============================================================================
<> 144:ef7eb2e8f9f7 17 ##### How to use this driver #####
<> 144:ef7eb2e8f9f7 18 ==============================================================================
<> 144:ef7eb2e8f9f7 19 [..]
<> 144:ef7eb2e8f9f7 20 The UART HAL driver can be used as follows:
<> 144:ef7eb2e8f9f7 21
<> 144:ef7eb2e8f9f7 22 (#) Declare a UART_HandleTypeDef handle structure.
<> 144:ef7eb2e8f9f7 23
<> 144:ef7eb2e8f9f7 24 (#) Initialize the UART low level resources by implementing the HAL_UART_MspInit() API:
<> 144:ef7eb2e8f9f7 25 (##) Enable the USARTx interface clock.
<> 144:ef7eb2e8f9f7 26 (##) UART pins configuration:
<> 144:ef7eb2e8f9f7 27 (+++) Enable the clock for the UART GPIOs.
<> 144:ef7eb2e8f9f7 28 (+++) Configure these UART pins as alternate function pull-up.
<> 144:ef7eb2e8f9f7 29 (##) NVIC configuration if you need to use interrupt process (HAL_UART_Transmit_IT()
<> 144:ef7eb2e8f9f7 30 and HAL_UART_Receive_IT() APIs):
<> 144:ef7eb2e8f9f7 31 (+++) Configure the USARTx interrupt priority.
<> 144:ef7eb2e8f9f7 32 (+++) Enable the NVIC USART IRQ handle.
<> 144:ef7eb2e8f9f7 33 (##) DMA Configuration if you need to use DMA process (HAL_UART_Transmit_DMA()
<> 144:ef7eb2e8f9f7 34 and HAL_UART_Receive_DMA() APIs):
<> 144:ef7eb2e8f9f7 35 (+++) Declare a DMA handle structure for the Tx/Rx stream.
<> 144:ef7eb2e8f9f7 36 (+++) Enable the DMAx interface clock.
<> 144:ef7eb2e8f9f7 37 (+++) Configure the declared DMA handle structure with the required
<> 144:ef7eb2e8f9f7 38 Tx/Rx parameters.
<> 144:ef7eb2e8f9f7 39 (+++) Configure the DMA Tx/Rx Stream.
<> 144:ef7eb2e8f9f7 40 (+++) Associate the initialized DMA handle to the UART DMA Tx/Rx handle.
<> 144:ef7eb2e8f9f7 41 (+++) Configure the priority and enable the NVIC for the transfer complete
<> 144:ef7eb2e8f9f7 42 interrupt on the DMA Tx/Rx Stream.
<> 144:ef7eb2e8f9f7 43
<> 144:ef7eb2e8f9f7 44 (#) Program the Baud Rate, Word Length, Stop Bit, Parity, Hardware
<> 144:ef7eb2e8f9f7 45 flow control and Mode(Receiver/Transmitter) in the Init structure.
<> 144:ef7eb2e8f9f7 46
<> 144:ef7eb2e8f9f7 47 (#) For the UART asynchronous mode, initialize the UART registers by calling
<> 144:ef7eb2e8f9f7 48 the HAL_UART_Init() API.
<> 144:ef7eb2e8f9f7 49
<> 144:ef7eb2e8f9f7 50 (#) For the UART Half duplex mode, initialize the UART registers by calling
<> 144:ef7eb2e8f9f7 51 the HAL_HalfDuplex_Init() API.
<> 144:ef7eb2e8f9f7 52
<> 144:ef7eb2e8f9f7 53 (#) For the LIN mode, initialize the UART registers by calling the HAL_LIN_Init() API.
<> 144:ef7eb2e8f9f7 54
<> 144:ef7eb2e8f9f7 55 (#) For the Multi-Processor mode, initialize the UART registers by calling
<> 144:ef7eb2e8f9f7 56 the HAL_MultiProcessor_Init() API.
<> 144:ef7eb2e8f9f7 57
<> 144:ef7eb2e8f9f7 58 [..]
<> 144:ef7eb2e8f9f7 59 (@) The specific UART interrupts (Transmission complete interrupt,
<> 144:ef7eb2e8f9f7 60 RXNE interrupt and Error Interrupts) will be managed using the macros
<> 144:ef7eb2e8f9f7 61 __HAL_UART_ENABLE_IT() and __HAL_UART_DISABLE_IT() inside the transmit
<> 144:ef7eb2e8f9f7 62 and receive process.
<> 144:ef7eb2e8f9f7 63
<> 144:ef7eb2e8f9f7 64 [..]
<> 144:ef7eb2e8f9f7 65 (@) These APIs (HAL_UART_Init() and HAL_HalfDuplex_Init()) configure also the
<> 144:ef7eb2e8f9f7 66 low level Hardware GPIO, CLOCK, CORTEX...etc) by calling the customized
<> 144:ef7eb2e8f9f7 67 HAL_UART_MspInit() API.
<> 144:ef7eb2e8f9f7 68
<> 144:ef7eb2e8f9f7 69 [..]
<> 144:ef7eb2e8f9f7 70 Three operation modes are available within this driver :
<> 144:ef7eb2e8f9f7 71
<> 144:ef7eb2e8f9f7 72 *** Polling mode IO operation ***
<> 144:ef7eb2e8f9f7 73 =================================
<> 144:ef7eb2e8f9f7 74 [..]
<> 144:ef7eb2e8f9f7 75 (+) Send an amount of data in blocking mode using HAL_UART_Transmit()
<> 144:ef7eb2e8f9f7 76 (+) Receive an amount of data in blocking mode using HAL_UART_Receive()
<> 144:ef7eb2e8f9f7 77
<> 144:ef7eb2e8f9f7 78 *** Interrupt mode IO operation ***
<> 144:ef7eb2e8f9f7 79 ===================================
<> 144:ef7eb2e8f9f7 80 [..]
<> 144:ef7eb2e8f9f7 81 (+) Send an amount of data in non blocking mode using HAL_UART_Transmit_IT()
<> 144:ef7eb2e8f9f7 82 (+) At transmission end of transfer HAL_UART_TxCpltCallback is executed and user can
<> 144:ef7eb2e8f9f7 83 add his own code by customization of function pointer HAL_UART_TxCpltCallback
<> 144:ef7eb2e8f9f7 84 (+) Receive an amount of data in non blocking mode using HAL_UART_Receive_IT()
<> 144:ef7eb2e8f9f7 85 (+) At reception end of transfer HAL_UART_RxCpltCallback is executed and user can
<> 144:ef7eb2e8f9f7 86 add his own code by customization of function pointer HAL_UART_RxCpltCallback
<> 144:ef7eb2e8f9f7 87 (+) In case of transfer Error, HAL_UART_ErrorCallback() function is executed and user can
<> 144:ef7eb2e8f9f7 88 add his own code by customization of function pointer HAL_UART_ErrorCallback
<> 144:ef7eb2e8f9f7 89
<> 144:ef7eb2e8f9f7 90 *** DMA mode IO operation ***
<> 144:ef7eb2e8f9f7 91 ==============================
<> 144:ef7eb2e8f9f7 92 [..]
<> 144:ef7eb2e8f9f7 93 (+) Send an amount of data in non blocking mode (DMA) using HAL_UART_Transmit_DMA()
<> 144:ef7eb2e8f9f7 94 (+) At transmission end of half transfer HAL_UART_TxHalfCpltCallback is executed and user can
<> 144:ef7eb2e8f9f7 95 add his own code by customization of function pointer HAL_UART_TxHalfCpltCallback
<> 144:ef7eb2e8f9f7 96 (+) At transmission end of transfer HAL_UART_TxCpltCallback is executed and user can
<> 144:ef7eb2e8f9f7 97 add his own code by customization of function pointer HAL_UART_TxCpltCallback
<> 144:ef7eb2e8f9f7 98 (+) Receive an amount of data in non blocking mode (DMA) using HAL_UART_Receive_DMA()
<> 144:ef7eb2e8f9f7 99 (+) At reception end of half transfer HAL_UART_RxHalfCpltCallback is executed and user can
<> 144:ef7eb2e8f9f7 100 add his own code by customization of function pointer HAL_UART_RxHalfCpltCallback
<> 144:ef7eb2e8f9f7 101 (+) At reception end of transfer HAL_UART_RxCpltCallback is executed and user can
<> 144:ef7eb2e8f9f7 102 add his own code by customization of function pointer HAL_UART_RxCpltCallback
<> 144:ef7eb2e8f9f7 103 (+) In case of transfer Error, HAL_UART_ErrorCallback() function is executed and user can
<> 144:ef7eb2e8f9f7 104 add his own code by customization of function pointer HAL_UART_ErrorCallback
<> 144:ef7eb2e8f9f7 105 (+) Pause the DMA Transfer using HAL_UART_DMAPause()
<> 144:ef7eb2e8f9f7 106 (+) Resume the DMA Transfer using HAL_UART_DMAResume()
<> 144:ef7eb2e8f9f7 107 (+) Stop the DMA Transfer using HAL_UART_DMAStop()
<> 144:ef7eb2e8f9f7 108
<> 144:ef7eb2e8f9f7 109 *** UART HAL driver macros list ***
<> 144:ef7eb2e8f9f7 110 =============================================
<> 144:ef7eb2e8f9f7 111 [..]
<> 144:ef7eb2e8f9f7 112 Below the list of most used macros in UART HAL driver.
<> 144:ef7eb2e8f9f7 113
<> 144:ef7eb2e8f9f7 114 (+) __HAL_UART_ENABLE: Enable the UART peripheral
<> 144:ef7eb2e8f9f7 115 (+) __HAL_UART_DISABLE: Disable the UART peripheral
<> 144:ef7eb2e8f9f7 116 (+) __HAL_UART_GET_FLAG : Check whether the specified UART flag is set or not
<> 144:ef7eb2e8f9f7 117 (+) __HAL_UART_CLEAR_FLAG : Clear the specified UART pending flag
<> 144:ef7eb2e8f9f7 118 (+) __HAL_UART_ENABLE_IT: Enable the specified UART interrupt
<> 144:ef7eb2e8f9f7 119 (+) __HAL_UART_DISABLE_IT: Disable the specified UART interrupt
<> 144:ef7eb2e8f9f7 120 (+) __HAL_UART_GET_IT_SOURCE: Check whether the specified UART interrupt has occurred or not
<> 144:ef7eb2e8f9f7 121
<> 144:ef7eb2e8f9f7 122 [..]
<> 144:ef7eb2e8f9f7 123 (@) You can refer to the UART HAL driver header file for more useful macros
<> 144:ef7eb2e8f9f7 124
<> 144:ef7eb2e8f9f7 125 @endverbatim
<> 144:ef7eb2e8f9f7 126 ******************************************************************************
<> 144:ef7eb2e8f9f7 127 * @attention
<> 144:ef7eb2e8f9f7 128 *
<> 144:ef7eb2e8f9f7 129 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 144:ef7eb2e8f9f7 130 *
<> 144:ef7eb2e8f9f7 131 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 132 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 133 * 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 134 * this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 135 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 136 * this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 137 * and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 138 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 139 * may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 140 * without specific prior written permission.
<> 144:ef7eb2e8f9f7 141 *
<> 144:ef7eb2e8f9f7 142 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 143 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 144 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 145 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 146 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 147 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 148 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 149 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 150 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 151 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 152 *
<> 144:ef7eb2e8f9f7 153 ******************************************************************************
<> 144:ef7eb2e8f9f7 154 */
<> 144:ef7eb2e8f9f7 155
<> 144:ef7eb2e8f9f7 156 /* Includes ------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 157 #include "stm32f2xx_hal.h"
<> 144:ef7eb2e8f9f7 158
<> 144:ef7eb2e8f9f7 159 /** @addtogroup STM32F2xx_HAL_Driver
<> 144:ef7eb2e8f9f7 160 * @{
<> 144:ef7eb2e8f9f7 161 */
<> 144:ef7eb2e8f9f7 162
<> 144:ef7eb2e8f9f7 163 /** @defgroup UART UART
<> 144:ef7eb2e8f9f7 164 * @brief HAL UART module driver
<> 144:ef7eb2e8f9f7 165 * @{
<> 144:ef7eb2e8f9f7 166 */
<> 144:ef7eb2e8f9f7 167 #ifdef HAL_UART_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 168
<> 144:ef7eb2e8f9f7 169 /* Private typedef -----------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 170 /* Private define ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 171 /** @addtogroup UART_Private_Constants
<> 144:ef7eb2e8f9f7 172 * @{
<> 144:ef7eb2e8f9f7 173 */
<> 144:ef7eb2e8f9f7 174 /**
<> 144:ef7eb2e8f9f7 175 * @}
<> 144:ef7eb2e8f9f7 176 */
<> 144:ef7eb2e8f9f7 177 /* Private macro -------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 178 /* Private variables ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 179 /* Private function prototypes -----------------------------------------------*/
<> 144:ef7eb2e8f9f7 180 /** @addtogroup UART_Private_Functions UART Private Functions
<> 144:ef7eb2e8f9f7 181 * @{
<> 144:ef7eb2e8f9f7 182 */
<> 144:ef7eb2e8f9f7 183 static void UART_EndTxTransfer(UART_HandleTypeDef *huart);
<> 144:ef7eb2e8f9f7 184 static void UART_EndRxTransfer(UART_HandleTypeDef *huart);
<> 144:ef7eb2e8f9f7 185 static void UART_DMATransmitCplt(DMA_HandleTypeDef *hdma);
<> 144:ef7eb2e8f9f7 186 static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma);
<> 144:ef7eb2e8f9f7 187 static void UART_DMATxHalfCplt(DMA_HandleTypeDef *hdma);
<> 144:ef7eb2e8f9f7 188 static void UART_DMARxHalfCplt(DMA_HandleTypeDef *hdma);
<> 144:ef7eb2e8f9f7 189 static void UART_DMAError(DMA_HandleTypeDef *hdma);
<> 144:ef7eb2e8f9f7 190 static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma);
<> 144:ef7eb2e8f9f7 191 static HAL_StatusTypeDef UART_Transmit_IT(UART_HandleTypeDef *huart);
<> 144:ef7eb2e8f9f7 192 static HAL_StatusTypeDef UART_EndTransmit_IT(UART_HandleTypeDef *huart);
<> 144:ef7eb2e8f9f7 193 static HAL_StatusTypeDef UART_Receive_IT(UART_HandleTypeDef *huart);
<> 144:ef7eb2e8f9f7 194 static HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout);
<> 144:ef7eb2e8f9f7 195 static void UART_SetConfig (UART_HandleTypeDef *huart);
<> 144:ef7eb2e8f9f7 196 /**
<> 144:ef7eb2e8f9f7 197 * @}
<> 144:ef7eb2e8f9f7 198 */
<> 144:ef7eb2e8f9f7 199
<> 144:ef7eb2e8f9f7 200 /* Exported functions ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 201 /** @defgroup UART_Exported_Functions UART Exported Functions
<> 144:ef7eb2e8f9f7 202 * @{
<> 144:ef7eb2e8f9f7 203 */
<> 144:ef7eb2e8f9f7 204
<> 144:ef7eb2e8f9f7 205 /** @defgroup UART_Exported_Functions_Group1 Initialization and de-initialization functions
<> 144:ef7eb2e8f9f7 206 * @brief Initialization and Configuration functions
<> 144:ef7eb2e8f9f7 207 *
<> 144:ef7eb2e8f9f7 208 @verbatim
<> 144:ef7eb2e8f9f7 209 ===============================================================================
<> 144:ef7eb2e8f9f7 210 ##### Initialization and Configuration functions #####
<> 144:ef7eb2e8f9f7 211 ===============================================================================
<> 144:ef7eb2e8f9f7 212 [..]
<> 144:ef7eb2e8f9f7 213 This subsection provides a set of functions allowing to initialize the USARTx or the UARTy
<> 144:ef7eb2e8f9f7 214 in asynchronous mode.
<> 144:ef7eb2e8f9f7 215 (+) For the asynchronous mode only these parameters can be configured:
<> 144:ef7eb2e8f9f7 216 (++) Baud Rate
<> 144:ef7eb2e8f9f7 217 (++) Word Length
<> 144:ef7eb2e8f9f7 218 (++) Stop Bit
<> 144:ef7eb2e8f9f7 219 (++) Parity: If the parity is enabled, then the MSB bit of the data written
<> 144:ef7eb2e8f9f7 220 in the data register is transmitted but is changed by the parity bit.
<> 144:ef7eb2e8f9f7 221 Depending on the frame length defined by the M bit (8-bits or 9-bits),
<> 144:ef7eb2e8f9f7 222 please refer to Reference manual for possible UART frame formats.
<> 144:ef7eb2e8f9f7 223 (++) Hardware flow control
<> 144:ef7eb2e8f9f7 224 (++) Receiver/transmitter modes
<> 144:ef7eb2e8f9f7 225 (++) Over Sampling Method
<> 144:ef7eb2e8f9f7 226 [..]
<> 144:ef7eb2e8f9f7 227 The HAL_UART_Init(), HAL_HalfDuplex_Init(), HAL_LIN_Init() and HAL_MultiProcessor_Init() APIs
<> 144:ef7eb2e8f9f7 228 follow respectively the UART asynchronous, UART Half duplex, LIN and Multi-Processor
<> 144:ef7eb2e8f9f7 229 configuration procedures (details for the procedures are available in reference manual (RM0329)).
<> 144:ef7eb2e8f9f7 230
<> 144:ef7eb2e8f9f7 231 @endverbatim
<> 144:ef7eb2e8f9f7 232 * @{
<> 144:ef7eb2e8f9f7 233 */
<> 144:ef7eb2e8f9f7 234
<> 144:ef7eb2e8f9f7 235 /**
<> 144:ef7eb2e8f9f7 236 * @brief Initializes the UART mode according to the specified parameters in
<> 144:ef7eb2e8f9f7 237 * the UART_InitTypeDef and create the associated handle.
<> 144:ef7eb2e8f9f7 238 * @param huart: pointer to a UART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 239 * the configuration information for the specified UART module.
<> 144:ef7eb2e8f9f7 240 * @retval HAL status
<> 144:ef7eb2e8f9f7 241 */
<> 144:ef7eb2e8f9f7 242 HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart)
<> 144:ef7eb2e8f9f7 243 {
<> 144:ef7eb2e8f9f7 244 /* Check the UART handle allocation */
<> 144:ef7eb2e8f9f7 245 if(huart == NULL)
<> 144:ef7eb2e8f9f7 246 {
<> 144:ef7eb2e8f9f7 247 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 248 }
<> 144:ef7eb2e8f9f7 249
<> 144:ef7eb2e8f9f7 250 /* Check the parameters */
<> 144:ef7eb2e8f9f7 251 if(huart->Init.HwFlowCtl != UART_HWCONTROL_NONE)
<> 144:ef7eb2e8f9f7 252 {
<> 144:ef7eb2e8f9f7 253 /* The hardware flow control is available only for USART1, USART2, USART3 and USART6 */
<> 144:ef7eb2e8f9f7 254 assert_param(IS_UART_HWFLOW_INSTANCE(huart->Instance));
<> 144:ef7eb2e8f9f7 255 assert_param(IS_UART_HARDWARE_FLOW_CONTROL(huart->Init.HwFlowCtl));
<> 144:ef7eb2e8f9f7 256 }
<> 144:ef7eb2e8f9f7 257 else
<> 144:ef7eb2e8f9f7 258 {
<> 144:ef7eb2e8f9f7 259 assert_param(IS_UART_INSTANCE(huart->Instance));
<> 144:ef7eb2e8f9f7 260 }
<> 144:ef7eb2e8f9f7 261 assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength));
<> 144:ef7eb2e8f9f7 262 assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling));
<> 144:ef7eb2e8f9f7 263
<> 144:ef7eb2e8f9f7 264 if(huart->gState == HAL_UART_STATE_RESET)
<> 144:ef7eb2e8f9f7 265 {
<> 144:ef7eb2e8f9f7 266 /* Allocate lock resource and initialize it */
<> 144:ef7eb2e8f9f7 267 huart->Lock = HAL_UNLOCKED;
<> 144:ef7eb2e8f9f7 268 /* Init the low level hardware */
<> 144:ef7eb2e8f9f7 269 HAL_UART_MspInit(huart);
<> 144:ef7eb2e8f9f7 270 }
<> 144:ef7eb2e8f9f7 271
<> 144:ef7eb2e8f9f7 272 huart->gState = HAL_UART_STATE_BUSY;
<> 144:ef7eb2e8f9f7 273
<> 144:ef7eb2e8f9f7 274 /* Disable the peripheral */
<> 144:ef7eb2e8f9f7 275 __HAL_UART_DISABLE(huart);
<> 144:ef7eb2e8f9f7 276
<> 144:ef7eb2e8f9f7 277 /* Set the UART Communication parameters */
<> 144:ef7eb2e8f9f7 278 UART_SetConfig(huart);
<> 144:ef7eb2e8f9f7 279
<> 144:ef7eb2e8f9f7 280 /* In asynchronous mode, the following bits must be kept cleared:
<> 144:ef7eb2e8f9f7 281 - LINEN and CLKEN bits in the USART_CR2 register,
<> 144:ef7eb2e8f9f7 282 - SCEN, HDSEL and IREN bits in the USART_CR3 register.*/
<> 144:ef7eb2e8f9f7 283 CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
<> 144:ef7eb2e8f9f7 284 CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
<> 144:ef7eb2e8f9f7 285
<> 144:ef7eb2e8f9f7 286 /* Enable the peripheral */
<> 144:ef7eb2e8f9f7 287 __HAL_UART_ENABLE(huart);
<> 144:ef7eb2e8f9f7 288
<> 144:ef7eb2e8f9f7 289 /* Initialize the UART state */
<> 144:ef7eb2e8f9f7 290 huart->ErrorCode = HAL_UART_ERROR_NONE;
<> 144:ef7eb2e8f9f7 291 huart->gState= HAL_UART_STATE_READY;
<> 144:ef7eb2e8f9f7 292 huart->RxState= HAL_UART_STATE_READY;
<> 144:ef7eb2e8f9f7 293
<> 144:ef7eb2e8f9f7 294 return HAL_OK;
<> 144:ef7eb2e8f9f7 295 }
<> 144:ef7eb2e8f9f7 296
<> 144:ef7eb2e8f9f7 297 /**
<> 144:ef7eb2e8f9f7 298 * @brief Initializes the half-duplex mode according to the specified
<> 144:ef7eb2e8f9f7 299 * parameters in the UART_InitTypeDef and create the associated handle.
<> 144:ef7eb2e8f9f7 300 * @param huart: pointer to a UART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 301 * the configuration information for the specified UART module.
<> 144:ef7eb2e8f9f7 302 * @retval HAL status
<> 144:ef7eb2e8f9f7 303 */
<> 144:ef7eb2e8f9f7 304 HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart)
<> 144:ef7eb2e8f9f7 305 {
<> 144:ef7eb2e8f9f7 306 /* Check the UART handle allocation */
<> 144:ef7eb2e8f9f7 307 if(huart == NULL)
<> 144:ef7eb2e8f9f7 308 {
<> 144:ef7eb2e8f9f7 309 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 310 }
<> 144:ef7eb2e8f9f7 311
<> 144:ef7eb2e8f9f7 312 /* Check the parameters */
<> 144:ef7eb2e8f9f7 313 assert_param(IS_UART_INSTANCE(huart->Instance));
<> 144:ef7eb2e8f9f7 314 assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength));
<> 144:ef7eb2e8f9f7 315 assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling));
<> 144:ef7eb2e8f9f7 316
<> 144:ef7eb2e8f9f7 317 if(huart->gState == HAL_UART_STATE_RESET)
<> 144:ef7eb2e8f9f7 318 {
<> 144:ef7eb2e8f9f7 319 /* Allocate lock resource and initialize it */
<> 144:ef7eb2e8f9f7 320 huart->Lock = HAL_UNLOCKED;
<> 144:ef7eb2e8f9f7 321 /* Init the low level hardware */
<> 144:ef7eb2e8f9f7 322 HAL_UART_MspInit(huart);
<> 144:ef7eb2e8f9f7 323 }
<> 144:ef7eb2e8f9f7 324
<> 144:ef7eb2e8f9f7 325 huart->gState = HAL_UART_STATE_BUSY;
<> 144:ef7eb2e8f9f7 326
<> 144:ef7eb2e8f9f7 327 /* Disable the peripheral */
<> 144:ef7eb2e8f9f7 328 __HAL_UART_DISABLE(huart);
<> 144:ef7eb2e8f9f7 329
<> 144:ef7eb2e8f9f7 330 /* Set the UART Communication parameters */
<> 144:ef7eb2e8f9f7 331 UART_SetConfig(huart);
<> 144:ef7eb2e8f9f7 332
<> 144:ef7eb2e8f9f7 333 /* In half-duplex mode, the following bits must be kept cleared:
<> 144:ef7eb2e8f9f7 334 - LINEN and CLKEN bits in the USART_CR2 register,
<> 144:ef7eb2e8f9f7 335 - SCEN and IREN bits in the USART_CR3 register.*/
<> 144:ef7eb2e8f9f7 336 CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
<> 144:ef7eb2e8f9f7 337 CLEAR_BIT(huart->Instance->CR3, (USART_CR3_IREN | USART_CR3_SCEN));
<> 144:ef7eb2e8f9f7 338
<> 144:ef7eb2e8f9f7 339 /* Enable the Half-Duplex mode by setting the HDSEL bit in the CR3 register */
<> 144:ef7eb2e8f9f7 340 SET_BIT(huart->Instance->CR3, USART_CR3_HDSEL);
<> 144:ef7eb2e8f9f7 341
<> 144:ef7eb2e8f9f7 342 /* Enable the peripheral */
<> 144:ef7eb2e8f9f7 343 __HAL_UART_ENABLE(huart);
<> 144:ef7eb2e8f9f7 344
<> 144:ef7eb2e8f9f7 345 /* Initialize the UART state*/
<> 144:ef7eb2e8f9f7 346 huart->ErrorCode = HAL_UART_ERROR_NONE;
<> 144:ef7eb2e8f9f7 347 huart->gState= HAL_UART_STATE_READY;
<> 144:ef7eb2e8f9f7 348 huart->RxState= HAL_UART_STATE_READY;
<> 144:ef7eb2e8f9f7 349
<> 144:ef7eb2e8f9f7 350 return HAL_OK;
<> 144:ef7eb2e8f9f7 351 }
<> 144:ef7eb2e8f9f7 352
<> 144:ef7eb2e8f9f7 353 /**
<> 144:ef7eb2e8f9f7 354 * @brief Initializes the LIN mode according to the specified
<> 144:ef7eb2e8f9f7 355 * parameters in the UART_InitTypeDef and create the associated handle.
<> 144:ef7eb2e8f9f7 356 * @param huart: pointer to a UART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 357 * the configuration information for the specified UART module.
<> 144:ef7eb2e8f9f7 358 * @param BreakDetectLength: Specifies the LIN break detection length.
<> 144:ef7eb2e8f9f7 359 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 360 * @arg UART_LINBREAKDETECTLENGTH_10B: 10-bit break detection
<> 144:ef7eb2e8f9f7 361 * @arg UART_LINBREAKDETECTLENGTH_11B: 11-bit break detection
<> 144:ef7eb2e8f9f7 362 * @retval HAL status
<> 144:ef7eb2e8f9f7 363 */
<> 144:ef7eb2e8f9f7 364 HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength)
<> 144:ef7eb2e8f9f7 365 {
<> 144:ef7eb2e8f9f7 366 /* Check the UART handle allocation */
<> 144:ef7eb2e8f9f7 367 if(huart == NULL)
<> 144:ef7eb2e8f9f7 368 {
<> 144:ef7eb2e8f9f7 369 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 370 }
<> 144:ef7eb2e8f9f7 371
<> 144:ef7eb2e8f9f7 372 /* Check the parameters */
<> 144:ef7eb2e8f9f7 373 assert_param(IS_UART_INSTANCE(huart->Instance));
<> 144:ef7eb2e8f9f7 374 assert_param(IS_UART_LIN_BREAK_DETECT_LENGTH(BreakDetectLength));
<> 144:ef7eb2e8f9f7 375 assert_param(IS_UART_LIN_WORD_LENGTH(huart->Init.WordLength));
<> 144:ef7eb2e8f9f7 376 assert_param(IS_UART_LIN_OVERSAMPLING(huart->Init.OverSampling));
<> 144:ef7eb2e8f9f7 377
<> 144:ef7eb2e8f9f7 378 if(huart->gState == HAL_UART_STATE_RESET)
<> 144:ef7eb2e8f9f7 379 {
<> 144:ef7eb2e8f9f7 380 /* Allocate lock resource and initialize it */
<> 144:ef7eb2e8f9f7 381 huart->Lock = HAL_UNLOCKED;
<> 144:ef7eb2e8f9f7 382 /* Init the low level hardware */
<> 144:ef7eb2e8f9f7 383 HAL_UART_MspInit(huart);
<> 144:ef7eb2e8f9f7 384 }
<> 144:ef7eb2e8f9f7 385
<> 144:ef7eb2e8f9f7 386 huart->gState = HAL_UART_STATE_BUSY;
<> 144:ef7eb2e8f9f7 387
<> 144:ef7eb2e8f9f7 388 /* Disable the peripheral */
<> 144:ef7eb2e8f9f7 389 __HAL_UART_DISABLE(huart);
<> 144:ef7eb2e8f9f7 390
<> 144:ef7eb2e8f9f7 391 /* Set the UART Communication parameters */
<> 144:ef7eb2e8f9f7 392 UART_SetConfig(huart);
<> 144:ef7eb2e8f9f7 393
<> 144:ef7eb2e8f9f7 394 /* In LIN mode, the following bits must be kept cleared:
<> 144:ef7eb2e8f9f7 395 - LINEN and CLKEN bits in the USART_CR2 register,
<> 144:ef7eb2e8f9f7 396 - SCEN and IREN bits in the USART_CR3 register.*/
<> 144:ef7eb2e8f9f7 397 CLEAR_BIT(huart->Instance->CR2, USART_CR2_CLKEN);
<> 144:ef7eb2e8f9f7 398 CLEAR_BIT(huart->Instance->CR3, (USART_CR3_HDSEL | USART_CR3_IREN | USART_CR3_SCEN));
<> 144:ef7eb2e8f9f7 399
<> 144:ef7eb2e8f9f7 400 /* Enable the LIN mode by setting the LINEN bit in the CR2 register */
<> 144:ef7eb2e8f9f7 401 SET_BIT(huart->Instance->CR2, USART_CR2_LINEN);
<> 144:ef7eb2e8f9f7 402
<> 144:ef7eb2e8f9f7 403 /* Set the USART LIN Break detection length. */
<> 144:ef7eb2e8f9f7 404 CLEAR_BIT(huart->Instance->CR2, USART_CR2_LBDL);
<> 144:ef7eb2e8f9f7 405 SET_BIT(huart->Instance->CR2, BreakDetectLength);
<> 144:ef7eb2e8f9f7 406
<> 144:ef7eb2e8f9f7 407 /* Enable the peripheral */
<> 144:ef7eb2e8f9f7 408 __HAL_UART_ENABLE(huart);
<> 144:ef7eb2e8f9f7 409
<> 144:ef7eb2e8f9f7 410 /* Initialize the UART state*/
<> 144:ef7eb2e8f9f7 411 huart->ErrorCode = HAL_UART_ERROR_NONE;
<> 144:ef7eb2e8f9f7 412 huart->gState= HAL_UART_STATE_READY;
<> 144:ef7eb2e8f9f7 413 huart->RxState= HAL_UART_STATE_READY;
<> 144:ef7eb2e8f9f7 414
<> 144:ef7eb2e8f9f7 415 return HAL_OK;
<> 144:ef7eb2e8f9f7 416 }
<> 144:ef7eb2e8f9f7 417
<> 144:ef7eb2e8f9f7 418 /**
<> 144:ef7eb2e8f9f7 419 * @brief Initializes the Multi-Processor mode according to the specified
<> 144:ef7eb2e8f9f7 420 * parameters in the UART_InitTypeDef and create the associated handle.
<> 144:ef7eb2e8f9f7 421 * @param huart: pointer to a UART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 422 * the configuration information for the specified UART module.
<> 144:ef7eb2e8f9f7 423 * @param Address: USART address
<> 144:ef7eb2e8f9f7 424 * @param WakeUpMethod: specifies the USART wake-up method.
<> 144:ef7eb2e8f9f7 425 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 426 * @arg UART_WAKEUPMETHOD_IDLELINE: Wake-up by an idle line detection
<> 144:ef7eb2e8f9f7 427 * @arg UART_WAKEUPMETHOD_ADDRESSMARK: Wake-up by an address mark
<> 144:ef7eb2e8f9f7 428 * @retval HAL status
<> 144:ef7eb2e8f9f7 429 */
<> 144:ef7eb2e8f9f7 430 HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod)
<> 144:ef7eb2e8f9f7 431 {
<> 144:ef7eb2e8f9f7 432 /* Check the UART handle allocation */
<> 144:ef7eb2e8f9f7 433 if(huart == NULL)
<> 144:ef7eb2e8f9f7 434 {
<> 144:ef7eb2e8f9f7 435 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 436 }
<> 144:ef7eb2e8f9f7 437
<> 144:ef7eb2e8f9f7 438 /* Check the parameters */
<> 144:ef7eb2e8f9f7 439 assert_param(IS_UART_INSTANCE(huart->Instance));
<> 144:ef7eb2e8f9f7 440 assert_param(IS_UART_WAKEUPMETHOD(WakeUpMethod));
<> 144:ef7eb2e8f9f7 441 assert_param(IS_UART_ADDRESS(Address));
<> 144:ef7eb2e8f9f7 442 assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength));
<> 144:ef7eb2e8f9f7 443 assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling));
<> 144:ef7eb2e8f9f7 444
<> 144:ef7eb2e8f9f7 445 if(huart->gState == HAL_UART_STATE_RESET)
<> 144:ef7eb2e8f9f7 446 {
<> 144:ef7eb2e8f9f7 447 /* Allocate lock resource and initialize it */
<> 144:ef7eb2e8f9f7 448 huart->Lock = HAL_UNLOCKED;
<> 144:ef7eb2e8f9f7 449 /* Init the low level hardware */
<> 144:ef7eb2e8f9f7 450 HAL_UART_MspInit(huart);
<> 144:ef7eb2e8f9f7 451 }
<> 144:ef7eb2e8f9f7 452
<> 144:ef7eb2e8f9f7 453 huart->gState = HAL_UART_STATE_BUSY;
<> 144:ef7eb2e8f9f7 454
<> 144:ef7eb2e8f9f7 455 /* Disable the peripheral */
<> 144:ef7eb2e8f9f7 456 __HAL_UART_DISABLE(huart);
<> 144:ef7eb2e8f9f7 457
<> 144:ef7eb2e8f9f7 458 /* Set the UART Communication parameters */
<> 144:ef7eb2e8f9f7 459 UART_SetConfig(huart);
<> 144:ef7eb2e8f9f7 460
<> 144:ef7eb2e8f9f7 461 /* In Multi-Processor mode, the following bits must be kept cleared:
<> 144:ef7eb2e8f9f7 462 - LINEN and CLKEN bits in the USART_CR2 register,
<> 144:ef7eb2e8f9f7 463 - SCEN, HDSEL and IREN bits in the USART_CR3 register */
<> 144:ef7eb2e8f9f7 464 CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
<> 144:ef7eb2e8f9f7 465 CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
<> 144:ef7eb2e8f9f7 466
<> 144:ef7eb2e8f9f7 467 /* Clear the USART address */
<> 144:ef7eb2e8f9f7 468 CLEAR_BIT(huart->Instance->CR2, USART_CR2_ADD);
<> 144:ef7eb2e8f9f7 469 /* Set the USART address node */
<> 144:ef7eb2e8f9f7 470 SET_BIT(huart->Instance->CR2, Address);
<> 144:ef7eb2e8f9f7 471
<> 144:ef7eb2e8f9f7 472 /* Set the wake up method by setting the WAKE bit in the CR1 register */
<> 144:ef7eb2e8f9f7 473 CLEAR_BIT(huart->Instance->CR1, USART_CR1_WAKE);
<> 144:ef7eb2e8f9f7 474 SET_BIT(huart->Instance->CR1, WakeUpMethod);
<> 144:ef7eb2e8f9f7 475
<> 144:ef7eb2e8f9f7 476 /* Enable the peripheral */
<> 144:ef7eb2e8f9f7 477 __HAL_UART_ENABLE(huart);
<> 144:ef7eb2e8f9f7 478
<> 144:ef7eb2e8f9f7 479 /* Initialize the UART state */
<> 144:ef7eb2e8f9f7 480 huart->ErrorCode = HAL_UART_ERROR_NONE;
<> 144:ef7eb2e8f9f7 481 huart->gState= HAL_UART_STATE_READY;
<> 144:ef7eb2e8f9f7 482 huart->RxState= HAL_UART_STATE_READY;
<> 144:ef7eb2e8f9f7 483
<> 144:ef7eb2e8f9f7 484 return HAL_OK;
<> 144:ef7eb2e8f9f7 485 }
<> 144:ef7eb2e8f9f7 486
<> 144:ef7eb2e8f9f7 487 /**
<> 144:ef7eb2e8f9f7 488 * @brief DeInitializes the UART peripheral.
<> 144:ef7eb2e8f9f7 489 * @param huart: pointer to a UART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 490 * the configuration information for the specified UART module.
<> 144:ef7eb2e8f9f7 491 * @retval HAL status
<> 144:ef7eb2e8f9f7 492 */
<> 144:ef7eb2e8f9f7 493 HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart)
<> 144:ef7eb2e8f9f7 494 {
<> 144:ef7eb2e8f9f7 495 /* Check the UART handle allocation */
<> 144:ef7eb2e8f9f7 496 if(huart == NULL)
<> 144:ef7eb2e8f9f7 497 {
<> 144:ef7eb2e8f9f7 498 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 499 }
<> 144:ef7eb2e8f9f7 500
<> 144:ef7eb2e8f9f7 501 /* Check the parameters */
<> 144:ef7eb2e8f9f7 502 assert_param(IS_UART_INSTANCE(huart->Instance));
<> 144:ef7eb2e8f9f7 503
<> 144:ef7eb2e8f9f7 504 huart->gState = HAL_UART_STATE_BUSY;
<> 144:ef7eb2e8f9f7 505
<> 144:ef7eb2e8f9f7 506 /* DeInit the low level hardware */
<> 144:ef7eb2e8f9f7 507 HAL_UART_MspDeInit(huart);
<> 144:ef7eb2e8f9f7 508
<> 144:ef7eb2e8f9f7 509 huart->ErrorCode = HAL_UART_ERROR_NONE;
<> 144:ef7eb2e8f9f7 510 huart->gState = HAL_UART_STATE_RESET;
<> 144:ef7eb2e8f9f7 511 huart->RxState = HAL_UART_STATE_RESET;
<> 144:ef7eb2e8f9f7 512
<> 144:ef7eb2e8f9f7 513 /* Process Lock */
<> 144:ef7eb2e8f9f7 514 __HAL_UNLOCK(huart);
<> 144:ef7eb2e8f9f7 515
<> 144:ef7eb2e8f9f7 516 return HAL_OK;
<> 144:ef7eb2e8f9f7 517 }
<> 144:ef7eb2e8f9f7 518
<> 144:ef7eb2e8f9f7 519 /**
<> 144:ef7eb2e8f9f7 520 * @brief UART MSP Init.
<> 144:ef7eb2e8f9f7 521 * @param huart: pointer to a UART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 522 * the configuration information for the specified UART module.
<> 144:ef7eb2e8f9f7 523 * @retval None
<> 144:ef7eb2e8f9f7 524 */
<> 144:ef7eb2e8f9f7 525 __weak void HAL_UART_MspInit(UART_HandleTypeDef *huart)
<> 144:ef7eb2e8f9f7 526 {
<> 144:ef7eb2e8f9f7 527 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 528 UNUSED(huart);
<> 144:ef7eb2e8f9f7 529 /* NOTE: This function Should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 530 the HAL_UART_MspInit could be implemented in the user file
<> 144:ef7eb2e8f9f7 531 */
<> 144:ef7eb2e8f9f7 532 }
<> 144:ef7eb2e8f9f7 533
<> 144:ef7eb2e8f9f7 534 /**
<> 144:ef7eb2e8f9f7 535 * @brief UART MSP DeInit.
<> 144:ef7eb2e8f9f7 536 * @param huart: pointer to a UART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 537 * the configuration information for the specified UART module.
<> 144:ef7eb2e8f9f7 538 * @retval None
<> 144:ef7eb2e8f9f7 539 */
<> 144:ef7eb2e8f9f7 540 __weak void HAL_UART_MspDeInit(UART_HandleTypeDef *huart)
<> 144:ef7eb2e8f9f7 541 {
<> 144:ef7eb2e8f9f7 542 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 543 UNUSED(huart);
<> 144:ef7eb2e8f9f7 544 /* NOTE: This function Should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 545 the HAL_UART_MspDeInit could be implemented in the user file
<> 144:ef7eb2e8f9f7 546 */
<> 144:ef7eb2e8f9f7 547 }
<> 144:ef7eb2e8f9f7 548
<> 144:ef7eb2e8f9f7 549 /**
<> 144:ef7eb2e8f9f7 550 * @}
<> 144:ef7eb2e8f9f7 551 */
<> 144:ef7eb2e8f9f7 552
<> 144:ef7eb2e8f9f7 553 /** @defgroup UART_Exported_Functions_Group2 IO operation functions
<> 144:ef7eb2e8f9f7 554 * @brief UART Transmit and Receive functions
<> 144:ef7eb2e8f9f7 555 *
<> 144:ef7eb2e8f9f7 556 @verbatim
<> 144:ef7eb2e8f9f7 557 ==============================================================================
<> 144:ef7eb2e8f9f7 558 ##### IO operation functions #####
<> 144:ef7eb2e8f9f7 559 ==============================================================================
<> 144:ef7eb2e8f9f7 560 [..]
<> 144:ef7eb2e8f9f7 561 This subsection provides a set of functions allowing to manage the UART asynchronous
<> 144:ef7eb2e8f9f7 562 and Half duplex data transfers.
<> 144:ef7eb2e8f9f7 563
<> 144:ef7eb2e8f9f7 564 (#) There are two modes of transfer:
<> 144:ef7eb2e8f9f7 565 (++) Blocking mode: The communication is performed in polling mode.
<> 144:ef7eb2e8f9f7 566 The HAL status of all data processing is returned by the same function
<> 144:ef7eb2e8f9f7 567 after finishing transfer.
<> 144:ef7eb2e8f9f7 568 (++) Non blocking mode: The communication is performed using Interrupts
<> 144:ef7eb2e8f9f7 569 or DMA, these APIs return the HAL status.
<> 144:ef7eb2e8f9f7 570 The end of the data processing will be indicated through the
<> 144:ef7eb2e8f9f7 571 dedicated UART IRQ when using Interrupt mode or the DMA IRQ when
<> 144:ef7eb2e8f9f7 572 using DMA mode.
<> 144:ef7eb2e8f9f7 573 The HAL_UART_TxCpltCallback(), HAL_UART_RxCpltCallback() user callbacks
<> 144:ef7eb2e8f9f7 574 will be executed respectively at the end of the transmit or receive process.
<> 144:ef7eb2e8f9f7 575 The HAL_UART_ErrorCallback() user callback will be executed when
<> 144:ef7eb2e8f9f7 576 a communication error is detected.
<> 144:ef7eb2e8f9f7 577
<> 144:ef7eb2e8f9f7 578 (#) Blocking mode APIs are:
<> 144:ef7eb2e8f9f7 579 (++) HAL_UART_Transmit()
<> 144:ef7eb2e8f9f7 580 (++) HAL_UART_Receive()
<> 144:ef7eb2e8f9f7 581
<> 144:ef7eb2e8f9f7 582 (#) Non Blocking mode APIs with Interrupt are:
<> 144:ef7eb2e8f9f7 583 (++) HAL_UART_Transmit_IT()
<> 144:ef7eb2e8f9f7 584 (++) HAL_UART_Receive_IT()
<> 144:ef7eb2e8f9f7 585 (++) HAL_UART_IRQHandler()
<> 144:ef7eb2e8f9f7 586
<> 144:ef7eb2e8f9f7 587 (#) Non Blocking mode functions with DMA are:
<> 144:ef7eb2e8f9f7 588 (++) HAL_UART_Transmit_DMA()
<> 144:ef7eb2e8f9f7 589 (++) HAL_UART_Receive_DMA()
<> 144:ef7eb2e8f9f7 590
<> 144:ef7eb2e8f9f7 591 (#) A set of Transfer Complete Callbacks are provided in non blocking mode:
<> 144:ef7eb2e8f9f7 592 (++) HAL_UART_TxCpltCallback()
<> 144:ef7eb2e8f9f7 593 (++) HAL_UART_RxCpltCallback()
<> 144:ef7eb2e8f9f7 594 (++) HAL_UART_ErrorCallback()
<> 144:ef7eb2e8f9f7 595
<> 144:ef7eb2e8f9f7 596 [..]
<> 144:ef7eb2e8f9f7 597 (@) In the Half duplex communication, it is forbidden to run the transmit
<> 144:ef7eb2e8f9f7 598 and receive process in parallel, the UART state HAL_UART_STATE_BUSY_TX_RX
<> 144:ef7eb2e8f9f7 599 can't be useful.
<> 144:ef7eb2e8f9f7 600
<> 144:ef7eb2e8f9f7 601 @endverbatim
<> 144:ef7eb2e8f9f7 602 * @{
<> 144:ef7eb2e8f9f7 603 */
<> 144:ef7eb2e8f9f7 604
<> 144:ef7eb2e8f9f7 605 /**
<> 144:ef7eb2e8f9f7 606 * @brief Sends an amount of data in blocking mode.
<> 144:ef7eb2e8f9f7 607 * @param huart: pointer to a UART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 608 * the configuration information for the specified UART module.
<> 144:ef7eb2e8f9f7 609 * @param pData: Pointer to data buffer
<> 144:ef7eb2e8f9f7 610 * @param Size: Amount of data to be sent
<> 144:ef7eb2e8f9f7 611 * @param Timeout: Timeout duration
<> 144:ef7eb2e8f9f7 612 * @retval HAL status
<> 144:ef7eb2e8f9f7 613 */
<> 144:ef7eb2e8f9f7 614 HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout)
<> 144:ef7eb2e8f9f7 615 {
<> 144:ef7eb2e8f9f7 616 uint16_t* tmp;
<> 144:ef7eb2e8f9f7 617 uint32_t tickstart = 0U;
<> 144:ef7eb2e8f9f7 618
<> 144:ef7eb2e8f9f7 619 /* Check that a Tx process is not already ongoing */
<> 144:ef7eb2e8f9f7 620 if(huart->gState == HAL_UART_STATE_READY)
<> 144:ef7eb2e8f9f7 621 {
<> 144:ef7eb2e8f9f7 622 if((pData == NULL ) || (Size == 0U))
<> 144:ef7eb2e8f9f7 623 {
<> 144:ef7eb2e8f9f7 624 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 625 }
<> 144:ef7eb2e8f9f7 626
<> 144:ef7eb2e8f9f7 627 /* Process Locked */
<> 144:ef7eb2e8f9f7 628 __HAL_LOCK(huart);
<> 144:ef7eb2e8f9f7 629
<> 144:ef7eb2e8f9f7 630 huart->ErrorCode = HAL_UART_ERROR_NONE;
<> 144:ef7eb2e8f9f7 631 huart->gState = HAL_UART_STATE_BUSY_TX;
<> 144:ef7eb2e8f9f7 632
<> 144:ef7eb2e8f9f7 633 /* Init tickstart for timeout managment */
<> 144:ef7eb2e8f9f7 634 tickstart = HAL_GetTick();
<> 144:ef7eb2e8f9f7 635
<> 144:ef7eb2e8f9f7 636 huart->TxXferSize = Size;
<> 144:ef7eb2e8f9f7 637 huart->TxXferCount = Size;
<> 144:ef7eb2e8f9f7 638 while(huart->TxXferCount > 0U)
<> 144:ef7eb2e8f9f7 639 {
<> 144:ef7eb2e8f9f7 640 huart->TxXferCount--;
<> 144:ef7eb2e8f9f7 641 if(huart->Init.WordLength == UART_WORDLENGTH_9B)
<> 144:ef7eb2e8f9f7 642 {
<> 144:ef7eb2e8f9f7 643 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
<> 144:ef7eb2e8f9f7 644 {
<> 144:ef7eb2e8f9f7 645 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 646 }
<> 144:ef7eb2e8f9f7 647 tmp = (uint16_t*) pData;
<> 144:ef7eb2e8f9f7 648 huart->Instance->DR = (*tmp & (uint16_t)0x01FFU);
<> 144:ef7eb2e8f9f7 649 if(huart->Init.Parity == UART_PARITY_NONE)
<> 144:ef7eb2e8f9f7 650 {
<> 144:ef7eb2e8f9f7 651 pData +=2;
<> 144:ef7eb2e8f9f7 652 }
<> 144:ef7eb2e8f9f7 653 else
<> 144:ef7eb2e8f9f7 654 {
<> 144:ef7eb2e8f9f7 655 pData +=1;
<> 144:ef7eb2e8f9f7 656 }
<> 144:ef7eb2e8f9f7 657 }
<> 144:ef7eb2e8f9f7 658 else
<> 144:ef7eb2e8f9f7 659 {
<> 144:ef7eb2e8f9f7 660 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
<> 144:ef7eb2e8f9f7 661 {
<> 144:ef7eb2e8f9f7 662 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 663 }
<> 144:ef7eb2e8f9f7 664 huart->Instance->DR = (*pData++ & (uint8_t)0xFFU);
<> 144:ef7eb2e8f9f7 665 }
<> 144:ef7eb2e8f9f7 666 }
<> 144:ef7eb2e8f9f7 667
<> 144:ef7eb2e8f9f7 668 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK)
<> 144:ef7eb2e8f9f7 669 {
<> 144:ef7eb2e8f9f7 670 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 671 }
<> 144:ef7eb2e8f9f7 672
<> 144:ef7eb2e8f9f7 673 /* At end of Tx process, restore huart->gState to Ready */
<> 144:ef7eb2e8f9f7 674 huart->gState = HAL_UART_STATE_READY;
<> 144:ef7eb2e8f9f7 675
<> 144:ef7eb2e8f9f7 676 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 677 __HAL_UNLOCK(huart);
<> 144:ef7eb2e8f9f7 678
<> 144:ef7eb2e8f9f7 679 return HAL_OK;
<> 144:ef7eb2e8f9f7 680 }
<> 144:ef7eb2e8f9f7 681 else
<> 144:ef7eb2e8f9f7 682 {
<> 144:ef7eb2e8f9f7 683 return HAL_BUSY;
<> 144:ef7eb2e8f9f7 684 }
<> 144:ef7eb2e8f9f7 685 }
<> 144:ef7eb2e8f9f7 686
<> 144:ef7eb2e8f9f7 687 /**
<> 144:ef7eb2e8f9f7 688 * @brief Receives an amount of data in blocking mode.
<> 144:ef7eb2e8f9f7 689 * @param huart: pointer to a UART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 690 * the configuration information for the specified UART module.
<> 144:ef7eb2e8f9f7 691 * @param pData: Pointer to data buffer
<> 144:ef7eb2e8f9f7 692 * @param Size: Amount of data to be received
<> 144:ef7eb2e8f9f7 693 * @param Timeout: Timeout duration
<> 144:ef7eb2e8f9f7 694 * @retval HAL status
<> 144:ef7eb2e8f9f7 695 */
<> 144:ef7eb2e8f9f7 696 HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout)
<> 144:ef7eb2e8f9f7 697 {
<> 144:ef7eb2e8f9f7 698 uint16_t* tmp;
<> 144:ef7eb2e8f9f7 699 uint32_t tickstart = 0U;
<> 144:ef7eb2e8f9f7 700
<> 144:ef7eb2e8f9f7 701 /* Check that a Rx process is not already ongoing */
<> 144:ef7eb2e8f9f7 702 if(huart->RxState == HAL_UART_STATE_READY)
<> 144:ef7eb2e8f9f7 703 {
<> 144:ef7eb2e8f9f7 704 if((pData == NULL ) || (Size == 0U))
<> 144:ef7eb2e8f9f7 705 {
<> 144:ef7eb2e8f9f7 706 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 707 }
<> 144:ef7eb2e8f9f7 708
<> 144:ef7eb2e8f9f7 709 /* Process Locked */
<> 144:ef7eb2e8f9f7 710 __HAL_LOCK(huart);
<> 144:ef7eb2e8f9f7 711
<> 144:ef7eb2e8f9f7 712 huart->ErrorCode = HAL_UART_ERROR_NONE;
<> 144:ef7eb2e8f9f7 713 huart->RxState = HAL_UART_STATE_BUSY_RX;
<> 144:ef7eb2e8f9f7 714
<> 144:ef7eb2e8f9f7 715 /* Init tickstart for timeout managment */
<> 144:ef7eb2e8f9f7 716 tickstart = HAL_GetTick();
<> 144:ef7eb2e8f9f7 717
<> 144:ef7eb2e8f9f7 718 huart->RxXferSize = Size;
<> 144:ef7eb2e8f9f7 719 huart->RxXferCount = Size;
<> 144:ef7eb2e8f9f7 720
<> 144:ef7eb2e8f9f7 721 /* Check the remain data to be received */
<> 144:ef7eb2e8f9f7 722 while(huart->RxXferCount > 0U)
<> 144:ef7eb2e8f9f7 723 {
<> 144:ef7eb2e8f9f7 724 huart->RxXferCount--;
<> 144:ef7eb2e8f9f7 725 if(huart->Init.WordLength == UART_WORDLENGTH_9B)
<> 144:ef7eb2e8f9f7 726 {
<> 144:ef7eb2e8f9f7 727 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_RXNE, RESET, tickstart, Timeout) != HAL_OK)
<> 144:ef7eb2e8f9f7 728 {
<> 144:ef7eb2e8f9f7 729 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 730 }
<> 144:ef7eb2e8f9f7 731 tmp = (uint16_t*) pData ;
<> 144:ef7eb2e8f9f7 732 if(huart->Init.Parity == UART_PARITY_NONE)
<> 144:ef7eb2e8f9f7 733 {
<> 144:ef7eb2e8f9f7 734 *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FFU);
<> 144:ef7eb2e8f9f7 735 pData +=2;
<> 144:ef7eb2e8f9f7 736 }
<> 144:ef7eb2e8f9f7 737 else
<> 144:ef7eb2e8f9f7 738 {
<> 144:ef7eb2e8f9f7 739 *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x00FFU);
<> 144:ef7eb2e8f9f7 740 pData +=1;
<> 144:ef7eb2e8f9f7 741 }
<> 144:ef7eb2e8f9f7 742
<> 144:ef7eb2e8f9f7 743 }
<> 144:ef7eb2e8f9f7 744 else
<> 144:ef7eb2e8f9f7 745 {
<> 144:ef7eb2e8f9f7 746 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_RXNE, RESET, tickstart, Timeout) != HAL_OK)
<> 144:ef7eb2e8f9f7 747 {
<> 144:ef7eb2e8f9f7 748 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 749 }
<> 144:ef7eb2e8f9f7 750 if(huart->Init.Parity == UART_PARITY_NONE)
<> 144:ef7eb2e8f9f7 751 {
<> 144:ef7eb2e8f9f7 752 *pData++ = (uint8_t)(huart->Instance->DR & (uint8_t)0x00FFU);
<> 144:ef7eb2e8f9f7 753 }
<> 144:ef7eb2e8f9f7 754 else
<> 144:ef7eb2e8f9f7 755 {
<> 144:ef7eb2e8f9f7 756 *pData++ = (uint8_t)(huart->Instance->DR & (uint8_t)0x007FU);
<> 144:ef7eb2e8f9f7 757 }
<> 144:ef7eb2e8f9f7 758
<> 144:ef7eb2e8f9f7 759 }
<> 144:ef7eb2e8f9f7 760 }
<> 144:ef7eb2e8f9f7 761
<> 144:ef7eb2e8f9f7 762 /* At end of Rx process, restore huart->RxState to Ready */
<> 144:ef7eb2e8f9f7 763 huart->RxState = HAL_UART_STATE_READY;
<> 144:ef7eb2e8f9f7 764
<> 144:ef7eb2e8f9f7 765 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 766 __HAL_UNLOCK(huart);
<> 144:ef7eb2e8f9f7 767
<> 144:ef7eb2e8f9f7 768 return HAL_OK;
<> 144:ef7eb2e8f9f7 769 }
<> 144:ef7eb2e8f9f7 770 else
<> 144:ef7eb2e8f9f7 771 {
<> 144:ef7eb2e8f9f7 772 return HAL_BUSY;
<> 144:ef7eb2e8f9f7 773 }
<> 144:ef7eb2e8f9f7 774 }
<> 144:ef7eb2e8f9f7 775
<> 144:ef7eb2e8f9f7 776 /**
<> 144:ef7eb2e8f9f7 777 * @brief Sends an amount of data in non blocking mode.
<> 144:ef7eb2e8f9f7 778 * @param huart: pointer to a UART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 779 * the configuration information for the specified UART module.
<> 144:ef7eb2e8f9f7 780 * @param pData: Pointer to data buffer
<> 144:ef7eb2e8f9f7 781 * @param Size: Amount of data to be sent
<> 144:ef7eb2e8f9f7 782 * @retval HAL status
<> 144:ef7eb2e8f9f7 783 */
<> 144:ef7eb2e8f9f7 784 HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
<> 144:ef7eb2e8f9f7 785 {
<> 144:ef7eb2e8f9f7 786 /* Check that a Tx process is not already ongoing */
<> 144:ef7eb2e8f9f7 787 if(huart->gState == HAL_UART_STATE_READY)
<> 144:ef7eb2e8f9f7 788 {
<> 144:ef7eb2e8f9f7 789 if((pData == NULL ) || (Size == 0U))
<> 144:ef7eb2e8f9f7 790 {
<> 144:ef7eb2e8f9f7 791 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 792 }
<> 144:ef7eb2e8f9f7 793
<> 144:ef7eb2e8f9f7 794 /* Process Locked */
<> 144:ef7eb2e8f9f7 795 __HAL_LOCK(huart);
<> 144:ef7eb2e8f9f7 796
<> 144:ef7eb2e8f9f7 797 huart->pTxBuffPtr = pData;
<> 144:ef7eb2e8f9f7 798 huart->TxXferSize = Size;
<> 144:ef7eb2e8f9f7 799 huart->TxXferCount = Size;
<> 144:ef7eb2e8f9f7 800
<> 144:ef7eb2e8f9f7 801 huart->ErrorCode = HAL_UART_ERROR_NONE;
<> 144:ef7eb2e8f9f7 802 huart->gState = HAL_UART_STATE_BUSY_TX;
<> 144:ef7eb2e8f9f7 803
<> 144:ef7eb2e8f9f7 804 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 805 __HAL_UNLOCK(huart);
<> 144:ef7eb2e8f9f7 806
<> 144:ef7eb2e8f9f7 807 /* Enable the UART Transmit data register empty Interrupt */
<> 144:ef7eb2e8f9f7 808 SET_BIT(huart->Instance->CR1, USART_CR1_TXEIE);
<> 144:ef7eb2e8f9f7 809
<> 144:ef7eb2e8f9f7 810 return HAL_OK;
<> 144:ef7eb2e8f9f7 811 }
<> 144:ef7eb2e8f9f7 812 else
<> 144:ef7eb2e8f9f7 813 {
<> 144:ef7eb2e8f9f7 814 return HAL_BUSY;
<> 144:ef7eb2e8f9f7 815 }
<> 144:ef7eb2e8f9f7 816 }
<> 144:ef7eb2e8f9f7 817
<> 144:ef7eb2e8f9f7 818 /**
<> 144:ef7eb2e8f9f7 819 * @brief Receives an amount of data in non blocking mode
<> 144:ef7eb2e8f9f7 820 * @param huart: pointer to a UART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 821 * the configuration information for the specified UART module.
<> 144:ef7eb2e8f9f7 822 * @param pData: Pointer to data buffer
<> 144:ef7eb2e8f9f7 823 * @param Size: Amount of data to be received
<> 144:ef7eb2e8f9f7 824 * @retval HAL status
<> 144:ef7eb2e8f9f7 825 */
<> 144:ef7eb2e8f9f7 826 HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
<> 144:ef7eb2e8f9f7 827 {
<> 144:ef7eb2e8f9f7 828 /* Check that a Rx process is not already ongoing */
<> 144:ef7eb2e8f9f7 829 if(huart->RxState == HAL_UART_STATE_READY)
<> 144:ef7eb2e8f9f7 830 {
<> 144:ef7eb2e8f9f7 831 if((pData == NULL ) || (Size == 0U))
<> 144:ef7eb2e8f9f7 832 {
<> 144:ef7eb2e8f9f7 833 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 834 }
<> 144:ef7eb2e8f9f7 835
<> 144:ef7eb2e8f9f7 836 /* Process Locked */
<> 144:ef7eb2e8f9f7 837 __HAL_LOCK(huart);
<> 144:ef7eb2e8f9f7 838
<> 144:ef7eb2e8f9f7 839 huart->pRxBuffPtr = pData;
<> 144:ef7eb2e8f9f7 840 huart->RxXferSize = Size;
<> 144:ef7eb2e8f9f7 841 huart->RxXferCount = Size;
<> 144:ef7eb2e8f9f7 842
<> 144:ef7eb2e8f9f7 843 huart->ErrorCode = HAL_UART_ERROR_NONE;
<> 144:ef7eb2e8f9f7 844 huart->RxState = HAL_UART_STATE_BUSY_RX;
<> 144:ef7eb2e8f9f7 845
<> 144:ef7eb2e8f9f7 846 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 847 __HAL_UNLOCK(huart);
<> 144:ef7eb2e8f9f7 848
<> 144:ef7eb2e8f9f7 849 /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */
<> 144:ef7eb2e8f9f7 850 SET_BIT(huart->Instance->CR3, USART_CR3_EIE);
<> 144:ef7eb2e8f9f7 851
<> 144:ef7eb2e8f9f7 852 /* Enable the UART Parity Error and Data Register not empty Interrupts */
<> 144:ef7eb2e8f9f7 853 SET_BIT(huart->Instance->CR1, USART_CR1_PEIE | USART_CR1_RXNEIE);
<> 144:ef7eb2e8f9f7 854
<> 144:ef7eb2e8f9f7 855 return HAL_OK;
<> 144:ef7eb2e8f9f7 856 }
<> 144:ef7eb2e8f9f7 857 else
<> 144:ef7eb2e8f9f7 858 {
<> 144:ef7eb2e8f9f7 859 return HAL_BUSY;
<> 144:ef7eb2e8f9f7 860 }
<> 144:ef7eb2e8f9f7 861 }
<> 144:ef7eb2e8f9f7 862
<> 144:ef7eb2e8f9f7 863 /**
<> 144:ef7eb2e8f9f7 864 * @brief Sends an amount of data in non blocking mode.
<> 144:ef7eb2e8f9f7 865 * @param huart: pointer to a UART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 866 * the configuration information for the specified UART module.
<> 144:ef7eb2e8f9f7 867 * @param pData: Pointer to data buffer
<> 144:ef7eb2e8f9f7 868 * @param Size: Amount of data to be sent
<> 144:ef7eb2e8f9f7 869 * @retval HAL status
<> 144:ef7eb2e8f9f7 870 */
<> 144:ef7eb2e8f9f7 871 HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
<> 144:ef7eb2e8f9f7 872 {
<> 144:ef7eb2e8f9f7 873 uint32_t *tmp;
<> 144:ef7eb2e8f9f7 874
<> 144:ef7eb2e8f9f7 875 /* Check that a Tx process is not already ongoing */
<> 144:ef7eb2e8f9f7 876 if(huart->gState == HAL_UART_STATE_READY)
<> 144:ef7eb2e8f9f7 877 {
<> 144:ef7eb2e8f9f7 878 if((pData == NULL ) || (Size == 0U))
<> 144:ef7eb2e8f9f7 879 {
<> 144:ef7eb2e8f9f7 880 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 881 }
<> 144:ef7eb2e8f9f7 882
<> 144:ef7eb2e8f9f7 883 /* Process Locked */
<> 144:ef7eb2e8f9f7 884 __HAL_LOCK(huart);
<> 144:ef7eb2e8f9f7 885
<> 144:ef7eb2e8f9f7 886 huart->pTxBuffPtr = pData;
<> 144:ef7eb2e8f9f7 887 huart->TxXferSize = Size;
<> 144:ef7eb2e8f9f7 888 huart->TxXferCount = Size;
<> 144:ef7eb2e8f9f7 889
<> 144:ef7eb2e8f9f7 890 huart->ErrorCode = HAL_UART_ERROR_NONE;
<> 144:ef7eb2e8f9f7 891 huart->gState = HAL_UART_STATE_BUSY_TX;
<> 144:ef7eb2e8f9f7 892
<> 144:ef7eb2e8f9f7 893 /* Set the UART DMA transfer complete callback */
<> 144:ef7eb2e8f9f7 894 huart->hdmatx->XferCpltCallback = UART_DMATransmitCplt;
<> 144:ef7eb2e8f9f7 895
<> 144:ef7eb2e8f9f7 896 /* Set the UART DMA Half transfer complete callback */
<> 144:ef7eb2e8f9f7 897 huart->hdmatx->XferHalfCpltCallback = UART_DMATxHalfCplt;
<> 144:ef7eb2e8f9f7 898
<> 144:ef7eb2e8f9f7 899 /* Set the DMA error callback */
<> 144:ef7eb2e8f9f7 900 huart->hdmatx->XferErrorCallback = UART_DMAError;
<> 144:ef7eb2e8f9f7 901
<> 144:ef7eb2e8f9f7 902 /* Set the DMA abort callback */
<> 144:ef7eb2e8f9f7 903 huart->hdmatx->XferAbortCallback = NULL;
<> 144:ef7eb2e8f9f7 904
<> 144:ef7eb2e8f9f7 905 /* Enable the UART transmit DMA Stream */
<> 144:ef7eb2e8f9f7 906 tmp = (uint32_t*)&pData;
<> 144:ef7eb2e8f9f7 907 HAL_DMA_Start_IT(huart->hdmatx, *(uint32_t*)tmp, (uint32_t)&huart->Instance->DR, Size);
<> 144:ef7eb2e8f9f7 908
<> 144:ef7eb2e8f9f7 909 /* Clear the TC flag in the SR register by writing 0 to it */
<> 144:ef7eb2e8f9f7 910 __HAL_UART_CLEAR_FLAG(huart, UART_FLAG_TC);
<> 144:ef7eb2e8f9f7 911
<> 144:ef7eb2e8f9f7 912 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 913 __HAL_UNLOCK(huart);
<> 144:ef7eb2e8f9f7 914
<> 144:ef7eb2e8f9f7 915 /* Enable the DMA transfer for transmit request by setting the DMAT bit
<> 144:ef7eb2e8f9f7 916 in the UART CR3 register */
<> 144:ef7eb2e8f9f7 917 SET_BIT(huart->Instance->CR3, USART_CR3_DMAT);
<> 144:ef7eb2e8f9f7 918
<> 144:ef7eb2e8f9f7 919 return HAL_OK;
<> 144:ef7eb2e8f9f7 920 }
<> 144:ef7eb2e8f9f7 921 else
<> 144:ef7eb2e8f9f7 922 {
<> 144:ef7eb2e8f9f7 923 return HAL_BUSY;
<> 144:ef7eb2e8f9f7 924 }
<> 144:ef7eb2e8f9f7 925 }
<> 144:ef7eb2e8f9f7 926
<> 144:ef7eb2e8f9f7 927 /**
<> 144:ef7eb2e8f9f7 928 * @brief Receives an amount of data in non blocking mode.
<> 144:ef7eb2e8f9f7 929 * @param huart: pointer to a UART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 930 * the configuration information for the specified UART module.
<> 144:ef7eb2e8f9f7 931 * @param pData: Pointer to data buffer
<> 144:ef7eb2e8f9f7 932 * @param Size: Amount of data to be received
<> 144:ef7eb2e8f9f7 933 * @note When the UART parity is enabled (PCE = 1) the data received contain the parity bit.
<> 144:ef7eb2e8f9f7 934 * @retval HAL status
<> 144:ef7eb2e8f9f7 935 */
<> 144:ef7eb2e8f9f7 936 HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
<> 144:ef7eb2e8f9f7 937 {
<> 144:ef7eb2e8f9f7 938 uint32_t *tmp;
<> 144:ef7eb2e8f9f7 939
<> 144:ef7eb2e8f9f7 940 /* Check that a Rx process is not already ongoing */
<> 144:ef7eb2e8f9f7 941 if(huart->RxState == HAL_UART_STATE_READY)
<> 144:ef7eb2e8f9f7 942 {
<> 144:ef7eb2e8f9f7 943 if((pData == NULL ) || (Size == 0U))
<> 144:ef7eb2e8f9f7 944 {
<> 144:ef7eb2e8f9f7 945 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 946 }
<> 144:ef7eb2e8f9f7 947
<> 144:ef7eb2e8f9f7 948 /* Process Locked */
<> 144:ef7eb2e8f9f7 949 __HAL_LOCK(huart);
<> 144:ef7eb2e8f9f7 950
<> 144:ef7eb2e8f9f7 951 huart->pRxBuffPtr = pData;
<> 144:ef7eb2e8f9f7 952 huart->RxXferSize = Size;
<> 144:ef7eb2e8f9f7 953
<> 144:ef7eb2e8f9f7 954 huart->ErrorCode = HAL_UART_ERROR_NONE;
<> 144:ef7eb2e8f9f7 955 huart->RxState = HAL_UART_STATE_BUSY_RX;
<> 144:ef7eb2e8f9f7 956
<> 144:ef7eb2e8f9f7 957 /* Set the UART DMA transfer complete callback */
<> 144:ef7eb2e8f9f7 958 huart->hdmarx->XferCpltCallback = UART_DMAReceiveCplt;
<> 144:ef7eb2e8f9f7 959
<> 144:ef7eb2e8f9f7 960 /* Set the UART DMA Half transfer complete callback */
<> 144:ef7eb2e8f9f7 961 huart->hdmarx->XferHalfCpltCallback = UART_DMARxHalfCplt;
<> 144:ef7eb2e8f9f7 962
<> 144:ef7eb2e8f9f7 963 /* Set the DMA error callback */
<> 144:ef7eb2e8f9f7 964 huart->hdmarx->XferErrorCallback = UART_DMAError;
<> 144:ef7eb2e8f9f7 965
<> 144:ef7eb2e8f9f7 966 /* Set the DMA abort callback */
<> 144:ef7eb2e8f9f7 967 huart->hdmarx->XferAbortCallback = NULL;
<> 144:ef7eb2e8f9f7 968
<> 144:ef7eb2e8f9f7 969 /* Enable the DMA Stream */
<> 144:ef7eb2e8f9f7 970 tmp = (uint32_t*)&pData;
<> 144:ef7eb2e8f9f7 971 HAL_DMA_Start_IT(huart->hdmarx, (uint32_t)&huart->Instance->DR, *(uint32_t*)tmp, Size);
<> 144:ef7eb2e8f9f7 972
<> 144:ef7eb2e8f9f7 973 /* Enable the UART Parity Error Interrupt */
<> 144:ef7eb2e8f9f7 974 SET_BIT(huart->Instance->CR1, USART_CR1_PEIE);
<> 144:ef7eb2e8f9f7 975
<> 144:ef7eb2e8f9f7 976 /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */
<> 144:ef7eb2e8f9f7 977 SET_BIT(huart->Instance->CR3, USART_CR3_EIE);
<> 144:ef7eb2e8f9f7 978
<> 144:ef7eb2e8f9f7 979 /* Enable the DMA transfer for the receiver request by setting the DMAR bit
<> 144:ef7eb2e8f9f7 980 in the UART CR3 register */
<> 144:ef7eb2e8f9f7 981 SET_BIT(huart->Instance->CR3, USART_CR3_DMAR);
<> 144:ef7eb2e8f9f7 982
<> 144:ef7eb2e8f9f7 983 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 984 __HAL_UNLOCK(huart);
<> 144:ef7eb2e8f9f7 985
<> 144:ef7eb2e8f9f7 986 return HAL_OK;
<> 144:ef7eb2e8f9f7 987 }
<> 144:ef7eb2e8f9f7 988 else
<> 144:ef7eb2e8f9f7 989 {
<> 144:ef7eb2e8f9f7 990 return HAL_BUSY;
<> 144:ef7eb2e8f9f7 991 }
<> 144:ef7eb2e8f9f7 992 }
<> 144:ef7eb2e8f9f7 993
<> 144:ef7eb2e8f9f7 994 /**
<> 144:ef7eb2e8f9f7 995 * @brief Pauses the DMA Transfer.
<> 144:ef7eb2e8f9f7 996 * @param huart: pointer to a UART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 997 * the configuration information for the specified UART module.
<> 144:ef7eb2e8f9f7 998 * @retval HAL status
<> 144:ef7eb2e8f9f7 999 */
<> 144:ef7eb2e8f9f7 1000 HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart)
<> 144:ef7eb2e8f9f7 1001 {
<> 144:ef7eb2e8f9f7 1002 uint32_t dmarequest = 0x00U;
<> 144:ef7eb2e8f9f7 1003
<> 144:ef7eb2e8f9f7 1004 /* Process Locked */
<> 144:ef7eb2e8f9f7 1005 __HAL_LOCK(huart);
<> 144:ef7eb2e8f9f7 1006 dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT);
<> 144:ef7eb2e8f9f7 1007 if((huart->gState == HAL_UART_STATE_BUSY_TX) && dmarequest)
<> 144:ef7eb2e8f9f7 1008 {
<> 144:ef7eb2e8f9f7 1009 /* Disable the UART DMA Tx request */
<> 144:ef7eb2e8f9f7 1010 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
<> 144:ef7eb2e8f9f7 1011 }
<> 144:ef7eb2e8f9f7 1012 dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR);
<> 144:ef7eb2e8f9f7 1013 if((huart->RxState == HAL_UART_STATE_BUSY_RX) && dmarequest)
<> 144:ef7eb2e8f9f7 1014 {
<> 144:ef7eb2e8f9f7 1015 /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
<> 144:ef7eb2e8f9f7 1016 CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
<> 144:ef7eb2e8f9f7 1017 CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
<> 144:ef7eb2e8f9f7 1018
<> 144:ef7eb2e8f9f7 1019 /* Disable the UART DMA Rx request */
<> 144:ef7eb2e8f9f7 1020 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
<> 144:ef7eb2e8f9f7 1021 }
<> 144:ef7eb2e8f9f7 1022
<> 144:ef7eb2e8f9f7 1023 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1024 __HAL_UNLOCK(huart);
<> 144:ef7eb2e8f9f7 1025
<> 144:ef7eb2e8f9f7 1026 return HAL_OK;
<> 144:ef7eb2e8f9f7 1027 }
<> 144:ef7eb2e8f9f7 1028
<> 144:ef7eb2e8f9f7 1029 /**
<> 144:ef7eb2e8f9f7 1030 * @brief Resumes the DMA Transfer.
<> 144:ef7eb2e8f9f7 1031 * @param huart: pointer to a UART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1032 * the configuration information for the specified UART module.
<> 144:ef7eb2e8f9f7 1033 * @retval HAL status
<> 144:ef7eb2e8f9f7 1034 */
<> 144:ef7eb2e8f9f7 1035 HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart)
<> 144:ef7eb2e8f9f7 1036 {
<> 144:ef7eb2e8f9f7 1037 /* Process Locked */
<> 144:ef7eb2e8f9f7 1038 __HAL_LOCK(huart);
<> 144:ef7eb2e8f9f7 1039
<> 144:ef7eb2e8f9f7 1040 if(huart->gState == HAL_UART_STATE_BUSY_TX)
<> 144:ef7eb2e8f9f7 1041 {
<> 144:ef7eb2e8f9f7 1042 /* Enable the UART DMA Tx request */
<> 144:ef7eb2e8f9f7 1043 SET_BIT(huart->Instance->CR3, USART_CR3_DMAT);
<> 144:ef7eb2e8f9f7 1044 }
<> 144:ef7eb2e8f9f7 1045 if(huart->RxState == HAL_UART_STATE_BUSY_RX)
<> 144:ef7eb2e8f9f7 1046 {
<> 144:ef7eb2e8f9f7 1047 /* Clear the Overrun flag before resuming the Rx transfer*/
<> 144:ef7eb2e8f9f7 1048 __HAL_UART_CLEAR_OREFLAG(huart);
<> 144:ef7eb2e8f9f7 1049
<> 144:ef7eb2e8f9f7 1050 /* Reenable PE and ERR (Frame error, noise error, overrun error) interrupts */
<> 144:ef7eb2e8f9f7 1051 SET_BIT(huart->Instance->CR1, USART_CR1_PEIE);
<> 144:ef7eb2e8f9f7 1052 SET_BIT(huart->Instance->CR3, USART_CR3_EIE);
<> 144:ef7eb2e8f9f7 1053
<> 144:ef7eb2e8f9f7 1054 /* Enable the UART DMA Rx request */
<> 144:ef7eb2e8f9f7 1055 SET_BIT(huart->Instance->CR3, USART_CR3_DMAR);
<> 144:ef7eb2e8f9f7 1056 }
<> 144:ef7eb2e8f9f7 1057
<> 144:ef7eb2e8f9f7 1058 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1059 __HAL_UNLOCK(huart);
<> 144:ef7eb2e8f9f7 1060
<> 144:ef7eb2e8f9f7 1061 return HAL_OK;
<> 144:ef7eb2e8f9f7 1062 }
<> 144:ef7eb2e8f9f7 1063
<> 144:ef7eb2e8f9f7 1064 /**
<> 144:ef7eb2e8f9f7 1065 * @brief Stops the DMA Transfer.
<> 144:ef7eb2e8f9f7 1066 * @param huart: pointer to a UART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1067 * the configuration information for the specified UART module.
<> 144:ef7eb2e8f9f7 1068 * @retval HAL status
<> 144:ef7eb2e8f9f7 1069 */
<> 144:ef7eb2e8f9f7 1070 HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart)
<> 144:ef7eb2e8f9f7 1071 {
<> 144:ef7eb2e8f9f7 1072 uint32_t dmarequest = 0x00U;
<> 144:ef7eb2e8f9f7 1073 /* The Lock is not implemented on this API to allow the user application
<> 144:ef7eb2e8f9f7 1074 to call the HAL UART API under callbacks HAL_UART_TxCpltCallback() / HAL_UART_RxCpltCallback():
<> 144:ef7eb2e8f9f7 1075 when calling HAL_DMA_Abort() API the DMA TX/RX Transfer complete interrupt is generated
<> 144:ef7eb2e8f9f7 1076 and the correspond call back is executed HAL_UART_TxCpltCallback() / HAL_UART_RxCpltCallback()
<> 144:ef7eb2e8f9f7 1077 */
<> 144:ef7eb2e8f9f7 1078
<> 144:ef7eb2e8f9f7 1079 /* Stop UART DMA Tx request if ongoing */
<> 144:ef7eb2e8f9f7 1080 dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT);
<> 144:ef7eb2e8f9f7 1081 if((huart->gState == HAL_UART_STATE_BUSY_TX) && dmarequest)
<> 144:ef7eb2e8f9f7 1082 {
<> 144:ef7eb2e8f9f7 1083 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
<> 144:ef7eb2e8f9f7 1084
<> 144:ef7eb2e8f9f7 1085 /* Abort the UART DMA Tx channel */
<> 144:ef7eb2e8f9f7 1086 if(huart->hdmatx != NULL)
<> 144:ef7eb2e8f9f7 1087 {
<> 144:ef7eb2e8f9f7 1088 HAL_DMA_Abort(huart->hdmatx);
<> 144:ef7eb2e8f9f7 1089 }
<> 144:ef7eb2e8f9f7 1090 UART_EndTxTransfer(huart);
<> 144:ef7eb2e8f9f7 1091 }
<> 144:ef7eb2e8f9f7 1092
<> 144:ef7eb2e8f9f7 1093 /* Stop UART DMA Rx request if ongoing */
<> 144:ef7eb2e8f9f7 1094 dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR);
<> 144:ef7eb2e8f9f7 1095 if((huart->RxState == HAL_UART_STATE_BUSY_RX) && dmarequest)
<> 144:ef7eb2e8f9f7 1096 {
<> 144:ef7eb2e8f9f7 1097 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
<> 144:ef7eb2e8f9f7 1098
<> 144:ef7eb2e8f9f7 1099 /* Abort the UART DMA Rx channel */
<> 144:ef7eb2e8f9f7 1100 if(huart->hdmarx != NULL)
<> 144:ef7eb2e8f9f7 1101 {
<> 144:ef7eb2e8f9f7 1102 HAL_DMA_Abort(huart->hdmarx);
<> 144:ef7eb2e8f9f7 1103 }
<> 144:ef7eb2e8f9f7 1104 UART_EndRxTransfer(huart);
<> 144:ef7eb2e8f9f7 1105 }
<> 144:ef7eb2e8f9f7 1106
<> 144:ef7eb2e8f9f7 1107 return HAL_OK;
<> 144:ef7eb2e8f9f7 1108 }
<> 144:ef7eb2e8f9f7 1109
<> 144:ef7eb2e8f9f7 1110 /**
<> 144:ef7eb2e8f9f7 1111 * @brief This function handles UART interrupt request.
<> 144:ef7eb2e8f9f7 1112 * @param huart: pointer to a UART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1113 * the configuration information for the specified UART module.
<> 144:ef7eb2e8f9f7 1114 * @retval None
<> 144:ef7eb2e8f9f7 1115 */
<> 144:ef7eb2e8f9f7 1116 void HAL_UART_IRQHandler(UART_HandleTypeDef *huart)
<> 144:ef7eb2e8f9f7 1117 {
<> 144:ef7eb2e8f9f7 1118 uint32_t isrflags = READ_REG(huart->Instance->SR);
<> 144:ef7eb2e8f9f7 1119 uint32_t cr1its = READ_REG(huart->Instance->CR1);
<> 144:ef7eb2e8f9f7 1120 uint32_t cr3its = READ_REG(huart->Instance->CR3);
<> 144:ef7eb2e8f9f7 1121 uint32_t errorflags = 0x00U;
<> 144:ef7eb2e8f9f7 1122 uint32_t dmarequest = 0x00U;
<> 144:ef7eb2e8f9f7 1123
<> 144:ef7eb2e8f9f7 1124 /* If no error occurs */
<> 144:ef7eb2e8f9f7 1125 errorflags = (isrflags & (uint32_t)(USART_SR_PE | USART_SR_FE | USART_SR_ORE | USART_SR_NE));
<> 144:ef7eb2e8f9f7 1126 if(errorflags == RESET)
<> 144:ef7eb2e8f9f7 1127 {
<> 144:ef7eb2e8f9f7 1128 /* UART in mode Receiver -------------------------------------------------*/
<> 144:ef7eb2e8f9f7 1129 if(((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET))
<> 144:ef7eb2e8f9f7 1130 {
<> 144:ef7eb2e8f9f7 1131 UART_Receive_IT(huart);
<> 144:ef7eb2e8f9f7 1132 return;
<> 144:ef7eb2e8f9f7 1133 }
<> 144:ef7eb2e8f9f7 1134 }
<> 144:ef7eb2e8f9f7 1135
<> 144:ef7eb2e8f9f7 1136 /* If some errors occur */
<> 144:ef7eb2e8f9f7 1137 if((errorflags != RESET) && (((cr3its & USART_CR3_EIE) != RESET) || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE)) != RESET)))
<> 144:ef7eb2e8f9f7 1138 {
<> 144:ef7eb2e8f9f7 1139 /* UART parity error interrupt occurred ----------------------------------*/
<> 144:ef7eb2e8f9f7 1140 if(((isrflags & USART_SR_PE) != RESET) && ((cr1its & USART_CR1_PEIE) != RESET))
<> 144:ef7eb2e8f9f7 1141 {
<> 144:ef7eb2e8f9f7 1142 huart->ErrorCode |= HAL_UART_ERROR_PE;
<> 144:ef7eb2e8f9f7 1143 }
<> 144:ef7eb2e8f9f7 1144
<> 144:ef7eb2e8f9f7 1145 /* UART noise error interrupt occurred -----------------------------------*/
<> 144:ef7eb2e8f9f7 1146 if(((isrflags & USART_SR_NE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
<> 144:ef7eb2e8f9f7 1147 {
<> 144:ef7eb2e8f9f7 1148 huart->ErrorCode |= HAL_UART_ERROR_NE;
<> 144:ef7eb2e8f9f7 1149 }
<> 144:ef7eb2e8f9f7 1150
<> 144:ef7eb2e8f9f7 1151 /* UART frame error interrupt occurred -----------------------------------*/
<> 144:ef7eb2e8f9f7 1152 if(((isrflags & USART_SR_FE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
<> 144:ef7eb2e8f9f7 1153 {
<> 144:ef7eb2e8f9f7 1154 huart->ErrorCode |= HAL_UART_ERROR_FE;
<> 144:ef7eb2e8f9f7 1155 }
<> 144:ef7eb2e8f9f7 1156
<> 144:ef7eb2e8f9f7 1157 /* UART Over-Run interrupt occurred --------------------------------------*/
<> 144:ef7eb2e8f9f7 1158 if(((isrflags & USART_SR_ORE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
<> 144:ef7eb2e8f9f7 1159 {
<> 144:ef7eb2e8f9f7 1160 huart->ErrorCode |= HAL_UART_ERROR_ORE;
<> 144:ef7eb2e8f9f7 1161 }
<> 144:ef7eb2e8f9f7 1162
<> 144:ef7eb2e8f9f7 1163 /* Call UART Error Call back function if need be --------------------------*/
<> 144:ef7eb2e8f9f7 1164 if(huart->ErrorCode != HAL_UART_ERROR_NONE)
<> 144:ef7eb2e8f9f7 1165 {
<> 144:ef7eb2e8f9f7 1166 /* UART in mode Receiver -----------------------------------------------*/
<> 144:ef7eb2e8f9f7 1167 if(((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET))
<> 144:ef7eb2e8f9f7 1168 {
<> 144:ef7eb2e8f9f7 1169 UART_Receive_IT(huart);
<> 144:ef7eb2e8f9f7 1170 }
<> 144:ef7eb2e8f9f7 1171
<> 144:ef7eb2e8f9f7 1172 /* If Overrun error occurs, or if any error occurs in DMA mode reception,
<> 144:ef7eb2e8f9f7 1173 consider error as blocking */
<> 144:ef7eb2e8f9f7 1174 dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR);
<> 144:ef7eb2e8f9f7 1175 if(((huart->ErrorCode & HAL_UART_ERROR_ORE) != RESET) || dmarequest)
<> 144:ef7eb2e8f9f7 1176 {
<> 144:ef7eb2e8f9f7 1177 /* Blocking error : transfer is aborted
<> 144:ef7eb2e8f9f7 1178 Set the UART state ready to be able to start again the process,
<> 144:ef7eb2e8f9f7 1179 Disable Rx Interrupts, and disable Rx DMA request, if ongoing */
<> 144:ef7eb2e8f9f7 1180 UART_EndRxTransfer(huart);
<> 144:ef7eb2e8f9f7 1181
<> 144:ef7eb2e8f9f7 1182 /* Disable the UART DMA Rx request if enabled */
<> 144:ef7eb2e8f9f7 1183 if(HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
<> 144:ef7eb2e8f9f7 1184 {
<> 144:ef7eb2e8f9f7 1185 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
<> 144:ef7eb2e8f9f7 1186
<> 144:ef7eb2e8f9f7 1187 /* Abort the UART DMA Rx channel */
<> 144:ef7eb2e8f9f7 1188 if(huart->hdmarx != NULL)
<> 144:ef7eb2e8f9f7 1189 {
<> 144:ef7eb2e8f9f7 1190 /* Set the UART DMA Abort callback :
<> 144:ef7eb2e8f9f7 1191 will lead to call HAL_UART_ErrorCallback() at end of DMA abort procedure */
<> 144:ef7eb2e8f9f7 1192 huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError;
<> 144:ef7eb2e8f9f7 1193 if(HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK)
<> 144:ef7eb2e8f9f7 1194 {
<> 144:ef7eb2e8f9f7 1195 /* Call Directly XferAbortCallback function in case of error */
<> 144:ef7eb2e8f9f7 1196 huart->hdmarx->XferAbortCallback(huart->hdmarx);
<> 144:ef7eb2e8f9f7 1197 }
<> 144:ef7eb2e8f9f7 1198 }
<> 144:ef7eb2e8f9f7 1199 else
<> 144:ef7eb2e8f9f7 1200 {
<> 144:ef7eb2e8f9f7 1201 /* Call user error callback */
<> 144:ef7eb2e8f9f7 1202 HAL_UART_ErrorCallback(huart);
<> 144:ef7eb2e8f9f7 1203 }
<> 144:ef7eb2e8f9f7 1204 }
<> 144:ef7eb2e8f9f7 1205 else
<> 144:ef7eb2e8f9f7 1206 {
<> 144:ef7eb2e8f9f7 1207 /* Call user error callback */
<> 144:ef7eb2e8f9f7 1208 HAL_UART_ErrorCallback(huart);
<> 144:ef7eb2e8f9f7 1209 }
<> 144:ef7eb2e8f9f7 1210 }
<> 144:ef7eb2e8f9f7 1211 else
<> 144:ef7eb2e8f9f7 1212 {
<> 144:ef7eb2e8f9f7 1213 /* Non Blocking error : transfer could go on.
<> 144:ef7eb2e8f9f7 1214 Error is notified to user through user error callback */
<> 144:ef7eb2e8f9f7 1215 HAL_UART_ErrorCallback(huart);
<> 144:ef7eb2e8f9f7 1216 huart->ErrorCode = HAL_UART_ERROR_NONE;
<> 144:ef7eb2e8f9f7 1217 }
<> 144:ef7eb2e8f9f7 1218 }
<> 144:ef7eb2e8f9f7 1219 return;
<> 144:ef7eb2e8f9f7 1220 } /* End if some error occurs */
<> 144:ef7eb2e8f9f7 1221
<> 144:ef7eb2e8f9f7 1222 /* UART in mode Transmitter ------------------------------------------------*/
<> 144:ef7eb2e8f9f7 1223 if(((isrflags & USART_SR_TXE) != RESET) && ((cr1its & USART_CR1_TXEIE) != RESET))
<> 144:ef7eb2e8f9f7 1224 {
<> 144:ef7eb2e8f9f7 1225 UART_Transmit_IT(huart);
<> 144:ef7eb2e8f9f7 1226 return;
<> 144:ef7eb2e8f9f7 1227 }
<> 144:ef7eb2e8f9f7 1228
<> 144:ef7eb2e8f9f7 1229 /* UART in mode Transmitter end --------------------------------------------*/
<> 144:ef7eb2e8f9f7 1230 if(((isrflags & USART_SR_TC) != RESET) && ((cr1its & USART_CR1_TCIE) != RESET))
<> 144:ef7eb2e8f9f7 1231 {
<> 144:ef7eb2e8f9f7 1232 UART_EndTransmit_IT(huart);
<> 144:ef7eb2e8f9f7 1233 return;
<> 144:ef7eb2e8f9f7 1234 }
<> 144:ef7eb2e8f9f7 1235 }
<> 144:ef7eb2e8f9f7 1236
<> 144:ef7eb2e8f9f7 1237 /**
<> 144:ef7eb2e8f9f7 1238 * @brief Tx Transfer completed callbacks.
<> 144:ef7eb2e8f9f7 1239 * @param huart: pointer to a UART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1240 * the configuration information for the specified UART module.
<> 144:ef7eb2e8f9f7 1241 * @retval None
<> 144:ef7eb2e8f9f7 1242 */
<> 144:ef7eb2e8f9f7 1243 __weak void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart)
<> 144:ef7eb2e8f9f7 1244 {
<> 144:ef7eb2e8f9f7 1245 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 1246 UNUSED(huart);
<> 144:ef7eb2e8f9f7 1247 /* NOTE: This function Should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 1248 the HAL_UART_TxCpltCallback could be implemented in the user file
<> 144:ef7eb2e8f9f7 1249 */
<> 144:ef7eb2e8f9f7 1250 }
<> 144:ef7eb2e8f9f7 1251
<> 144:ef7eb2e8f9f7 1252 /**
<> 144:ef7eb2e8f9f7 1253 * @brief Tx Half Transfer completed callbacks.
<> 144:ef7eb2e8f9f7 1254 * @param huart: pointer to a UART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1255 * the configuration information for the specified UART module.
<> 144:ef7eb2e8f9f7 1256 * @retval None
<> 144:ef7eb2e8f9f7 1257 */
<> 144:ef7eb2e8f9f7 1258 __weak void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart)
<> 144:ef7eb2e8f9f7 1259 {
<> 144:ef7eb2e8f9f7 1260 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 1261 UNUSED(huart);
<> 144:ef7eb2e8f9f7 1262 /* NOTE: This function Should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 1263 the HAL_UART_TxCpltCallback could be implemented in the user file
<> 144:ef7eb2e8f9f7 1264 */
<> 144:ef7eb2e8f9f7 1265 }
<> 144:ef7eb2e8f9f7 1266
<> 144:ef7eb2e8f9f7 1267 /**
<> 144:ef7eb2e8f9f7 1268 * @brief Rx Transfer completed callbacks.
<> 144:ef7eb2e8f9f7 1269 * @param huart: pointer to a UART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1270 * the configuration information for the specified UART module.
<> 144:ef7eb2e8f9f7 1271 * @retval None
<> 144:ef7eb2e8f9f7 1272 */
<> 144:ef7eb2e8f9f7 1273 __weak void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
<> 144:ef7eb2e8f9f7 1274 {
<> 144:ef7eb2e8f9f7 1275 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 1276 UNUSED(huart);
<> 144:ef7eb2e8f9f7 1277 /* NOTE: This function Should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 1278 the HAL_UART_TxCpltCallback could be implemented in the user file
<> 144:ef7eb2e8f9f7 1279 */
<> 144:ef7eb2e8f9f7 1280 }
<> 144:ef7eb2e8f9f7 1281
<> 144:ef7eb2e8f9f7 1282 /**
<> 144:ef7eb2e8f9f7 1283 * @brief Rx Half Transfer completed callbacks.
<> 144:ef7eb2e8f9f7 1284 * @param huart: pointer to a UART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1285 * the configuration information for the specified UART module.
<> 144:ef7eb2e8f9f7 1286 * @retval None
<> 144:ef7eb2e8f9f7 1287 */
<> 144:ef7eb2e8f9f7 1288 __weak void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart)
<> 144:ef7eb2e8f9f7 1289 {
<> 144:ef7eb2e8f9f7 1290 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 1291 UNUSED(huart);
<> 144:ef7eb2e8f9f7 1292 /* NOTE: This function Should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 1293 the HAL_UART_TxCpltCallback could be implemented in the user file
<> 144:ef7eb2e8f9f7 1294 */
<> 144:ef7eb2e8f9f7 1295 }
<> 144:ef7eb2e8f9f7 1296
<> 144:ef7eb2e8f9f7 1297 /**
<> 144:ef7eb2e8f9f7 1298 * @brief UART error callbacks.
<> 144:ef7eb2e8f9f7 1299 * @param huart: pointer to a UART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1300 * the configuration information for the specified UART module.
<> 144:ef7eb2e8f9f7 1301 * @retval None
<> 144:ef7eb2e8f9f7 1302 */
<> 144:ef7eb2e8f9f7 1303 __weak void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart)
<> 144:ef7eb2e8f9f7 1304 {
<> 144:ef7eb2e8f9f7 1305 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 1306 UNUSED(huart);
<> 144:ef7eb2e8f9f7 1307 /* NOTE: This function Should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 1308 the HAL_UART_ErrorCallback could be implemented in the user file
<> 144:ef7eb2e8f9f7 1309 */
<> 144:ef7eb2e8f9f7 1310 }
<> 144:ef7eb2e8f9f7 1311
<> 144:ef7eb2e8f9f7 1312 /**
<> 144:ef7eb2e8f9f7 1313 * @}
<> 144:ef7eb2e8f9f7 1314 */
<> 144:ef7eb2e8f9f7 1315
<> 144:ef7eb2e8f9f7 1316 /** @defgroup UART_Exported_Functions_Group3 Peripheral Control functions
<> 144:ef7eb2e8f9f7 1317 * @brief UART control functions
<> 144:ef7eb2e8f9f7 1318 *
<> 144:ef7eb2e8f9f7 1319 @verbatim
<> 144:ef7eb2e8f9f7 1320 ==============================================================================
<> 144:ef7eb2e8f9f7 1321 ##### Peripheral Control functions #####
<> 144:ef7eb2e8f9f7 1322 ==============================================================================
<> 144:ef7eb2e8f9f7 1323 [..]
<> 144:ef7eb2e8f9f7 1324 This subsection provides a set of functions allowing to control the UART:
<> 144:ef7eb2e8f9f7 1325 (+) HAL_LIN_SendBreak() API can be helpful to transmit the break character.
<> 144:ef7eb2e8f9f7 1326 (+) HAL_MultiProcessor_EnterMuteMode() API can be helpful to enter the UART in mute mode.
<> 144:ef7eb2e8f9f7 1327 (+) HAL_MultiProcessor_ExitMuteMode() API can be helpful to exit the UART mute mode by software.
<> 144:ef7eb2e8f9f7 1328
<> 144:ef7eb2e8f9f7 1329 @endverbatim
<> 144:ef7eb2e8f9f7 1330 * @{
<> 144:ef7eb2e8f9f7 1331 */
<> 144:ef7eb2e8f9f7 1332
<> 144:ef7eb2e8f9f7 1333 /**
<> 144:ef7eb2e8f9f7 1334 * @brief Transmits break characters.
<> 144:ef7eb2e8f9f7 1335 * @param huart: pointer to a UART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1336 * the configuration information for the specified UART module.
<> 144:ef7eb2e8f9f7 1337 * @retval HAL status
<> 144:ef7eb2e8f9f7 1338 */
<> 144:ef7eb2e8f9f7 1339 HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart)
<> 144:ef7eb2e8f9f7 1340 {
<> 144:ef7eb2e8f9f7 1341 /* Check the parameters */
<> 144:ef7eb2e8f9f7 1342 assert_param(IS_UART_INSTANCE(huart->Instance));
<> 144:ef7eb2e8f9f7 1343
<> 144:ef7eb2e8f9f7 1344 /* Process Locked */
<> 144:ef7eb2e8f9f7 1345 __HAL_LOCK(huart);
<> 144:ef7eb2e8f9f7 1346
<> 144:ef7eb2e8f9f7 1347 huart->gState = HAL_UART_STATE_BUSY;
<> 144:ef7eb2e8f9f7 1348
<> 144:ef7eb2e8f9f7 1349 /* Send break characters */
<> 144:ef7eb2e8f9f7 1350 SET_BIT(huart->Instance->CR1, USART_CR1_SBK);
<> 144:ef7eb2e8f9f7 1351
<> 144:ef7eb2e8f9f7 1352 huart->gState = HAL_UART_STATE_READY;
<> 144:ef7eb2e8f9f7 1353
<> 144:ef7eb2e8f9f7 1354 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1355 __HAL_UNLOCK(huart);
<> 144:ef7eb2e8f9f7 1356
<> 144:ef7eb2e8f9f7 1357 return HAL_OK;
<> 144:ef7eb2e8f9f7 1358 }
<> 144:ef7eb2e8f9f7 1359
<> 144:ef7eb2e8f9f7 1360 /**
<> 144:ef7eb2e8f9f7 1361 * @brief Enters the UART in mute mode.
<> 144:ef7eb2e8f9f7 1362 * @param huart: pointer to a UART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1363 * the configuration information for the specified UART module.
<> 144:ef7eb2e8f9f7 1364 * @retval HAL status
<> 144:ef7eb2e8f9f7 1365 */
<> 144:ef7eb2e8f9f7 1366 HAL_StatusTypeDef HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart)
<> 144:ef7eb2e8f9f7 1367 {
<> 144:ef7eb2e8f9f7 1368 /* Check the parameters */
<> 144:ef7eb2e8f9f7 1369 assert_param(IS_UART_INSTANCE(huart->Instance));
<> 144:ef7eb2e8f9f7 1370
<> 144:ef7eb2e8f9f7 1371 /* Process Locked */
<> 144:ef7eb2e8f9f7 1372 __HAL_LOCK(huart);
<> 144:ef7eb2e8f9f7 1373
<> 144:ef7eb2e8f9f7 1374 huart->gState = HAL_UART_STATE_BUSY;
<> 144:ef7eb2e8f9f7 1375
<> 144:ef7eb2e8f9f7 1376 /* Enable the USART mute mode by setting the RWU bit in the CR1 register */
<> 144:ef7eb2e8f9f7 1377 SET_BIT(huart->Instance->CR1, USART_CR1_RWU);
<> 144:ef7eb2e8f9f7 1378
<> 144:ef7eb2e8f9f7 1379 huart->gState = HAL_UART_STATE_READY;
<> 144:ef7eb2e8f9f7 1380
<> 144:ef7eb2e8f9f7 1381 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1382 __HAL_UNLOCK(huart);
<> 144:ef7eb2e8f9f7 1383
<> 144:ef7eb2e8f9f7 1384 return HAL_OK;
<> 144:ef7eb2e8f9f7 1385 }
<> 144:ef7eb2e8f9f7 1386
<> 144:ef7eb2e8f9f7 1387 /**
<> 144:ef7eb2e8f9f7 1388 * @brief Exits the UART mute mode: wake up software.
<> 144:ef7eb2e8f9f7 1389 * @param huart: pointer to a UART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1390 * the configuration information for the specified UART module.
<> 144:ef7eb2e8f9f7 1391 * @retval HAL status
<> 144:ef7eb2e8f9f7 1392 */
<> 144:ef7eb2e8f9f7 1393 HAL_StatusTypeDef HAL_MultiProcessor_ExitMuteMode(UART_HandleTypeDef *huart)
<> 144:ef7eb2e8f9f7 1394 {
<> 144:ef7eb2e8f9f7 1395 /* Check the parameters */
<> 144:ef7eb2e8f9f7 1396 assert_param(IS_UART_INSTANCE(huart->Instance));
<> 144:ef7eb2e8f9f7 1397
<> 144:ef7eb2e8f9f7 1398 /* Process Locked */
<> 144:ef7eb2e8f9f7 1399 __HAL_LOCK(huart);
<> 144:ef7eb2e8f9f7 1400
<> 144:ef7eb2e8f9f7 1401 huart->gState = HAL_UART_STATE_BUSY;
<> 144:ef7eb2e8f9f7 1402
<> 144:ef7eb2e8f9f7 1403 /* Disable the USART mute mode by clearing the RWU bit in the CR1 register */
<> 144:ef7eb2e8f9f7 1404 CLEAR_BIT(huart->Instance->CR1, USART_CR1_RWU);
<> 144:ef7eb2e8f9f7 1405
<> 144:ef7eb2e8f9f7 1406 huart->gState = HAL_UART_STATE_READY;
<> 144:ef7eb2e8f9f7 1407
<> 144:ef7eb2e8f9f7 1408 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1409 __HAL_UNLOCK(huart);
<> 144:ef7eb2e8f9f7 1410
<> 144:ef7eb2e8f9f7 1411 return HAL_OK;
<> 144:ef7eb2e8f9f7 1412 }
<> 144:ef7eb2e8f9f7 1413
<> 144:ef7eb2e8f9f7 1414 /**
<> 144:ef7eb2e8f9f7 1415 * @brief Enables the UART transmitter and disables the UART receiver.
<> 144:ef7eb2e8f9f7 1416 * @param huart: pointer to a UART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1417 * the configuration information for the specified UART module.
<> 144:ef7eb2e8f9f7 1418 * @retval HAL status
<> 144:ef7eb2e8f9f7 1419 */
<> 144:ef7eb2e8f9f7 1420 HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart)
<> 144:ef7eb2e8f9f7 1421 {
<> 144:ef7eb2e8f9f7 1422 uint32_t tmpreg = 0x00;
<> 144:ef7eb2e8f9f7 1423
<> 144:ef7eb2e8f9f7 1424 /* Process Locked */
<> 144:ef7eb2e8f9f7 1425 __HAL_LOCK(huart);
<> 144:ef7eb2e8f9f7 1426
<> 144:ef7eb2e8f9f7 1427 huart->gState = HAL_UART_STATE_BUSY;
<> 144:ef7eb2e8f9f7 1428
<> 144:ef7eb2e8f9f7 1429 /*-------------------------- USART CR1 Configuration -----------------------*/
<> 144:ef7eb2e8f9f7 1430 tmpreg = huart->Instance->CR1;
<> 144:ef7eb2e8f9f7 1431
<> 144:ef7eb2e8f9f7 1432 /* Clear TE and RE bits */
<> 144:ef7eb2e8f9f7 1433 tmpreg &= (uint32_t)~((uint32_t)(USART_CR1_TE | USART_CR1_RE));
<> 144:ef7eb2e8f9f7 1434
<> 144:ef7eb2e8f9f7 1435 /* Enable the USART's transmit interface by setting the TE bit in the USART CR1 register */
<> 144:ef7eb2e8f9f7 1436 tmpreg |= (uint32_t)USART_CR1_TE;
<> 144:ef7eb2e8f9f7 1437
<> 144:ef7eb2e8f9f7 1438 /* Write to USART CR1 */
<> 144:ef7eb2e8f9f7 1439 WRITE_REG(huart->Instance->CR1, (uint32_t)tmpreg);
<> 144:ef7eb2e8f9f7 1440
<> 144:ef7eb2e8f9f7 1441 huart->gState = HAL_UART_STATE_READY;
<> 144:ef7eb2e8f9f7 1442
<> 144:ef7eb2e8f9f7 1443 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1444 __HAL_UNLOCK(huart);
<> 144:ef7eb2e8f9f7 1445
<> 144:ef7eb2e8f9f7 1446 return HAL_OK;
<> 144:ef7eb2e8f9f7 1447 }
<> 144:ef7eb2e8f9f7 1448
<> 144:ef7eb2e8f9f7 1449 /**
<> 144:ef7eb2e8f9f7 1450 * @brief Enables the UART receiver and disables the UART transmitter.
<> 144:ef7eb2e8f9f7 1451 * @param huart: pointer to a UART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1452 * the configuration information for the specified UART module.
<> 144:ef7eb2e8f9f7 1453 * @retval HAL status
<> 144:ef7eb2e8f9f7 1454 */
<> 144:ef7eb2e8f9f7 1455 HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart)
<> 144:ef7eb2e8f9f7 1456 {
<> 144:ef7eb2e8f9f7 1457 uint32_t tmpreg = 0x00U;
<> 144:ef7eb2e8f9f7 1458
<> 144:ef7eb2e8f9f7 1459 /* Process Locked */
<> 144:ef7eb2e8f9f7 1460 __HAL_LOCK(huart);
<> 144:ef7eb2e8f9f7 1461
<> 144:ef7eb2e8f9f7 1462 huart->gState = HAL_UART_STATE_BUSY;
<> 144:ef7eb2e8f9f7 1463
<> 144:ef7eb2e8f9f7 1464 /*-------------------------- USART CR1 Configuration -----------------------*/
<> 144:ef7eb2e8f9f7 1465 tmpreg = huart->Instance->CR1;
<> 144:ef7eb2e8f9f7 1466
<> 144:ef7eb2e8f9f7 1467 /* Clear TE and RE bits */
<> 144:ef7eb2e8f9f7 1468 tmpreg &= (uint32_t)~((uint32_t)(USART_CR1_TE | USART_CR1_RE));
<> 144:ef7eb2e8f9f7 1469
<> 144:ef7eb2e8f9f7 1470 /* Enable the USART's receive interface by setting the RE bit in the USART CR1 register */
<> 144:ef7eb2e8f9f7 1471 tmpreg |= (uint32_t)USART_CR1_RE;
<> 144:ef7eb2e8f9f7 1472
<> 144:ef7eb2e8f9f7 1473 /* Write to USART CR1 */
<> 144:ef7eb2e8f9f7 1474 WRITE_REG(huart->Instance->CR1, (uint32_t)tmpreg);
<> 144:ef7eb2e8f9f7 1475
<> 144:ef7eb2e8f9f7 1476 huart->gState = HAL_UART_STATE_READY;
<> 144:ef7eb2e8f9f7 1477
<> 144:ef7eb2e8f9f7 1478 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1479 __HAL_UNLOCK(huart);
<> 144:ef7eb2e8f9f7 1480
<> 144:ef7eb2e8f9f7 1481 return HAL_OK;
<> 144:ef7eb2e8f9f7 1482 }
<> 144:ef7eb2e8f9f7 1483
<> 144:ef7eb2e8f9f7 1484 /**
<> 144:ef7eb2e8f9f7 1485 * @}
<> 144:ef7eb2e8f9f7 1486 */
<> 144:ef7eb2e8f9f7 1487
<> 144:ef7eb2e8f9f7 1488 /** @defgroup UART_Exported_Functions_Group4 Peripheral State and Errors functions
<> 144:ef7eb2e8f9f7 1489 * @brief UART State and Errors functions
<> 144:ef7eb2e8f9f7 1490 *
<> 144:ef7eb2e8f9f7 1491 @verbatim
<> 144:ef7eb2e8f9f7 1492 ==============================================================================
<> 144:ef7eb2e8f9f7 1493 ##### Peripheral State and Errors functions #####
<> 144:ef7eb2e8f9f7 1494 ==============================================================================
<> 144:ef7eb2e8f9f7 1495 [..]
<> 144:ef7eb2e8f9f7 1496 This subsection provides a set of functions allowing to return the State of
<> 144:ef7eb2e8f9f7 1497 UART communication process, return Peripheral Errors occurred during communication
<> 144:ef7eb2e8f9f7 1498 process
<> 144:ef7eb2e8f9f7 1499 (+) HAL_UART_GetState() API can be helpful to check in run-time the state of the UART peripheral.
<> 144:ef7eb2e8f9f7 1500 (+) HAL_UART_GetError() check in run-time errors that could be occurred during communication.
<> 144:ef7eb2e8f9f7 1501
<> 144:ef7eb2e8f9f7 1502 @endverbatim
<> 144:ef7eb2e8f9f7 1503 * @{
<> 144:ef7eb2e8f9f7 1504 */
<> 144:ef7eb2e8f9f7 1505
<> 144:ef7eb2e8f9f7 1506 /**
<> 144:ef7eb2e8f9f7 1507 * @brief Returns the UART state.
<> 144:ef7eb2e8f9f7 1508 * @param huart: pointer to a UART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1509 * the configuration information for the specified UART module.
<> 144:ef7eb2e8f9f7 1510 * @retval HAL state
<> 144:ef7eb2e8f9f7 1511 */
<> 144:ef7eb2e8f9f7 1512 HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart)
<> 144:ef7eb2e8f9f7 1513 {
<> 144:ef7eb2e8f9f7 1514 uint32_t temp1= 0x00U, temp2 = 0x00U;
<> 144:ef7eb2e8f9f7 1515 temp1 = huart->gState;
<> 144:ef7eb2e8f9f7 1516 temp2 = huart->RxState;
<> 144:ef7eb2e8f9f7 1517
<> 144:ef7eb2e8f9f7 1518 return (HAL_UART_StateTypeDef)(temp1 | temp2);
<> 144:ef7eb2e8f9f7 1519 }
<> 144:ef7eb2e8f9f7 1520
<> 144:ef7eb2e8f9f7 1521 /**
<> 144:ef7eb2e8f9f7 1522 * @brief Return the UART error code
<> 144:ef7eb2e8f9f7 1523 * @param huart : pointer to a UART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1524 * the configuration information for the specified UART.
<> 144:ef7eb2e8f9f7 1525 * @retval UART Error Code
<> 144:ef7eb2e8f9f7 1526 */
<> 144:ef7eb2e8f9f7 1527 uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart)
<> 144:ef7eb2e8f9f7 1528 {
<> 144:ef7eb2e8f9f7 1529 return huart->ErrorCode;
<> 144:ef7eb2e8f9f7 1530 }
<> 144:ef7eb2e8f9f7 1531
<> 144:ef7eb2e8f9f7 1532 /**
<> 144:ef7eb2e8f9f7 1533 * @}
<> 144:ef7eb2e8f9f7 1534 */
<> 144:ef7eb2e8f9f7 1535
<> 144:ef7eb2e8f9f7 1536 /**
<> 144:ef7eb2e8f9f7 1537 * @brief DMA UART transmit process complete callback.
<> 144:ef7eb2e8f9f7 1538 * @param hdma: DMA handle
<> 144:ef7eb2e8f9f7 1539 * @retval None
<> 144:ef7eb2e8f9f7 1540 */
<> 144:ef7eb2e8f9f7 1541 static void UART_DMATransmitCplt(DMA_HandleTypeDef *hdma)
<> 144:ef7eb2e8f9f7 1542 {
<> 144:ef7eb2e8f9f7 1543 UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
<> 144:ef7eb2e8f9f7 1544 /* DMA Normal mode*/
<> 144:ef7eb2e8f9f7 1545 if((hdma->Instance->CR & DMA_SxCR_CIRC) == 0U)
<> 144:ef7eb2e8f9f7 1546 {
<> 144:ef7eb2e8f9f7 1547 huart->TxXferCount = 0U;
<> 144:ef7eb2e8f9f7 1548
<> 144:ef7eb2e8f9f7 1549 /* Disable the DMA transfer for transmit request by setting the DMAT bit
<> 144:ef7eb2e8f9f7 1550 in the UART CR3 register */
<> 144:ef7eb2e8f9f7 1551 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
<> 144:ef7eb2e8f9f7 1552
<> 144:ef7eb2e8f9f7 1553 /* Enable the UART Transmit Complete Interrupt */
<> 144:ef7eb2e8f9f7 1554 SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
<> 144:ef7eb2e8f9f7 1555
<> 144:ef7eb2e8f9f7 1556 }
<> 144:ef7eb2e8f9f7 1557 /* DMA Circular mode */
<> 144:ef7eb2e8f9f7 1558 else
<> 144:ef7eb2e8f9f7 1559 {
<> 144:ef7eb2e8f9f7 1560 HAL_UART_TxCpltCallback(huart);
<> 144:ef7eb2e8f9f7 1561 }
<> 144:ef7eb2e8f9f7 1562 }
<> 144:ef7eb2e8f9f7 1563
<> 144:ef7eb2e8f9f7 1564 /**
<> 144:ef7eb2e8f9f7 1565 * @brief DMA UART transmit process half complete callback
<> 144:ef7eb2e8f9f7 1566 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1567 * the configuration information for the specified DMA module.
<> 144:ef7eb2e8f9f7 1568 * @retval None
<> 144:ef7eb2e8f9f7 1569 */
<> 144:ef7eb2e8f9f7 1570 static void UART_DMATxHalfCplt(DMA_HandleTypeDef *hdma)
<> 144:ef7eb2e8f9f7 1571 {
<> 144:ef7eb2e8f9f7 1572 UART_HandleTypeDef* huart = (UART_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
<> 144:ef7eb2e8f9f7 1573
<> 144:ef7eb2e8f9f7 1574 HAL_UART_TxHalfCpltCallback(huart);
<> 144:ef7eb2e8f9f7 1575 }
<> 144:ef7eb2e8f9f7 1576
<> 144:ef7eb2e8f9f7 1577 /**
<> 144:ef7eb2e8f9f7 1578 * @brief DMA UART receive process complete callback.
<> 144:ef7eb2e8f9f7 1579 * @param hdma: DMA handle
<> 144:ef7eb2e8f9f7 1580 * @retval None
<> 144:ef7eb2e8f9f7 1581 */
<> 144:ef7eb2e8f9f7 1582 static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
<> 144:ef7eb2e8f9f7 1583 {
<> 144:ef7eb2e8f9f7 1584 UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
<> 144:ef7eb2e8f9f7 1585 /* DMA Normal mode*/
<> 144:ef7eb2e8f9f7 1586 if((hdma->Instance->CR & DMA_SxCR_CIRC) == 0U)
<> 144:ef7eb2e8f9f7 1587 {
<> 144:ef7eb2e8f9f7 1588 huart->RxXferCount = 0U;
<> 144:ef7eb2e8f9f7 1589
<> 144:ef7eb2e8f9f7 1590 /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
<> 144:ef7eb2e8f9f7 1591 CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
<> 144:ef7eb2e8f9f7 1592 CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
<> 144:ef7eb2e8f9f7 1593
<> 144:ef7eb2e8f9f7 1594 /* Disable the DMA transfer for the receiver request by setting the DMAR bit
<> 144:ef7eb2e8f9f7 1595 in the UART CR3 register */
<> 144:ef7eb2e8f9f7 1596 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
<> 144:ef7eb2e8f9f7 1597
<> 144:ef7eb2e8f9f7 1598 /* At end of Rx process, restore huart->RxState to Ready */
<> 144:ef7eb2e8f9f7 1599 huart->RxState = HAL_UART_STATE_READY;
<> 144:ef7eb2e8f9f7 1600 }
<> 144:ef7eb2e8f9f7 1601 HAL_UART_RxCpltCallback(huart);
<> 144:ef7eb2e8f9f7 1602 }
<> 144:ef7eb2e8f9f7 1603
<> 144:ef7eb2e8f9f7 1604 /**
<> 144:ef7eb2e8f9f7 1605 * @brief DMA UART receive process half complete callback
<> 144:ef7eb2e8f9f7 1606 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1607 * the configuration information for the specified DMA module.
<> 144:ef7eb2e8f9f7 1608 * @retval None
<> 144:ef7eb2e8f9f7 1609 */
<> 144:ef7eb2e8f9f7 1610 static void UART_DMARxHalfCplt(DMA_HandleTypeDef *hdma)
<> 144:ef7eb2e8f9f7 1611 {
<> 144:ef7eb2e8f9f7 1612 UART_HandleTypeDef* huart = (UART_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
<> 144:ef7eb2e8f9f7 1613
<> 144:ef7eb2e8f9f7 1614 HAL_UART_RxHalfCpltCallback(huart);
<> 144:ef7eb2e8f9f7 1615 }
<> 144:ef7eb2e8f9f7 1616
<> 144:ef7eb2e8f9f7 1617 /**
<> 144:ef7eb2e8f9f7 1618 * @brief DMA UART communication error callback.
<> 144:ef7eb2e8f9f7 1619 * @param hdma: DMA handle
<> 144:ef7eb2e8f9f7 1620 * @retval None
<> 144:ef7eb2e8f9f7 1621 */
<> 144:ef7eb2e8f9f7 1622 static void UART_DMAError(DMA_HandleTypeDef *hdma)
<> 144:ef7eb2e8f9f7 1623 {
<> 144:ef7eb2e8f9f7 1624 uint32_t dmarequest = 0x00U;
<> 144:ef7eb2e8f9f7 1625 UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
<> 144:ef7eb2e8f9f7 1626
<> 144:ef7eb2e8f9f7 1627 /* Stop UART DMA Tx request if ongoing */
<> 144:ef7eb2e8f9f7 1628 dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT);
<> 144:ef7eb2e8f9f7 1629 if((huart->gState == HAL_UART_STATE_BUSY_TX) && dmarequest)
<> 144:ef7eb2e8f9f7 1630 {
<> 144:ef7eb2e8f9f7 1631 huart->TxXferCount = 0U;
<> 144:ef7eb2e8f9f7 1632 UART_EndTxTransfer(huart);
<> 144:ef7eb2e8f9f7 1633 }
<> 144:ef7eb2e8f9f7 1634
<> 144:ef7eb2e8f9f7 1635 /* Stop UART DMA Rx request if ongoing */
<> 144:ef7eb2e8f9f7 1636 dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR);
<> 144:ef7eb2e8f9f7 1637 if((huart->RxState == HAL_UART_STATE_BUSY_RX) && dmarequest)
<> 144:ef7eb2e8f9f7 1638 {
<> 144:ef7eb2e8f9f7 1639 huart->RxXferCount = 0U;
<> 144:ef7eb2e8f9f7 1640 UART_EndRxTransfer(huart);
<> 144:ef7eb2e8f9f7 1641 }
<> 144:ef7eb2e8f9f7 1642
<> 144:ef7eb2e8f9f7 1643 huart->ErrorCode |= HAL_UART_ERROR_DMA;
<> 144:ef7eb2e8f9f7 1644 HAL_UART_ErrorCallback(huart);
<> 144:ef7eb2e8f9f7 1645 }
<> 144:ef7eb2e8f9f7 1646
<> 144:ef7eb2e8f9f7 1647 /**
<> 144:ef7eb2e8f9f7 1648 * @brief This function handles UART Communication Timeout.
<> 144:ef7eb2e8f9f7 1649 * @param huart: pointer to a UART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1650 * the configuration information for the specified UART module.
<> 144:ef7eb2e8f9f7 1651 * @param Flag: specifies the UART flag to check.
<> 144:ef7eb2e8f9f7 1652 * @param Status: The new Flag status (SET or RESET).
<> 144:ef7eb2e8f9f7 1653 * @param Timeout: Timeout duration
<> 144:ef7eb2e8f9f7 1654 * @param Tickstart Tick start value
<> 144:ef7eb2e8f9f7 1655 * @retval HAL status
<> 144:ef7eb2e8f9f7 1656 */
<> 144:ef7eb2e8f9f7 1657 static HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout)
<> 144:ef7eb2e8f9f7 1658 {
<> 144:ef7eb2e8f9f7 1659 /* Wait until flag is set */
<> 144:ef7eb2e8f9f7 1660 while((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status)
<> 144:ef7eb2e8f9f7 1661 {
<> 144:ef7eb2e8f9f7 1662 /* Check for the Timeout */
<> 144:ef7eb2e8f9f7 1663 if(Timeout != HAL_MAX_DELAY)
<> 144:ef7eb2e8f9f7 1664 {
<> 144:ef7eb2e8f9f7 1665 if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout))
<> 144:ef7eb2e8f9f7 1666 {
<> 144:ef7eb2e8f9f7 1667 /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
<> 144:ef7eb2e8f9f7 1668 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE));
<> 144:ef7eb2e8f9f7 1669 CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
<> 144:ef7eb2e8f9f7 1670
<> 144:ef7eb2e8f9f7 1671 huart->gState = HAL_UART_STATE_READY;
<> 144:ef7eb2e8f9f7 1672 huart->RxState = HAL_UART_STATE_READY;
<> 144:ef7eb2e8f9f7 1673
<> 144:ef7eb2e8f9f7 1674 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1675 __HAL_UNLOCK(huart);
<> 144:ef7eb2e8f9f7 1676
<> 144:ef7eb2e8f9f7 1677 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 1678 }
<> 144:ef7eb2e8f9f7 1679 }
<> 144:ef7eb2e8f9f7 1680 }
<> 144:ef7eb2e8f9f7 1681
<> 144:ef7eb2e8f9f7 1682 return HAL_OK;
<> 144:ef7eb2e8f9f7 1683 }
<> 144:ef7eb2e8f9f7 1684
<> 144:ef7eb2e8f9f7 1685 /**
<> 144:ef7eb2e8f9f7 1686 * @brief End ongoing Tx transfer on UART peripheral (following error detection or Transmit completion).
<> 144:ef7eb2e8f9f7 1687 * @param huart: UART handle.
<> 144:ef7eb2e8f9f7 1688 * @retval None
<> 144:ef7eb2e8f9f7 1689 */
<> 144:ef7eb2e8f9f7 1690 static void UART_EndTxTransfer(UART_HandleTypeDef *huart)
<> 144:ef7eb2e8f9f7 1691 {
<> 144:ef7eb2e8f9f7 1692 /* Disable TXEIE and TCIE interrupts */
<> 144:ef7eb2e8f9f7 1693 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE));
<> 144:ef7eb2e8f9f7 1694
<> 144:ef7eb2e8f9f7 1695 /* At end of Tx process, restore huart->gState to Ready */
<> 144:ef7eb2e8f9f7 1696 huart->gState = HAL_UART_STATE_READY;
<> 144:ef7eb2e8f9f7 1697 }
<> 144:ef7eb2e8f9f7 1698
<> 144:ef7eb2e8f9f7 1699 /**
<> 144:ef7eb2e8f9f7 1700 * @brief End ongoing Rx transfer on UART peripheral (following error detection or Reception completion).
<> 144:ef7eb2e8f9f7 1701 * @param huart: UART handle.
<> 144:ef7eb2e8f9f7 1702 * @retval None
<> 144:ef7eb2e8f9f7 1703 */
<> 144:ef7eb2e8f9f7 1704 static void UART_EndRxTransfer(UART_HandleTypeDef *huart)
<> 144:ef7eb2e8f9f7 1705 {
<> 144:ef7eb2e8f9f7 1706 /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
<> 144:ef7eb2e8f9f7 1707 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
<> 144:ef7eb2e8f9f7 1708 CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
<> 144:ef7eb2e8f9f7 1709
<> 144:ef7eb2e8f9f7 1710 /* At end of Rx process, restore huart->RxState to Ready */
<> 144:ef7eb2e8f9f7 1711 huart->RxState = HAL_UART_STATE_READY;
<> 144:ef7eb2e8f9f7 1712 }
<> 144:ef7eb2e8f9f7 1713
<> 144:ef7eb2e8f9f7 1714 /**
<> 144:ef7eb2e8f9f7 1715 * @brief DMA UART communication abort callback, when initiated by HAL services on Error
<> 144:ef7eb2e8f9f7 1716 * (To be called at end of DMA Abort procedure following error occurrence).
<> 144:ef7eb2e8f9f7 1717 * @param hdma DMA handle.
<> 144:ef7eb2e8f9f7 1718 * @retval None
<> 144:ef7eb2e8f9f7 1719 */
<> 144:ef7eb2e8f9f7 1720 static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma)
<> 144:ef7eb2e8f9f7 1721 {
<> 144:ef7eb2e8f9f7 1722 UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
<> 144:ef7eb2e8f9f7 1723 huart->RxXferCount = 0U;
<> 144:ef7eb2e8f9f7 1724 huart->TxXferCount = 0U;
<> 144:ef7eb2e8f9f7 1725
<> 144:ef7eb2e8f9f7 1726 HAL_UART_ErrorCallback(huart);
<> 144:ef7eb2e8f9f7 1727 }
<> 144:ef7eb2e8f9f7 1728
<> 144:ef7eb2e8f9f7 1729 /**
<> 144:ef7eb2e8f9f7 1730 * @brief Sends an amount of data in non blocking mode.
<> 144:ef7eb2e8f9f7 1731 * @param huart: Pointer to a UART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1732 * the configuration information for the specified UART module.
<> 144:ef7eb2e8f9f7 1733 * @retval HAL status
<> 144:ef7eb2e8f9f7 1734 */
<> 144:ef7eb2e8f9f7 1735 static HAL_StatusTypeDef UART_Transmit_IT(UART_HandleTypeDef *huart)
<> 144:ef7eb2e8f9f7 1736 {
<> 144:ef7eb2e8f9f7 1737 uint16_t* tmp;
<> 144:ef7eb2e8f9f7 1738
<> 144:ef7eb2e8f9f7 1739 /* Check that a Tx process is ongoing */
<> 144:ef7eb2e8f9f7 1740 if(huart->gState == HAL_UART_STATE_BUSY_TX)
<> 144:ef7eb2e8f9f7 1741 {
<> 144:ef7eb2e8f9f7 1742 if(huart->Init.WordLength == UART_WORDLENGTH_9B)
<> 144:ef7eb2e8f9f7 1743 {
<> 144:ef7eb2e8f9f7 1744 tmp = (uint16_t*) huart->pTxBuffPtr;
<> 144:ef7eb2e8f9f7 1745 huart->Instance->DR = (uint16_t)(*tmp & (uint16_t)0x01FFU);
<> 144:ef7eb2e8f9f7 1746 if(huart->Init.Parity == UART_PARITY_NONE)
<> 144:ef7eb2e8f9f7 1747 {
<> 144:ef7eb2e8f9f7 1748 huart->pTxBuffPtr += 2;
<> 144:ef7eb2e8f9f7 1749 }
<> 144:ef7eb2e8f9f7 1750 else
<> 144:ef7eb2e8f9f7 1751 {
<> 144:ef7eb2e8f9f7 1752 huart->pTxBuffPtr += 1;
<> 144:ef7eb2e8f9f7 1753 }
<> 144:ef7eb2e8f9f7 1754 }
<> 144:ef7eb2e8f9f7 1755 else
<> 144:ef7eb2e8f9f7 1756 {
<> 144:ef7eb2e8f9f7 1757 huart->Instance->DR = (uint8_t)(*huart->pTxBuffPtr++ & (uint8_t)0x00FFU);
<> 144:ef7eb2e8f9f7 1758 }
<> 144:ef7eb2e8f9f7 1759
<> 144:ef7eb2e8f9f7 1760 if(--huart->TxXferCount == 0)
<> 144:ef7eb2e8f9f7 1761 {
<> 144:ef7eb2e8f9f7 1762 /* Disable the UART Transmit Complete Interrupt */
<> 144:ef7eb2e8f9f7 1763 CLEAR_BIT(huart->Instance->CR1, USART_CR1_TXEIE);
<> 144:ef7eb2e8f9f7 1764
<> 144:ef7eb2e8f9f7 1765 /* Enable the UART Transmit Complete Interrupt */
<> 144:ef7eb2e8f9f7 1766 SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
<> 144:ef7eb2e8f9f7 1767 }
<> 144:ef7eb2e8f9f7 1768 return HAL_OK;
<> 144:ef7eb2e8f9f7 1769 }
<> 144:ef7eb2e8f9f7 1770 else
<> 144:ef7eb2e8f9f7 1771 {
<> 144:ef7eb2e8f9f7 1772 return HAL_BUSY;
<> 144:ef7eb2e8f9f7 1773 }
<> 144:ef7eb2e8f9f7 1774 }
<> 144:ef7eb2e8f9f7 1775
<> 144:ef7eb2e8f9f7 1776 /**
<> 144:ef7eb2e8f9f7 1777 * @brief Wraps up transmission in non blocking mode.
<> 144:ef7eb2e8f9f7 1778 * @param huart: pointer to a UART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1779 * the configuration information for the specified UART module.
<> 144:ef7eb2e8f9f7 1780 * @retval HAL status
<> 144:ef7eb2e8f9f7 1781 */
<> 144:ef7eb2e8f9f7 1782 static HAL_StatusTypeDef UART_EndTransmit_IT(UART_HandleTypeDef *huart)
<> 144:ef7eb2e8f9f7 1783 {
<> 144:ef7eb2e8f9f7 1784 /* Disable the UART Transmit Complete Interrupt */
<> 144:ef7eb2e8f9f7 1785 CLEAR_BIT(huart->Instance->CR1, USART_CR1_TCIE);
<> 144:ef7eb2e8f9f7 1786
<> 144:ef7eb2e8f9f7 1787 /* Tx process is ended, restore huart->gState to Ready */
<> 144:ef7eb2e8f9f7 1788 huart->gState = HAL_UART_STATE_READY;
<> 144:ef7eb2e8f9f7 1789
<> 144:ef7eb2e8f9f7 1790 HAL_UART_TxCpltCallback(huart);
<> 144:ef7eb2e8f9f7 1791
<> 144:ef7eb2e8f9f7 1792 return HAL_OK;
<> 144:ef7eb2e8f9f7 1793 }
<> 144:ef7eb2e8f9f7 1794
<> 144:ef7eb2e8f9f7 1795 /**
<> 144:ef7eb2e8f9f7 1796 * @brief Receives an amount of data in non blocking mode
<> 144:ef7eb2e8f9f7 1797 * @param huart: pointer to a UART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1798 * the configuration information for the specified UART module.
<> 144:ef7eb2e8f9f7 1799 * @retval HAL status
<> 144:ef7eb2e8f9f7 1800 */
<> 144:ef7eb2e8f9f7 1801 static HAL_StatusTypeDef UART_Receive_IT(UART_HandleTypeDef *huart)
<> 144:ef7eb2e8f9f7 1802 {
<> 144:ef7eb2e8f9f7 1803 uint16_t* tmp;
<> 144:ef7eb2e8f9f7 1804
<> 144:ef7eb2e8f9f7 1805 /* Check that a Rx process is ongoing */
<> 144:ef7eb2e8f9f7 1806 if(huart->RxState == HAL_UART_STATE_BUSY_RX)
<> 144:ef7eb2e8f9f7 1807 {
<> 144:ef7eb2e8f9f7 1808 if(huart->Init.WordLength == UART_WORDLENGTH_9B)
<> 144:ef7eb2e8f9f7 1809 {
<> 144:ef7eb2e8f9f7 1810 tmp = (uint16_t*) huart->pRxBuffPtr;
<> 144:ef7eb2e8f9f7 1811 if(huart->Init.Parity == UART_PARITY_NONE)
<> 144:ef7eb2e8f9f7 1812 {
<> 144:ef7eb2e8f9f7 1813 *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FFU);
<> 144:ef7eb2e8f9f7 1814 huart->pRxBuffPtr += 2U;
<> 144:ef7eb2e8f9f7 1815 }
<> 144:ef7eb2e8f9f7 1816 else
<> 144:ef7eb2e8f9f7 1817 {
<> 144:ef7eb2e8f9f7 1818 *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x00FFU);
<> 144:ef7eb2e8f9f7 1819 huart->pRxBuffPtr += 1U;
<> 144:ef7eb2e8f9f7 1820 }
<> 144:ef7eb2e8f9f7 1821 }
<> 144:ef7eb2e8f9f7 1822 else
<> 144:ef7eb2e8f9f7 1823 {
<> 144:ef7eb2e8f9f7 1824 if(huart->Init.Parity == UART_PARITY_NONE)
<> 144:ef7eb2e8f9f7 1825 {
<> 144:ef7eb2e8f9f7 1826 *huart->pRxBuffPtr++ = (uint8_t)(huart->Instance->DR & (uint8_t)0x00FFU);
<> 144:ef7eb2e8f9f7 1827 }
<> 144:ef7eb2e8f9f7 1828 else
<> 144:ef7eb2e8f9f7 1829 {
<> 144:ef7eb2e8f9f7 1830 *huart->pRxBuffPtr++ = (uint8_t)(huart->Instance->DR & (uint8_t)0x007FU);
<> 144:ef7eb2e8f9f7 1831 }
<> 144:ef7eb2e8f9f7 1832 }
<> 144:ef7eb2e8f9f7 1833
<> 144:ef7eb2e8f9f7 1834 if(--huart->RxXferCount == 0)
<> 144:ef7eb2e8f9f7 1835 {
<> 144:ef7eb2e8f9f7 1836 /* Disable the UART Parity Error Interrupt and RXNE interrupt*/
<> 144:ef7eb2e8f9f7 1837 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
<> 144:ef7eb2e8f9f7 1838
<> 144:ef7eb2e8f9f7 1839 /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */
<> 144:ef7eb2e8f9f7 1840 CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
<> 144:ef7eb2e8f9f7 1841
<> 144:ef7eb2e8f9f7 1842 /* Rx process is completed, restore huart->RxState to Ready */
<> 144:ef7eb2e8f9f7 1843 huart->RxState = HAL_UART_STATE_READY;
<> 144:ef7eb2e8f9f7 1844
<> 144:ef7eb2e8f9f7 1845 HAL_UART_RxCpltCallback(huart);
<> 144:ef7eb2e8f9f7 1846
<> 144:ef7eb2e8f9f7 1847 return HAL_OK;
<> 144:ef7eb2e8f9f7 1848 }
<> 144:ef7eb2e8f9f7 1849 return HAL_OK;
<> 144:ef7eb2e8f9f7 1850 }
<> 144:ef7eb2e8f9f7 1851 else
<> 144:ef7eb2e8f9f7 1852 {
<> 144:ef7eb2e8f9f7 1853 return HAL_BUSY;
<> 144:ef7eb2e8f9f7 1854 }
<> 144:ef7eb2e8f9f7 1855 }
<> 144:ef7eb2e8f9f7 1856
<> 144:ef7eb2e8f9f7 1857 /**
<> 144:ef7eb2e8f9f7 1858 * @brief Configures the UART peripheral.
<> 144:ef7eb2e8f9f7 1859 * @param huart: pointer to a UART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1860 * the configuration information for the specified UART module.
<> 144:ef7eb2e8f9f7 1861 * @retval None
<> 144:ef7eb2e8f9f7 1862 */
<> 144:ef7eb2e8f9f7 1863 static void UART_SetConfig(UART_HandleTypeDef *huart)
<> 144:ef7eb2e8f9f7 1864 {
<> 144:ef7eb2e8f9f7 1865 uint32_t tmpreg = 0x00U;
<> 144:ef7eb2e8f9f7 1866
<> 144:ef7eb2e8f9f7 1867 /* Check the parameters */
<> 144:ef7eb2e8f9f7 1868 assert_param(IS_UART_BAUDRATE(huart->Init.BaudRate));
<> 144:ef7eb2e8f9f7 1869 assert_param(IS_UART_STOPBITS(huart->Init.StopBits));
<> 144:ef7eb2e8f9f7 1870 assert_param(IS_UART_PARITY(huart->Init.Parity));
<> 144:ef7eb2e8f9f7 1871 assert_param(IS_UART_MODE(huart->Init.Mode));
<> 144:ef7eb2e8f9f7 1872
<> 144:ef7eb2e8f9f7 1873 /*-------------------------- USART CR2 Configuration -----------------------*/
<> 144:ef7eb2e8f9f7 1874 tmpreg = huart->Instance->CR2;
<> 144:ef7eb2e8f9f7 1875
<> 144:ef7eb2e8f9f7 1876 /* Clear STOP[13:12] bits */
<> 144:ef7eb2e8f9f7 1877 tmpreg &= (uint32_t)~((uint32_t)USART_CR2_STOP);
<> 144:ef7eb2e8f9f7 1878
<> 144:ef7eb2e8f9f7 1879 /* Configure the UART Stop Bits: Set STOP[13:12] bits according to huart->Init.StopBits value */
<> 144:ef7eb2e8f9f7 1880 tmpreg |= (uint32_t)huart->Init.StopBits;
<> 144:ef7eb2e8f9f7 1881
<> 144:ef7eb2e8f9f7 1882 /* Write to USART CR2 */
<> 144:ef7eb2e8f9f7 1883 WRITE_REG(huart->Instance->CR2, (uint32_t)tmpreg);
<> 144:ef7eb2e8f9f7 1884
<> 144:ef7eb2e8f9f7 1885 /*-------------------------- USART CR1 Configuration -----------------------*/
<> 144:ef7eb2e8f9f7 1886 tmpreg = huart->Instance->CR1;
<> 144:ef7eb2e8f9f7 1887
<> 144:ef7eb2e8f9f7 1888 /* Clear M, PCE, PS, TE and RE bits */
<> 144:ef7eb2e8f9f7 1889 tmpreg &= (uint32_t)~((uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | \
<> 144:ef7eb2e8f9f7 1890 USART_CR1_RE | USART_CR1_OVER8));
<> 144:ef7eb2e8f9f7 1891
<> 144:ef7eb2e8f9f7 1892 /* Configure the UART Word Length, Parity and mode:
<> 144:ef7eb2e8f9f7 1893 Set the M bits according to huart->Init.WordLength value
<> 144:ef7eb2e8f9f7 1894 Set PCE and PS bits according to huart->Init.Parity value
<> 144:ef7eb2e8f9f7 1895 Set TE and RE bits according to huart->Init.Mode value
<> 144:ef7eb2e8f9f7 1896 Set OVER8 bit according to huart->Init.OverSampling value */
<> 144:ef7eb2e8f9f7 1897 tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling;
<> 144:ef7eb2e8f9f7 1898
<> 144:ef7eb2e8f9f7 1899 /* Write to USART CR1 */
<> 144:ef7eb2e8f9f7 1900 WRITE_REG(huart->Instance->CR1, (uint32_t)tmpreg);
<> 144:ef7eb2e8f9f7 1901
<> 144:ef7eb2e8f9f7 1902 /*-------------------------- USART CR3 Configuration -----------------------*/
<> 144:ef7eb2e8f9f7 1903 tmpreg = huart->Instance->CR3;
<> 144:ef7eb2e8f9f7 1904
<> 144:ef7eb2e8f9f7 1905 /* Clear CTSE and RTSE bits */
<> 144:ef7eb2e8f9f7 1906 tmpreg &= (uint32_t)~((uint32_t)(USART_CR3_RTSE | USART_CR3_CTSE));
<> 144:ef7eb2e8f9f7 1907
<> 144:ef7eb2e8f9f7 1908 /* Configure the UART HFC: Set CTSE and RTSE bits according to huart->Init.HwFlowCtl value */
<> 144:ef7eb2e8f9f7 1909 tmpreg |= huart->Init.HwFlowCtl;
<> 144:ef7eb2e8f9f7 1910
<> 144:ef7eb2e8f9f7 1911 /* Write to USART CR3 */
<> 144:ef7eb2e8f9f7 1912 WRITE_REG(huart->Instance->CR3, (uint32_t)tmpreg);
<> 144:ef7eb2e8f9f7 1913
<> 144:ef7eb2e8f9f7 1914 /* Check the Over Sampling */
<> 144:ef7eb2e8f9f7 1915 if(huart->Init.OverSampling == UART_OVERSAMPLING_8)
<> 144:ef7eb2e8f9f7 1916 {
<> 144:ef7eb2e8f9f7 1917 /*-------------------------- USART BRR Configuration ---------------------*/
<> 144:ef7eb2e8f9f7 1918 if((huart->Instance == USART1) || (huart->Instance == USART6))
<> 144:ef7eb2e8f9f7 1919 {
<> 144:ef7eb2e8f9f7 1920 huart->Instance->BRR = UART_BRR_SAMPLING8(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate);
<> 144:ef7eb2e8f9f7 1921 }
<> 144:ef7eb2e8f9f7 1922 else
<> 144:ef7eb2e8f9f7 1923 {
<> 144:ef7eb2e8f9f7 1924 huart->Instance->BRR = UART_BRR_SAMPLING8(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate);
<> 144:ef7eb2e8f9f7 1925 }
<> 144:ef7eb2e8f9f7 1926 }
<> 144:ef7eb2e8f9f7 1927 else
<> 144:ef7eb2e8f9f7 1928 {
<> 144:ef7eb2e8f9f7 1929 /*-------------------------- USART BRR Configuration ---------------------*/
<> 144:ef7eb2e8f9f7 1930 if((huart->Instance == USART1) || (huart->Instance == USART6))
<> 144:ef7eb2e8f9f7 1931 {
<> 144:ef7eb2e8f9f7 1932 huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate);
<> 144:ef7eb2e8f9f7 1933 }
<> 144:ef7eb2e8f9f7 1934 else
<> 144:ef7eb2e8f9f7 1935 {
<> 144:ef7eb2e8f9f7 1936 huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate);
<> 144:ef7eb2e8f9f7 1937 }
<> 144:ef7eb2e8f9f7 1938 }
<> 144:ef7eb2e8f9f7 1939 }
<> 144:ef7eb2e8f9f7 1940
<> 144:ef7eb2e8f9f7 1941 /**
<> 144:ef7eb2e8f9f7 1942 * @}
<> 144:ef7eb2e8f9f7 1943 */
<> 144:ef7eb2e8f9f7 1944
<> 144:ef7eb2e8f9f7 1945 #endif /* HAL_UART_MODULE_ENABLED */
<> 144:ef7eb2e8f9f7 1946 /**
<> 144:ef7eb2e8f9f7 1947 * @}
<> 144:ef7eb2e8f9f7 1948 */
<> 144:ef7eb2e8f9f7 1949
<> 144:ef7eb2e8f9f7 1950 /**
<> 144:ef7eb2e8f9f7 1951 * @}
<> 144:ef7eb2e8f9f7 1952 */
<> 144:ef7eb2e8f9f7 1953
<> 144:ef7eb2e8f9f7 1954 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/