Johannes Stratmann / mbed-dev

added prescaler for 16 bit pwm in LPC1347 target

Fork of mbed-dev by mbed official

targets/cmsis/TARGET_ONSEMI/TARGET_NCS36510/TOOLCHAIN_IAR/startup_NCS36510.s@144:ef7eb2e8f9f7, 2016-09-02 (annotated)

Committer:
<>
Date:
Fri Sep 02 15:07:44 2016 +0100
Revision:
144:ef7eb2e8f9f7
This updates the lib to the mbed lib v125

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 ;/**************************************************************************//**
<> 144:ef7eb2e8f9f7 2 ; * @file startup_ARMCM3.s
<> 144:ef7eb2e8f9f7 3 ; * @brief CMSIS Cortex-M4 Core Device Startup File
<> 144:ef7eb2e8f9f7 4 ; * for CM3 Device Series
<> 144:ef7eb2e8f9f7 5 ; * @version V1.05
<> 144:ef7eb2e8f9f7 6 ; * @date 25. July 2011
<> 144:ef7eb2e8f9f7 7 ; *
<> 144:ef7eb2e8f9f7 8 ; * @note
<> 144:ef7eb2e8f9f7 9 ; * Copyright (C) 2010-2011 ARM Limited. All rights reserved.
<> 144:ef7eb2e8f9f7 10 ; *
<> 144:ef7eb2e8f9f7 11 ; * @par
<> 144:ef7eb2e8f9f7 12 ; * ARM Limited (ARM) is supplying this software for use with Cortex-M
<> 144:ef7eb2e8f9f7 13 ; * processor based microcontrollers. This file can be freely distributed
<> 144:ef7eb2e8f9f7 14 ; * within development tools that are supporting such ARM based processors.
<> 144:ef7eb2e8f9f7 15 ; *
<> 144:ef7eb2e8f9f7 16 ; * @par
<> 144:ef7eb2e8f9f7 17 ; * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
<> 144:ef7eb2e8f9f7 18 ; * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
<> 144:ef7eb2e8f9f7 19 ; * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
<> 144:ef7eb2e8f9f7 20 ; * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
<> 144:ef7eb2e8f9f7 21 ; * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
<> 144:ef7eb2e8f9f7 22 ; *
<> 144:ef7eb2e8f9f7 23 ; ******************************************************************************/
<> 144:ef7eb2e8f9f7 24
<> 144:ef7eb2e8f9f7 25
<> 144:ef7eb2e8f9f7 26 ;
<> 144:ef7eb2e8f9f7 27 ; The modules in this file are included in the libraries, and may be replaced
<> 144:ef7eb2e8f9f7 28 ; by any user-defined modules that define the PUBLIC symbol _program_start or
<> 144:ef7eb2e8f9f7 29 ; a user defined start symbol.
<> 144:ef7eb2e8f9f7 30 ; To override the cstartup defined in the library, simply add your modified
<> 144:ef7eb2e8f9f7 31 ; version to the workbench project.
<> 144:ef7eb2e8f9f7 32 ;
<> 144:ef7eb2e8f9f7 33 ; The vector table is normally located at address 0.
<> 144:ef7eb2e8f9f7 34 ; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
<> 144:ef7eb2e8f9f7 35 ; The name "__vector_table" has special meaning for C-SPY:
<> 144:ef7eb2e8f9f7 36 ; it is where the SP start value is found, and the NVIC vector
<> 144:ef7eb2e8f9f7 37 ; table register (VTOR) is initialized to this address if != 0.
<> 144:ef7eb2e8f9f7 38 ;
<> 144:ef7eb2e8f9f7 39 ; Cortex-M version
<> 144:ef7eb2e8f9f7 40 ;
<> 144:ef7eb2e8f9f7 41
<> 144:ef7eb2e8f9f7 42 MODULE ?cstartup
<> 144:ef7eb2e8f9f7 43
<> 144:ef7eb2e8f9f7 44 ;; Forward declaration of sections.
<> 144:ef7eb2e8f9f7 45 SECTION CSTACK:DATA:NOROOT(3)
<> 144:ef7eb2e8f9f7 46
<> 144:ef7eb2e8f9f7 47 SECTION .intvec:CODE:NOROOT(2)
<> 144:ef7eb2e8f9f7 48
<> 144:ef7eb2e8f9f7 49 EXTERN __iar_program_start
<> 144:ef7eb2e8f9f7 50 EXTERN SystemInit
<> 144:ef7eb2e8f9f7 51 EXTERN fInitSource
<> 144:ef7eb2e8f9f7 52 EXTERN HardFault_Handler
<> 144:ef7eb2e8f9f7 53 EXTERN SVC_Handler
<> 144:ef7eb2e8f9f7 54 EXTERN PendSV_Handler
<> 144:ef7eb2e8f9f7 55 EXTERN SysTick_Handler
<> 144:ef7eb2e8f9f7 56 EXTERN fIrqTim0Handler
<> 144:ef7eb2e8f9f7 57 EXTERN fIrqTim1Handler
<> 144:ef7eb2e8f9f7 58 EXTERN fIrqTim2Handler
<> 144:ef7eb2e8f9f7 59 EXTERN fIrqGpioHandler
<> 144:ef7eb2e8f9f7 60 EXTERN fIrqSpiHandler
<> 144:ef7eb2e8f9f7 61 EXTERN fIrqUart1Handler
<> 144:ef7eb2e8f9f7 62 EXTERN fIrqUart2Handler
<> 144:ef7eb2e8f9f7 63 PUBLIC __vector_table
<> 144:ef7eb2e8f9f7 64 PUBLIC __vector_table_0x1c
<> 144:ef7eb2e8f9f7 65 PUBLIC __Vectors
<> 144:ef7eb2e8f9f7 66 PUBLIC __Vectors_End
<> 144:ef7eb2e8f9f7 67 PUBLIC __Vectors_Size
<> 144:ef7eb2e8f9f7 68
<> 144:ef7eb2e8f9f7 69 DATA
<> 144:ef7eb2e8f9f7 70
<> 144:ef7eb2e8f9f7 71 __vector_table
<> 144:ef7eb2e8f9f7 72 DCD sfe(CSTACK)
<> 144:ef7eb2e8f9f7 73 DCD Reset_Handler
<> 144:ef7eb2e8f9f7 74 #ifndef RAM_VECTOR_TABLE
<> 144:ef7eb2e8f9f7 75 DCD NMI_Handler
<> 144:ef7eb2e8f9f7 76 DCD HardFault_Handler
<> 144:ef7eb2e8f9f7 77 DCD MemManage_Handler
<> 144:ef7eb2e8f9f7 78 DCD BusFault_Handler
<> 144:ef7eb2e8f9f7 79 DCD UsageFault_Handler
<> 144:ef7eb2e8f9f7 80 #endif
<> 144:ef7eb2e8f9f7 81 __vector_table_0x1c
<> 144:ef7eb2e8f9f7 82 #ifndef RAM_VECTOR_TABLE
<> 144:ef7eb2e8f9f7 83 DCD 0
<> 144:ef7eb2e8f9f7 84 DCD 0
<> 144:ef7eb2e8f9f7 85 DCD 0
<> 144:ef7eb2e8f9f7 86 DCD 0
<> 144:ef7eb2e8f9f7 87 DCD SVC_Handler
<> 144:ef7eb2e8f9f7 88 DCD DebugMon_Handler
<> 144:ef7eb2e8f9f7 89 DCD 0
<> 144:ef7eb2e8f9f7 90 DCD PendSV_Handler
<> 144:ef7eb2e8f9f7 91 DCD SysTick_Handler
<> 144:ef7eb2e8f9f7 92
<> 144:ef7eb2e8f9f7 93 ; External Interrupts
<> 144:ef7eb2e8f9f7 94 DCD fIrqTim0Handler
<> 144:ef7eb2e8f9f7 95 DCD fIrqTim1Handler
<> 144:ef7eb2e8f9f7 96 DCD fIrqTim2Handler
<> 144:ef7eb2e8f9f7 97 DCD fIrqUart1Handler
<> 144:ef7eb2e8f9f7 98 DCD fIrqSpiHandler
<> 144:ef7eb2e8f9f7 99 DCD fIrqI2CHandler
<> 144:ef7eb2e8f9f7 100 DCD fIrqGpioHandler
<> 144:ef7eb2e8f9f7 101 DCD fIrqRtcHandler
<> 144:ef7eb2e8f9f7 102 DCD fIrqFlashHandler
<> 144:ef7eb2e8f9f7 103 DCD fIrqMacHwHandler
<> 144:ef7eb2e8f9f7 104 DCD fIrqAesHandler
<> 144:ef7eb2e8f9f7 105 DCD fIrqAdcHandler
<> 144:ef7eb2e8f9f7 106 DCD fIrqClockCalHandler
<> 144:ef7eb2e8f9f7 107 DCD fIrqUart2Handler
<> 144:ef7eb2e8f9f7 108 DCD fIrqUviHandler
<> 144:ef7eb2e8f9f7 109 DCD fIrqDmaHandler
<> 144:ef7eb2e8f9f7 110 DCD fIrqDbgPwrUpHandler
<> 144:ef7eb2e8f9f7 111 /* REV C/D interrupts */
<> 144:ef7eb2e8f9f7 112 DCD fIrqSpi2Handler
<> 144:ef7eb2e8f9f7 113 DCD fIrqI2c2Handler
<> 144:ef7eb2e8f9f7 114 DCD FIrqFVDDHCompHandler /* FVDDH Supply Comparator Trip */
<> 144:ef7eb2e8f9f7 115 #endif
<> 144:ef7eb2e8f9f7 116 __Vectors_End
<> 144:ef7eb2e8f9f7 117
<> 144:ef7eb2e8f9f7 118 __Vectors EQU __vector_table
<> 144:ef7eb2e8f9f7 119 __Vectors_Size EQU __Vectors_End - __Vectors
<> 144:ef7eb2e8f9f7 120
<> 144:ef7eb2e8f9f7 121 opt: DC32 0x2082353F /* Full featured device */
<> 144:ef7eb2e8f9f7 122 opt_reg: DC32 0x4001E000
<> 144:ef7eb2e8f9f7 123 enable: DC32 0x00000000
<> 144:ef7eb2e8f9f7 124 per_en: DC32 0x4001B010
<> 144:ef7eb2e8f9f7 125
<> 144:ef7eb2e8f9f7 126 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
<> 144:ef7eb2e8f9f7 127 ;;
<> 144:ef7eb2e8f9f7 128 ;; Default interrupt handlers.
<> 144:ef7eb2e8f9f7 129 ;;
<> 144:ef7eb2e8f9f7 130 THUMB
<> 144:ef7eb2e8f9f7 131
<> 144:ef7eb2e8f9f7 132 ;; Taken from article http://netstorage.iar.com/SuppDB/Public/UPDINFO/007040/arm/doc/infocenter/ilinkarm.ENU.html
<> 144:ef7eb2e8f9f7 133 ;; If this line is removed, veneers for functions copied into RAM are flasely also placed in RAM, but are NOT
<> 144:ef7eb2e8f9f7 134 ;; copied into it by __iar_copy_init3
<> 144:ef7eb2e8f9f7 135 __iar_init$$done
<> 144:ef7eb2e8f9f7 136
<> 144:ef7eb2e8f9f7 137 PUBLIC Reset_Handler
<> 144:ef7eb2e8f9f7 138 SECTION .text:CODE:REORDER(2)
<> 144:ef7eb2e8f9f7 139 Reset_Handler
<> 144:ef7eb2e8f9f7 140 LDR R0,= enable ;; load R0 with address of enable
<> 144:ef7eb2e8f9f7 141 LDR R0,[R0] ;; load R0 with what address R0 points to
<> 144:ef7eb2e8f9f7 142 LDR R1,= per_en ;; load R1 with address of per_en
<> 144:ef7eb2e8f9f7 143 LDR R1,[R1] ;; load R1 with what address R1 points to
<> 144:ef7eb2e8f9f7 144 STR R0,[R1] ;; store R0 into address pointed to by R1 /* Disable all peripherals */
<> 144:ef7eb2e8f9f7 145
<> 144:ef7eb2e8f9f7 146 LDR R0,= opt ;; load R0 with address of opt
<> 144:ef7eb2e8f9f7 147 LDR R0,[R0] ;; load R0 with what address R0 points to
<> 144:ef7eb2e8f9f7 148 LDR R1,= opt_reg ;; load R1 with address of opt_reg
<> 144:ef7eb2e8f9f7 149 LDR R1,[R1] ;; load R1 with what address R1 points to
<> 144:ef7eb2e8f9f7 150 STR R0, [R1] ;; store R0 into address pointed to by R1 /* Device option: Full featured device */
<> 144:ef7eb2e8f9f7 151
<> 144:ef7eb2e8f9f7 152 LDR R0,= sfe(CSTACK)
<> 144:ef7eb2e8f9f7 153 MOV SP,R0
<> 144:ef7eb2e8f9f7 154 LDR R0, =SystemInit
<> 144:ef7eb2e8f9f7 155 BLX R0
<> 144:ef7eb2e8f9f7 156 LDR R0, =__iar_program_start
<> 144:ef7eb2e8f9f7 157 BX R0
<> 144:ef7eb2e8f9f7 158
<> 144:ef7eb2e8f9f7 159 PUBWEAK NMI_Handler
<> 144:ef7eb2e8f9f7 160 SECTION .text:CODE:REORDER(1)
<> 144:ef7eb2e8f9f7 161 NMI_Handler
<> 144:ef7eb2e8f9f7 162 B NMI_Handler
<> 144:ef7eb2e8f9f7 163
<> 144:ef7eb2e8f9f7 164 ; PUBWEAK HardFault_Handler
<> 144:ef7eb2e8f9f7 165 ; SECTION .text:CODE:REORDER(1)
<> 144:ef7eb2e8f9f7 166 ;HardFault_Handler
<> 144:ef7eb2e8f9f7 167 ; B HardFault_Handler
<> 144:ef7eb2e8f9f7 168
<> 144:ef7eb2e8f9f7 169 PUBWEAK MemManage_Handler
<> 144:ef7eb2e8f9f7 170 SECTION .text:CODE:REORDER(1)
<> 144:ef7eb2e8f9f7 171 MemManage_Handler
<> 144:ef7eb2e8f9f7 172 B MemManage_Handler
<> 144:ef7eb2e8f9f7 173
<> 144:ef7eb2e8f9f7 174 PUBWEAK BusFault_Handler
<> 144:ef7eb2e8f9f7 175 SECTION .text:CODE:REORDER(1)
<> 144:ef7eb2e8f9f7 176 BusFault_Handler
<> 144:ef7eb2e8f9f7 177 B BusFault_Handler
<> 144:ef7eb2e8f9f7 178
<> 144:ef7eb2e8f9f7 179 PUBWEAK UsageFault_Handler
<> 144:ef7eb2e8f9f7 180 SECTION .text:CODE:REORDER(1)
<> 144:ef7eb2e8f9f7 181 UsageFault_Handler
<> 144:ef7eb2e8f9f7 182 B UsageFault_Handler
<> 144:ef7eb2e8f9f7 183
<> 144:ef7eb2e8f9f7 184 ; PUBWEAK vPortSVCHandler
<> 144:ef7eb2e8f9f7 185 ; SECTION .text:CODE:REORDER(1)
<> 144:ef7eb2e8f9f7 186 ;vPortSVCHandler
<> 144:ef7eb2e8f9f7 187 ; B vPortSVCHandler
<> 144:ef7eb2e8f9f7 188
<> 144:ef7eb2e8f9f7 189 PUBWEAK DebugMon_Handler
<> 144:ef7eb2e8f9f7 190 SECTION .text:CODE:REORDER(1)
<> 144:ef7eb2e8f9f7 191 DebugMon_Handler
<> 144:ef7eb2e8f9f7 192 B DebugMon_Handler
<> 144:ef7eb2e8f9f7 193
<> 144:ef7eb2e8f9f7 194 ; PUBWEAK xPortPendSVHandler
<> 144:ef7eb2e8f9f7 195 ; SECTION .text:CODE:REORDER(1)
<> 144:ef7eb2e8f9f7 196 ;xPortPendSVHandler
<> 144:ef7eb2e8f9f7 197 ; B xPortPendSVHandler
<> 144:ef7eb2e8f9f7 198
<> 144:ef7eb2e8f9f7 199 ; PUBWEAK SysTick_Handler
<> 144:ef7eb2e8f9f7 200 ; SECTION .text:CODE:REORDER(1)
<> 144:ef7eb2e8f9f7 201 ;SysTick_Handler
<> 144:ef7eb2e8f9f7 202 ; B SysTick_Handler
<> 144:ef7eb2e8f9f7 203
<> 144:ef7eb2e8f9f7 204
<> 144:ef7eb2e8f9f7 205 ; PUBWEAK fIrqTim0Handler
<> 144:ef7eb2e8f9f7 206 ; SECTION .text:CODE:REORDER(1)
<> 144:ef7eb2e8f9f7 207 ;fIrqTim0Handler
<> 144:ef7eb2e8f9f7 208 ; B fIrqTim0Handler
<> 144:ef7eb2e8f9f7 209
<> 144:ef7eb2e8f9f7 210 ; PUBWEAK fIrqTim1Handler
<> 144:ef7eb2e8f9f7 211 ; SECTION .text:CODE:REORDER(1)
<> 144:ef7eb2e8f9f7 212 ;fIrqTim1Handler
<> 144:ef7eb2e8f9f7 213 ; B fIrqTim1Handler
<> 144:ef7eb2e8f9f7 214
<> 144:ef7eb2e8f9f7 215 ; PUBWEAK fIrqTim2Handler
<> 144:ef7eb2e8f9f7 216 ; SECTION .text:CODE:REORDER(1)
<> 144:ef7eb2e8f9f7 217 ;fIrqTim2Handler
<> 144:ef7eb2e8f9f7 218 ; B fIrqTim2Handler
<> 144:ef7eb2e8f9f7 219
<> 144:ef7eb2e8f9f7 220 ; PUBWEAK fIrqUart1Handler
<> 144:ef7eb2e8f9f7 221 ; SECTION .text:CODE:REORDER(1)
<> 144:ef7eb2e8f9f7 222 ;fIrqUart1Handler
<> 144:ef7eb2e8f9f7 223 ; B fIrqUart1Handler
<> 144:ef7eb2e8f9f7 224
<> 144:ef7eb2e8f9f7 225 ; PUBWEAK fIrqSpiHandler
<> 144:ef7eb2e8f9f7 226 ; SECTION .text:CODE:REORDER(1)
<> 144:ef7eb2e8f9f7 227 ;fIrqSpiHandler
<> 144:ef7eb2e8f9f7 228 ; B fIrqSpiHandler
<> 144:ef7eb2e8f9f7 229
<> 144:ef7eb2e8f9f7 230 PUBWEAK fIrqI2CHandler
<> 144:ef7eb2e8f9f7 231 SECTION .text:CODE:REORDER(1)
<> 144:ef7eb2e8f9f7 232 fIrqI2CHandler
<> 144:ef7eb2e8f9f7 233 B fIrqI2CHandler
<> 144:ef7eb2e8f9f7 234
<> 144:ef7eb2e8f9f7 235 ; PUBWEAK fIrqGpioHandler
<> 144:ef7eb2e8f9f7 236 ; SECTION .text:CODE:REORDER(1)
<> 144:ef7eb2e8f9f7 237 ;fIrqGpioHandler
<> 144:ef7eb2e8f9f7 238 ; B fIrqGpioHandler
<> 144:ef7eb2e8f9f7 239
<> 144:ef7eb2e8f9f7 240 PUBWEAK fIrqRtcHandler
<> 144:ef7eb2e8f9f7 241 SECTION .text:CODE:REORDER(1)
<> 144:ef7eb2e8f9f7 242 fIrqRtcHandler
<> 144:ef7eb2e8f9f7 243 B fIrqRtcHandler
<> 144:ef7eb2e8f9f7 244
<> 144:ef7eb2e8f9f7 245 PUBWEAK fIrqFlashHandler
<> 144:ef7eb2e8f9f7 246 SECTION .text:CODE:REORDER(1)
<> 144:ef7eb2e8f9f7 247 fIrqFlashHandler
<> 144:ef7eb2e8f9f7 248 B fIrqFlashHandler
<> 144:ef7eb2e8f9f7 249
<> 144:ef7eb2e8f9f7 250 PUBWEAK fIrqMacHwHandler
<> 144:ef7eb2e8f9f7 251 SECTION .text:CODE:REORDER(1)
<> 144:ef7eb2e8f9f7 252 fIrqMacHwHandler
<> 144:ef7eb2e8f9f7 253 B fIrqMacHwHandler
<> 144:ef7eb2e8f9f7 254
<> 144:ef7eb2e8f9f7 255 PUBWEAK fIrqAesHandler
<> 144:ef7eb2e8f9f7 256 SECTION .text:CODE:REORDER(1)
<> 144:ef7eb2e8f9f7 257 fIrqAesHandler
<> 144:ef7eb2e8f9f7 258 B fIrqAesHandler
<> 144:ef7eb2e8f9f7 259
<> 144:ef7eb2e8f9f7 260 PUBWEAK fIrqAdcHandler
<> 144:ef7eb2e8f9f7 261 SECTION .text:CODE:REORDER(1)
<> 144:ef7eb2e8f9f7 262 fIrqAdcHandler
<> 144:ef7eb2e8f9f7 263 B fIrqAdcHandler
<> 144:ef7eb2e8f9f7 264
<> 144:ef7eb2e8f9f7 265 PUBWEAK fIrqClockCalHandler
<> 144:ef7eb2e8f9f7 266 SECTION .text:CODE:REORDER(1)
<> 144:ef7eb2e8f9f7 267 fIrqClockCalHandler
<> 144:ef7eb2e8f9f7 268 B fIrqClockCalHandler
<> 144:ef7eb2e8f9f7 269
<> 144:ef7eb2e8f9f7 270 ; PUBWEAK fIrqUart2Handler
<> 144:ef7eb2e8f9f7 271 ; SECTION .text:CODE:REORDER(1)
<> 144:ef7eb2e8f9f7 272 ;fIrqUart2Handler
<> 144:ef7eb2e8f9f7 273 ; B fIrqUart2Handler
<> 144:ef7eb2e8f9f7 274
<> 144:ef7eb2e8f9f7 275 PUBWEAK fIrqDbgPwrUpHandler
<> 144:ef7eb2e8f9f7 276 SECTION .text:CODE:REORDER(1)
<> 144:ef7eb2e8f9f7 277 fIrqDbgPwrUpHandler
<> 144:ef7eb2e8f9f7 278 B fIrqDbgPwrUpHandler
<> 144:ef7eb2e8f9f7 279
<> 144:ef7eb2e8f9f7 280 PUBWEAK fIrqDmaHandler
<> 144:ef7eb2e8f9f7 281 SECTION .text:CODE:REORDER(1)
<> 144:ef7eb2e8f9f7 282 fIrqDmaHandler
<> 144:ef7eb2e8f9f7 283 B fIrqDmaHandler
<> 144:ef7eb2e8f9f7 284
<> 144:ef7eb2e8f9f7 285 PUBWEAK fIrqUviHandler
<> 144:ef7eb2e8f9f7 286 SECTION .text:CODE:REORDER(1)
<> 144:ef7eb2e8f9f7 287 fIrqUviHandler
<> 144:ef7eb2e8f9f7 288 B fIrqUviHandler
<> 144:ef7eb2e8f9f7 289
<> 144:ef7eb2e8f9f7 290 PUBWEAK fIrqSpi2Handler
<> 144:ef7eb2e8f9f7 291 SECTION .text:CODE:REORDER(1)
<> 144:ef7eb2e8f9f7 292 fIrqSpi2Handler
<> 144:ef7eb2e8f9f7 293 B fIrqSpi2Handler
<> 144:ef7eb2e8f9f7 294
<> 144:ef7eb2e8f9f7 295 PUBWEAK fIrqI2c2Handler
<> 144:ef7eb2e8f9f7 296 SECTION .text:CODE:REORDER(1)
<> 144:ef7eb2e8f9f7 297 fIrqI2c2Handler
<> 144:ef7eb2e8f9f7 298 B fIrqI2c2Handler
<> 144:ef7eb2e8f9f7 299
<> 144:ef7eb2e8f9f7 300 PUBWEAK FIrqFVDDHCompHandler
<> 144:ef7eb2e8f9f7 301 SECTION .text:CODE:REORDER(1)
<> 144:ef7eb2e8f9f7 302 FIrqFVDDHCompHandler
<> 144:ef7eb2e8f9f7 303 B FIrqFVDDHCompHandler
<> 144:ef7eb2e8f9f7 304
<> 144:ef7eb2e8f9f7 305 PUBWEAK DEF_IRQHandler
<> 144:ef7eb2e8f9f7 306 SECTION .text:CODE:REORDER(1)
<> 144:ef7eb2e8f9f7 307 DEF_IRQHandler
<> 144:ef7eb2e8f9f7 308 B DEF_IRQHandler
<> 144:ef7eb2e8f9f7 309
<> 144:ef7eb2e8f9f7 310 END