Johannes Stratmann / mbed-dev

added prescaler for 16 bit pwm in LPC1347 target

Fork of mbed-dev by mbed official

targets/cmsis/TARGET_Maxim/TARGET_MAX32610/tpu_regs.h@144:ef7eb2e8f9f7, 2016-09-02 (annotated)

Committer:
<>
Date:
Fri Sep 02 15:07:44 2016 +0100
Revision:
144:ef7eb2e8f9f7
Parent:
0:9b334a45a8ff 
This updates the lib to the mbed lib v125

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /*******************************************************************************
<> 144:ef7eb2e8f9f7 2 * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
<> 144:ef7eb2e8f9f7 3 *
<> 144:ef7eb2e8f9f7 4 * Permission is hereby granted, free of charge, to any person obtaining a
<> 144:ef7eb2e8f9f7 5 * copy of this software and associated documentation files (the "Software"),
<> 144:ef7eb2e8f9f7 6 * to deal in the Software without restriction, including without limitation
<> 144:ef7eb2e8f9f7 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
<> 144:ef7eb2e8f9f7 8 * and/or sell copies of the Software, and to permit persons to whom the
<> 144:ef7eb2e8f9f7 9 * Software is furnished to do so, subject to the following conditions:
<> 144:ef7eb2e8f9f7 10 *
<> 144:ef7eb2e8f9f7 11 * The above copyright notice and this permission notice shall be included
<> 144:ef7eb2e8f9f7 12 * in all copies or substantial portions of the Software.
<> 144:ef7eb2e8f9f7 13 *
<> 144:ef7eb2e8f9f7 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
<> 144:ef7eb2e8f9f7 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
<> 144:ef7eb2e8f9f7 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
<> 144:ef7eb2e8f9f7 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
<> 144:ef7eb2e8f9f7 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
<> 144:ef7eb2e8f9f7 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
<> 144:ef7eb2e8f9f7 20 * OTHER DEALINGS IN THE SOFTWARE.
<> 144:ef7eb2e8f9f7 21 *
<> 144:ef7eb2e8f9f7 22 * Except as contained in this notice, the name of Maxim Integrated
<> 144:ef7eb2e8f9f7 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
<> 144:ef7eb2e8f9f7 24 * Products, Inc. Branding Policy.
<> 144:ef7eb2e8f9f7 25 *
<> 144:ef7eb2e8f9f7 26 * The mere transfer of this software does not imply any licenses
<> 144:ef7eb2e8f9f7 27 * of trade secrets, proprietary technology, copyrights, patents,
<> 144:ef7eb2e8f9f7 28 * trademarks, maskwork rights, or any other form of intellectual
<> 144:ef7eb2e8f9f7 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
<> 144:ef7eb2e8f9f7 30 * ownership rights.
<> 144:ef7eb2e8f9f7 31 *******************************************************************************
<> 144:ef7eb2e8f9f7 32 */
<> 144:ef7eb2e8f9f7 33
<> 144:ef7eb2e8f9f7 34 #ifndef _MXC_TPU_REGS_H_
<> 144:ef7eb2e8f9f7 35 #define _MXC_TPU_REGS_H_
<> 144:ef7eb2e8f9f7 36
<> 144:ef7eb2e8f9f7 37 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 38 extern "C" {
<> 144:ef7eb2e8f9f7 39 #endif
<> 144:ef7eb2e8f9f7 40
<> 144:ef7eb2e8f9f7 41 #include <stdint.h>
<> 144:ef7eb2e8f9f7 42
<> 144:ef7eb2e8f9f7 43 /**
<> 144:ef7eb2e8f9f7 44 * @file tpu_regs.h
<> 144:ef7eb2e8f9f7 45 * @addtogroup tpu TPU
<> 144:ef7eb2e8f9f7 46 * @{
<> 144:ef7eb2e8f9f7 47 */
<> 144:ef7eb2e8f9f7 48
<> 144:ef7eb2e8f9f7 49 /* Offset Register Description
<> 144:ef7eb2e8f9f7 50 ====== ================================================== */
<> 144:ef7eb2e8f9f7 51 typedef struct {
<> 144:ef7eb2e8f9f7 52 __I uint32_t rsv0000; /* 0x0000 Reserved */
<> 144:ef7eb2e8f9f7 53 __I uint32_t rsv0004; /* 0x0004 Reserved - PUF Control (Deprecated) */
<> 144:ef7eb2e8f9f7 54 __I uint32_t rsv0008; /* 0x0008 Reserved - PUF Output (Deprecated) */
<> 144:ef7eb2e8f9f7 55 __I uint32_t rsv000C[125]; /* 0x000C */
<> 144:ef7eb2e8f9f7 56 __IO uint32_t prng_user_entropy; /* 0x0200 PRNG User Entropy Value */
<> 144:ef7eb2e8f9f7 57 __IO uint32_t prng_rnd_num; /* 0x0204 PRNG Random Number Output */
<> 144:ef7eb2e8f9f7 58 } mxc_tpu_regs_t;
<> 144:ef7eb2e8f9f7 59
<> 144:ef7eb2e8f9f7 60 /* Offset Register Description
<> 144:ef7eb2e8f9f7 61 ====== ================================================= */
<> 144:ef7eb2e8f9f7 62 typedef struct {
<> 144:ef7eb2e8f9f7 63 __IO uint32_t status; /* 0x0000 Dynamic Tamper Sensor Status */
<> 144:ef7eb2e8f9f7 64 __IO uint32_t ctrl0; /* 0x0004 Dynamic Tamper Sensor Control 0 */
<> 144:ef7eb2e8f9f7 65 __IO uint32_t ctrl1; /* 0x0008 Dynamic Tamper Sensor Control 1 */
<> 144:ef7eb2e8f9f7 66 __IO uint32_t sks0; /* 0x0010 TPU Secure Key Storage Register 0 */
<> 144:ef7eb2e8f9f7 67 __IO uint32_t sks1; /* 0x0014 TPU Secure Key Storage Register 0 */
<> 144:ef7eb2e8f9f7 68 __IO uint32_t sks2; /* 0x0018 TPU Secure Key Storage Register 0 */
<> 144:ef7eb2e8f9f7 69 __IO uint32_t sks3; /* 0x001C TPU Secure Key Storage Register 0 */
<> 144:ef7eb2e8f9f7 70 } mxc_tpu_tsr_regs_t;
<> 144:ef7eb2e8f9f7 71
<> 144:ef7eb2e8f9f7 72 /*
<> 144:ef7eb2e8f9f7 73 Register offsets for module TPU.
<> 144:ef7eb2e8f9f7 74 */
<> 144:ef7eb2e8f9f7 75 #define MXC_R_TPU_OFFS_PRNG_USER_ENTROPY ((uint32_t)0x00000200UL)
<> 144:ef7eb2e8f9f7 76 #define MXC_R_TPU_OFFS_PRNG_RND_NUM ((uint32_t)0x00000204UL)
<> 144:ef7eb2e8f9f7 77 #define MXC_R_TPU_TSR_OFFS_STATUS ((uint32_t)0x00000000UL)
<> 144:ef7eb2e8f9f7 78 #define MXC_R_TPU_TSR_OFFS_CTRL0 ((uint32_t)0x00000004UL)
<> 144:ef7eb2e8f9f7 79 #define MXC_R_TPU_TSR_OFFS_CTRL1 ((uint32_t)0x00000008UL)
<> 144:ef7eb2e8f9f7 80 #define MXC_R_TPU_TSR_OFFS_SKS0 ((uint32_t)0x00000010UL)
<> 144:ef7eb2e8f9f7 81 #define MXC_R_TPU_TSR_OFFS_SKS1 ((uint32_t)0x00000014UL)
<> 144:ef7eb2e8f9f7 82 #define MXC_R_TPU_TSR_OFFS_SKS2 ((uint32_t)0x00000018UL)
<> 144:ef7eb2e8f9f7 83 #define MXC_R_TPU_TSR_OFFS_SKS3 ((uint32_t)0x0000001CUL)
<> 144:ef7eb2e8f9f7 84
<> 144:ef7eb2e8f9f7 85
<> 144:ef7eb2e8f9f7 86 /*
<> 144:ef7eb2e8f9f7 87 Field positions and masks for module TPU.
<> 144:ef7eb2e8f9f7 88 */
<> 144:ef7eb2e8f9f7 89 #define MXC_F_TPU_CTRL0_ERR_THR_POS 0
<> 144:ef7eb2e8f9f7 90 #define MXC_F_TPU_CTRL0_ERR_THR ((uint32_t)(0x0000001FUL << MXC_F_TPU_CTRL0_ERR_THR_POS))
<> 144:ef7eb2e8f9f7 91 #define MXC_F_TPU_CTRL0_OUT_FREQ_POS 5
<> 144:ef7eb2e8f9f7 92 #define MXC_F_TPU_CTRL0_OUT_FREQ ((uint32_t)(0x00000007UL << MXC_F_TPU_CTRL0_OUT_FREQ_POS))
<> 144:ef7eb2e8f9f7 93 #define MXC_F_TPU_CTRL0_CLOCK_DIV_POS 8
<> 144:ef7eb2e8f9f7 94 #define MXC_F_TPU_CTRL0_CLOCK_DIV ((uint32_t)(0x00000007UL << MXC_F_TPU_CTRL0_CLOCK_DIV_POS))
<> 144:ef7eb2e8f9f7 95 #define MXC_F_TPU_CTRL0_RTC_TX_BUSY_POS 14
<> 144:ef7eb2e8f9f7 96 #define MXC_F_TPU_CTRL0_RTC_TX_BUSY ((uint32_t)(0x00000001UL << MXC_F_TPU_CTRL0_RTC_TX_BUSY_POS))
<> 144:ef7eb2e8f9f7 97 #define MXC_F_TPU_CTRL0_LOCK_POS 15
<> 144:ef7eb2e8f9f7 98 #define MXC_F_TPU_CTRL0_LOCK ((uint32_t)(0x00000001UL << MXC_F_TPU_CTRL0_LOCK_POS))
<> 144:ef7eb2e8f9f7 99
<> 144:ef7eb2e8f9f7 100 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 101 }
<> 144:ef7eb2e8f9f7 102 #endif
<> 144:ef7eb2e8f9f7 103
<> 144:ef7eb2e8f9f7 104 /**
<> 144:ef7eb2e8f9f7 105 * @}
<> 144:ef7eb2e8f9f7 106 */
<> 144:ef7eb2e8f9f7 107
<> 144:ef7eb2e8f9f7 108 #endif /* _MXC_TPU_REGS_H_ */