Johannes Stratmann / mbed-dev

added prescaler for 16 bit pwm in LPC1347 target

Fork of mbed-dev by mbed official

targets/hal/TARGET_ONSEMI/TARGET_NCS36510/trim_map.h@147:ba84b7dc41a7, 2016-09-10 (annotated)

Committer:
JojoS
Date:
Sat Sep 10 15:32:04 2016 +0000
Revision:
147:ba84b7dc41a7
Parent:
144:ef7eb2e8f9f7 
added prescaler for 16 bit timers (solution as in LPC11xx), default prescaler 31 for max 28 ms period time

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file trim_map.h
<> 144:ef7eb2e8f9f7 4 * @brief trim register map
<> 144:ef7eb2e8f9f7 5 * @internal
<> 144:ef7eb2e8f9f7 6 * @author ON Semiconductor
<> 144:ef7eb2e8f9f7 7 * $Rev: 3727 $
<> 144:ef7eb2e8f9f7 8 * $Date: 2015-09-14 14:38:34 +0530 (Mon, 14 Sep 2015) $
<> 144:ef7eb2e8f9f7 9 ******************************************************************************
<> 144:ef7eb2e8f9f7 10 * @copyright (c) 2012 ON Semiconductor. All rights reserved.
<> 144:ef7eb2e8f9f7 11 * ON Semiconductor is supplying this software for use with ON Semiconductor
<> 144:ef7eb2e8f9f7 12 * processor based microcontrollers only.
<> 144:ef7eb2e8f9f7 13 *
<> 144:ef7eb2e8f9f7 14 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
<> 144:ef7eb2e8f9f7 15 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
<> 144:ef7eb2e8f9f7 16 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
<> 144:ef7eb2e8f9f7 17 * ON SEMICONDUCTOR SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL,
<> 144:ef7eb2e8f9f7 18 * INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
<> 144:ef7eb2e8f9f7 19 * @endinternal
<> 144:ef7eb2e8f9f7 20 *
<> 144:ef7eb2e8f9f7 21 * @ingroup trim
<> 144:ef7eb2e8f9f7 22 *
<> 144:ef7eb2e8f9f7 23 * @details
<> 144:ef7eb2e8f9f7 24 * <p>
<> 144:ef7eb2e8f9f7 25 * Rf and Analog control hw module register map
<> 144:ef7eb2e8f9f7 26 * </p>
<> 144:ef7eb2e8f9f7 27 */
<> 144:ef7eb2e8f9f7 28
<> 144:ef7eb2e8f9f7 29 #ifndef TRIM_MAP_H_
<> 144:ef7eb2e8f9f7 30 #define TRIM_MAP_H_
<> 144:ef7eb2e8f9f7 31
<> 144:ef7eb2e8f9f7 32 /*************************************************************************************************
<> 144:ef7eb2e8f9f7 33 * *
<> 144:ef7eb2e8f9f7 34 * Header files *
<> 144:ef7eb2e8f9f7 35 * *
<> 144:ef7eb2e8f9f7 36 *************************************************************************************************/
<> 144:ef7eb2e8f9f7 37
<> 144:ef7eb2e8f9f7 38 #include "architecture.h"
<> 144:ef7eb2e8f9f7 39
<> 144:ef7eb2e8f9f7 40 /**************************************************************************************************
<> 144:ef7eb2e8f9f7 41 * *
<> 144:ef7eb2e8f9f7 42 * Type definitions *
<> 144:ef7eb2e8f9f7 43 * *
<> 144:ef7eb2e8f9f7 44 **************************************************************************************************/
<> 144:ef7eb2e8f9f7 45
<> 144:ef7eb2e8f9f7 46 /** trim register map */
<> 144:ef7eb2e8f9f7 47 typedef struct { /**< REV B REV D */
<> 144:ef7eb2e8f9f7 48 __I uint32_t PAD0; /**< 0x1FA0 0x1FA0 */
<> 144:ef7eb2e8f9f7 49 __I uint32_t APP_RESERVED0; /**< 0x1FA4 0x1FA4 */
<> 144:ef7eb2e8f9f7 50 __I uint32_t APP_RESERVED1; /**< 0x1FA8 0x1FA8 */
<> 144:ef7eb2e8f9f7 51 #ifdef REVB
<> 144:ef7eb2e8f9f7 52 __I uint32_t TX_POWER; /**< 0x1FAC */
<> 144:ef7eb2e8f9f7 53 #endif
<> 144:ef7eb2e8f9f7 54 __I uint32_t TRIM_32K_EXT; /**< 0x1FB0 0x1FAC */
<> 144:ef7eb2e8f9f7 55 __I uint32_t TRIM_32M_EXT; /**< 0x1FB4 0x1FB0 */
<> 144:ef7eb2e8f9f7 56 #ifdef REVD
<> 144:ef7eb2e8f9f7 57 __I uint32_t FVVDH_COMP_TH; /**< 0x1FB4 */
<> 144:ef7eb2e8f9f7 58 #endif
<> 144:ef7eb2e8f9f7 59 union {
<> 144:ef7eb2e8f9f7 60 struct { /* Common to REV B & REV D */
<> 144:ef7eb2e8f9f7 61 __I uint32_t CHANNEL11:4;
<> 144:ef7eb2e8f9f7 62 __I uint32_t CHANNEL12:4;
<> 144:ef7eb2e8f9f7 63 __I uint32_t CHANNEL13:4;
<> 144:ef7eb2e8f9f7 64 __I uint32_t CHANNEL14:4;
<> 144:ef7eb2e8f9f7 65 __I uint32_t CHANNEL15:4;
<> 144:ef7eb2e8f9f7 66 __I uint32_t CHANNEL16:4;
<> 144:ef7eb2e8f9f7 67 __I uint32_t CHANNEL17:4;
<> 144:ef7eb2e8f9f7 68 __I uint32_t CHANNEL18:4;
<> 144:ef7eb2e8f9f7 69 } BITS;
<> 144:ef7eb2e8f9f7 70 __I uint32_t WORD;
<> 144:ef7eb2e8f9f7 71 } TX_VCO_LUT1; /**< 0x1FB8 */
<> 144:ef7eb2e8f9f7 72 union {
<> 144:ef7eb2e8f9f7 73 struct {
<> 144:ef7eb2e8f9f7 74 __I uint32_t CHANNEL19:4;
<> 144:ef7eb2e8f9f7 75 __I uint32_t CHANNEL20:4;
<> 144:ef7eb2e8f9f7 76 __I uint32_t CHANNEL21:4;
<> 144:ef7eb2e8f9f7 77 __I uint32_t CHANNEL22:4;
<> 144:ef7eb2e8f9f7 78 __I uint32_t CHANNEL23:4;
<> 144:ef7eb2e8f9f7 79 __I uint32_t CHANNEL24:4;
<> 144:ef7eb2e8f9f7 80 __I uint32_t CHANNEL25:4;
<> 144:ef7eb2e8f9f7 81 __I uint32_t CHANNEL26:4;
<> 144:ef7eb2e8f9f7 82 } BITS;
<> 144:ef7eb2e8f9f7 83 __I uint32_t WORD;
<> 144:ef7eb2e8f9f7 84 } TX_VCO_LUT2; /**< 0x1FBC */
<> 144:ef7eb2e8f9f7 85 union {
<> 144:ef7eb2e8f9f7 86 struct {
<> 144:ef7eb2e8f9f7 87 __I uint32_t CHANNEL11:4;
<> 144:ef7eb2e8f9f7 88 __I uint32_t CHANNEL12:4;
<> 144:ef7eb2e8f9f7 89 __I uint32_t CHANNEL13:4;
<> 144:ef7eb2e8f9f7 90 __I uint32_t CHANNEL14:4;
<> 144:ef7eb2e8f9f7 91 __I uint32_t CHANNEL15:4;
<> 144:ef7eb2e8f9f7 92 __I uint32_t CHANNEL16:4;
<> 144:ef7eb2e8f9f7 93 __I uint32_t CHANNEL17:4;
<> 144:ef7eb2e8f9f7 94 __I uint32_t CHANNEL18:4;
<> 144:ef7eb2e8f9f7 95 } BITS;
<> 144:ef7eb2e8f9f7 96 __I uint32_t WORD;
<> 144:ef7eb2e8f9f7 97 } RX_VCO_LUT1; /**< 0x1FC0 */
<> 144:ef7eb2e8f9f7 98 union {
<> 144:ef7eb2e8f9f7 99 struct {
<> 144:ef7eb2e8f9f7 100 __I uint32_t CHANNEL19:4;
<> 144:ef7eb2e8f9f7 101 __I uint32_t CHANNEL20:4;
<> 144:ef7eb2e8f9f7 102 __I uint32_t CHANNEL21:4;
<> 144:ef7eb2e8f9f7 103 __I uint32_t CHANNEL22:4;
<> 144:ef7eb2e8f9f7 104 __I uint32_t CHANNEL23:4;
<> 144:ef7eb2e8f9f7 105 __I uint32_t CHANNEL24:4;
<> 144:ef7eb2e8f9f7 106 __I uint32_t CHANNEL25:4;
<> 144:ef7eb2e8f9f7 107 __I uint32_t CHANNEL26:4;
<> 144:ef7eb2e8f9f7 108 } BITS;
<> 144:ef7eb2e8f9f7 109 __I uint32_t WORD;
<> 144:ef7eb2e8f9f7 110 } RX_VCO_LUT2; /**< 0x1FC4 */
<> 144:ef7eb2e8f9f7 111 __I uint32_t ON_RESERVED0; /**< 0x1FC8 */
<> 144:ef7eb2e8f9f7 112 __I uint32_t ON_RESERVED1; /**< 0x1FCC */
<> 144:ef7eb2e8f9f7 113 __I uint32_t ADC_OFFSET_TRIM; /**< 0x1FD0 */
<> 144:ef7eb2e8f9f7 114 __I uint32_t TX_PRE_CHIPS; /**< 0x1FD4 */
<> 144:ef7eb2e8f9f7 115 __I uint32_t TX_CHAIN_TRIM; /**< 0x1FD8 */
<> 144:ef7eb2e8f9f7 116 __I uint32_t PLL_VCO_TAP_LOCATION; /**< 0x1FDC */
<> 144:ef7eb2e8f9f7 117 __I uint32_t PLL_TRIM; /**< 0x1FE0 */
<> 144:ef7eb2e8f9f7 118 __I uint32_t RSSI_OFFSET; /**< 0x1FE4 */
<> 144:ef7eb2e8f9f7 119 __I uint32_t RX_CHAIN_TRIM; /**< 0x1FE8 */
<> 144:ef7eb2e8f9f7 120 __I uint32_t PMU_TRIM; /**< 0x1FEC */
<> 144:ef7eb2e8f9f7 121 __I uint32_t WR_SEED_RD_RAND; /**< 0x1FF0 */
<> 144:ef7eb2e8f9f7 122 __I uint32_t WAFER_LOCATION; /**< 0x1FF4 */
<> 144:ef7eb2e8f9f7 123 __I uint32_t LOT_NUMBER; /**< 0x1FF8 */
<> 144:ef7eb2e8f9f7 124 __I uint32_t REVISION_CODE; /**< 0x1FFC */
<> 144:ef7eb2e8f9f7 125 } TrimReg_t, *TrimReg_pt;
<> 144:ef7eb2e8f9f7 126
<> 144:ef7eb2e8f9f7 127 #endif /* TRIM_MAP_H_ */