added prescaler for 16 bit pwm in LPC1347 target
Fork of mbed-dev by
targets/hal/TARGET_ONSEMI/TARGET_NCS36510/spi_api.c@147:ba84b7dc41a7, 2016-09-10 (annotated)
- Committer:
- JojoS
- Date:
- Sat Sep 10 15:32:04 2016 +0000
- Revision:
- 147:ba84b7dc41a7
- Parent:
- 144:ef7eb2e8f9f7
added prescaler for 16 bit timers (solution as in LPC11xx), default prescaler 31 for max 28 ms period time
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
<> | 144:ef7eb2e8f9f7 | 1 | /** |
<> | 144:ef7eb2e8f9f7 | 2 | ******************************************************************************* |
<> | 144:ef7eb2e8f9f7 | 3 | * @file spi_api.c |
<> | 144:ef7eb2e8f9f7 | 4 | * @brief Implementation of a sleep functionality |
<> | 144:ef7eb2e8f9f7 | 5 | * @internal |
<> | 144:ef7eb2e8f9f7 | 6 | * @author ON Semiconductor |
<> | 144:ef7eb2e8f9f7 | 7 | * $Rev: 0.1 $ |
<> | 144:ef7eb2e8f9f7 | 8 | * $Date: 02-05-2016 $ |
<> | 144:ef7eb2e8f9f7 | 9 | ****************************************************************************** |
<> | 144:ef7eb2e8f9f7 | 10 | * @copyright (c) 2015 ON Semiconductor. All rights reserved. |
<> | 144:ef7eb2e8f9f7 | 11 | * ON Semiconductor is supplying this software for use with ON Semiconductor |
<> | 144:ef7eb2e8f9f7 | 12 | * processor based microcontrollers only. |
<> | 144:ef7eb2e8f9f7 | 13 | * |
<> | 144:ef7eb2e8f9f7 | 14 | * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED |
<> | 144:ef7eb2e8f9f7 | 15 | * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF |
<> | 144:ef7eb2e8f9f7 | 16 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. |
<> | 144:ef7eb2e8f9f7 | 17 | * ON SEMICONDUCTOR SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, |
<> | 144:ef7eb2e8f9f7 | 18 | * INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. |
<> | 144:ef7eb2e8f9f7 | 19 | * @endinternal |
<> | 144:ef7eb2e8f9f7 | 20 | * |
<> | 144:ef7eb2e8f9f7 | 21 | * @ingroup spi_api |
<> | 144:ef7eb2e8f9f7 | 22 | * |
<> | 144:ef7eb2e8f9f7 | 23 | * @details |
<> | 144:ef7eb2e8f9f7 | 24 | * SPI implementation |
<> | 144:ef7eb2e8f9f7 | 25 | * |
<> | 144:ef7eb2e8f9f7 | 26 | */ |
<> | 144:ef7eb2e8f9f7 | 27 | #if DEVICE_SPI |
<> | 144:ef7eb2e8f9f7 | 28 | #include "spi.h" |
<> | 144:ef7eb2e8f9f7 | 29 | #include "PeripheralPins.h" |
<> | 144:ef7eb2e8f9f7 | 30 | #include "objects.h" |
<> | 144:ef7eb2e8f9f7 | 31 | #include "spi_api.h" |
<> | 144:ef7eb2e8f9f7 | 32 | #include "mbed_assert.h" |
<> | 144:ef7eb2e8f9f7 | 33 | #include "memory_map.h" |
<> | 144:ef7eb2e8f9f7 | 34 | #include "spi_ipc7207_map.h" |
<> | 144:ef7eb2e8f9f7 | 35 | #include "crossbar.h" |
<> | 144:ef7eb2e8f9f7 | 36 | #include "clock.h" |
<> | 144:ef7eb2e8f9f7 | 37 | #include "cmsis_nvic.h" |
<> | 144:ef7eb2e8f9f7 | 38 | |
<> | 144:ef7eb2e8f9f7 | 39 | |
<> | 144:ef7eb2e8f9f7 | 40 | #define SPI_FREQ_MAX 4000000 |
<> | 144:ef7eb2e8f9f7 | 41 | #define SPI_ENDIAN_LSB_FIRST 0 |
<> | 144:ef7eb2e8f9f7 | 42 | #define SPI_MASTER_MODE 1 |
<> | 144:ef7eb2e8f9f7 | 43 | #define SPI_SLAVE_MODE 0 |
<> | 144:ef7eb2e8f9f7 | 44 | |
<> | 144:ef7eb2e8f9f7 | 45 | void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel) |
<> | 144:ef7eb2e8f9f7 | 46 | { |
<> | 144:ef7eb2e8f9f7 | 47 | fSpiInit(obj, mosi, miso, sclk, ssel); |
<> | 144:ef7eb2e8f9f7 | 48 | } |
<> | 144:ef7eb2e8f9f7 | 49 | void spi_free(spi_t *obj) |
<> | 144:ef7eb2e8f9f7 | 50 | { |
<> | 144:ef7eb2e8f9f7 | 51 | fSpiClose(obj); |
<> | 144:ef7eb2e8f9f7 | 52 | } |
<> | 144:ef7eb2e8f9f7 | 53 | |
<> | 144:ef7eb2e8f9f7 | 54 | void spi_format(spi_t *obj, int bits, int mode, int slave) |
<> | 144:ef7eb2e8f9f7 | 55 | { |
<> | 144:ef7eb2e8f9f7 | 56 | if(slave) { |
<> | 144:ef7eb2e8f9f7 | 57 | /* Slave mode */ |
<> | 144:ef7eb2e8f9f7 | 58 | obj->membase->CONTROL.BITS.MODE = SPI_SLAVE_MODE; |
<> | 144:ef7eb2e8f9f7 | 59 | } else { |
<> | 144:ef7eb2e8f9f7 | 60 | /* Master mode */ |
<> | 144:ef7eb2e8f9f7 | 61 | obj->membase->CONTROL.BITS.MODE = SPI_MASTER_MODE; |
<> | 144:ef7eb2e8f9f7 | 62 | } |
<> | 144:ef7eb2e8f9f7 | 63 | obj->membase->CONTROL.BITS.WORD_WIDTH = bits >> 0x4; /* word width */ |
<> | 144:ef7eb2e8f9f7 | 64 | obj->membase->CONTROL.BITS.CPOL = mode >> 0x1; /* CPOL */ |
<> | 144:ef7eb2e8f9f7 | 65 | obj->membase->CONTROL.BITS.CPHA = mode & 0x1; /* CPHA */ |
<> | 144:ef7eb2e8f9f7 | 66 | |
<> | 144:ef7eb2e8f9f7 | 67 | obj->membase->CONTROL.BITS.ENDIAN = SPI_ENDIAN_LSB_FIRST; /* Endian */ |
<> | 144:ef7eb2e8f9f7 | 68 | } |
<> | 144:ef7eb2e8f9f7 | 69 | |
<> | 144:ef7eb2e8f9f7 | 70 | void spi_frequency(spi_t *obj, int hz) |
<> | 144:ef7eb2e8f9f7 | 71 | { |
<> | 144:ef7eb2e8f9f7 | 72 | /* If the frequency is outside the allowable range, set it to the max */ |
<> | 144:ef7eb2e8f9f7 | 73 | if(hz > SPI_FREQ_MAX) { |
<> | 144:ef7eb2e8f9f7 | 74 | hz = SPI_FREQ_MAX; |
<> | 144:ef7eb2e8f9f7 | 75 | } |
<> | 144:ef7eb2e8f9f7 | 76 | obj->membase->FDIV = ((fClockGetPeriphClockfrequency() / hz) >> 1) - 1; |
<> | 144:ef7eb2e8f9f7 | 77 | } |
<> | 144:ef7eb2e8f9f7 | 78 | |
<> | 144:ef7eb2e8f9f7 | 79 | int spi_master_write(spi_t *obj, int value) |
<> | 144:ef7eb2e8f9f7 | 80 | { |
<> | 144:ef7eb2e8f9f7 | 81 | return(fSpiWriteB(obj, value)); |
<> | 144:ef7eb2e8f9f7 | 82 | } |
<> | 144:ef7eb2e8f9f7 | 83 | |
<> | 144:ef7eb2e8f9f7 | 84 | int spi_busy(spi_t *obj) |
<> | 144:ef7eb2e8f9f7 | 85 | { |
<> | 144:ef7eb2e8f9f7 | 86 | return(obj->membase->STATUS.BITS.XFER_IP); |
<> | 144:ef7eb2e8f9f7 | 87 | } |
<> | 144:ef7eb2e8f9f7 | 88 | |
<> | 144:ef7eb2e8f9f7 | 89 | uint8_t spi_get_module(spi_t *obj) |
<> | 144:ef7eb2e8f9f7 | 90 | { |
<> | 144:ef7eb2e8f9f7 | 91 | if(obj->membase == SPI1REG) { |
<> | 144:ef7eb2e8f9f7 | 92 | return 0; /* UART #1 */ |
<> | 144:ef7eb2e8f9f7 | 93 | } else if(obj->membase == SPI2REG) { |
<> | 144:ef7eb2e8f9f7 | 94 | return 1; /* UART #2 */ |
<> | 144:ef7eb2e8f9f7 | 95 | } else { |
<> | 144:ef7eb2e8f9f7 | 96 | return 2; /* Invalid address */ |
<> | 144:ef7eb2e8f9f7 | 97 | } |
<> | 144:ef7eb2e8f9f7 | 98 | } |
<> | 144:ef7eb2e8f9f7 | 99 | |
<> | 144:ef7eb2e8f9f7 | 100 | #if DEVICE_SPI_ASYNCH /* TODO Not implemented yet */ |
<> | 144:ef7eb2e8f9f7 | 101 | |
<> | 144:ef7eb2e8f9f7 | 102 | void spi_master_transfer(spi_t *obj, void *tx, size_t tx_length, void *rx, size_t rx_length, uint32_t handler, uint32_t event, DMAUsage hint) |
<> | 144:ef7eb2e8f9f7 | 103 | { |
<> | 144:ef7eb2e8f9f7 | 104 | |
<> | 144:ef7eb2e8f9f7 | 105 | uint32_t i; |
<> | 144:ef7eb2e8f9f7 | 106 | int ndata = 0; |
<> | 144:ef7eb2e8f9f7 | 107 | uint16_t *tx_ptr = (uint16_t *) tx; |
<> | 144:ef7eb2e8f9f7 | 108 | |
<> | 144:ef7eb2e8f9f7 | 109 | if(obj->spi->CONTROL.BITS.WORD_WIDTH == 0) { |
<> | 144:ef7eb2e8f9f7 | 110 | /* Word size 8 bits */ |
<> | 144:ef7eb2e8f9f7 | 111 | WORD_WIDTH_MASK = 0xFF; |
<> | 144:ef7eb2e8f9f7 | 112 | } else if(obj->spi->CONTROL.BITS.WORD_WIDTH == 1) { |
<> | 144:ef7eb2e8f9f7 | 113 | /* Word size 16 bits */ |
<> | 144:ef7eb2e8f9f7 | 114 | WORD_WIDTH_MASK = 0xFFFF; |
<> | 144:ef7eb2e8f9f7 | 115 | } else { |
<> | 144:ef7eb2e8f9f7 | 116 | /* Word size 32 bits */ |
<> | 144:ef7eb2e8f9f7 | 117 | WORD_WIDTH_MASK = 0xFFFFFFFF; |
<> | 144:ef7eb2e8f9f7 | 118 | } |
<> | 144:ef7eb2e8f9f7 | 119 | |
<> | 144:ef7eb2e8f9f7 | 120 | //frame size |
<> | 144:ef7eb2e8f9f7 | 121 | if(tx_length == 0) { |
<> | 144:ef7eb2e8f9f7 | 122 | tx_length = rx_length; |
<> | 144:ef7eb2e8f9f7 | 123 | tx = (void*) 0; |
<> | 144:ef7eb2e8f9f7 | 124 | } |
<> | 144:ef7eb2e8f9f7 | 125 | //set tx rx buffer |
<> | 144:ef7eb2e8f9f7 | 126 | obj->tx_buff.buffer = (void *)tx; |
<> | 144:ef7eb2e8f9f7 | 127 | obj->rx_buff.buffer = rx; |
<> | 144:ef7eb2e8f9f7 | 128 | obj->tx_buff.length = tx_length; |
<> | 144:ef7eb2e8f9f7 | 129 | obj->rx_buff.length = rx_length; |
<> | 144:ef7eb2e8f9f7 | 130 | obj->tx_buff.pos = 0; |
<> | 144:ef7eb2e8f9f7 | 131 | obj->rx_buff.pos = 0; |
<> | 144:ef7eb2e8f9f7 | 132 | obj->tx_buff.width = bit_width; |
<> | 144:ef7eb2e8f9f7 | 133 | obj->rx_buff.width = bit_width; |
<> | 144:ef7eb2e8f9f7 | 134 | |
<> | 144:ef7eb2e8f9f7 | 135 | |
<> | 144:ef7eb2e8f9f7 | 136 | if((obj->spi.bits == 9) && (tx != 0)) { |
<> | 144:ef7eb2e8f9f7 | 137 | // Make sure we don't have inadvertent non-zero bits outside 9-bit frames which could trigger unwanted operation |
<> | 144:ef7eb2e8f9f7 | 138 | for(i = 0; i < (tx_length / 2); i++) { |
<> | 144:ef7eb2e8f9f7 | 139 | tx_ptr[i] &= 0x1FF; |
<> | 144:ef7eb2e8f9f7 | 140 | } |
<> | 144:ef7eb2e8f9f7 | 141 | } |
<> | 144:ef7eb2e8f9f7 | 142 | |
<> | 144:ef7eb2e8f9f7 | 143 | |
<> | 144:ef7eb2e8f9f7 | 144 | // enable events |
<> | 144:ef7eb2e8f9f7 | 145 | |
<> | 144:ef7eb2e8f9f7 | 146 | obj->spi.event |= event; |
<> | 144:ef7eb2e8f9f7 | 147 | |
<> | 144:ef7eb2e8f9f7 | 148 | |
<> | 144:ef7eb2e8f9f7 | 149 | // set sleep_level |
<> | 144:ef7eb2e8f9f7 | 150 | enable irq |
<> | 144:ef7eb2e8f9f7 | 151 | |
<> | 144:ef7eb2e8f9f7 | 152 | //write async |
<> | 144:ef7eb2e8f9f7 | 153 | |
<> | 144:ef7eb2e8f9f7 | 154 | if ( && ) { |
<> | 144:ef7eb2e8f9f7 | 155 | |
<> | 144:ef7eb2e8f9f7 | 156 | } |
<> | 144:ef7eb2e8f9f7 | 157 | while ((obj->tx_buff.pos < obj->tx_buff.length) && |
<> | 144:ef7eb2e8f9f7 | 158 | (obj->spi->STATUS.BITS.TX_FULL == False) && |
<> | 144:ef7eb2e8f9f7 | 159 | (obj->spi->STATUS.BITS.RX_FULL == False)) { |
<> | 144:ef7eb2e8f9f7 | 160 | // spi_buffer_tx_write(obj); |
<> | 144:ef7eb2e8f9f7 | 161 | |
<> | 144:ef7eb2e8f9f7 | 162 | if (obj->tx_buff.buffer == (void *)0) { |
<> | 144:ef7eb2e8f9f7 | 163 | data = SPI_FILL_WORD; |
<> | 144:ef7eb2e8f9f7 | 164 | } else { |
<> | 144:ef7eb2e8f9f7 | 165 | uint16_t *tx = (uint16_t *)(obj->tx_buff.buffer); |
<> | 144:ef7eb2e8f9f7 | 166 | data = tx[obj->tx_buff.pos] & 0xFF; |
<> | 144:ef7eb2e8f9f7 | 167 | } |
<> | 144:ef7eb2e8f9f7 | 168 | obj->spi->TX_DATA = data; |
<> | 144:ef7eb2e8f9f7 | 169 | } |
<> | 144:ef7eb2e8f9f7 | 170 | |
<> | 144:ef7eb2e8f9f7 | 171 | ndata++; |
<> | 144:ef7eb2e8f9f7 | 172 | } |
<> | 144:ef7eb2e8f9f7 | 173 | return ndata; |
<> | 144:ef7eb2e8f9f7 | 174 | |
<> | 144:ef7eb2e8f9f7 | 175 | } |
<> | 144:ef7eb2e8f9f7 | 176 | |
<> | 144:ef7eb2e8f9f7 | 177 | uint32_t spi_irq_handler_asynch(spi_t *obj) |
<> | 144:ef7eb2e8f9f7 | 178 | { |
<> | 144:ef7eb2e8f9f7 | 179 | } |
<> | 144:ef7eb2e8f9f7 | 180 | |
<> | 144:ef7eb2e8f9f7 | 181 | uint8_t spi_active(spi_t *obj) |
<> | 144:ef7eb2e8f9f7 | 182 | { |
<> | 144:ef7eb2e8f9f7 | 183 | } |
<> | 144:ef7eb2e8f9f7 | 184 | |
<> | 144:ef7eb2e8f9f7 | 185 | void spi_abort_asynch(spi_t *obj) |
<> | 144:ef7eb2e8f9f7 | 186 | { |
<> | 144:ef7eb2e8f9f7 | 187 | } |
<> | 144:ef7eb2e8f9f7 | 188 | |
<> | 144:ef7eb2e8f9f7 | 189 | #endif /* DEVICE_SPI_ASYNCH */ |
<> | 144:ef7eb2e8f9f7 | 190 | #endif /* DEVICE_SPI */ |