Johannes Stratmann / mbed-dev

added prescaler for 16 bit pwm in LPC1347 target

Fork of mbed-dev by mbed official

targets/hal/TARGET_ONSEMI/TARGET_NCS36510/sleep.c@147:ba84b7dc41a7, 2016-09-10 (annotated)

Committer:
JojoS
Date:
Sat Sep 10 15:32:04 2016 +0000
Revision:
147:ba84b7dc41a7
Parent:
144:ef7eb2e8f9f7 
added prescaler for 16 bit timers (solution as in LPC11xx), default prescaler 31 for max 28 ms period time

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 *******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file sleep.c
<> 144:ef7eb2e8f9f7 4 * @brief Implementation of an sleep functionality
<> 144:ef7eb2e8f9f7 5 * @internal
<> 144:ef7eb2e8f9f7 6 * @author ON Semiconductor
<> 144:ef7eb2e8f9f7 7 * $Rev: 0.1 $
<> 144:ef7eb2e8f9f7 8 * $Date: 01-21-2016 $
<> 144:ef7eb2e8f9f7 9 ******************************************************************************
<> 144:ef7eb2e8f9f7 10 * @copyright (c) 2015 ON Semiconductor. All rights reserved.
<> 144:ef7eb2e8f9f7 11 * ON Semiconductor is supplying this software for use with ON Semiconductor
<> 144:ef7eb2e8f9f7 12 * processor based microcontrollers only.
<> 144:ef7eb2e8f9f7 13 *
<> 144:ef7eb2e8f9f7 14 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
<> 144:ef7eb2e8f9f7 15 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
<> 144:ef7eb2e8f9f7 16 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
<> 144:ef7eb2e8f9f7 17 * ON SEMICONDUCTOR SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL,
<> 144:ef7eb2e8f9f7 18 * INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
<> 144:ef7eb2e8f9f7 19 * @endinternal
<> 144:ef7eb2e8f9f7 20 *
<> 144:ef7eb2e8f9f7 21 * @ingroup sleep
<> 144:ef7eb2e8f9f7 22 *
<> 144:ef7eb2e8f9f7 23 * @details
<> 144:ef7eb2e8f9f7 24 * Sleep implementation
<> 144:ef7eb2e8f9f7 25 *
<> 144:ef7eb2e8f9f7 26 */
<> 144:ef7eb2e8f9f7 27 #if DEVICE_SLEEP
<> 144:ef7eb2e8f9f7 28 #include "sleep.h"
<> 144:ef7eb2e8f9f7 29 #include "sleep_api.h"
<> 144:ef7eb2e8f9f7 30 #include "cmsis_nvic.h"
<> 144:ef7eb2e8f9f7 31
<> 144:ef7eb2e8f9f7 32 #define ENABLE (uint8_t)0x01
<> 144:ef7eb2e8f9f7 33 #define DISABLE (uint8_t)0x00
<> 144:ef7eb2e8f9f7 34 #define MAC_LUT_SIZE (uint8_t)96
<> 144:ef7eb2e8f9f7 35
<> 144:ef7eb2e8f9f7 36 #define portNVIC_SYSTICK_CTRL_REG ( * ( ( volatile unsigned long * ) 0xe000e010 ) )
<> 144:ef7eb2e8f9f7 37 #define portNVIC_SYSTICK_CLK_BIT ( 1UL << 2UL )
<> 144:ef7eb2e8f9f7 38 #define portNVIC_SYSTICK_INT_BIT ( 1UL << 1UL )
<> 144:ef7eb2e8f9f7 39 #define portNVIC_SYSTICK_ENABLE_BIT ( 1UL << 0UL )
<> 144:ef7eb2e8f9f7 40
<> 144:ef7eb2e8f9f7 41 void sleep(void)
<> 144:ef7eb2e8f9f7 42 {
<> 144:ef7eb2e8f9f7 43 /** Unset SLEEPDEEP (SCR) and COMA to select sleep mode */
<> 144:ef7eb2e8f9f7 44 SCB->SCR &= ~SCB_SCR_SLEEPDEEP_Msk;
<> 144:ef7eb2e8f9f7 45 PMUREG->CONTROL.BITS.ENCOMA = DISABLE;
<> 144:ef7eb2e8f9f7 46
<> 144:ef7eb2e8f9f7 47 /* Enter into sleep mode */
<> 144:ef7eb2e8f9f7 48 __ISB();
<> 144:ef7eb2e8f9f7 49 __WFI();
<> 144:ef7eb2e8f9f7 50 }
<> 144:ef7eb2e8f9f7 51
<> 144:ef7eb2e8f9f7 52 void deepsleep(void)
<> 144:ef7eb2e8f9f7 53 {
<> 144:ef7eb2e8f9f7 54 /** Set SLEEPDEEP (SCR) and unset COMA to select deep sleep mode */
<> 144:ef7eb2e8f9f7 55 SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
<> 144:ef7eb2e8f9f7 56 PMUREG->CONTROL.BITS.ENCOMA = DISABLE;
<> 144:ef7eb2e8f9f7 57
<> 144:ef7eb2e8f9f7 58 /** Enter into deep sleep mode */
<> 144:ef7eb2e8f9f7 59 __ISB();
<> 144:ef7eb2e8f9f7 60 __WFI();
<> 144:ef7eb2e8f9f7 61
<> 144:ef7eb2e8f9f7 62 /** Wait for the external 32MHz to be power-ed up & running
<> 144:ef7eb2e8f9f7 63 * Re-power down the 32MHz internal osc
<> 144:ef7eb2e8f9f7 64 */
<> 144:ef7eb2e8f9f7 65 while (!CLOCKREG->CSR.BITS.XTAL32M);
<> 144:ef7eb2e8f9f7 66 PMUREG->CONTROL.BITS.INT32M = 1;
<> 144:ef7eb2e8f9f7 67 }
<> 144:ef7eb2e8f9f7 68
<> 144:ef7eb2e8f9f7 69 void coma(void)
<> 144:ef7eb2e8f9f7 70 {
<> 144:ef7eb2e8f9f7 71 /** Set SLEEPDEEP (SCR) and set COMA to select coma mode */
<> 144:ef7eb2e8f9f7 72 SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
<> 144:ef7eb2e8f9f7 73 PMUREG->CONTROL.BITS.ENCOMA = ENABLE;
<> 144:ef7eb2e8f9f7 74
<> 144:ef7eb2e8f9f7 75 /* TODO Wait till MAC is idle */
<> 144:ef7eb2e8f9f7 76 // while((MACHWREG->SEQUENCER == MACHW_SEQ_TX) || (MACHWREG->SEQUENCER == MACHW_SEQ_ED) || (MACHWREG->SEQUENCER == MACHW_SEQ_CCA));
<> 144:ef7eb2e8f9f7 77
<> 144:ef7eb2e8f9f7 78 /* TODO Back up MAC_LUT *
<> 144:ef7eb2e8f9f7 79 uint8_t MAC_LUT_BackUp[MAC_LUT_SIZE];
<> 144:ef7eb2e8f9f7 80 fMacBackupFrameStoreLUT(MAC_LUT_BackUp); */
<> 144:ef7eb2e8f9f7 81
<> 144:ef7eb2e8f9f7 82 /* Disable UART 1 & 2 FIFO during coma*/
<> 144:ef7eb2e8f9f7 83 UART1REG->FCR.WORD &= ~(FCR_FIFO_ENABLE);
<> 144:ef7eb2e8f9f7 84 UART2REG->FCR.WORD &= ~(FCR_FIFO_ENABLE);
<> 144:ef7eb2e8f9f7 85
<> 144:ef7eb2e8f9f7 86 /** Enter into coma mode */
<> 144:ef7eb2e8f9f7 87 __ISB();
<> 144:ef7eb2e8f9f7 88 __WFI();
<> 144:ef7eb2e8f9f7 89
<> 144:ef7eb2e8f9f7 90 /** Wait for the external 32MHz to be power-ed up & running
<> 144:ef7eb2e8f9f7 91 * Re-power down the 32MHz internal osc
<> 144:ef7eb2e8f9f7 92 */
<> 144:ef7eb2e8f9f7 93 while (!CLOCKREG->CSR.BITS.XTAL32M);
<> 144:ef7eb2e8f9f7 94 PMUREG->CONTROL.BITS.INT32M = 1;
<> 144:ef7eb2e8f9f7 95
<> 144:ef7eb2e8f9f7 96 /** Trim the oscillators */
<> 144:ef7eb2e8f9f7 97 if ((TRIMREG->TRIM_32K_EXT & 0xFFFF0000) != 0xFFFF0000) {
<> 144:ef7eb2e8f9f7 98 CLOCKREG->TRIM_32K_EXT = TRIMREG->TRIM_32K_EXT;
<> 144:ef7eb2e8f9f7 99 }
<> 144:ef7eb2e8f9f7 100 if ((TRIMREG->TRIM_32M_EXT & 0xFFFF0000) != 0xFFFF0000) {
<> 144:ef7eb2e8f9f7 101 CLOCKREG->TRIM_32M_EXT = TRIMREG->TRIM_32M_EXT;
<> 144:ef7eb2e8f9f7 102 }
<> 144:ef7eb2e8f9f7 103
<> 144:ef7eb2e8f9f7 104 /* Enable UART 1 & 2 FIFO */
<> 144:ef7eb2e8f9f7 105 UART1REG->FCR.WORD |= FCR_FIFO_ENABLE;
<> 144:ef7eb2e8f9f7 106 UART2REG->FCR.WORD |= FCR_FIFO_ENABLE;
<> 144:ef7eb2e8f9f7 107
<> 144:ef7eb2e8f9f7 108 /* TODO Restore MAC_LUT *
<> 144:ef7eb2e8f9f7 109 fMacRestoreFrameStoreLUT(MAC_LUT_BackUp); */
<> 144:ef7eb2e8f9f7 110 }
<> 144:ef7eb2e8f9f7 111
<> 144:ef7eb2e8f9f7 112 #endif /* DEVICE_SLEEP */