Johannes Stratmann / mbed-dev

added prescaler for 16 bit pwm in LPC1347 target

Fork of mbed-dev by mbed official

targets/hal/TARGET_ONSEMI/TARGET_NCS36510/crossbar_map.h@147:ba84b7dc41a7, 2016-09-10 (annotated)

Committer:
JojoS
Date:
Sat Sep 10 15:32:04 2016 +0000
Revision:
147:ba84b7dc41a7
Parent:
144:ef7eb2e8f9f7 
added prescaler for 16 bit timers (solution as in LPC11xx), default prescaler 31 for max 28 ms period time

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file crossbar_map.h
<> 144:ef7eb2e8f9f7 4 * @brief CROSSBAR hw module register map
<> 144:ef7eb2e8f9f7 5 * @internal
<> 144:ef7eb2e8f9f7 6 * @author ON Semiconductor
<> 144:ef7eb2e8f9f7 7 * $Rev: 3318 $
<> 144:ef7eb2e8f9f7 8 * $Date: 2015-03-27 16:29:34 +0530 (Fri, 27 Mar 2015) $
<> 144:ef7eb2e8f9f7 9 ******************************************************************************
<> 144:ef7eb2e8f9f7 10 * @copyright (c) 2012 ON Semiconductor. All rights reserved.
<> 144:ef7eb2e8f9f7 11 * ON Semiconductor is supplying this software for use with ON Semiconductor
<> 144:ef7eb2e8f9f7 12 * processor based microcontrollers only.
<> 144:ef7eb2e8f9f7 13 *
<> 144:ef7eb2e8f9f7 14 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
<> 144:ef7eb2e8f9f7 15 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
<> 144:ef7eb2e8f9f7 16 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
<> 144:ef7eb2e8f9f7 17 * ON SEMICONDUCTOR SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL,
<> 144:ef7eb2e8f9f7 18 * INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
<> 144:ef7eb2e8f9f7 19 * @endinternal
<> 144:ef7eb2e8f9f7 20 *
<> 144:ef7eb2e8f9f7 21 * @ingroup crossbar
<> 144:ef7eb2e8f9f7 22 *
<> 144:ef7eb2e8f9f7 23 * @details
<> 144:ef7eb2e8f9f7 24 */
<> 144:ef7eb2e8f9f7 25
<> 144:ef7eb2e8f9f7 26 #ifndef CROSSB_MAP_H_
<> 144:ef7eb2e8f9f7 27 #define CROSSB_MAP_H_
<> 144:ef7eb2e8f9f7 28
<> 144:ef7eb2e8f9f7 29 /*************************************************************************************************
<> 144:ef7eb2e8f9f7 30 * *
<> 144:ef7eb2e8f9f7 31 * Header files *
<> 144:ef7eb2e8f9f7 32 * *
<> 144:ef7eb2e8f9f7 33 *************************************************************************************************/
<> 144:ef7eb2e8f9f7 34
<> 144:ef7eb2e8f9f7 35 #include "architecture.h"
<> 144:ef7eb2e8f9f7 36
<> 144:ef7eb2e8f9f7 37 /**************************************************************************************************
<> 144:ef7eb2e8f9f7 38 * *
<> 144:ef7eb2e8f9f7 39 * Type definitions *
<> 144:ef7eb2e8f9f7 40 * *
<> 144:ef7eb2e8f9f7 41 **************************************************************************************************/
<> 144:ef7eb2e8f9f7 42
<> 144:ef7eb2e8f9f7 43 /* Crossbar Control HW Structure Overlay */
<> 144:ef7eb2e8f9f7 44 typedef struct {
<> 144:ef7eb2e8f9f7 45 __IO uint32_t DIOCTRL0; /**< Switch IO0 to GPIO(default) or peripheral device */
<> 144:ef7eb2e8f9f7 46 __IO uint32_t DIOCTRL1; /**< Switch IO1 to GPIO(default) or peripheral device */
<> 144:ef7eb2e8f9f7 47 __IO uint32_t DIOCTRL2; /**< Switch IO2 to GPIO(default) or peripheral device */
<> 144:ef7eb2e8f9f7 48 __IO uint32_t DIOCTRL3; /**< Switch IO3 to GPIO(default) or peripheral device */
<> 144:ef7eb2e8f9f7 49 __IO uint32_t DIOCTRL4; /**< Switch IO4 to GPIO(default) or peripheral device */
<> 144:ef7eb2e8f9f7 50 __IO uint32_t DIOCTRL5; /**< Switch IO5 to GPIO(default) or peripheral device */
<> 144:ef7eb2e8f9f7 51 __IO uint32_t DIOCTRL6; /**< Switch IO6 to GPIO(default) or peripheral device */
<> 144:ef7eb2e8f9f7 52 __IO uint32_t DIOCTRL7; /**< Switch IO7 to GPIO(default) or peripheral device */
<> 144:ef7eb2e8f9f7 53 __IO uint32_t DIOCTRL8; /**< Switch IO8 to GPIO(default) or peripheral device */
<> 144:ef7eb2e8f9f7 54 __IO uint32_t DIOCTRL9; /**< Switch IO9 to GPIO(default) or peripheral device */
<> 144:ef7eb2e8f9f7 55 __IO uint32_t DIOCTRL10; /**< Switch IO10 to GPIO(default) or peripheral device */
<> 144:ef7eb2e8f9f7 56 __IO uint32_t DIOCTRL11; /**< Switch IO11 to GPIO(default) or peripheral device */
<> 144:ef7eb2e8f9f7 57 __IO uint32_t DIOCTRL12; /**< Switch IO12 to GPIO(default) or peripheral device */
<> 144:ef7eb2e8f9f7 58 __IO uint32_t DIOCTRL13; /**< Switch IO13 to GPIO(default) or peripheral device */
<> 144:ef7eb2e8f9f7 59 __IO uint32_t DIOCTRL14; /**< Switch IO14 to GPIO(default) or peripheral device */
<> 144:ef7eb2e8f9f7 60 __IO uint32_t DIOCTRL15; /**< Switch IO15 to GPIO(default) or peripheral device */
<> 144:ef7eb2e8f9f7 61 __IO uint32_t DIOCTRL16; /**< Switch IO16 to GPIO(default) or peripheral device */
<> 144:ef7eb2e8f9f7 62 __IO uint32_t DIOCTRL17; /**< Switch IO17 to GPIO(default) or peripheral device */
<> 144:ef7eb2e8f9f7 63 } CrossbReg_t, *CrossbReg_pt;
<> 144:ef7eb2e8f9f7 64
<> 144:ef7eb2e8f9f7 65 #endif /* CROSSB_MAP_H_ */