added prescaler for 16 bit pwm in LPC1347 target

Fork of mbed-dev by mbed official

Committer:
JojoS
Date:
Sat Sep 10 15:32:04 2016 +0000
Revision:
147:ba84b7dc41a7
Parent:
144:ef7eb2e8f9f7
added prescaler for 16 bit timers (solution as in LPC11xx), default prescaler 31 for max 28 ms period time

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 #ifdef REVD
<> 144:ef7eb2e8f9f7 2 /**
<> 144:ef7eb2e8f9f7 3 ******************************************************************************
<> 144:ef7eb2e8f9f7 4 * @file pad.c
<> 144:ef7eb2e8f9f7 5 * @brief PAD management support code
<> 144:ef7eb2e8f9f7 6 * @internal
<> 144:ef7eb2e8f9f7 7 * @author ON Semiconductor
<> 144:ef7eb2e8f9f7 8 * $Rev: 2848 $
<> 144:ef7eb2e8f9f7 9 * $Date: 2014-04-01 22:48:18 +0530 (Tue, 01 Apr 2014) $
<> 144:ef7eb2e8f9f7 10 ******************************************************************************
<> 144:ef7eb2e8f9f7 11 * @copyright (c) 2012 ON Semiconductor. All rights reserved.
<> 144:ef7eb2e8f9f7 12 * ON Semiconductor is supplying this software for use with ON Semiconductor
<> 144:ef7eb2e8f9f7 13 * processor based microcontrollers only.
<> 144:ef7eb2e8f9f7 14 *
<> 144:ef7eb2e8f9f7 15 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
<> 144:ef7eb2e8f9f7 16 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
<> 144:ef7eb2e8f9f7 17 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
<> 144:ef7eb2e8f9f7 18 * ON SEMICONDUCTOR SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL,
<> 144:ef7eb2e8f9f7 19 * INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
<> 144:ef7eb2e8f9f7 20 * @endinternal
<> 144:ef7eb2e8f9f7 21 *
<> 144:ef7eb2e8f9f7 22 * @ingroup pad
<> 144:ef7eb2e8f9f7 23 *
<> 144:ef7eb2e8f9f7 24 * @details
<> 144:ef7eb2e8f9f7 25 */
<> 144:ef7eb2e8f9f7 26
<> 144:ef7eb2e8f9f7 27 /*************************************************************************************************
<> 144:ef7eb2e8f9f7 28 * *
<> 144:ef7eb2e8f9f7 29 * Header files *
<> 144:ef7eb2e8f9f7 30 * *
<> 144:ef7eb2e8f9f7 31 *************************************************************************************************/
<> 144:ef7eb2e8f9f7 32
<> 144:ef7eb2e8f9f7 33 #include "memory_map.h"
<> 144:ef7eb2e8f9f7 34 #include "pad_map.h"
<> 144:ef7eb2e8f9f7 35 #include "clock.h"
<> 144:ef7eb2e8f9f7 36
<> 144:ef7eb2e8f9f7 37 /*************************************************************************************************
<> 144:ef7eb2e8f9f7 38 * *
<> 144:ef7eb2e8f9f7 39 * Symbolic Constants *
<> 144:ef7eb2e8f9f7 40 * *
<> 144:ef7eb2e8f9f7 41 *************************************************************************************************/
<> 144:ef7eb2e8f9f7 42 #define PAD_CTRL_OP_DRIVE_STRENGTH_MASK (uint32_t)0x1C
<> 144:ef7eb2e8f9f7 43 #define PAD_NUM_OF_IO 17
<> 144:ef7eb2e8f9f7 44 #define PAD_OP_DRIVE_STRGTH_MAX 7
<> 144:ef7eb2e8f9f7 45 #define PAD_OP_DRIVE_TYPE_MAX 1
<> 144:ef7eb2e8f9f7 46 #define PAD_OP_PULL_TYPE_MAX 3
<> 144:ef7eb2e8f9f7 47
<> 144:ef7eb2e8f9f7 48 #define PAD_REG_ADRS_BYTE_SIZE 4
<> 144:ef7eb2e8f9f7 49
<> 144:ef7eb2e8f9f7 50 #define PAD_OP_DRIVE_STRGTH_BIT_POS 2
<> 144:ef7eb2e8f9f7 51 #define PAD_OP_DRIVE_TYPE_BIT_POS 5
<> 144:ef7eb2e8f9f7 52 #define PAD_OP_PULL_TYPE_BIT_POS 0
<> 144:ef7eb2e8f9f7 53
<> 144:ef7eb2e8f9f7 54 /*************************************************************************************************
<> 144:ef7eb2e8f9f7 55 * *
<> 144:ef7eb2e8f9f7 56 * Global variables *
<> 144:ef7eb2e8f9f7 57 * *
<> 144:ef7eb2e8f9f7 58 *************************************************************************************************/
<> 144:ef7eb2e8f9f7 59
<> 144:ef7eb2e8f9f7 60 /* Peripheral PAD register mutex */
<> 144:ef7eb2e8f9f7 61 /* sem_pt GlobMutexPadReg; */
<> 144:ef7eb2e8f9f7 62
<> 144:ef7eb2e8f9f7 63 /*************************************************************************************************
<> 144:ef7eb2e8f9f7 64 * *
<> 144:ef7eb2e8f9f7 65 * Functions *
<> 144:ef7eb2e8f9f7 66 * *
<> 144:ef7eb2e8f9f7 67 *************************************************************************************************/
<> 144:ef7eb2e8f9f7 68
<> 144:ef7eb2e8f9f7 69 /** Find description at pad.h */
<> 144:ef7eb2e8f9f7 70 void fPadInit()
<> 144:ef7eb2e8f9f7 71 {
<> 144:ef7eb2e8f9f7 72 /** - Enable the clock for PAD peripheral device */
<> 144:ef7eb2e8f9f7 73 CLOCK_ENABLE(CLOCK_PAD);
<> 144:ef7eb2e8f9f7 74
<> 144:ef7eb2e8f9f7 75 /** - Set pad parameters, output drive strength, pull piece control, output drive type */
<> 144:ef7eb2e8f9f7 76 PADREG->PADIO0.WORD = PAD_OUTPUT_PN_L1_OD; /* UART1 TXD */
<> 144:ef7eb2e8f9f7 77 PADREG->PADIO1.WORD = PAD_INPUT_PD_L1_PP; /* UART1 RXD */
<> 144:ef7eb2e8f9f7 78 PADREG->PADIO2.WORD = PAD_INPUT_PD_L1_PP; /* UART1 CTS */
<> 144:ef7eb2e8f9f7 79 PADREG->PADIO3.WORD = PAD_OUTPUT_PN_L1_OD; /* UART1 RTS */
<> 144:ef7eb2e8f9f7 80 PADREG->PADIO4.WORD = PAD_UNUSED_PD_L0_PP;
<> 144:ef7eb2e8f9f7 81 PADREG->PADIO5.WORD = PAD_UNUSED_PD_L0_PP;
<> 144:ef7eb2e8f9f7 82 PADREG->PADIO6.WORD = PAD_UNUSED_PD_L0_PP;
<> 144:ef7eb2e8f9f7 83 PADREG->PADIO7.WORD = PAD_UNUSED_PD_L0_PP;
<> 144:ef7eb2e8f9f7 84 PADREG->PADIO8.WORD = PAD_OUTPUT_PN_L1_OD; /* UART2 TXD */
<> 144:ef7eb2e8f9f7 85 PADREG->PADIO9.WORD = PAD_INPUT_PD_L1_PP; /* UART2 RXD */
<> 144:ef7eb2e8f9f7 86 PADREG->PADIO10.WORD = PAD_UNUSED_PD_L0_PP;
<> 144:ef7eb2e8f9f7 87 PADREG->PADIO11.WORD = PAD_INPUT_PD_L1_PP; /* SWO */
<> 144:ef7eb2e8f9f7 88 PADREG->PADIO12.WORD = PAD_INPUT_PD_L1_PP; /* SWCLK */
<> 144:ef7eb2e8f9f7 89 PADREG->PADIO13.WORD = PAD_INPUT_PD_L1_PP; /* SWDIO */
<> 144:ef7eb2e8f9f7 90 PADREG->PADIO14.WORD = PAD_INPUT_PD_L1_PP;
<> 144:ef7eb2e8f9f7 91 PADREG->PADIO15.WORD = PAD_UNUSED_PD_L0_PP;
<> 144:ef7eb2e8f9f7 92 PADREG->PADIO16.WORD = PAD_UNUSED_PD_L0_PP;
<> 144:ef7eb2e8f9f7 93 PADREG->PADIO17.WORD = PAD_UNUSED_PD_L0_PP;
<> 144:ef7eb2e8f9f7 94
<> 144:ef7eb2e8f9f7 95 /** - Disable the clock for PAD peripheral device */
<> 144:ef7eb2e8f9f7 96 CLOCK_DISABLE(CLOCK_PAD);
<> 144:ef7eb2e8f9f7 97
<> 144:ef7eb2e8f9f7 98 }
<> 144:ef7eb2e8f9f7 99
<> 144:ef7eb2e8f9f7 100 /** Find description at pad.h */
<> 144:ef7eb2e8f9f7 101 boolean fPadIOCtrl(uint8_t PadNum, uint8_t OutputDriveStrength, uint8_t OutputDriveType, uint8_t PullType)
<> 144:ef7eb2e8f9f7 102 {
<> 144:ef7eb2e8f9f7 103 PadReg_t *PadRegOffset;
<> 144:ef7eb2e8f9f7 104 /** \verbatim
<> 144:ef7eb2e8f9f7 105 Table: O/p drive strength
<> 144:ef7eb2e8f9f7 106
<> 144:ef7eb2e8f9f7 107 Drive strength 3.3V (min/typ/max) 1V (min/typ/max)
<> 144:ef7eb2e8f9f7 108 000 1/1.4/2.1 mA 0.043/0.07/0.11 mA
<> 144:ef7eb2e8f9f7 109 001 2/2.7/4.1 mA 0.086/0.15/0.215 mA
<> 144:ef7eb2e8f9f7 110 010 4.1/5.3/7.8 mA 0.188/0.3/0.4 mA
<> 144:ef7eb2e8f9f7 111 011 8.1/10.4/15 8 mA 0.4/0.6/0.81 mA
<> 144:ef7eb2e8f9f7 112 100 20.8/26/37 mA* 1/1.6/2.2 mA
<> 144:ef7eb2e8f9f7 113 101 40.5/50/70 mA* 2/3/4.3 mA
<> 144:ef7eb2e8f9f7 114 11x 57/73/102 mA* 3/4.6/6.2 mA
<> 144:ef7eb2e8f9f7 115
<> 144:ef7eb2e8f9f7 116 *Values are only accessible when CDBGPWRUPREQ is high. This limits the maximum output current in functional mode. \endverbatim */
<> 144:ef7eb2e8f9f7 117
<> 144:ef7eb2e8f9f7 118
<> 144:ef7eb2e8f9f7 119 if((PadNum <= PAD_NUM_OF_IO) &&
<> 144:ef7eb2e8f9f7 120 (OutputDriveStrength <= PAD_OP_DRIVE_STRGTH_MAX) &&
<> 144:ef7eb2e8f9f7 121 (OutputDriveType <= PAD_OP_DRIVE_TYPE_MAX) && (PullType <= PAD_OP_PULL_TYPE_MAX)) {
<> 144:ef7eb2e8f9f7 122 /** - Get PAD IO register address for the PAD number */
<> 144:ef7eb2e8f9f7 123 PadRegOffset = (PadReg_t*)(PADREG_BASE + (PadNum * PAD_REG_ADRS_BYTE_SIZE));
<> 144:ef7eb2e8f9f7 124
<> 144:ef7eb2e8f9f7 125 /** - Enable the clock for PAD peripheral device */
<> 144:ef7eb2e8f9f7 126 CLOCK_ENABLE(CLOCK_PAD);
<> 144:ef7eb2e8f9f7 127
<> 144:ef7eb2e8f9f7 128 /** - Set drive type, pulltype & drive strength */
<> 144:ef7eb2e8f9f7 129 PadRegOffset->PADIO0.WORD = (uint32_t)((PullType << PAD_OP_PULL_TYPE_BIT_POS) |
<> 144:ef7eb2e8f9f7 130 (OutputDriveStrength << PAD_OP_DRIVE_STRGTH_BIT_POS) |
<> 144:ef7eb2e8f9f7 131 (OutputDriveType << PAD_OP_DRIVE_TYPE_BIT_POS));
<> 144:ef7eb2e8f9f7 132
<> 144:ef7eb2e8f9f7 133 /** - Disable the clock for PAD peripheral device */
<> 144:ef7eb2e8f9f7 134 CLOCK_DISABLE(CLOCK_PAD);
<> 144:ef7eb2e8f9f7 135 return True;
<> 144:ef7eb2e8f9f7 136 }
<> 144:ef7eb2e8f9f7 137 /* Invalid parameter/s */
<> 144:ef7eb2e8f9f7 138 return False;
<> 144:ef7eb2e8f9f7 139 }
<> 144:ef7eb2e8f9f7 140 #endif /* REVD */