added prescaler for 16 bit pwm in LPC1347 target

Fork of mbed-dev by mbed official

Committer:
JojoS
Date:
Sat Sep 10 15:32:04 2016 +0000
Revision:
147:ba84b7dc41a7
Parent:
64:41a834223ea3
added prescaler for 16 bit timers (solution as in LPC11xx), default prescaler 31 for max 28 ms period time

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 15:a81a8d6c1dfe 1 /* mbed Microcontroller Library
mbed_official 15:a81a8d6c1dfe 2 * Copyright (c) 2006-2015 ARM Limited
mbed_official 15:a81a8d6c1dfe 3 *
mbed_official 15:a81a8d6c1dfe 4 * Licensed under the Apache License, Version 2.0 (the "License");
mbed_official 15:a81a8d6c1dfe 5 * you may not use this file except in compliance with the License.
mbed_official 15:a81a8d6c1dfe 6 * You may obtain a copy of the License at
mbed_official 15:a81a8d6c1dfe 7 *
mbed_official 15:a81a8d6c1dfe 8 * http://www.apache.org/licenses/LICENSE-2.0
mbed_official 15:a81a8d6c1dfe 9 *
mbed_official 15:a81a8d6c1dfe 10 * Unless required by applicable law or agreed to in writing, software
mbed_official 15:a81a8d6c1dfe 11 * distributed under the License is distributed on an "AS IS" BASIS,
mbed_official 15:a81a8d6c1dfe 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
mbed_official 15:a81a8d6c1dfe 13 * See the License for the specific language governing permissions and
mbed_official 15:a81a8d6c1dfe 14 * limitations under the License.
mbed_official 15:a81a8d6c1dfe 15 */
mbed_official 15:a81a8d6c1dfe 16 #include "mbed_assert.h"
mbed_official 15:a81a8d6c1dfe 17 #include "system.h"
mbed_official 15:a81a8d6c1dfe 18 #include "dma_api.h"
mbed_official 15:a81a8d6c1dfe 19 #include "dma_api_HAL.h"
mbed_official 15:a81a8d6c1dfe 20
mbed_official 15:a81a8d6c1dfe 21 #include <math.h>
mbed_official 15:a81a8d6c1dfe 22
mbed_official 15:a81a8d6c1dfe 23 #include "cmsis.h"
mbed_official 15:a81a8d6c1dfe 24 #include "pinmap.h"
mbed_official 15:a81a8d6c1dfe 25
mbed_official 15:a81a8d6c1dfe 26 /**
mbed_official 15:a81a8d6c1dfe 27 * \internal
mbed_official 15:a81a8d6c1dfe 28 * Structure redefinition, already defined in dma.c.
mbed_official 15:a81a8d6c1dfe 29 * Redefining as that definition is not available here
mbed_official 15:a81a8d6c1dfe 30 */
mbed_official 15:a81a8d6c1dfe 31 struct _dma_module {
mbed_official 15:a81a8d6c1dfe 32 volatile bool _dma_init;
mbed_official 15:a81a8d6c1dfe 33 volatile uint32_t allocated_channels;
mbed_official 15:a81a8d6c1dfe 34 uint8_t free_channels;
mbed_official 15:a81a8d6c1dfe 35 };
mbed_official 15:a81a8d6c1dfe 36
mbed_official 15:a81a8d6c1dfe 37 extern struct _dma_module _dma_inst;
mbed_official 15:a81a8d6c1dfe 38 extern uint8_t g_sys_init;
mbed_official 15:a81a8d6c1dfe 39
mbed_official 15:a81a8d6c1dfe 40 static struct dma_instance_s dma_channels[CONF_MAX_USED_CHANNEL_NUM];
mbed_official 15:a81a8d6c1dfe 41
mbed_official 15:a81a8d6c1dfe 42 /**
mbed_official 15:a81a8d6c1dfe 43 * \internal
mbed_official 15:a81a8d6c1dfe 44 * Get resource index from channel id
mbed_official 15:a81a8d6c1dfe 45 *
mbed_official 15:a81a8d6c1dfe 46 * @param[in] channelid Valid DMA channel id
mbed_official 15:a81a8d6c1dfe 47 * @return index to DMA instance
mbed_official 15:a81a8d6c1dfe 48 */
mbed_official 15:a81a8d6c1dfe 49 static uint8_t get_index_from_id(int channelid)
mbed_official 15:a81a8d6c1dfe 50 {
mbed_official 15:a81a8d6c1dfe 51 /* Sanity check arguments */
mbed_official 15:a81a8d6c1dfe 52 MBED_ASSERT(channelid < CONF_MAX_USED_CHANNEL_NUM);
mbed_official 15:a81a8d6c1dfe 53
mbed_official 15:a81a8d6c1dfe 54 uint8_t i;
mbed_official 15:a81a8d6c1dfe 55
mbed_official 15:a81a8d6c1dfe 56 for (i=0; i<CONF_MAX_USED_CHANNEL_NUM; i++) {
mbed_official 15:a81a8d6c1dfe 57 if ((dma_channels[i].status & DMA_ALLOCATED)
mbed_official 15:a81a8d6c1dfe 58 && (dma_channels[i].resource.channel_id == channelid)) {
mbed_official 15:a81a8d6c1dfe 59 break;
mbed_official 15:a81a8d6c1dfe 60 }
mbed_official 15:a81a8d6c1dfe 61 }
mbed_official 15:a81a8d6c1dfe 62
mbed_official 15:a81a8d6c1dfe 63 return i;
mbed_official 15:a81a8d6c1dfe 64 }
mbed_official 15:a81a8d6c1dfe 65
mbed_official 15:a81a8d6c1dfe 66 /**
mbed_official 15:a81a8d6c1dfe 67 * \internal
mbed_official 15:a81a8d6c1dfe 68 * Handler function for DMA callback
mbed_official 15:a81a8d6c1dfe 69 *
mbed_official 15:a81a8d6c1dfe 70 * @param[in] resource pointer to the resource
mbed_official 15:a81a8d6c1dfe 71 * @return void
mbed_official 15:a81a8d6c1dfe 72 */
mbed_official 15:a81a8d6c1dfe 73 static void dma_handler(const struct dma_resource* const resource)
mbed_official 15:a81a8d6c1dfe 74 {
mbed_official 15:a81a8d6c1dfe 75 MBED_ASSERT(resource);
mbed_official 15:a81a8d6c1dfe 76 void (*callback_func)(void);
mbed_official 15:a81a8d6c1dfe 77
mbed_official 15:a81a8d6c1dfe 78 uint8_t channelid = resource->channel_id;
mbed_official 15:a81a8d6c1dfe 79 uint8_t channel_index;
mbed_official 15:a81a8d6c1dfe 80
mbed_official 15:a81a8d6c1dfe 81 channel_index = get_index_from_id(channelid);
mbed_official 15:a81a8d6c1dfe 82 if (channel_index >= CONF_MAX_USED_CHANNEL_NUM) {
mbed_official 15:a81a8d6c1dfe 83 return;
mbed_official 15:a81a8d6c1dfe 84 }
mbed_official 15:a81a8d6c1dfe 85
mbed_official 64:41a834223ea3 86 callback_func = (void(*)(void))(dma_channels[channel_index].handler);
mbed_official 15:a81a8d6c1dfe 87 if (callback_func) {
mbed_official 15:a81a8d6c1dfe 88 callback_func();
mbed_official 15:a81a8d6c1dfe 89 }
mbed_official 15:a81a8d6c1dfe 90 }
mbed_official 15:a81a8d6c1dfe 91
mbed_official 15:a81a8d6c1dfe 92 /**
mbed_official 15:a81a8d6c1dfe 93 * \internal
mbed_official 15:a81a8d6c1dfe 94 * Configure a DMA channel for specified resource
mbed_official 15:a81a8d6c1dfe 95 *
mbed_official 15:a81a8d6c1dfe 96 * @param[in] channel_index index to the resource
mbed_official 15:a81a8d6c1dfe 97 * @return void
mbed_official 15:a81a8d6c1dfe 98 */
mbed_official 15:a81a8d6c1dfe 99 static void configure_dma_resource(uint8_t channel_index)
mbed_official 15:a81a8d6c1dfe 100 {
mbed_official 15:a81a8d6c1dfe 101 /* Sanity check arguments */
mbed_official 15:a81a8d6c1dfe 102 MBED_ASSERT(channel_index < CONF_MAX_USED_CHANNEL_NUM);
mbed_official 15:a81a8d6c1dfe 103
mbed_official 15:a81a8d6c1dfe 104 enum status_code ret;
mbed_official 15:a81a8d6c1dfe 105 struct dma_resource_config config;
mbed_official 15:a81a8d6c1dfe 106
mbed_official 15:a81a8d6c1dfe 107 if (dma_channels[channel_index].status & DMA_ALLOCATED) {
mbed_official 15:a81a8d6c1dfe 108 return;
mbed_official 15:a81a8d6c1dfe 109 }
mbed_official 15:a81a8d6c1dfe 110
mbed_official 15:a81a8d6c1dfe 111 /* Get default configuration for DMA */
mbed_official 15:a81a8d6c1dfe 112 dma_get_config_defaults(&config);
mbed_official 15:a81a8d6c1dfe 113
mbed_official 15:a81a8d6c1dfe 114 /* Allocate a free channel */
mbed_official 15:a81a8d6c1dfe 115 ret = dma_allocate(&dma_channels[channel_index].resource, &config);
mbed_official 15:a81a8d6c1dfe 116
mbed_official 15:a81a8d6c1dfe 117 if (ret == STATUS_OK) {
mbed_official 15:a81a8d6c1dfe 118 dma_channels[channel_index].status = DMA_ALLOCATED;
mbed_official 15:a81a8d6c1dfe 119 }
mbed_official 15:a81a8d6c1dfe 120 }
mbed_official 15:a81a8d6c1dfe 121
mbed_official 15:a81a8d6c1dfe 122 /** Setup a DMA descriptor for specified resource
mbed_official 15:a81a8d6c1dfe 123 *
mbed_official 15:a81a8d6c1dfe 124 * @param[in] channel_index DMA channel id
mbed_official 15:a81a8d6c1dfe 125 * @param[in] src source address
mbed_official 15:a81a8d6c1dfe 126 * @param[in] src_inc_enable source address auto increment enable flag
mbed_official 15:a81a8d6c1dfe 127 * @param[in] desc destination address
mbed_official 15:a81a8d6c1dfe 128 * @param[in] desc_inc_enable destination address auto increment enable flag
mbed_official 15:a81a8d6c1dfe 129 * @param[in] length length of data to be transferred
mbed_official 15:a81a8d6c1dfe 130 * @param[in] beat_size beat size to be set
mbed_official 15:a81a8d6c1dfe 131 * @return void
mbed_official 15:a81a8d6c1dfe 132 */
mbed_official 15:a81a8d6c1dfe 133 void dma_setup_transfer(uint8_t channelid, uint32_t src, bool src_inc_enable, uint32_t desc, bool desc_inc_enable, uint32_t length, uint8_t beat_size)
mbed_official 15:a81a8d6c1dfe 134 {
mbed_official 15:a81a8d6c1dfe 135 enum status_code result;
mbed_official 15:a81a8d6c1dfe 136 uint8_t channel_index;
mbed_official 15:a81a8d6c1dfe 137 struct dma_descriptor_config descriptor_config;
mbed_official 15:a81a8d6c1dfe 138
mbed_official 15:a81a8d6c1dfe 139 /* Sanity check arguments */
mbed_official 15:a81a8d6c1dfe 140 MBED_ASSERT(channelid < CONF_MAX_USED_CHANNEL_NUM);
mbed_official 15:a81a8d6c1dfe 141 MBED_ASSERT(src);
mbed_official 15:a81a8d6c1dfe 142 MBED_ASSERT(desc);
mbed_official 15:a81a8d6c1dfe 143
mbed_official 15:a81a8d6c1dfe 144 channel_index = get_index_from_id(channelid);
mbed_official 15:a81a8d6c1dfe 145
mbed_official 15:a81a8d6c1dfe 146 dma_descriptor_get_config_defaults(&descriptor_config);
mbed_official 15:a81a8d6c1dfe 147
mbed_official 15:a81a8d6c1dfe 148 if (beat_size <= 8) {
mbed_official 15:a81a8d6c1dfe 149 descriptor_config.beat_size = DMA_BEAT_SIZE_BYTE;
mbed_official 15:a81a8d6c1dfe 150 } else if ((beat_size > 8) && (beat_size <= 16)) {
mbed_official 15:a81a8d6c1dfe 151 descriptor_config.beat_size = DMA_BEAT_SIZE_HWORD;
mbed_official 15:a81a8d6c1dfe 152 } else {
mbed_official 15:a81a8d6c1dfe 153 descriptor_config.beat_size = DMA_BEAT_SIZE_WORD;
mbed_official 15:a81a8d6c1dfe 154 }
mbed_official 15:a81a8d6c1dfe 155 descriptor_config.block_transfer_count = length;
mbed_official 15:a81a8d6c1dfe 156 descriptor_config.source_address = src;
mbed_official 15:a81a8d6c1dfe 157 descriptor_config.destination_address = desc;
mbed_official 15:a81a8d6c1dfe 158
mbed_official 15:a81a8d6c1dfe 159 /* Source address auto-increment is enabled by default */
mbed_official 15:a81a8d6c1dfe 160 if (!src_inc_enable) {
mbed_official 15:a81a8d6c1dfe 161 descriptor_config.src_increment_enable = false;
mbed_official 15:a81a8d6c1dfe 162 }
mbed_official 15:a81a8d6c1dfe 163
mbed_official 15:a81a8d6c1dfe 164 /* Destination address auto-increment is enabled by default */
mbed_official 15:a81a8d6c1dfe 165 if (!desc_inc_enable) {
mbed_official 15:a81a8d6c1dfe 166 descriptor_config.dst_increment_enable = false;
mbed_official 15:a81a8d6c1dfe 167 }
mbed_official 15:a81a8d6c1dfe 168
mbed_official 15:a81a8d6c1dfe 169 dma_descriptor_create(&dma_channels[channel_index].descriptor, &descriptor_config);
mbed_official 15:a81a8d6c1dfe 170
mbed_official 15:a81a8d6c1dfe 171 /* Add descriptor to resource */
mbed_official 15:a81a8d6c1dfe 172 if (dma_channels[channel_index].resource.descriptor == NULL) {
mbed_official 15:a81a8d6c1dfe 173 /* Multiple calls to this function without releasing already allocated channel is not handled now */
mbed_official 15:a81a8d6c1dfe 174 result = dma_add_descriptor(&dma_channels[channel_index].resource, &dma_channels[channel_index].descriptor);
mbed_official 15:a81a8d6c1dfe 175 if (result != STATUS_OK) {
mbed_official 15:a81a8d6c1dfe 176 dma_channels[channel_index].status |= DMA_ERROR;
mbed_official 15:a81a8d6c1dfe 177 }
mbed_official 15:a81a8d6c1dfe 178 }
mbed_official 15:a81a8d6c1dfe 179 }
mbed_official 15:a81a8d6c1dfe 180
mbed_official 15:a81a8d6c1dfe 181
mbed_official 15:a81a8d6c1dfe 182 /** Initialize the DMA
mbed_official 15:a81a8d6c1dfe 183 *
mbed_official 15:a81a8d6c1dfe 184 * Configures clock for DMAC
mbed_official 15:a81a8d6c1dfe 185 */
mbed_official 15:a81a8d6c1dfe 186 void dma_init()
mbed_official 15:a81a8d6c1dfe 187 {
mbed_official 15:a81a8d6c1dfe 188 int i;
mbed_official 15:a81a8d6c1dfe 189
mbed_official 15:a81a8d6c1dfe 190 if (g_sys_init == 0) {
mbed_official 15:a81a8d6c1dfe 191 system_init();
mbed_official 15:a81a8d6c1dfe 192 g_sys_init = 1;
mbed_official 15:a81a8d6c1dfe 193 }
mbed_official 15:a81a8d6c1dfe 194
mbed_official 15:a81a8d6c1dfe 195 if (!_dma_inst._dma_init) {
mbed_official 15:a81a8d6c1dfe 196 for (i=0; i<CONF_MAX_USED_CHANNEL_NUM; i++) {
mbed_official 15:a81a8d6c1dfe 197 dma_channels[i].status = DMA_NOT_USED;
mbed_official 15:a81a8d6c1dfe 198 }
mbed_official 15:a81a8d6c1dfe 199 }
mbed_official 15:a81a8d6c1dfe 200 /* Do nothing for now. ASF does the clock init when allocating channel */
mbed_official 15:a81a8d6c1dfe 201 }
mbed_official 15:a81a8d6c1dfe 202
mbed_official 15:a81a8d6c1dfe 203 /** Allocates channel for DMA
mbed_official 15:a81a8d6c1dfe 204 *
mbed_official 15:a81a8d6c1dfe 205 * Allocates channel for DMA with specified capability
mbed_official 15:a81a8d6c1dfe 206 * @param[in] capabilities Capability of DMA channel
mbed_official 15:a81a8d6c1dfe 207 */
mbed_official 15:a81a8d6c1dfe 208 int dma_channel_allocate(uint32_t capabilities)
mbed_official 15:a81a8d6c1dfe 209 {
mbed_official 15:a81a8d6c1dfe 210 uint8_t channel_index = 0;
mbed_official 15:a81a8d6c1dfe 211
mbed_official 15:a81a8d6c1dfe 212 for (channel_index=0; channel_index<CONF_MAX_USED_CHANNEL_NUM; channel_index++) {
mbed_official 15:a81a8d6c1dfe 213 if (dma_channels[channel_index].status == DMA_NOT_USED) {
mbed_official 15:a81a8d6c1dfe 214 break;
mbed_official 15:a81a8d6c1dfe 215 }
mbed_official 15:a81a8d6c1dfe 216 }
mbed_official 15:a81a8d6c1dfe 217
mbed_official 15:a81a8d6c1dfe 218 if (channel_index != CONF_MAX_USED_CHANNEL_NUM) {
mbed_official 15:a81a8d6c1dfe 219 configure_dma_resource(channel_index);
mbed_official 15:a81a8d6c1dfe 220 if (dma_channels[channel_index].status & DMA_ALLOCATED) {
mbed_official 15:a81a8d6c1dfe 221 return dma_channels[channel_index].resource.channel_id;
mbed_official 15:a81a8d6c1dfe 222 }
mbed_official 15:a81a8d6c1dfe 223 }
mbed_official 15:a81a8d6c1dfe 224
mbed_official 15:a81a8d6c1dfe 225 /* Couldn't find a channel. */
mbed_official 15:a81a8d6c1dfe 226 return DMA_ERROR_OUT_OF_CHANNELS;
mbed_official 15:a81a8d6c1dfe 227 }
mbed_official 15:a81a8d6c1dfe 228
mbed_official 15:a81a8d6c1dfe 229 /** Start DMA transfer
mbed_official 15:a81a8d6c1dfe 230 *
mbed_official 15:a81a8d6c1dfe 231 * Kick starts transfer in DMA channel with specified channel id
mbed_official 15:a81a8d6c1dfe 232 * @param[in] channelid Channel id of DMA channel
mbed_official 15:a81a8d6c1dfe 233 * @return zero if success otherwise non zero
mbed_official 15:a81a8d6c1dfe 234 */
mbed_official 15:a81a8d6c1dfe 235 bool dma_start_transfer(int channelid)
mbed_official 15:a81a8d6c1dfe 236 {
mbed_official 15:a81a8d6c1dfe 237 /* Sanity check arguments */
mbed_official 15:a81a8d6c1dfe 238 MBED_ASSERT(channelid < CONF_MAX_USED_CHANNEL_NUM);
mbed_official 15:a81a8d6c1dfe 239
mbed_official 15:a81a8d6c1dfe 240 uint8_t channel_index;
mbed_official 15:a81a8d6c1dfe 241
mbed_official 15:a81a8d6c1dfe 242 channel_index = get_index_from_id(channelid);
mbed_official 15:a81a8d6c1dfe 243
mbed_official 15:a81a8d6c1dfe 244 if (channel_index >= CONF_MAX_USED_CHANNEL_NUM) {
mbed_official 15:a81a8d6c1dfe 245 /* Return invalid value for now */
mbed_official 15:a81a8d6c1dfe 246 return false;
mbed_official 15:a81a8d6c1dfe 247 }
mbed_official 15:a81a8d6c1dfe 248
mbed_official 15:a81a8d6c1dfe 249 if (!(dma_channels[channel_index].status & DMA_ALLOCATED)) {
mbed_official 15:a81a8d6c1dfe 250 /* DMA not allocated, return invalid value for now */
mbed_official 15:a81a8d6c1dfe 251 return false;
mbed_official 15:a81a8d6c1dfe 252 }
mbed_official 15:a81a8d6c1dfe 253
mbed_official 15:a81a8d6c1dfe 254 /* Start DMA transfer */
mbed_official 15:a81a8d6c1dfe 255 if (STATUS_OK != dma_start_transfer_job(&dma_channels[channel_index].resource)) {
mbed_official 15:a81a8d6c1dfe 256 /* Error in starting DMA transfer */
mbed_official 15:a81a8d6c1dfe 257 return false;
mbed_official 15:a81a8d6c1dfe 258 }
mbed_official 15:a81a8d6c1dfe 259
mbed_official 15:a81a8d6c1dfe 260 return true;
mbed_official 15:a81a8d6c1dfe 261 }
mbed_official 15:a81a8d6c1dfe 262
mbed_official 15:a81a8d6c1dfe 263 /** DMA channel busy check
mbed_official 15:a81a8d6c1dfe 264 *
mbed_official 15:a81a8d6c1dfe 265 * To check whether DMA channel is busy with a job or not
mbed_official 15:a81a8d6c1dfe 266 * @param[in] channelid Channel id of DMA channel
mbed_official 15:a81a8d6c1dfe 267 * @return non zero if busy otherwise zero
mbed_official 15:a81a8d6c1dfe 268 */
mbed_official 15:a81a8d6c1dfe 269 bool dma_busy(int channelid)
mbed_official 15:a81a8d6c1dfe 270 {
mbed_official 15:a81a8d6c1dfe 271 /* Sanity check arguments */
mbed_official 15:a81a8d6c1dfe 272 MBED_ASSERT(channelid < CONF_MAX_USED_CHANNEL_NUM);
mbed_official 15:a81a8d6c1dfe 273
mbed_official 15:a81a8d6c1dfe 274 uint8_t channel_index;
mbed_official 15:a81a8d6c1dfe 275
mbed_official 15:a81a8d6c1dfe 276 channel_index = get_index_from_id(channelid);
mbed_official 15:a81a8d6c1dfe 277
mbed_official 15:a81a8d6c1dfe 278 if (channel_index >= CONF_MAX_USED_CHANNEL_NUM) {
mbed_official 15:a81a8d6c1dfe 279 /* This channel is not active! return zero for now */
mbed_official 64:41a834223ea3 280 //res = 0;
mbed_official 64:41a834223ea3 281 return 0;
mbed_official 15:a81a8d6c1dfe 282 }
mbed_official 15:a81a8d6c1dfe 283
mbed_official 15:a81a8d6c1dfe 284 return dma_is_busy(&dma_channels[channel_index].resource);
mbed_official 15:a81a8d6c1dfe 285 }
mbed_official 15:a81a8d6c1dfe 286
mbed_official 15:a81a8d6c1dfe 287 /** DMA channel transfer completion check
mbed_official 15:a81a8d6c1dfe 288 *
mbed_official 15:a81a8d6c1dfe 289 * To check whether DMA channel job is completed or not
mbed_official 15:a81a8d6c1dfe 290 * @param[in] channelid Channel id of DMA channel
mbed_official 15:a81a8d6c1dfe 291 * @return non zero if busy otherwise zero
mbed_official 15:a81a8d6c1dfe 292 */
mbed_official 15:a81a8d6c1dfe 293 bool dma_is_transfer_complete(int channelid)
mbed_official 15:a81a8d6c1dfe 294 {
mbed_official 15:a81a8d6c1dfe 295 /* Sanity check arguments */
mbed_official 15:a81a8d6c1dfe 296 MBED_ASSERT(channelid < CONF_MAX_USED_CHANNEL_NUM);
mbed_official 15:a81a8d6c1dfe 297
mbed_official 15:a81a8d6c1dfe 298 uint8_t channel_index;
mbed_official 15:a81a8d6c1dfe 299
mbed_official 15:a81a8d6c1dfe 300 channel_index = get_index_from_id(channelid);
mbed_official 15:a81a8d6c1dfe 301
mbed_official 15:a81a8d6c1dfe 302 if (channel_index >= CONF_MAX_USED_CHANNEL_NUM) {
mbed_official 15:a81a8d6c1dfe 303 /* This channel is not active! return zero for now */
mbed_official 64:41a834223ea3 304 // res = 0;
mbed_official 64:41a834223ea3 305 return 0;
mbed_official 15:a81a8d6c1dfe 306 }
mbed_official 15:a81a8d6c1dfe 307
mbed_official 15:a81a8d6c1dfe 308 return (STATUS_OK == dma_get_job_status(&dma_channels[channel_index].resource));
mbed_official 15:a81a8d6c1dfe 309 }
mbed_official 15:a81a8d6c1dfe 310
mbed_official 15:a81a8d6c1dfe 311 /** Registers callback function for DMA
mbed_official 15:a81a8d6c1dfe 312 *
mbed_official 15:a81a8d6c1dfe 313 * Registers callback function for DMA for specified events
mbed_official 15:a81a8d6c1dfe 314 * @param[in] channelid Channel id of DMA channel
mbed_official 15:a81a8d6c1dfe 315 * @param[in] handler Callback function pointer
mbed_official 15:a81a8d6c1dfe 316 * @param[in] event Events mask
mbed_official 15:a81a8d6c1dfe 317 * @return void
mbed_official 15:a81a8d6c1dfe 318 */
mbed_official 15:a81a8d6c1dfe 319 void dma_set_handler(int channelid, uint32_t handler, uint32_t event)
mbed_official 15:a81a8d6c1dfe 320 {
mbed_official 15:a81a8d6c1dfe 321 /* Sanity check arguments */
mbed_official 15:a81a8d6c1dfe 322 MBED_ASSERT(channelid < CONF_MAX_USED_CHANNEL_NUM);
mbed_official 15:a81a8d6c1dfe 323
mbed_official 15:a81a8d6c1dfe 324 uint8_t channel_index;
mbed_official 15:a81a8d6c1dfe 325
mbed_official 15:a81a8d6c1dfe 326 channel_index = get_index_from_id(channelid);
mbed_official 15:a81a8d6c1dfe 327
mbed_official 15:a81a8d6c1dfe 328 if (channel_index >= CONF_MAX_USED_CHANNEL_NUM) {
mbed_official 15:a81a8d6c1dfe 329 /* Return for now */
mbed_official 15:a81a8d6c1dfe 330 return;
mbed_official 15:a81a8d6c1dfe 331 }
mbed_official 15:a81a8d6c1dfe 332
mbed_official 15:a81a8d6c1dfe 333 dma_channels[channel_index].handler = handler;
mbed_official 15:a81a8d6c1dfe 334 if (event & DMA_TRANSFER_ERROR) {
mbed_official 64:41a834223ea3 335 dma_register_callback(&dma_channels[channel_index].resource, (dma_callback_t)dma_handler, DMA_CALLBACK_TRANSFER_ERROR);
mbed_official 15:a81a8d6c1dfe 336 }
mbed_official 15:a81a8d6c1dfe 337 if (event & DMA_TRANSFER_COMPLETE) {
mbed_official 64:41a834223ea3 338 dma_register_callback(&dma_channels[channel_index].resource, (dma_callback_t)dma_handler, DMA_CALLBACK_TRANSFER_DONE);
mbed_official 15:a81a8d6c1dfe 339 }
mbed_official 15:a81a8d6c1dfe 340
mbed_official 15:a81a8d6c1dfe 341 /* Set interrupt vector if someone have removed it */
mbed_official 15:a81a8d6c1dfe 342 NVIC_SetVector(DMAC_IRQn, (uint32_t)DMAC_Handler);
mbed_official 15:a81a8d6c1dfe 343 /* Enable interrupt */
mbed_official 15:a81a8d6c1dfe 344 NVIC_EnableIRQ(DMAC_IRQn);
mbed_official 15:a81a8d6c1dfe 345 }
mbed_official 15:a81a8d6c1dfe 346
mbed_official 15:a81a8d6c1dfe 347 /** Frees an allocated DMA channel
mbed_official 15:a81a8d6c1dfe 348 *
mbed_official 15:a81a8d6c1dfe 349 * Frees an already allocated DMA channel with specified channel id
mbed_official 15:a81a8d6c1dfe 350 * @param[in] channelid Channel id of DMA channel to be disabled
mbed_official 15:a81a8d6c1dfe 351 * @return zero if success
mbed_official 15:a81a8d6c1dfe 352 */
mbed_official 15:a81a8d6c1dfe 353 int dma_channel_free(int channelid)
mbed_official 15:a81a8d6c1dfe 354 {
mbed_official 15:a81a8d6c1dfe 355 /* Sanity check arguments */
mbed_official 15:a81a8d6c1dfe 356 MBED_ASSERT(channelid < CONF_MAX_USED_CHANNEL_NUM);
mbed_official 15:a81a8d6c1dfe 357
mbed_official 15:a81a8d6c1dfe 358 uint8_t channel_index;
mbed_official 15:a81a8d6c1dfe 359
mbed_official 15:a81a8d6c1dfe 360 channel_index = get_index_from_id(channelid);
mbed_official 15:a81a8d6c1dfe 361
mbed_official 15:a81a8d6c1dfe 362 if (STATUS_OK == dma_free(&dma_channels[channel_index].resource)) {
mbed_official 15:a81a8d6c1dfe 363 dma_channels[channel_index].status = DMA_NOT_USED;
mbed_official 15:a81a8d6c1dfe 364 dma_channels[channel_index].resource.descriptor = NULL;
mbed_official 15:a81a8d6c1dfe 365 return 0;
mbed_official 15:a81a8d6c1dfe 366 } else {
mbed_official 15:a81a8d6c1dfe 367 /* Return invalid value for now */
mbed_official 15:a81a8d6c1dfe 368 return -1;
mbed_official 15:a81a8d6c1dfe 369 }
mbed_official 15:a81a8d6c1dfe 370 }
mbed_official 15:a81a8d6c1dfe 371
mbed_official 15:a81a8d6c1dfe 372