Johannes Stratmann / mbed-dev

added prescaler for 16 bit pwm in LPC1347 target

Fork of mbed-dev by mbed official

targets/cmsis/TARGET_STM/TARGET_STM32F7/stm32f7xx_ll_usb.h@147:ba84b7dc41a7, 2016-09-10 (annotated)

Committer:
JojoS
Date:
Sat Sep 10 15:32:04 2016 +0000
Revision:
147:ba84b7dc41a7
Parent:
144:ef7eb2e8f9f7 
added prescaler for 16 bit timers (solution as in LPC11xx), default prescaler 31 for max 28 ms period time

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file stm32f7xx_ll_usb.h
<> 144:ef7eb2e8f9f7 4 * @author MCD Application Team
<> 144:ef7eb2e8f9f7 5 * @version V1.1.0
<> 144:ef7eb2e8f9f7 6 * @date 22-April-2016
<> 144:ef7eb2e8f9f7 7 * @brief Header file of USB Core HAL module.
<> 144:ef7eb2e8f9f7 8 ******************************************************************************
<> 144:ef7eb2e8f9f7 9 * @attention
<> 144:ef7eb2e8f9f7 10 *
<> 144:ef7eb2e8f9f7 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 144:ef7eb2e8f9f7 12 *
<> 144:ef7eb2e8f9f7 13 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 14 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 15 * 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 16 * this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 18 * this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 19 * and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 21 * may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 22 * without specific prior written permission.
<> 144:ef7eb2e8f9f7 23 *
<> 144:ef7eb2e8f9f7 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 34 *
<> 144:ef7eb2e8f9f7 35 ******************************************************************************
<> 144:ef7eb2e8f9f7 36 */
<> 144:ef7eb2e8f9f7 37
<> 144:ef7eb2e8f9f7 38 /* Define to prevent recursive inclusion -------------------------------------*/
<> 144:ef7eb2e8f9f7 39 #ifndef __STM32F7xx_LL_USB_H
<> 144:ef7eb2e8f9f7 40 #define __STM32F7xx_LL_USB_H
<> 144:ef7eb2e8f9f7 41
<> 144:ef7eb2e8f9f7 42 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 43 extern "C" {
<> 144:ef7eb2e8f9f7 44 #endif
<> 144:ef7eb2e8f9f7 45
<> 144:ef7eb2e8f9f7 46 /* Includes ------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 47 #include "stm32f7xx_hal_def.h"
<> 144:ef7eb2e8f9f7 48
<> 144:ef7eb2e8f9f7 49 /** @addtogroup STM32F7xx_HAL
<> 144:ef7eb2e8f9f7 50 * @{
<> 144:ef7eb2e8f9f7 51 */
<> 144:ef7eb2e8f9f7 52
<> 144:ef7eb2e8f9f7 53 /** @addtogroup USB_Core
<> 144:ef7eb2e8f9f7 54 * @{
<> 144:ef7eb2e8f9f7 55 */
<> 144:ef7eb2e8f9f7 56
<> 144:ef7eb2e8f9f7 57 /* Exported types ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 58
<> 144:ef7eb2e8f9f7 59 /**
<> 144:ef7eb2e8f9f7 60 * @brief USB Mode definition
<> 144:ef7eb2e8f9f7 61 */
<> 144:ef7eb2e8f9f7 62 typedef enum
<> 144:ef7eb2e8f9f7 63 {
<> 144:ef7eb2e8f9f7 64 USB_OTG_DEVICE_MODE = 0U,
<> 144:ef7eb2e8f9f7 65 USB_OTG_HOST_MODE = 1U,
<> 144:ef7eb2e8f9f7 66 USB_OTG_DRD_MODE = 2U
<> 144:ef7eb2e8f9f7 67
<> 144:ef7eb2e8f9f7 68 }USB_OTG_ModeTypeDef;
<> 144:ef7eb2e8f9f7 69
<> 144:ef7eb2e8f9f7 70 /**
<> 144:ef7eb2e8f9f7 71 * @brief URB States definition
<> 144:ef7eb2e8f9f7 72 */
<> 144:ef7eb2e8f9f7 73 typedef enum {
<> 144:ef7eb2e8f9f7 74 URB_IDLE = 0U,
<> 144:ef7eb2e8f9f7 75 URB_DONE,
<> 144:ef7eb2e8f9f7 76 URB_NOTREADY,
<> 144:ef7eb2e8f9f7 77 URB_NYET,
<> 144:ef7eb2e8f9f7 78 URB_ERROR,
<> 144:ef7eb2e8f9f7 79 URB_STALL
<> 144:ef7eb2e8f9f7 80
<> 144:ef7eb2e8f9f7 81 }USB_OTG_URBStateTypeDef;
<> 144:ef7eb2e8f9f7 82
<> 144:ef7eb2e8f9f7 83 /**
<> 144:ef7eb2e8f9f7 84 * @brief Host channel States definition
<> 144:ef7eb2e8f9f7 85 */
<> 144:ef7eb2e8f9f7 86 typedef enum {
<> 144:ef7eb2e8f9f7 87 HC_IDLE = 0U,
<> 144:ef7eb2e8f9f7 88 HC_XFRC,
<> 144:ef7eb2e8f9f7 89 HC_HALTED,
<> 144:ef7eb2e8f9f7 90 HC_NAK,
<> 144:ef7eb2e8f9f7 91 HC_NYET,
<> 144:ef7eb2e8f9f7 92 HC_STALL,
<> 144:ef7eb2e8f9f7 93 HC_XACTERR,
<> 144:ef7eb2e8f9f7 94 HC_BBLERR,
<> 144:ef7eb2e8f9f7 95 HC_DATATGLERR
<> 144:ef7eb2e8f9f7 96
<> 144:ef7eb2e8f9f7 97 }USB_OTG_HCStateTypeDef;
<> 144:ef7eb2e8f9f7 98
<> 144:ef7eb2e8f9f7 99 /**
<> 144:ef7eb2e8f9f7 100 * @brief PCD Initialization Structure definition
<> 144:ef7eb2e8f9f7 101 */
<> 144:ef7eb2e8f9f7 102 typedef struct
<> 144:ef7eb2e8f9f7 103 {
<> 144:ef7eb2e8f9f7 104 uint32_t dev_endpoints; /*!< Device Endpoints number.
<> 144:ef7eb2e8f9f7 105 This parameter depends on the used USB core.
<> 144:ef7eb2e8f9f7 106 This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
<> 144:ef7eb2e8f9f7 107
<> 144:ef7eb2e8f9f7 108 uint32_t Host_channels; /*!< Host Channels number.
<> 144:ef7eb2e8f9f7 109 This parameter Depends on the used USB core.
<> 144:ef7eb2e8f9f7 110 This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
<> 144:ef7eb2e8f9f7 111
<> 144:ef7eb2e8f9f7 112 uint32_t speed; /*!< USB Core speed.
<> 144:ef7eb2e8f9f7 113 This parameter can be any value of @ref USB_Core_Speed_ */
<> 144:ef7eb2e8f9f7 114
<> 144:ef7eb2e8f9f7 115 uint32_t dma_enable; /*!< Enable or disable of the USB embedded DMA. */
<> 144:ef7eb2e8f9f7 116
<> 144:ef7eb2e8f9f7 117 uint32_t ep0_mps; /*!< Set the Endpoint 0 Max Packet size.
<> 144:ef7eb2e8f9f7 118 This parameter can be any value of @ref USB_EP0_MPS_ */
<> 144:ef7eb2e8f9f7 119
<> 144:ef7eb2e8f9f7 120 uint32_t phy_itface; /*!< Select the used PHY interface.
<> 144:ef7eb2e8f9f7 121 This parameter can be any value of @ref USB_Core_PHY_ */
<> 144:ef7eb2e8f9f7 122
<> 144:ef7eb2e8f9f7 123 uint32_t Sof_enable; /*!< Enable or disable the output of the SOF signal. */
<> 144:ef7eb2e8f9f7 124
<> 144:ef7eb2e8f9f7 125 uint32_t low_power_enable; /*!< Enable or disable the low power mode. */
<> 144:ef7eb2e8f9f7 126
<> 144:ef7eb2e8f9f7 127 uint32_t lpm_enable; /*!< Enable or disable Link Power Management. */
<> 144:ef7eb2e8f9f7 128
<> 144:ef7eb2e8f9f7 129 uint32_t vbus_sensing_enable; /*!< Enable or disable the VBUS Sensing feature. */
<> 144:ef7eb2e8f9f7 130
<> 144:ef7eb2e8f9f7 131 uint32_t use_dedicated_ep1; /*!< Enable or disable the use of the dedicated EP1 interrupt. */
<> 144:ef7eb2e8f9f7 132
<> 144:ef7eb2e8f9f7 133 uint32_t use_external_vbus; /*!< Enable or disable the use of the external VBUS. */
<> 144:ef7eb2e8f9f7 134
<> 144:ef7eb2e8f9f7 135 }USB_OTG_CfgTypeDef;
<> 144:ef7eb2e8f9f7 136
<> 144:ef7eb2e8f9f7 137 typedef struct
<> 144:ef7eb2e8f9f7 138 {
<> 144:ef7eb2e8f9f7 139 uint8_t num; /*!< Endpoint number
<> 144:ef7eb2e8f9f7 140 This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
<> 144:ef7eb2e8f9f7 141
<> 144:ef7eb2e8f9f7 142 uint8_t is_in; /*!< Endpoint direction
<> 144:ef7eb2e8f9f7 143 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
<> 144:ef7eb2e8f9f7 144
<> 144:ef7eb2e8f9f7 145 uint8_t is_stall; /*!< Endpoint stall condition
<> 144:ef7eb2e8f9f7 146 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
<> 144:ef7eb2e8f9f7 147
<> 144:ef7eb2e8f9f7 148 uint8_t type; /*!< Endpoint type
<> 144:ef7eb2e8f9f7 149 This parameter can be any value of @ref USB_EP_Type_ */
<> 144:ef7eb2e8f9f7 150
<> 144:ef7eb2e8f9f7 151 uint8_t data_pid_start; /*!< Initial data PID
<> 144:ef7eb2e8f9f7 152 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
<> 144:ef7eb2e8f9f7 153
<> 144:ef7eb2e8f9f7 154 uint8_t even_odd_frame; /*!< IFrame parity
<> 144:ef7eb2e8f9f7 155 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
<> 144:ef7eb2e8f9f7 156
<> 144:ef7eb2e8f9f7 157 uint16_t tx_fifo_num; /*!< Transmission FIFO number
<> 144:ef7eb2e8f9f7 158 This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
<> 144:ef7eb2e8f9f7 159
<> 144:ef7eb2e8f9f7 160 uint32_t maxpacket; /*!< Endpoint Max packet size
<> 144:ef7eb2e8f9f7 161 This parameter must be a number between Min_Data = 0 and Max_Data = 64KB */
<> 144:ef7eb2e8f9f7 162
<> 144:ef7eb2e8f9f7 163 uint8_t *xfer_buff; /*!< Pointer to transfer buffer */
<> 144:ef7eb2e8f9f7 164
<> 144:ef7eb2e8f9f7 165 uint32_t dma_addr; /*!< 32 bits aligned transfer buffer address */
<> 144:ef7eb2e8f9f7 166
<> 144:ef7eb2e8f9f7 167 uint32_t xfer_len; /*!< Current transfer length */
<> 144:ef7eb2e8f9f7 168
<> 144:ef7eb2e8f9f7 169 uint32_t xfer_count; /*!< Partial transfer length in case of multi packet transfer */
<> 144:ef7eb2e8f9f7 170
<> 144:ef7eb2e8f9f7 171 }USB_OTG_EPTypeDef;
<> 144:ef7eb2e8f9f7 172
<> 144:ef7eb2e8f9f7 173 typedef struct
<> 144:ef7eb2e8f9f7 174 {
<> 144:ef7eb2e8f9f7 175 uint8_t dev_addr ; /*!< USB device address.
<> 144:ef7eb2e8f9f7 176 This parameter must be a number between Min_Data = 1 and Max_Data = 255 */
<> 144:ef7eb2e8f9f7 177
<> 144:ef7eb2e8f9f7 178 uint8_t ch_num; /*!< Host channel number.
<> 144:ef7eb2e8f9f7 179 This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
<> 144:ef7eb2e8f9f7 180
<> 144:ef7eb2e8f9f7 181 uint8_t ep_num; /*!< Endpoint number.
<> 144:ef7eb2e8f9f7 182 This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
<> 144:ef7eb2e8f9f7 183
<> 144:ef7eb2e8f9f7 184 uint8_t ep_is_in; /*!< Endpoint direction
<> 144:ef7eb2e8f9f7 185 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
<> 144:ef7eb2e8f9f7 186
<> 144:ef7eb2e8f9f7 187 uint8_t speed; /*!< USB Host speed.
<> 144:ef7eb2e8f9f7 188 This parameter can be any value of @ref USB_Core_Speed_ */
<> 144:ef7eb2e8f9f7 189
<> 144:ef7eb2e8f9f7 190 uint8_t do_ping; /*!< Enable or disable the use of the PING protocol for HS mode. */
<> 144:ef7eb2e8f9f7 191
<> 144:ef7eb2e8f9f7 192 uint8_t process_ping; /*!< Execute the PING protocol for HS mode. */
<> 144:ef7eb2e8f9f7 193
<> 144:ef7eb2e8f9f7 194 uint8_t ep_type; /*!< Endpoint Type.
<> 144:ef7eb2e8f9f7 195 This parameter can be any value of @ref USB_EP_Type_ */
<> 144:ef7eb2e8f9f7 196
<> 144:ef7eb2e8f9f7 197 uint16_t max_packet; /*!< Endpoint Max packet size.
<> 144:ef7eb2e8f9f7 198 This parameter must be a number between Min_Data = 0 and Max_Data = 64KB */
<> 144:ef7eb2e8f9f7 199
<> 144:ef7eb2e8f9f7 200 uint8_t data_pid; /*!< Initial data PID.
<> 144:ef7eb2e8f9f7 201 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
<> 144:ef7eb2e8f9f7 202
<> 144:ef7eb2e8f9f7 203 uint8_t *xfer_buff; /*!< Pointer to transfer buffer. */
<> 144:ef7eb2e8f9f7 204
<> 144:ef7eb2e8f9f7 205 uint32_t xfer_len; /*!< Current transfer length. */
<> 144:ef7eb2e8f9f7 206
<> 144:ef7eb2e8f9f7 207 uint32_t xfer_count; /*!< Partial transfer length in case of multi packet transfer. */
<> 144:ef7eb2e8f9f7 208
<> 144:ef7eb2e8f9f7 209 uint8_t toggle_in; /*!< IN transfer current toggle flag.
<> 144:ef7eb2e8f9f7 210 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
<> 144:ef7eb2e8f9f7 211
<> 144:ef7eb2e8f9f7 212 uint8_t toggle_out; /*!< OUT transfer current toggle flag
<> 144:ef7eb2e8f9f7 213 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
<> 144:ef7eb2e8f9f7 214
<> 144:ef7eb2e8f9f7 215 uint32_t dma_addr; /*!< 32 bits aligned transfer buffer address. */
<> 144:ef7eb2e8f9f7 216
<> 144:ef7eb2e8f9f7 217 uint32_t ErrCnt; /*!< Host channel error count.*/
<> 144:ef7eb2e8f9f7 218
<> 144:ef7eb2e8f9f7 219 USB_OTG_URBStateTypeDef urb_state; /*!< URB state.
<> 144:ef7eb2e8f9f7 220 This parameter can be any value of @ref USB_OTG_URBStateTypeDef */
<> 144:ef7eb2e8f9f7 221
<> 144:ef7eb2e8f9f7 222 USB_OTG_HCStateTypeDef state; /*!< Host Channel state.
<> 144:ef7eb2e8f9f7 223 This parameter can be any value of @ref USB_OTG_HCStateTypeDef */
<> 144:ef7eb2e8f9f7 224
<> 144:ef7eb2e8f9f7 225 }USB_OTG_HCTypeDef;
<> 144:ef7eb2e8f9f7 226
<> 144:ef7eb2e8f9f7 227 /* Exported constants --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 228
<> 144:ef7eb2e8f9f7 229 /** @defgroup PCD_Exported_Constants PCD Exported Constants
<> 144:ef7eb2e8f9f7 230 * @{
<> 144:ef7eb2e8f9f7 231 */
<> 144:ef7eb2e8f9f7 232
<> 144:ef7eb2e8f9f7 233 /** @defgroup USB_Core_Mode_ USB Core Mode
<> 144:ef7eb2e8f9f7 234 * @{
<> 144:ef7eb2e8f9f7 235 */
<> 144:ef7eb2e8f9f7 236 #define USB_OTG_MODE_DEVICE 0U
<> 144:ef7eb2e8f9f7 237 #define USB_OTG_MODE_HOST 1U
<> 144:ef7eb2e8f9f7 238 #define USB_OTG_MODE_DRD 2U
<> 144:ef7eb2e8f9f7 239 /**
<> 144:ef7eb2e8f9f7 240 * @}
<> 144:ef7eb2e8f9f7 241 */
<> 144:ef7eb2e8f9f7 242
<> 144:ef7eb2e8f9f7 243 /** @defgroup USB_Core_Speed_ USB Core Speed
<> 144:ef7eb2e8f9f7 244 * @{
<> 144:ef7eb2e8f9f7 245 */
<> 144:ef7eb2e8f9f7 246 #define USB_OTG_SPEED_HIGH 0U
<> 144:ef7eb2e8f9f7 247 #define USB_OTG_SPEED_HIGH_IN_FULL 1U
<> 144:ef7eb2e8f9f7 248 #define USB_OTG_SPEED_LOW 2U
<> 144:ef7eb2e8f9f7 249 #define USB_OTG_SPEED_FULL 3U
<> 144:ef7eb2e8f9f7 250 /**
<> 144:ef7eb2e8f9f7 251 * @}
<> 144:ef7eb2e8f9f7 252 */
<> 144:ef7eb2e8f9f7 253
<> 144:ef7eb2e8f9f7 254 /** @defgroup USB_Core_PHY_ USB Core PHY
<> 144:ef7eb2e8f9f7 255 * @{
<> 144:ef7eb2e8f9f7 256 */
<> 144:ef7eb2e8f9f7 257 #define USB_OTG_ULPI_PHY 1U
<> 144:ef7eb2e8f9f7 258 #define USB_OTG_EMBEDDED_PHY 2U
<> 144:ef7eb2e8f9f7 259 /**
<> 144:ef7eb2e8f9f7 260 * @}
<> 144:ef7eb2e8f9f7 261 */
<> 144:ef7eb2e8f9f7 262
<> 144:ef7eb2e8f9f7 263 /** @defgroup USB_Core_MPS_ USB Core MPS
<> 144:ef7eb2e8f9f7 264 * @{
<> 144:ef7eb2e8f9f7 265 */
<> 144:ef7eb2e8f9f7 266 #define USB_OTG_HS_MAX_PACKET_SIZE 512U
<> 144:ef7eb2e8f9f7 267 #define USB_OTG_FS_MAX_PACKET_SIZE 64U
<> 144:ef7eb2e8f9f7 268 #define USB_OTG_MAX_EP0_SIZE 64U
<> 144:ef7eb2e8f9f7 269 /**
<> 144:ef7eb2e8f9f7 270 * @}
<> 144:ef7eb2e8f9f7 271 */
<> 144:ef7eb2e8f9f7 272
<> 144:ef7eb2e8f9f7 273 /** @defgroup USB_Core_Phy_Frequency_ USB Core Phy Frequency
<> 144:ef7eb2e8f9f7 274 * @{
<> 144:ef7eb2e8f9f7 275 */
<> 144:ef7eb2e8f9f7 276 #define DSTS_ENUMSPD_HS_PHY_30MHZ_OR_60MHZ (0 << 1)
<> 144:ef7eb2e8f9f7 277 #define DSTS_ENUMSPD_FS_PHY_30MHZ_OR_60MHZ (1 << 1)
<> 144:ef7eb2e8f9f7 278 #define DSTS_ENUMSPD_LS_PHY_6MHZ (2 << 1)
<> 144:ef7eb2e8f9f7 279 #define DSTS_ENUMSPD_FS_PHY_48MHZ (3 << 1)
<> 144:ef7eb2e8f9f7 280 /**
<> 144:ef7eb2e8f9f7 281 * @}
<> 144:ef7eb2e8f9f7 282 */
<> 144:ef7eb2e8f9f7 283
<> 144:ef7eb2e8f9f7 284 /** @defgroup USB_CORE_Frame_Interval_ USB CORE Frame Interval
<> 144:ef7eb2e8f9f7 285 * @{
<> 144:ef7eb2e8f9f7 286 */
<> 144:ef7eb2e8f9f7 287 #define DCFG_FRAME_INTERVAL_80 0U
<> 144:ef7eb2e8f9f7 288 #define DCFG_FRAME_INTERVAL_85 1U
<> 144:ef7eb2e8f9f7 289 #define DCFG_FRAME_INTERVAL_90 2U
<> 144:ef7eb2e8f9f7 290 #define DCFG_FRAME_INTERVAL_95 3U
<> 144:ef7eb2e8f9f7 291 /**
<> 144:ef7eb2e8f9f7 292 * @}
<> 144:ef7eb2e8f9f7 293 */
<> 144:ef7eb2e8f9f7 294
<> 144:ef7eb2e8f9f7 295 /** @defgroup USB_EP0_MPS_ USB EP0 MPS
<> 144:ef7eb2e8f9f7 296 * @{
<> 144:ef7eb2e8f9f7 297 */
<> 144:ef7eb2e8f9f7 298 #define DEP0CTL_MPS_64 0U
<> 144:ef7eb2e8f9f7 299 #define DEP0CTL_MPS_32 1U
<> 144:ef7eb2e8f9f7 300 #define DEP0CTL_MPS_16 2U
<> 144:ef7eb2e8f9f7 301 #define DEP0CTL_MPS_8 3U
<> 144:ef7eb2e8f9f7 302 /**
<> 144:ef7eb2e8f9f7 303 * @}
<> 144:ef7eb2e8f9f7 304 */
<> 144:ef7eb2e8f9f7 305
<> 144:ef7eb2e8f9f7 306 /** @defgroup USB_EP_Speed_ USB EP Speed
<> 144:ef7eb2e8f9f7 307 * @{
<> 144:ef7eb2e8f9f7 308 */
<> 144:ef7eb2e8f9f7 309 #define EP_SPEED_LOW 0U
<> 144:ef7eb2e8f9f7 310 #define EP_SPEED_FULL 1U
<> 144:ef7eb2e8f9f7 311 #define EP_SPEED_HIGH 2U
<> 144:ef7eb2e8f9f7 312 /**
<> 144:ef7eb2e8f9f7 313 * @}
<> 144:ef7eb2e8f9f7 314 */
<> 144:ef7eb2e8f9f7 315
<> 144:ef7eb2e8f9f7 316 /** @defgroup USB_EP_Type_ USB EP Type
<> 144:ef7eb2e8f9f7 317 * @{
<> 144:ef7eb2e8f9f7 318 */
<> 144:ef7eb2e8f9f7 319 #define EP_TYPE_CTRL 0U
<> 144:ef7eb2e8f9f7 320 #define EP_TYPE_ISOC 1U
<> 144:ef7eb2e8f9f7 321 #define EP_TYPE_BULK 2U
<> 144:ef7eb2e8f9f7 322 #define EP_TYPE_INTR 3U
<> 144:ef7eb2e8f9f7 323 #define EP_TYPE_MSK 3U
<> 144:ef7eb2e8f9f7 324 /**
<> 144:ef7eb2e8f9f7 325 * @}
<> 144:ef7eb2e8f9f7 326 */
<> 144:ef7eb2e8f9f7 327
<> 144:ef7eb2e8f9f7 328 /** @defgroup USB_STS_Defines_ USB STS Defines
<> 144:ef7eb2e8f9f7 329 * @{
<> 144:ef7eb2e8f9f7 330 */
<> 144:ef7eb2e8f9f7 331 #define STS_GOUT_NAK 1U
<> 144:ef7eb2e8f9f7 332 #define STS_DATA_UPDT 2U
<> 144:ef7eb2e8f9f7 333 #define STS_XFER_COMP 3U
<> 144:ef7eb2e8f9f7 334 #define STS_SETUP_COMP 4U
<> 144:ef7eb2e8f9f7 335 #define STS_SETUP_UPDT 6U
<> 144:ef7eb2e8f9f7 336 /**
<> 144:ef7eb2e8f9f7 337 * @}
<> 144:ef7eb2e8f9f7 338 */
<> 144:ef7eb2e8f9f7 339
<> 144:ef7eb2e8f9f7 340 /** @defgroup HCFG_SPEED_Defines_ HCFG SPEED Defines
<> 144:ef7eb2e8f9f7 341 * @{
<> 144:ef7eb2e8f9f7 342 */
<> 144:ef7eb2e8f9f7 343 #define HCFG_30_60_MHZ 0U
<> 144:ef7eb2e8f9f7 344 #define HCFG_48_MHZ 1U
<> 144:ef7eb2e8f9f7 345 #define HCFG_6_MHZ 2U
<> 144:ef7eb2e8f9f7 346 /**
<> 144:ef7eb2e8f9f7 347 * @}
<> 144:ef7eb2e8f9f7 348 */
<> 144:ef7eb2e8f9f7 349
<> 144:ef7eb2e8f9f7 350 /** @defgroup HPRT0_PRTSPD_SPEED_Defines_ HPRT0 PRTSPD SPEED Defines
<> 144:ef7eb2e8f9f7 351 * @{
<> 144:ef7eb2e8f9f7 352 */
<> 144:ef7eb2e8f9f7 353 #define HPRT0_PRTSPD_HIGH_SPEED 0U
<> 144:ef7eb2e8f9f7 354 #define HPRT0_PRTSPD_FULL_SPEED 1U
<> 144:ef7eb2e8f9f7 355 #define HPRT0_PRTSPD_LOW_SPEED 2U
<> 144:ef7eb2e8f9f7 356 /**
<> 144:ef7eb2e8f9f7 357 * @}
<> 144:ef7eb2e8f9f7 358 */
<> 144:ef7eb2e8f9f7 359
<> 144:ef7eb2e8f9f7 360 #define HCCHAR_CTRL 0U
<> 144:ef7eb2e8f9f7 361 #define HCCHAR_ISOC 1U
<> 144:ef7eb2e8f9f7 362 #define HCCHAR_BULK 2U
<> 144:ef7eb2e8f9f7 363 #define HCCHAR_INTR 3U
<> 144:ef7eb2e8f9f7 364
<> 144:ef7eb2e8f9f7 365 #define HC_PID_DATA0 0U
<> 144:ef7eb2e8f9f7 366 #define HC_PID_DATA2 1U
<> 144:ef7eb2e8f9f7 367 #define HC_PID_DATA1 2U
<> 144:ef7eb2e8f9f7 368 #define HC_PID_SETUP 3U
<> 144:ef7eb2e8f9f7 369
<> 144:ef7eb2e8f9f7 370 #define GRXSTS_PKTSTS_IN 2U
<> 144:ef7eb2e8f9f7 371 #define GRXSTS_PKTSTS_IN_XFER_COMP 3U
<> 144:ef7eb2e8f9f7 372 #define GRXSTS_PKTSTS_DATA_TOGGLE_ERR 5U
<> 144:ef7eb2e8f9f7 373 #define GRXSTS_PKTSTS_CH_HALTED 7U
<> 144:ef7eb2e8f9f7 374
<> 144:ef7eb2e8f9f7 375 #define USBx_PCGCCTL *(__IO uint32_t *)((uint32_t)USBx + USB_OTG_PCGCCTL_BASE)
<> 144:ef7eb2e8f9f7 376 #define USBx_HPRT0 *(__IO uint32_t *)((uint32_t)USBx + USB_OTG_HOST_PORT_BASE)
<> 144:ef7eb2e8f9f7 377
<> 144:ef7eb2e8f9f7 378 #define USBx_DEVICE ((USB_OTG_DeviceTypeDef *)((uint32_t )USBx + USB_OTG_DEVICE_BASE))
<> 144:ef7eb2e8f9f7 379 #define USBx_INEP(i) ((USB_OTG_INEndpointTypeDef *)((uint32_t)USBx + USB_OTG_IN_ENDPOINT_BASE + (i)*USB_OTG_EP_REG_SIZE))
<> 144:ef7eb2e8f9f7 380 #define USBx_OUTEP(i) ((USB_OTG_OUTEndpointTypeDef *)((uint32_t)USBx + USB_OTG_OUT_ENDPOINT_BASE + (i)*USB_OTG_EP_REG_SIZE))
<> 144:ef7eb2e8f9f7 381 #define USBx_DFIFO(i) *(__IO uint32_t *)((uint32_t)USBx + USB_OTG_FIFO_BASE + (i) * USB_OTG_FIFO_SIZE)
<> 144:ef7eb2e8f9f7 382
<> 144:ef7eb2e8f9f7 383 #define USBx_HOST ((USB_OTG_HostTypeDef *)((uint32_t )USBx + USB_OTG_HOST_BASE))
<> 144:ef7eb2e8f9f7 384 #define USBx_HC(i) ((USB_OTG_HostChannelTypeDef *)((uint32_t)USBx + USB_OTG_HOST_CHANNEL_BASE + (i)*USB_OTG_HOST_CHANNEL_SIZE))
<> 144:ef7eb2e8f9f7 385 /**
<> 144:ef7eb2e8f9f7 386 * @}
<> 144:ef7eb2e8f9f7 387 */
<> 144:ef7eb2e8f9f7 388 /* Exported macro ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 389 #define USB_MASK_INTERRUPT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->GINTMSK &= ~(__INTERRUPT__))
<> 144:ef7eb2e8f9f7 390 #define USB_UNMASK_INTERRUPT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->GINTMSK |= (__INTERRUPT__))
<> 144:ef7eb2e8f9f7 391
<> 144:ef7eb2e8f9f7 392 #define CLEAR_IN_EP_INTR(__EPNUM__, __INTERRUPT__) (USBx_INEP(__EPNUM__)->DIEPINT = (__INTERRUPT__))
<> 144:ef7eb2e8f9f7 393 #define CLEAR_OUT_EP_INTR(__EPNUM__, __INTERRUPT__) (USBx_OUTEP(__EPNUM__)->DOEPINT = (__INTERRUPT__))
<> 144:ef7eb2e8f9f7 394
<> 144:ef7eb2e8f9f7 395 /* Exported functions --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 396 HAL_StatusTypeDef USB_CoreInit(USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef Init);
<> 144:ef7eb2e8f9f7 397 HAL_StatusTypeDef USB_DevInit(USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef Init);
<> 144:ef7eb2e8f9f7 398 HAL_StatusTypeDef USB_EnableGlobalInt(USB_OTG_GlobalTypeDef *USBx);
<> 144:ef7eb2e8f9f7 399 HAL_StatusTypeDef USB_DisableGlobalInt(USB_OTG_GlobalTypeDef *USBx);
<> 144:ef7eb2e8f9f7 400 HAL_StatusTypeDef USB_SetCurrentMode(USB_OTG_GlobalTypeDef *USBx , USB_OTG_ModeTypeDef mode);
<> 144:ef7eb2e8f9f7 401 HAL_StatusTypeDef USB_SetDevSpeed(USB_OTG_GlobalTypeDef *USBx , uint8_t speed);
<> 144:ef7eb2e8f9f7 402 HAL_StatusTypeDef USB_FlushRxFifo (USB_OTG_GlobalTypeDef *USBx);
<> 144:ef7eb2e8f9f7 403 HAL_StatusTypeDef USB_FlushTxFifo (USB_OTG_GlobalTypeDef *USBx, uint32_t num );
<> 144:ef7eb2e8f9f7 404 HAL_StatusTypeDef USB_ActivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep);
<> 144:ef7eb2e8f9f7 405 HAL_StatusTypeDef USB_DeactivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep);
<> 144:ef7eb2e8f9f7 406 HAL_StatusTypeDef USB_ActivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep);
<> 144:ef7eb2e8f9f7 407 HAL_StatusTypeDef USB_DeactivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep);
<> 144:ef7eb2e8f9f7 408 HAL_StatusTypeDef USB_EPStartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep, uint8_t dma);
<> 144:ef7eb2e8f9f7 409 HAL_StatusTypeDef USB_EP0StartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep, uint8_t dma);
<> 144:ef7eb2e8f9f7 410 HAL_StatusTypeDef USB_WritePacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *src, uint8_t ch_ep_num, uint16_t len, uint8_t dma);
<> 144:ef7eb2e8f9f7 411 void * USB_ReadPacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *dest, uint16_t len);
<> 144:ef7eb2e8f9f7 412 HAL_StatusTypeDef USB_EPSetStall(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep);
<> 144:ef7eb2e8f9f7 413 HAL_StatusTypeDef USB_EPClearStall(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep);
<> 144:ef7eb2e8f9f7 414 HAL_StatusTypeDef USB_SetDevAddress (USB_OTG_GlobalTypeDef *USBx, uint8_t address);
<> 144:ef7eb2e8f9f7 415 HAL_StatusTypeDef USB_DevConnect (USB_OTG_GlobalTypeDef *USBx);
<> 144:ef7eb2e8f9f7 416 HAL_StatusTypeDef USB_DevDisconnect (USB_OTG_GlobalTypeDef *USBx);
<> 144:ef7eb2e8f9f7 417 HAL_StatusTypeDef USB_StopDevice(USB_OTG_GlobalTypeDef *USBx);
<> 144:ef7eb2e8f9f7 418 HAL_StatusTypeDef USB_ActivateSetup (USB_OTG_GlobalTypeDef *USBx);
<> 144:ef7eb2e8f9f7 419 HAL_StatusTypeDef USB_EP0_OutStart(USB_OTG_GlobalTypeDef *USBx, uint8_t dma, uint8_t *psetup);
<> 144:ef7eb2e8f9f7 420 uint8_t USB_GetDevSpeed(USB_OTG_GlobalTypeDef *USBx);
<> 144:ef7eb2e8f9f7 421 uint32_t USB_GetMode(USB_OTG_GlobalTypeDef *USBx);
<> 144:ef7eb2e8f9f7 422 uint32_t USB_ReadInterrupts (USB_OTG_GlobalTypeDef *USBx);
<> 144:ef7eb2e8f9f7 423 uint32_t USB_ReadDevAllOutEpInterrupt (USB_OTG_GlobalTypeDef *USBx);
<> 144:ef7eb2e8f9f7 424 uint32_t USB_ReadDevOutEPInterrupt (USB_OTG_GlobalTypeDef *USBx , uint8_t epnum);
<> 144:ef7eb2e8f9f7 425 uint32_t USB_ReadDevAllInEpInterrupt (USB_OTG_GlobalTypeDef *USBx);
<> 144:ef7eb2e8f9f7 426 uint32_t USB_ReadDevInEPInterrupt (USB_OTG_GlobalTypeDef *USBx , uint8_t epnum);
<> 144:ef7eb2e8f9f7 427 void USB_ClearInterrupts (USB_OTG_GlobalTypeDef *USBx, uint32_t interrupt);
<> 144:ef7eb2e8f9f7 428
<> 144:ef7eb2e8f9f7 429 HAL_StatusTypeDef USB_HostInit (USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef cfg);
<> 144:ef7eb2e8f9f7 430 HAL_StatusTypeDef USB_InitFSLSPClkSel(USB_OTG_GlobalTypeDef *USBx , uint8_t freq);
<> 144:ef7eb2e8f9f7 431 HAL_StatusTypeDef USB_ResetPort(USB_OTG_GlobalTypeDef *USBx);
<> 144:ef7eb2e8f9f7 432 HAL_StatusTypeDef USB_DriveVbus (USB_OTG_GlobalTypeDef *USBx, uint8_t state);
<> 144:ef7eb2e8f9f7 433 uint32_t USB_GetHostSpeed (USB_OTG_GlobalTypeDef *USBx);
<> 144:ef7eb2e8f9f7 434 uint32_t USB_GetCurrentFrame (USB_OTG_GlobalTypeDef *USBx);
<> 144:ef7eb2e8f9f7 435 HAL_StatusTypeDef USB_HC_Init(USB_OTG_GlobalTypeDef *USBx,
<> 144:ef7eb2e8f9f7 436 uint8_t ch_num,
<> 144:ef7eb2e8f9f7 437 uint8_t epnum,
<> 144:ef7eb2e8f9f7 438 uint8_t dev_address,
<> 144:ef7eb2e8f9f7 439 uint8_t speed,
<> 144:ef7eb2e8f9f7 440 uint8_t ep_type,
<> 144:ef7eb2e8f9f7 441 uint16_t mps);
<> 144:ef7eb2e8f9f7 442 HAL_StatusTypeDef USB_HC_StartXfer(USB_OTG_GlobalTypeDef *USBx, USB_OTG_HCTypeDef *hc, uint8_t dma);
<> 144:ef7eb2e8f9f7 443 uint32_t USB_HC_ReadInterrupt (USB_OTG_GlobalTypeDef *USBx);
<> 144:ef7eb2e8f9f7 444 HAL_StatusTypeDef USB_HC_Halt(USB_OTG_GlobalTypeDef *USBx , uint8_t hc_num);
<> 144:ef7eb2e8f9f7 445 HAL_StatusTypeDef USB_DoPing(USB_OTG_GlobalTypeDef *USBx , uint8_t ch_num);
<> 144:ef7eb2e8f9f7 446 HAL_StatusTypeDef USB_StopHost(USB_OTG_GlobalTypeDef *USBx);
<> 144:ef7eb2e8f9f7 447
<> 144:ef7eb2e8f9f7 448 /**
<> 144:ef7eb2e8f9f7 449 * @}
<> 144:ef7eb2e8f9f7 450 */
<> 144:ef7eb2e8f9f7 451
<> 144:ef7eb2e8f9f7 452 /**
<> 144:ef7eb2e8f9f7 453 * @}
<> 144:ef7eb2e8f9f7 454 */
<> 144:ef7eb2e8f9f7 455
<> 144:ef7eb2e8f9f7 456 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 457 }
<> 144:ef7eb2e8f9f7 458 #endif
<> 144:ef7eb2e8f9f7 459
<> 144:ef7eb2e8f9f7 460
<> 144:ef7eb2e8f9f7 461 #endif /* __STM32F7xx_LL_USB_H */
<> 144:ef7eb2e8f9f7 462
<> 144:ef7eb2e8f9f7 463 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/