Johannes Stratmann / mbed-dev

added prescaler for 16 bit pwm in LPC1347 target

Fork of mbed-dev by mbed official

targets/cmsis/TARGET_STM/TARGET_STM32F7/stm32f7xx_hal_usart.h@147:ba84b7dc41a7, 2016-09-10 (annotated)

Committer:
JojoS
Date:
Sat Sep 10 15:32:04 2016 +0000
Revision:
147:ba84b7dc41a7
Parent:
144:ef7eb2e8f9f7 
added prescaler for 16 bit timers (solution as in LPC11xx), default prescaler 31 for max 28 ms period time

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file stm32f7xx_hal_usart.h
<> 144:ef7eb2e8f9f7 4 * @author MCD Application Team
<> 144:ef7eb2e8f9f7 5 * @version V1.1.0
<> 144:ef7eb2e8f9f7 6 * @date 22-April-2016
<> 144:ef7eb2e8f9f7 7 * @brief Header file of USART HAL module.
<> 144:ef7eb2e8f9f7 8 ******************************************************************************
<> 144:ef7eb2e8f9f7 9 * @attention
<> 144:ef7eb2e8f9f7 10 *
<> 144:ef7eb2e8f9f7 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 144:ef7eb2e8f9f7 12 *
<> 144:ef7eb2e8f9f7 13 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 14 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 15 * 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 16 * this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 18 * this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 19 * and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 21 * may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 22 * without specific prior written permission.
<> 144:ef7eb2e8f9f7 23 *
<> 144:ef7eb2e8f9f7 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 34 *
<> 144:ef7eb2e8f9f7 35 ******************************************************************************
<> 144:ef7eb2e8f9f7 36 */
<> 144:ef7eb2e8f9f7 37
<> 144:ef7eb2e8f9f7 38 /* Define to prevent recursive inclusion -------------------------------------*/
<> 144:ef7eb2e8f9f7 39 #ifndef __STM32F7xx_HAL_USART_H
<> 144:ef7eb2e8f9f7 40 #define __STM32F7xx_HAL_USART_H
<> 144:ef7eb2e8f9f7 41
<> 144:ef7eb2e8f9f7 42 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 43 extern "C" {
<> 144:ef7eb2e8f9f7 44 #endif
<> 144:ef7eb2e8f9f7 45
<> 144:ef7eb2e8f9f7 46 /* Includes ------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 47 #include "stm32f7xx_hal_def.h"
<> 144:ef7eb2e8f9f7 48
<> 144:ef7eb2e8f9f7 49 /** @addtogroup STM32F7xx_HAL_Driver
<> 144:ef7eb2e8f9f7 50 * @{
<> 144:ef7eb2e8f9f7 51 */
<> 144:ef7eb2e8f9f7 52
<> 144:ef7eb2e8f9f7 53 /** @addtogroup USART
<> 144:ef7eb2e8f9f7 54 * @{
<> 144:ef7eb2e8f9f7 55 */
<> 144:ef7eb2e8f9f7 56
<> 144:ef7eb2e8f9f7 57 /* Exported types ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 58 /** @defgroup USART_Exported_Types USART Exported Types
<> 144:ef7eb2e8f9f7 59 * @{
<> 144:ef7eb2e8f9f7 60 */
<> 144:ef7eb2e8f9f7 61
<> 144:ef7eb2e8f9f7 62 /**
<> 144:ef7eb2e8f9f7 63 * @brief USART Init Structure definition
<> 144:ef7eb2e8f9f7 64 */
<> 144:ef7eb2e8f9f7 65 typedef struct
<> 144:ef7eb2e8f9f7 66 {
<> 144:ef7eb2e8f9f7 67 uint32_t BaudRate; /*!< This member configures the Usart communication baud rate.
<> 144:ef7eb2e8f9f7 68 The baud rate is computed using the following formula:
<> 144:ef7eb2e8f9f7 69 Baud Rate Register = ((PCLKx) / ((huart->Init.BaudRate))) */
<> 144:ef7eb2e8f9f7 70
<> 144:ef7eb2e8f9f7 71 uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame.
<> 144:ef7eb2e8f9f7 72 This parameter can be a value of @ref USARTEx_Word_Length */
<> 144:ef7eb2e8f9f7 73
<> 144:ef7eb2e8f9f7 74 uint32_t StopBits; /*!< Specifies the number of stop bits transmitted.
<> 144:ef7eb2e8f9f7 75 This parameter can be a value of @ref USART_Stop_Bits */
<> 144:ef7eb2e8f9f7 76
<> 144:ef7eb2e8f9f7 77 uint32_t Parity; /*!< Specifies the parity mode.
<> 144:ef7eb2e8f9f7 78 This parameter can be a value of @ref USART_Parity
<> 144:ef7eb2e8f9f7 79 @note When parity is enabled, the computed parity is inserted
<> 144:ef7eb2e8f9f7 80 at the MSB position of the transmitted data (9th bit when
<> 144:ef7eb2e8f9f7 81 the word length is set to 9 data bits; 8th bit when the
<> 144:ef7eb2e8f9f7 82 word length is set to 8 data bits). */
<> 144:ef7eb2e8f9f7 83
<> 144:ef7eb2e8f9f7 84 uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled.
<> 144:ef7eb2e8f9f7 85 This parameter can be a value of @ref USART_Mode */
<> 144:ef7eb2e8f9f7 86
<> 144:ef7eb2e8f9f7 87 uint32_t OverSampling; /*!< Specifies whether the Over sampling 8 is enabled or disabled, to achieve higher speed (up to fPCLK/8).
<> 144:ef7eb2e8f9f7 88 This parameter can be a value of @ref USART_Over_Sampling */
<> 144:ef7eb2e8f9f7 89
<> 144:ef7eb2e8f9f7 90 uint32_t CLKPolarity; /*!< Specifies the steady state of the serial clock.
<> 144:ef7eb2e8f9f7 91 This parameter can be a value of @ref USART_Clock_Polarity */
<> 144:ef7eb2e8f9f7 92
<> 144:ef7eb2e8f9f7 93 uint32_t CLKPhase; /*!< Specifies the clock transition on which the bit capture is made.
<> 144:ef7eb2e8f9f7 94 This parameter can be a value of @ref USART_Clock_Phase */
<> 144:ef7eb2e8f9f7 95
<> 144:ef7eb2e8f9f7 96 uint32_t CLKLastBit; /*!< Specifies whether the clock pulse corresponding to the last transmitted
<> 144:ef7eb2e8f9f7 97 data bit (MSB) has to be output on the SCLK pin in synchronous mode.
<> 144:ef7eb2e8f9f7 98 This parameter can be a value of @ref USART_Last_Bit */
<> 144:ef7eb2e8f9f7 99 }USART_InitTypeDef;
<> 144:ef7eb2e8f9f7 100
<> 144:ef7eb2e8f9f7 101 /**
<> 144:ef7eb2e8f9f7 102 * @brief HAL USART State structures definition
<> 144:ef7eb2e8f9f7 103 */
<> 144:ef7eb2e8f9f7 104 typedef enum
<> 144:ef7eb2e8f9f7 105 {
<> 144:ef7eb2e8f9f7 106 HAL_USART_STATE_RESET = 0x00U, /*!< Peripheral is not initialized */
<> 144:ef7eb2e8f9f7 107 HAL_USART_STATE_READY = 0x01U, /*!< Peripheral Initialized and ready for use */
<> 144:ef7eb2e8f9f7 108 HAL_USART_STATE_BUSY = 0x02U, /*!< an internal process is ongoing */
<> 144:ef7eb2e8f9f7 109 HAL_USART_STATE_BUSY_TX = 0x12U, /*!< Data Transmission process is ongoing */
<> 144:ef7eb2e8f9f7 110 HAL_USART_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing */
<> 144:ef7eb2e8f9f7 111 HAL_USART_STATE_BUSY_TX_RX = 0x32U, /*!< Data Transmission Reception process is ongoing */
<> 144:ef7eb2e8f9f7 112 HAL_USART_STATE_TIMEOUT = 0x03U, /*!< Timeout state */
<> 144:ef7eb2e8f9f7 113 HAL_USART_STATE_ERROR = 0x04U /*!< Error */
<> 144:ef7eb2e8f9f7 114 }HAL_USART_StateTypeDef;
<> 144:ef7eb2e8f9f7 115
<> 144:ef7eb2e8f9f7 116
<> 144:ef7eb2e8f9f7 117 /**
<> 144:ef7eb2e8f9f7 118 * @brief USART clock sources definitions
<> 144:ef7eb2e8f9f7 119 */
<> 144:ef7eb2e8f9f7 120 typedef enum
<> 144:ef7eb2e8f9f7 121 {
<> 144:ef7eb2e8f9f7 122 USART_CLOCKSOURCE_PCLK1 = 0x00U, /*!< PCLK1 clock source */
<> 144:ef7eb2e8f9f7 123 USART_CLOCKSOURCE_PCLK2 = 0x01U, /*!< PCLK2 clock source */
<> 144:ef7eb2e8f9f7 124 USART_CLOCKSOURCE_HSI = 0x02U, /*!< HSI clock source */
<> 144:ef7eb2e8f9f7 125 USART_CLOCKSOURCE_SYSCLK = 0x04U, /*!< SYSCLK clock source */
<> 144:ef7eb2e8f9f7 126 USART_CLOCKSOURCE_LSE = 0x08U, /*!< LSE clock source */
<> 144:ef7eb2e8f9f7 127 USART_CLOCKSOURCE_UNDEFINED = 0x10U /*!< Undefined clock source */
<> 144:ef7eb2e8f9f7 128 }USART_ClockSourceTypeDef;
<> 144:ef7eb2e8f9f7 129
<> 144:ef7eb2e8f9f7 130
<> 144:ef7eb2e8f9f7 131 /**
<> 144:ef7eb2e8f9f7 132 * @brief USART handle Structure definition
<> 144:ef7eb2e8f9f7 133 */
<> 144:ef7eb2e8f9f7 134 typedef struct
<> 144:ef7eb2e8f9f7 135 {
<> 144:ef7eb2e8f9f7 136 USART_TypeDef *Instance; /*!< USART registers base address */
<> 144:ef7eb2e8f9f7 137
<> 144:ef7eb2e8f9f7 138 USART_InitTypeDef Init; /*!< USART communication parameters */
<> 144:ef7eb2e8f9f7 139
<> 144:ef7eb2e8f9f7 140 uint8_t *pTxBuffPtr; /*!< Pointer to USART Tx transfer Buffer */
<> 144:ef7eb2e8f9f7 141
<> 144:ef7eb2e8f9f7 142 uint16_t TxXferSize; /*!< USART Tx Transfer size */
<> 144:ef7eb2e8f9f7 143
<> 144:ef7eb2e8f9f7 144 uint16_t TxXferCount; /*!< USART Tx Transfer Counter */
<> 144:ef7eb2e8f9f7 145
<> 144:ef7eb2e8f9f7 146 uint8_t *pRxBuffPtr; /*!< Pointer to USART Rx transfer Buffer */
<> 144:ef7eb2e8f9f7 147
<> 144:ef7eb2e8f9f7 148 uint16_t RxXferSize; /*!< USART Rx Transfer size */
<> 144:ef7eb2e8f9f7 149
<> 144:ef7eb2e8f9f7 150 uint16_t RxXferCount; /*!< USART Rx Transfer Counter */
<> 144:ef7eb2e8f9f7 151
<> 144:ef7eb2e8f9f7 152 uint16_t Mask; /*!< USART Rx RDR register mask */
<> 144:ef7eb2e8f9f7 153
<> 144:ef7eb2e8f9f7 154 DMA_HandleTypeDef *hdmatx; /*!< USART Tx DMA Handle parameters */
<> 144:ef7eb2e8f9f7 155
<> 144:ef7eb2e8f9f7 156 DMA_HandleTypeDef *hdmarx; /*!< USART Rx DMA Handle parameters */
<> 144:ef7eb2e8f9f7 157
<> 144:ef7eb2e8f9f7 158 HAL_LockTypeDef Lock; /*!< Locking object */
<> 144:ef7eb2e8f9f7 159
<> 144:ef7eb2e8f9f7 160 HAL_USART_StateTypeDef State; /*!< USART communication state */
<> 144:ef7eb2e8f9f7 161
<> 144:ef7eb2e8f9f7 162 __IO uint32_t ErrorCode; /*!< USART Error code */
<> 144:ef7eb2e8f9f7 163
<> 144:ef7eb2e8f9f7 164 }USART_HandleTypeDef;
<> 144:ef7eb2e8f9f7 165 /**
<> 144:ef7eb2e8f9f7 166 * @}
<> 144:ef7eb2e8f9f7 167 */
<> 144:ef7eb2e8f9f7 168
<> 144:ef7eb2e8f9f7 169 /* Exported constants --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 170 /** @defgroup USART_Exported_Constants USART Exported Constants
<> 144:ef7eb2e8f9f7 171 * @{
<> 144:ef7eb2e8f9f7 172 */
<> 144:ef7eb2e8f9f7 173
<> 144:ef7eb2e8f9f7 174 /** @defgroup USART_Error_Code USART Error Code
<> 144:ef7eb2e8f9f7 175 * @brief USART Error Code
<> 144:ef7eb2e8f9f7 176 * @{
<> 144:ef7eb2e8f9f7 177 */
<> 144:ef7eb2e8f9f7 178 #define HAL_USART_ERROR_NONE ((uint32_t)0x00000000U) /*!< No error */
<> 144:ef7eb2e8f9f7 179 #define HAL_USART_ERROR_PE ((uint32_t)0x00000001U) /*!< Parity error */
<> 144:ef7eb2e8f9f7 180 #define HAL_USART_ERROR_NE ((uint32_t)0x00000002U) /*!< Noise error */
<> 144:ef7eb2e8f9f7 181 #define HAL_USART_ERROR_FE ((uint32_t)0x00000004U) /*!< Frame error */
<> 144:ef7eb2e8f9f7 182 #define HAL_USART_ERROR_ORE ((uint32_t)0x00000008U) /*!< Overrun error */
<> 144:ef7eb2e8f9f7 183 #define HAL_USART_ERROR_DMA ((uint32_t)0x00000010U) /*!< DMA transfer error */
<> 144:ef7eb2e8f9f7 184 /**
<> 144:ef7eb2e8f9f7 185 * @}
<> 144:ef7eb2e8f9f7 186 */
<> 144:ef7eb2e8f9f7 187
<> 144:ef7eb2e8f9f7 188 /** @defgroup USART_Stop_Bits USART Number of Stop Bits
<> 144:ef7eb2e8f9f7 189 * @{
<> 144:ef7eb2e8f9f7 190 */
<> 144:ef7eb2e8f9f7 191 #define USART_STOPBITS_1 ((uint32_t)0x0000U)
<> 144:ef7eb2e8f9f7 192 #define USART_STOPBITS_2 ((uint32_t)USART_CR2_STOP_1)
<> 144:ef7eb2e8f9f7 193 #define USART_STOPBITS_1_5 ((uint32_t)(USART_CR2_STOP_0 | USART_CR2_STOP_1))
<> 144:ef7eb2e8f9f7 194 /**
<> 144:ef7eb2e8f9f7 195 * @}
<> 144:ef7eb2e8f9f7 196 */
<> 144:ef7eb2e8f9f7 197
<> 144:ef7eb2e8f9f7 198 /** @defgroup USART_Parity USART Parity
<> 144:ef7eb2e8f9f7 199 * @{
<> 144:ef7eb2e8f9f7 200 */
<> 144:ef7eb2e8f9f7 201 #define USART_PARITY_NONE ((uint32_t)0x0000U)
<> 144:ef7eb2e8f9f7 202 #define USART_PARITY_EVEN ((uint32_t)USART_CR1_PCE)
<> 144:ef7eb2e8f9f7 203 #define USART_PARITY_ODD ((uint32_t)(USART_CR1_PCE | USART_CR1_PS))
<> 144:ef7eb2e8f9f7 204 /**
<> 144:ef7eb2e8f9f7 205 * @}
<> 144:ef7eb2e8f9f7 206 */
<> 144:ef7eb2e8f9f7 207
<> 144:ef7eb2e8f9f7 208 /** @defgroup USART_Mode USART Mode
<> 144:ef7eb2e8f9f7 209 * @{
<> 144:ef7eb2e8f9f7 210 */
<> 144:ef7eb2e8f9f7 211 #define USART_MODE_RX ((uint32_t)USART_CR1_RE)
<> 144:ef7eb2e8f9f7 212 #define USART_MODE_TX ((uint32_t)USART_CR1_TE)
<> 144:ef7eb2e8f9f7 213 #define USART_MODE_TX_RX ((uint32_t)(USART_CR1_TE |USART_CR1_RE))
<> 144:ef7eb2e8f9f7 214 /**
<> 144:ef7eb2e8f9f7 215 * @}
<> 144:ef7eb2e8f9f7 216 */
<> 144:ef7eb2e8f9f7 217
<> 144:ef7eb2e8f9f7 218 /** @defgroup USART_Over_Sampling USART Over Sampling
<> 144:ef7eb2e8f9f7 219 * @{
<> 144:ef7eb2e8f9f7 220 */
<> 144:ef7eb2e8f9f7 221 #define USART_OVERSAMPLING_16 ((uint32_t)0x0000U)
<> 144:ef7eb2e8f9f7 222 #define USART_OVERSAMPLING_8 ((uint32_t)USART_CR1_OVER8)
<> 144:ef7eb2e8f9f7 223 /**
<> 144:ef7eb2e8f9f7 224 * @}
<> 144:ef7eb2e8f9f7 225 */
<> 144:ef7eb2e8f9f7 226 /** @defgroup USART_Clock USART Clock
<> 144:ef7eb2e8f9f7 227 * @{
<> 144:ef7eb2e8f9f7 228 */
<> 144:ef7eb2e8f9f7 229 #define USART_CLOCK_DISABLE ((uint32_t)0x0000U)
<> 144:ef7eb2e8f9f7 230 #define USART_CLOCK_ENABLE ((uint32_t)USART_CR2_CLKEN)
<> 144:ef7eb2e8f9f7 231 /**
<> 144:ef7eb2e8f9f7 232 * @}
<> 144:ef7eb2e8f9f7 233 */
<> 144:ef7eb2e8f9f7 234
<> 144:ef7eb2e8f9f7 235 /** @defgroup USART_Clock_Polarity USART Clock Polarity
<> 144:ef7eb2e8f9f7 236 * @{
<> 144:ef7eb2e8f9f7 237 */
<> 144:ef7eb2e8f9f7 238 #define USART_POLARITY_LOW ((uint32_t)0x0000U)
<> 144:ef7eb2e8f9f7 239 #define USART_POLARITY_HIGH ((uint32_t)USART_CR2_CPOL)
<> 144:ef7eb2e8f9f7 240 /**
<> 144:ef7eb2e8f9f7 241 * @}
<> 144:ef7eb2e8f9f7 242 */
<> 144:ef7eb2e8f9f7 243
<> 144:ef7eb2e8f9f7 244 /** @defgroup USART_Clock_Phase USART Clock Phase
<> 144:ef7eb2e8f9f7 245 * @{
<> 144:ef7eb2e8f9f7 246 */
<> 144:ef7eb2e8f9f7 247 #define USART_PHASE_1EDGE ((uint32_t)0x0000U)
<> 144:ef7eb2e8f9f7 248 #define USART_PHASE_2EDGE ((uint32_t)USART_CR2_CPHA)
<> 144:ef7eb2e8f9f7 249 /**
<> 144:ef7eb2e8f9f7 250 * @}
<> 144:ef7eb2e8f9f7 251 */
<> 144:ef7eb2e8f9f7 252
<> 144:ef7eb2e8f9f7 253 /** @defgroup USART_Last_Bit USART Last Bit
<> 144:ef7eb2e8f9f7 254 * @{
<> 144:ef7eb2e8f9f7 255 */
<> 144:ef7eb2e8f9f7 256 #define USART_LASTBIT_DISABLE ((uint32_t)0x0000U)
<> 144:ef7eb2e8f9f7 257 #define USART_LASTBIT_ENABLE ((uint32_t)USART_CR2_LBCL)
<> 144:ef7eb2e8f9f7 258 /**
<> 144:ef7eb2e8f9f7 259 * @}
<> 144:ef7eb2e8f9f7 260 */
<> 144:ef7eb2e8f9f7 261
<> 144:ef7eb2e8f9f7 262 /** @defgroup USART_Request_Parameters USART Request Parameters
<> 144:ef7eb2e8f9f7 263 * @{
<> 144:ef7eb2e8f9f7 264 */
<> 144:ef7eb2e8f9f7 265 #define USART_RXDATA_FLUSH_REQUEST ((uint32_t)USART_RQR_RXFRQ) /*!< Receive Data flush Request */
<> 144:ef7eb2e8f9f7 266 #define USART_TXDATA_FLUSH_REQUEST ((uint32_t)USART_RQR_TXFRQ) /*!< Transmit data flush Request */
<> 144:ef7eb2e8f9f7 267 /**
<> 144:ef7eb2e8f9f7 268 * @}
<> 144:ef7eb2e8f9f7 269 */
<> 144:ef7eb2e8f9f7 270
<> 144:ef7eb2e8f9f7 271 /** @defgroup USART_Flags USART Flags
<> 144:ef7eb2e8f9f7 272 * Elements values convention: 0xXXXX
<> 144:ef7eb2e8f9f7 273 * - 0xXXXX : Flag mask in the ISR register
<> 144:ef7eb2e8f9f7 274 * @{
<> 144:ef7eb2e8f9f7 275 */
<> 144:ef7eb2e8f9f7 276 #define USART_FLAG_REACK ((uint32_t)0x00400000U)
<> 144:ef7eb2e8f9f7 277 #define USART_FLAG_TEACK ((uint32_t)0x00200000U)
<> 144:ef7eb2e8f9f7 278 #define USART_FLAG_BUSY ((uint32_t)0x00010000U)
<> 144:ef7eb2e8f9f7 279 #define USART_FLAG_CTS ((uint32_t)0x00000400U)
<> 144:ef7eb2e8f9f7 280 #define USART_FLAG_CTSIF ((uint32_t)0x00000200U)
<> 144:ef7eb2e8f9f7 281 #define USART_FLAG_LBDF ((uint32_t)0x00000100U)
<> 144:ef7eb2e8f9f7 282 #define USART_FLAG_TXE ((uint32_t)0x00000080U)
<> 144:ef7eb2e8f9f7 283 #define USART_FLAG_TC ((uint32_t)0x00000040U)
<> 144:ef7eb2e8f9f7 284 #define USART_FLAG_RXNE ((uint32_t)0x00000020U)
<> 144:ef7eb2e8f9f7 285 #define USART_FLAG_IDLE ((uint32_t)0x00000010U)
<> 144:ef7eb2e8f9f7 286 #define USART_FLAG_ORE ((uint32_t)0x00000008U)
<> 144:ef7eb2e8f9f7 287 #define USART_FLAG_NE ((uint32_t)0x00000004U)
<> 144:ef7eb2e8f9f7 288 #define USART_FLAG_FE ((uint32_t)0x00000002U)
<> 144:ef7eb2e8f9f7 289 #define USART_FLAG_PE ((uint32_t)0x00000001U)
<> 144:ef7eb2e8f9f7 290 /**
<> 144:ef7eb2e8f9f7 291 * @}
<> 144:ef7eb2e8f9f7 292 */
<> 144:ef7eb2e8f9f7 293
<> 144:ef7eb2e8f9f7 294 /** @defgroup USART_Interrupt_definition USART Interrupts Definition
<> 144:ef7eb2e8f9f7 295 * Elements values convention: 0000ZZZZ0XXYYYYYb
<> 144:ef7eb2e8f9f7 296 * - YYYYY : Interrupt source position in the XX register (5bits)
<> 144:ef7eb2e8f9f7 297 * - XX : Interrupt source register (2bits)
<> 144:ef7eb2e8f9f7 298 * - 01: CR1 register
<> 144:ef7eb2e8f9f7 299 * - 10: CR2 register
<> 144:ef7eb2e8f9f7 300 * - 11: CR3 register
<> 144:ef7eb2e8f9f7 301 * - ZZZZ : Flag position in the ISR register(4bits)
<> 144:ef7eb2e8f9f7 302 * @{
<> 144:ef7eb2e8f9f7 303 */
<> 144:ef7eb2e8f9f7 304
<> 144:ef7eb2e8f9f7 305 #define USART_IT_PE ((uint16_t)0x0028U)
<> 144:ef7eb2e8f9f7 306 #define USART_IT_TXE ((uint16_t)0x0727U)
<> 144:ef7eb2e8f9f7 307 #define USART_IT_TC ((uint16_t)0x0626U)
<> 144:ef7eb2e8f9f7 308 #define USART_IT_RXNE ((uint16_t)0x0525U)
<> 144:ef7eb2e8f9f7 309 #define USART_IT_IDLE ((uint16_t)0x0424U)
<> 144:ef7eb2e8f9f7 310 #define USART_IT_ERR ((uint16_t)0x0060U)
<> 144:ef7eb2e8f9f7 311
<> 144:ef7eb2e8f9f7 312 #define USART_IT_ORE ((uint16_t)0x0300U)
<> 144:ef7eb2e8f9f7 313 #define USART_IT_NE ((uint16_t)0x0200U)
<> 144:ef7eb2e8f9f7 314 #define USART_IT_FE ((uint16_t)0x0100U)
<> 144:ef7eb2e8f9f7 315 /**
<> 144:ef7eb2e8f9f7 316 * @}
<> 144:ef7eb2e8f9f7 317 */
<> 144:ef7eb2e8f9f7 318
<> 144:ef7eb2e8f9f7 319 /** @defgroup USART_IT_CLEAR_Flags USART Interruption Clear Flags
<> 144:ef7eb2e8f9f7 320 * @{
<> 144:ef7eb2e8f9f7 321 */
<> 144:ef7eb2e8f9f7 322 #define USART_CLEAR_PEF USART_ICR_PECF /*!< Parity Error Clear Flag */
<> 144:ef7eb2e8f9f7 323 #define USART_CLEAR_FEF USART_ICR_FECF /*!< Framing Error Clear Flag */
<> 144:ef7eb2e8f9f7 324 #define USART_CLEAR_NEF USART_ICR_NCF /*!< Noise detected Clear Flag */
<> 144:ef7eb2e8f9f7 325 #define USART_CLEAR_OREF USART_ICR_ORECF /*!< OverRun Error Clear Flag */
<> 144:ef7eb2e8f9f7 326 #define USART_CLEAR_IDLEF USART_ICR_IDLECF /*!< IDLE line detected Clear Flag */
<> 144:ef7eb2e8f9f7 327 #define USART_CLEAR_TCF USART_ICR_TCCF /*!< Transmission Complete Clear Flag */
<> 144:ef7eb2e8f9f7 328 #define USART_CLEAR_CTSF USART_ICR_CTSCF /*!< CTS Interrupt Clear Flag */
<> 144:ef7eb2e8f9f7 329 /**
<> 144:ef7eb2e8f9f7 330 * @}
<> 144:ef7eb2e8f9f7 331 */
<> 144:ef7eb2e8f9f7 332
<> 144:ef7eb2e8f9f7 333 /**
<> 144:ef7eb2e8f9f7 334 * @}
<> 144:ef7eb2e8f9f7 335 */
<> 144:ef7eb2e8f9f7 336
<> 144:ef7eb2e8f9f7 337 /* Exported macros -----------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 338 /** @defgroup USART_Exported_Macros USART Exported Macros
<> 144:ef7eb2e8f9f7 339 * @{
<> 144:ef7eb2e8f9f7 340 */
<> 144:ef7eb2e8f9f7 341
<> 144:ef7eb2e8f9f7 342 /** @brief Reset USART handle state
<> 144:ef7eb2e8f9f7 343 * @param __HANDLE__: USART handle.
<> 144:ef7eb2e8f9f7 344 * @retval None
<> 144:ef7eb2e8f9f7 345 */
<> 144:ef7eb2e8f9f7 346 #define __HAL_USART_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_USART_STATE_RESET)
<> 144:ef7eb2e8f9f7 347
<> 144:ef7eb2e8f9f7 348 /** @brief Checks whether the specified USART flag is set or not.
<> 144:ef7eb2e8f9f7 349 * @param __HANDLE__: specifies the USART Handle
<> 144:ef7eb2e8f9f7 350 * @param __FLAG__: specifies the flag to check.
<> 144:ef7eb2e8f9f7 351 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 352 * @arg USART_FLAG_REACK: Receive enable acknowledge flag
<> 144:ef7eb2e8f9f7 353 * @arg USART_FLAG_TEACK: Transmit enable acknowledge flag
<> 144:ef7eb2e8f9f7 354 * @arg USART_FLAG_BUSY: Busy flag
<> 144:ef7eb2e8f9f7 355 * @arg USART_FLAG_CTS: CTS Change flag
<> 144:ef7eb2e8f9f7 356 * @arg USART_FLAG_TXE: Transmit data register empty flag
<> 144:ef7eb2e8f9f7 357 * @arg USART_FLAG_TC: Transmission Complete flag
<> 144:ef7eb2e8f9f7 358 * @arg USART_FLAG_RXNE: Receive data register not empty flag
<> 144:ef7eb2e8f9f7 359 * @arg USART_FLAG_IDLE: Idle Line detection flag
<> 144:ef7eb2e8f9f7 360 * @arg USART_FLAG_ORE: OverRun Error flag
<> 144:ef7eb2e8f9f7 361 * @arg USART_FLAG_NE: Noise Error flag
<> 144:ef7eb2e8f9f7 362 * @arg USART_FLAG_FE: Framing Error flag
<> 144:ef7eb2e8f9f7 363 * @arg USART_FLAG_PE: Parity Error flag
<> 144:ef7eb2e8f9f7 364 * @retval The new state of __FLAG__ (TRUE or FALSE).
<> 144:ef7eb2e8f9f7 365 */
<> 144:ef7eb2e8f9f7 366 #define __HAL_USART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__))
<> 144:ef7eb2e8f9f7 367
<> 144:ef7eb2e8f9f7 368
<> 144:ef7eb2e8f9f7 369 /** @brief Enables the specified USART interrupt.
<> 144:ef7eb2e8f9f7 370 * @param __HANDLE__: specifies the USART Handle
<> 144:ef7eb2e8f9f7 371 * @param __INTERRUPT__: specifies the USART interrupt source to enable.
<> 144:ef7eb2e8f9f7 372 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 373 * @arg USART_IT_TXE: Transmit Data Register empty interrupt
<> 144:ef7eb2e8f9f7 374 * @arg USART_IT_TC: Transmission complete interrupt
<> 144:ef7eb2e8f9f7 375 * @arg USART_IT_RXNE: Receive Data register not empty interrupt
<> 144:ef7eb2e8f9f7 376 * @arg USART_IT_IDLE: Idle line detection interrupt
<> 144:ef7eb2e8f9f7 377 * @arg USART_IT_PE: Parity Error interrupt
<> 144:ef7eb2e8f9f7 378 * @arg USART_IT_ERR: Error interrupt(Frame error, noise error, overrun error)
<> 144:ef7eb2e8f9f7 379 * @retval None
<> 144:ef7eb2e8f9f7 380 */
<> 144:ef7eb2e8f9f7 381 #define __HAL_USART_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1)? ((__HANDLE__)->Instance->CR1 |= (1U << ((__INTERRUPT__) & USART_IT_MASK))): \
<> 144:ef7eb2e8f9f7 382 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2)? ((__HANDLE__)->Instance->CR2 |= (1U << ((__INTERRUPT__) & USART_IT_MASK))): \
<> 144:ef7eb2e8f9f7 383 ((__HANDLE__)->Instance->CR3 |= (1U << ((__INTERRUPT__) & USART_IT_MASK))))
<> 144:ef7eb2e8f9f7 384
<> 144:ef7eb2e8f9f7 385 /** @brief Disables the specified USART interrupt.
<> 144:ef7eb2e8f9f7 386 * @param __HANDLE__: specifies the USART Handle.
<> 144:ef7eb2e8f9f7 387 * @param __INTERRUPT__: specifies the USART interrupt source to disable.
<> 144:ef7eb2e8f9f7 388 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 389 * @arg USART_IT_TXE: Transmit Data Register empty interrupt
<> 144:ef7eb2e8f9f7 390 * @arg USART_IT_TC: Transmission complete interrupt
<> 144:ef7eb2e8f9f7 391 * @arg USART_IT_RXNE: Receive Data register not empty interrupt
<> 144:ef7eb2e8f9f7 392 * @arg USART_IT_IDLE: Idle line detection interrupt
<> 144:ef7eb2e8f9f7 393 * @arg USART_IT_PE: Parity Error interrupt
<> 144:ef7eb2e8f9f7 394 * @arg USART_IT_ERR: Error interrupt(Frame error, noise error, overrun error)
<> 144:ef7eb2e8f9f7 395 * @retval None
<> 144:ef7eb2e8f9f7 396 */
<> 144:ef7eb2e8f9f7 397 #define __HAL_USART_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1)? ((__HANDLE__)->Instance->CR1 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK))): \
<> 144:ef7eb2e8f9f7 398 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2)? ((__HANDLE__)->Instance->CR2 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK))): \
<> 144:ef7eb2e8f9f7 399 ((__HANDLE__)->Instance->CR3 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK))))
<> 144:ef7eb2e8f9f7 400
<> 144:ef7eb2e8f9f7 401
<> 144:ef7eb2e8f9f7 402 /** @brief Checks whether the specified USART interrupt has occurred or not.
<> 144:ef7eb2e8f9f7 403 * @param __HANDLE__: specifies the USART Handle
<> 144:ef7eb2e8f9f7 404 * @param __IT__: specifies the USART interrupt source to check.
<> 144:ef7eb2e8f9f7 405 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 406 * @arg USART_IT_TXE: Transmit Data Register empty interrupt
<> 144:ef7eb2e8f9f7 407 * @arg USART_IT_TC: Transmission complete interrupt
<> 144:ef7eb2e8f9f7 408 * @arg USART_IT_RXNE: Receive Data register not empty interrupt
<> 144:ef7eb2e8f9f7 409 * @arg USART_IT_IDLE: Idle line detection interrupt
<> 144:ef7eb2e8f9f7 410 * @arg USART_IT_ORE: OverRun Error interrupt
<> 144:ef7eb2e8f9f7 411 * @arg USART_IT_NE: Noise Error interrupt
<> 144:ef7eb2e8f9f7 412 * @arg USART_IT_FE: Framing Error interrupt
<> 144:ef7eb2e8f9f7 413 * @arg USART_IT_PE: Parity Error interrupt
<> 144:ef7eb2e8f9f7 414 * @retval The new state of __IT__ (TRUE or FALSE).
<> 144:ef7eb2e8f9f7 415 */
<> 144:ef7eb2e8f9f7 416 #define __HAL_USART_GET_IT(__HANDLE__, __IT__) ((__HANDLE__)->Instance->ISR & ((uint32_t)1 << ((__IT__)>> 0x08)))
<> 144:ef7eb2e8f9f7 417
<> 144:ef7eb2e8f9f7 418 /** @brief Checks whether the specified USART interrupt source is enabled.
<> 144:ef7eb2e8f9f7 419 * @param __HANDLE__: specifies the USART Handle.
<> 144:ef7eb2e8f9f7 420 * @param __IT__: specifies the USART interrupt source to check.
<> 144:ef7eb2e8f9f7 421 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 422 * @arg USART_IT_TXE: Transmit Data Register empty interrupt
<> 144:ef7eb2e8f9f7 423 * @arg USART_IT_TC: Transmission complete interrupt
<> 144:ef7eb2e8f9f7 424 * @arg USART_IT_RXNE: Receive Data register not empty interrupt
<> 144:ef7eb2e8f9f7 425 * @arg USART_IT_IDLE: Idle line detection interrupt
<> 144:ef7eb2e8f9f7 426 * @arg USART_IT_ORE: OverRun Error interrupt
<> 144:ef7eb2e8f9f7 427 * @arg USART_IT_NE: Noise Error interrupt
<> 144:ef7eb2e8f9f7 428 * @arg USART_IT_FE: Framing Error interrupt
<> 144:ef7eb2e8f9f7 429 * @arg USART_IT_PE: Parity Error interrupt
<> 144:ef7eb2e8f9f7 430 * @retval The new state of __IT__ (TRUE or FALSE).
<> 144:ef7eb2e8f9f7 431 */
<> 144:ef7eb2e8f9f7 432 #define __HAL_USART_GET_IT_SOURCE(__HANDLE__, __IT__) ((((((uint8_t)(__IT__)) >> 5) == 1)? (__HANDLE__)->Instance->CR1:(((((uint8_t)(__IT__)) >> 5) == 2)? \
<> 144:ef7eb2e8f9f7 433 (__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & ((uint32_t)1 << \
<> 144:ef7eb2e8f9f7 434 (((uint16_t)(__IT__)) & USART_IT_MASK)))
<> 144:ef7eb2e8f9f7 435
<> 144:ef7eb2e8f9f7 436
<> 144:ef7eb2e8f9f7 437 /** @brief Clears the specified USART ISR flag, in setting the proper ICR register flag.
<> 144:ef7eb2e8f9f7 438 * @param __HANDLE__: specifies the USART Handle.
<> 144:ef7eb2e8f9f7 439 * @param __IT_CLEAR__: specifies the interrupt clear register flag that needs to be set
<> 144:ef7eb2e8f9f7 440 * to clear the corresponding interrupt
<> 144:ef7eb2e8f9f7 441 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 442 * @arg USART_CLEAR_PEF: Parity Error Clear Flag
<> 144:ef7eb2e8f9f7 443 * @arg USART_CLEAR_FEF: Framing Error Clear Flag
<> 144:ef7eb2e8f9f7 444 * @arg USART_CLEAR_NEF: Noise detected Clear Flag
<> 144:ef7eb2e8f9f7 445 * @arg USART_CLEAR_OREF: OverRun Error Clear Flag
<> 144:ef7eb2e8f9f7 446 * @arg USART_CLEAR_IDLEF: IDLE line detected Clear Flag
<> 144:ef7eb2e8f9f7 447 * @arg USART_CLEAR_TCF: Transmission Complete Clear Flag
<> 144:ef7eb2e8f9f7 448 * @arg USART_CLEAR_CTSF: CTS Interrupt Clear Flag
<> 144:ef7eb2e8f9f7 449 * @retval None
<> 144:ef7eb2e8f9f7 450 */
<> 144:ef7eb2e8f9f7 451 #define __HAL_USART_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->ICR = (uint32_t)(__IT_CLEAR__))
<> 144:ef7eb2e8f9f7 452
<> 144:ef7eb2e8f9f7 453 /** @brief Set a specific USART request flag.
<> 144:ef7eb2e8f9f7 454 * @param __HANDLE__: specifies the USART Handle.
<> 144:ef7eb2e8f9f7 455 * @param __REQ__: specifies the request flag to set
<> 144:ef7eb2e8f9f7 456 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 457 * @arg USART_RXDATA_FLUSH_REQUEST: Receive Data flush Request
<> 144:ef7eb2e8f9f7 458 * @arg USART_TXDATA_FLUSH_REQUEST: Transmit data flush Request
<> 144:ef7eb2e8f9f7 459 *
<> 144:ef7eb2e8f9f7 460 * @retval None
<> 144:ef7eb2e8f9f7 461 */
<> 144:ef7eb2e8f9f7 462 #define __HAL_USART_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR |= (uint16_t)(__REQ__))
<> 144:ef7eb2e8f9f7 463
<> 144:ef7eb2e8f9f7 464 /** @brief Enable USART
<> 144:ef7eb2e8f9f7 465 * @param __HANDLE__: specifies the USART Handle.
<> 144:ef7eb2e8f9f7 466 * @retval None
<> 144:ef7eb2e8f9f7 467 */
<> 144:ef7eb2e8f9f7 468 #define __HAL_USART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE)
<> 144:ef7eb2e8f9f7 469
<> 144:ef7eb2e8f9f7 470 /** @brief Disable USART
<> 144:ef7eb2e8f9f7 471 * @param __HANDLE__: specifies the USART Handle.
<> 144:ef7eb2e8f9f7 472 * @retval None
<> 144:ef7eb2e8f9f7 473 */
<> 144:ef7eb2e8f9f7 474 #define __HAL_USART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE)
<> 144:ef7eb2e8f9f7 475
<> 144:ef7eb2e8f9f7 476 /**
<> 144:ef7eb2e8f9f7 477 * @}
<> 144:ef7eb2e8f9f7 478 */
<> 144:ef7eb2e8f9f7 479 /* Include UART HAL Extension module */
<> 144:ef7eb2e8f9f7 480 #include "stm32f7xx_hal_usart_ex.h"
<> 144:ef7eb2e8f9f7 481
<> 144:ef7eb2e8f9f7 482 /* Exported functions --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 483 /** @addtogroup USART_Exported_Functions
<> 144:ef7eb2e8f9f7 484 * @{
<> 144:ef7eb2e8f9f7 485 */
<> 144:ef7eb2e8f9f7 486
<> 144:ef7eb2e8f9f7 487 /** @addtogroup USART_Exported_Functions_Group1
<> 144:ef7eb2e8f9f7 488 * @{
<> 144:ef7eb2e8f9f7 489 */
<> 144:ef7eb2e8f9f7 490 /* Initialization/de-initialization functions **********************************/
<> 144:ef7eb2e8f9f7 491 HAL_StatusTypeDef HAL_USART_Init(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 492 HAL_StatusTypeDef HAL_USART_DeInit(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 493 void HAL_USART_MspInit(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 494 void HAL_USART_MspDeInit(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 495 HAL_StatusTypeDef HAL_USART_CheckIdleState(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 496 /**
<> 144:ef7eb2e8f9f7 497 * @}
<> 144:ef7eb2e8f9f7 498 */
<> 144:ef7eb2e8f9f7 499
<> 144:ef7eb2e8f9f7 500 /** @addtogroup USART_Exported_Functions_Group2
<> 144:ef7eb2e8f9f7 501 * @{
<> 144:ef7eb2e8f9f7 502 */
<> 144:ef7eb2e8f9f7 503 /* IO operation functions *******************************************************/
<> 144:ef7eb2e8f9f7 504 HAL_StatusTypeDef HAL_USART_Transmit(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size, uint32_t Timeout);
<> 144:ef7eb2e8f9f7 505 HAL_StatusTypeDef HAL_USART_Receive(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size, uint32_t Timeout);
<> 144:ef7eb2e8f9f7 506 HAL_StatusTypeDef HAL_USART_TransmitReceive(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout);
<> 144:ef7eb2e8f9f7 507 HAL_StatusTypeDef HAL_USART_Transmit_IT(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size);
<> 144:ef7eb2e8f9f7 508 HAL_StatusTypeDef HAL_USART_Receive_IT(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size);
<> 144:ef7eb2e8f9f7 509 HAL_StatusTypeDef HAL_USART_TransmitReceive_IT(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);
<> 144:ef7eb2e8f9f7 510 HAL_StatusTypeDef HAL_USART_Transmit_DMA(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size);
<> 144:ef7eb2e8f9f7 511 HAL_StatusTypeDef HAL_USART_Receive_DMA(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size);
<> 144:ef7eb2e8f9f7 512 HAL_StatusTypeDef HAL_USART_TransmitReceive_DMA(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);
<> 144:ef7eb2e8f9f7 513 HAL_StatusTypeDef HAL_USART_DMAPause(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 514 HAL_StatusTypeDef HAL_USART_DMAResume(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 515 HAL_StatusTypeDef HAL_USART_DMAStop(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 516 void HAL_USART_IRQHandler(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 517 void HAL_USART_TxHalfCpltCallback(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 518 void HAL_USART_TxCpltCallback(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 519 void HAL_USART_RxCpltCallback(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 520 void HAL_USART_RxHalfCpltCallback(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 521 void HAL_USART_TxRxCpltCallback(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 522 void HAL_USART_ErrorCallback(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 523
<> 144:ef7eb2e8f9f7 524 /**
<> 144:ef7eb2e8f9f7 525 * @}
<> 144:ef7eb2e8f9f7 526 */
<> 144:ef7eb2e8f9f7 527
<> 144:ef7eb2e8f9f7 528 /** @addtogroup USART_Exported_Functions_Group3
<> 144:ef7eb2e8f9f7 529 * @{
<> 144:ef7eb2e8f9f7 530 */
<> 144:ef7eb2e8f9f7 531 /* Peripheral State functions ************************************************/
<> 144:ef7eb2e8f9f7 532 HAL_USART_StateTypeDef HAL_USART_GetState(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 533 uint32_t HAL_USART_GetError(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 534
<> 144:ef7eb2e8f9f7 535 /**
<> 144:ef7eb2e8f9f7 536 * @}
<> 144:ef7eb2e8f9f7 537 */
<> 144:ef7eb2e8f9f7 538
<> 144:ef7eb2e8f9f7 539 /**
<> 144:ef7eb2e8f9f7 540 * @}
<> 144:ef7eb2e8f9f7 541 */
<> 144:ef7eb2e8f9f7 542 /* Private types -------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 543 /* Private variables ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 544 /* Private constants ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 545 /** @defgroup USART_Private_Constants USART Private Constants
<> 144:ef7eb2e8f9f7 546 * @{
<> 144:ef7eb2e8f9f7 547 */
<> 144:ef7eb2e8f9f7 548 /** @brief USART interruptions flag mask
<> 144:ef7eb2e8f9f7 549 *
<> 144:ef7eb2e8f9f7 550 */
<> 144:ef7eb2e8f9f7 551 #define USART_IT_MASK ((uint16_t)0x001FU)
<> 144:ef7eb2e8f9f7 552
<> 144:ef7eb2e8f9f7 553 /**
<> 144:ef7eb2e8f9f7 554 * @}
<> 144:ef7eb2e8f9f7 555 */
<> 144:ef7eb2e8f9f7 556 /* Private macros ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 557 /** @defgroup USART_Private_Macros USART Private Macros
<> 144:ef7eb2e8f9f7 558 * @{
<> 144:ef7eb2e8f9f7 559 */
<> 144:ef7eb2e8f9f7 560 /** @brief Reports the USART clock source.
<> 144:ef7eb2e8f9f7 561 * @param __HANDLE__: specifies the USART Handle
<> 144:ef7eb2e8f9f7 562 * @param __CLOCKSOURCE__ : output variable
<> 144:ef7eb2e8f9f7 563 * @retval the USART clocking source, written in __CLOCKSOURCE__.
<> 144:ef7eb2e8f9f7 564 */
<> 144:ef7eb2e8f9f7 565 #define USART_GETCLOCKSOURCE(__HANDLE__, __CLOCKSOURCE__)\
<> 144:ef7eb2e8f9f7 566 do { \
<> 144:ef7eb2e8f9f7 567 if((__HANDLE__)->Instance == USART1) \
<> 144:ef7eb2e8f9f7 568 { \
<> 144:ef7eb2e8f9f7 569 switch(__HAL_RCC_GET_USART1_SOURCE()) \
<> 144:ef7eb2e8f9f7 570 { \
<> 144:ef7eb2e8f9f7 571 case RCC_USART1CLKSOURCE_PCLK2: \
<> 144:ef7eb2e8f9f7 572 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK2; \
<> 144:ef7eb2e8f9f7 573 break; \
<> 144:ef7eb2e8f9f7 574 case RCC_USART1CLKSOURCE_HSI: \
<> 144:ef7eb2e8f9f7 575 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \
<> 144:ef7eb2e8f9f7 576 break; \
<> 144:ef7eb2e8f9f7 577 case RCC_USART1CLKSOURCE_SYSCLK: \
<> 144:ef7eb2e8f9f7 578 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \
<> 144:ef7eb2e8f9f7 579 break; \
<> 144:ef7eb2e8f9f7 580 case RCC_USART1CLKSOURCE_LSE: \
<> 144:ef7eb2e8f9f7 581 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \
<> 144:ef7eb2e8f9f7 582 break; \
<> 144:ef7eb2e8f9f7 583 default: \
<> 144:ef7eb2e8f9f7 584 break; \
<> 144:ef7eb2e8f9f7 585 } \
<> 144:ef7eb2e8f9f7 586 } \
<> 144:ef7eb2e8f9f7 587 else if((__HANDLE__)->Instance == USART2) \
<> 144:ef7eb2e8f9f7 588 { \
<> 144:ef7eb2e8f9f7 589 switch(__HAL_RCC_GET_USART2_SOURCE()) \
<> 144:ef7eb2e8f9f7 590 { \
<> 144:ef7eb2e8f9f7 591 case RCC_USART2CLKSOURCE_PCLK1: \
<> 144:ef7eb2e8f9f7 592 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \
<> 144:ef7eb2e8f9f7 593 break; \
<> 144:ef7eb2e8f9f7 594 case RCC_USART2CLKSOURCE_HSI: \
<> 144:ef7eb2e8f9f7 595 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \
<> 144:ef7eb2e8f9f7 596 break; \
<> 144:ef7eb2e8f9f7 597 case RCC_USART2CLKSOURCE_SYSCLK: \
<> 144:ef7eb2e8f9f7 598 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \
<> 144:ef7eb2e8f9f7 599 break; \
<> 144:ef7eb2e8f9f7 600 case RCC_USART2CLKSOURCE_LSE: \
<> 144:ef7eb2e8f9f7 601 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \
<> 144:ef7eb2e8f9f7 602 break; \
<> 144:ef7eb2e8f9f7 603 default: \
<> 144:ef7eb2e8f9f7 604 break; \
<> 144:ef7eb2e8f9f7 605 } \
<> 144:ef7eb2e8f9f7 606 } \
<> 144:ef7eb2e8f9f7 607 else if((__HANDLE__)->Instance == USART3) \
<> 144:ef7eb2e8f9f7 608 { \
<> 144:ef7eb2e8f9f7 609 switch(__HAL_RCC_GET_USART3_SOURCE()) \
<> 144:ef7eb2e8f9f7 610 { \
<> 144:ef7eb2e8f9f7 611 case RCC_USART3CLKSOURCE_PCLK1: \
<> 144:ef7eb2e8f9f7 612 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \
<> 144:ef7eb2e8f9f7 613 break; \
<> 144:ef7eb2e8f9f7 614 case RCC_USART3CLKSOURCE_HSI: \
<> 144:ef7eb2e8f9f7 615 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \
<> 144:ef7eb2e8f9f7 616 break; \
<> 144:ef7eb2e8f9f7 617 case RCC_USART3CLKSOURCE_SYSCLK: \
<> 144:ef7eb2e8f9f7 618 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \
<> 144:ef7eb2e8f9f7 619 break; \
<> 144:ef7eb2e8f9f7 620 case RCC_USART3CLKSOURCE_LSE: \
<> 144:ef7eb2e8f9f7 621 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \
<> 144:ef7eb2e8f9f7 622 break; \
<> 144:ef7eb2e8f9f7 623 default: \
<> 144:ef7eb2e8f9f7 624 break; \
<> 144:ef7eb2e8f9f7 625 } \
<> 144:ef7eb2e8f9f7 626 } \
<> 144:ef7eb2e8f9f7 627 else if((__HANDLE__)->Instance == USART6) \
<> 144:ef7eb2e8f9f7 628 { \
<> 144:ef7eb2e8f9f7 629 switch(__HAL_RCC_GET_USART6_SOURCE()) \
<> 144:ef7eb2e8f9f7 630 { \
<> 144:ef7eb2e8f9f7 631 case RCC_USART6CLKSOURCE_PCLK2: \
<> 144:ef7eb2e8f9f7 632 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK2; \
<> 144:ef7eb2e8f9f7 633 break; \
<> 144:ef7eb2e8f9f7 634 case RCC_USART6CLKSOURCE_HSI: \
<> 144:ef7eb2e8f9f7 635 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \
<> 144:ef7eb2e8f9f7 636 break; \
<> 144:ef7eb2e8f9f7 637 case RCC_USART6CLKSOURCE_SYSCLK: \
<> 144:ef7eb2e8f9f7 638 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \
<> 144:ef7eb2e8f9f7 639 break; \
<> 144:ef7eb2e8f9f7 640 case RCC_USART6CLKSOURCE_LSE: \
<> 144:ef7eb2e8f9f7 641 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \
<> 144:ef7eb2e8f9f7 642 break; \
<> 144:ef7eb2e8f9f7 643 default: \
<> 144:ef7eb2e8f9f7 644 break; \
<> 144:ef7eb2e8f9f7 645 } \
<> 144:ef7eb2e8f9f7 646 } \
<> 144:ef7eb2e8f9f7 647 } while(0)
<> 144:ef7eb2e8f9f7 648
<> 144:ef7eb2e8f9f7 649
<> 144:ef7eb2e8f9f7 650 #define IS_USART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == USART_STOPBITS_1) || \
<> 144:ef7eb2e8f9f7 651 ((__STOPBITS__) == USART_STOPBITS_1_5) || \
<> 144:ef7eb2e8f9f7 652 ((__STOPBITS__) == USART_STOPBITS_2))
<> 144:ef7eb2e8f9f7 653 #define IS_USART_PARITY(__PARITY__) (((__PARITY__) == USART_PARITY_NONE) || \
<> 144:ef7eb2e8f9f7 654 ((__PARITY__) == USART_PARITY_EVEN) || \
<> 144:ef7eb2e8f9f7 655 ((__PARITY__) == USART_PARITY_ODD))
<> 144:ef7eb2e8f9f7 656 #define IS_USART_MODE(__MODE__) ((((__MODE__) & (uint32_t)0xFFFFFFF3U) == 0x00U) && ((__MODE__) != (uint32_t)0x00U))
<> 144:ef7eb2e8f9f7 657 #define IS_USART_OVERSAMPLING(__SAMPLING__) (((__SAMPLING__) == USART_OVERSAMPLING_16) || \
<> 144:ef7eb2e8f9f7 658 ((__SAMPLING__) == USART_OVERSAMPLING_8))
<> 144:ef7eb2e8f9f7 659 #define IS_USART_CLOCK(__CLOCK__) (((__CLOCK__)== USART_CLOCK_DISABLE) || \
<> 144:ef7eb2e8f9f7 660 ((__CLOCK__)== USART_CLOCK_ENABLE))
<> 144:ef7eb2e8f9f7 661 #define IS_USART_POLARITY(__CPOL__) (((__CPOL__) == USART_POLARITY_LOW) || ((__CPOL__) == USART_POLARITY_HIGH))
<> 144:ef7eb2e8f9f7 662 #define IS_USART_PHASE(__CPHA__) (((__CPHA__) == USART_PHASE_1EDGE) || ((__CPHA__) == USART_PHASE_2EDGE))
<> 144:ef7eb2e8f9f7 663 #define IS_USART_LASTBIT(__LASTBIT__) (((__LASTBIT__) == USART_LASTBIT_DISABLE) || \
<> 144:ef7eb2e8f9f7 664 ((__LASTBIT__) == USART_LASTBIT_ENABLE))
<> 144:ef7eb2e8f9f7 665 #define IS_USART_REQUEST_PARAMETER(__PARAM__) (((__PARAM__) == USART_RXDATA_FLUSH_REQUEST) || \
<> 144:ef7eb2e8f9f7 666 ((__PARAM__) == USART_TXDATA_FLUSH_REQUEST))
<> 144:ef7eb2e8f9f7 667 #define IS_USART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) < 9000001)
<> 144:ef7eb2e8f9f7 668
<> 144:ef7eb2e8f9f7 669 /**
<> 144:ef7eb2e8f9f7 670 * @}
<> 144:ef7eb2e8f9f7 671 */
<> 144:ef7eb2e8f9f7 672
<> 144:ef7eb2e8f9f7 673 /* Private functions ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 674 /** @defgroup USART_Private_Functions USART Private Functions
<> 144:ef7eb2e8f9f7 675 * @{
<> 144:ef7eb2e8f9f7 676 */
<> 144:ef7eb2e8f9f7 677
<> 144:ef7eb2e8f9f7 678 /**
<> 144:ef7eb2e8f9f7 679 * @}
<> 144:ef7eb2e8f9f7 680 */
<> 144:ef7eb2e8f9f7 681
<> 144:ef7eb2e8f9f7 682 /**
<> 144:ef7eb2e8f9f7 683 * @}
<> 144:ef7eb2e8f9f7 684 */
<> 144:ef7eb2e8f9f7 685
<> 144:ef7eb2e8f9f7 686 /**
<> 144:ef7eb2e8f9f7 687 * @}
<> 144:ef7eb2e8f9f7 688 */
<> 144:ef7eb2e8f9f7 689
<> 144:ef7eb2e8f9f7 690 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 691 }
<> 144:ef7eb2e8f9f7 692 #endif
<> 144:ef7eb2e8f9f7 693
<> 144:ef7eb2e8f9f7 694 #endif /* __STM32F7xx_HAL_USART_H */
<> 144:ef7eb2e8f9f7 695
<> 144:ef7eb2e8f9f7 696 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/