Johannes Stratmann / mbed-dev

added prescaler for 16 bit pwm in LPC1347 target

Fork of mbed-dev by mbed official

targets/cmsis/TARGET_STM/TARGET_STM32F7/stm32f7xx_hal_gpio_ex.h@147:ba84b7dc41a7, 2016-09-10 (annotated)

Committer:
JojoS
Date:
Sat Sep 10 15:32:04 2016 +0000
Revision:
147:ba84b7dc41a7
Parent:
144:ef7eb2e8f9f7 
added prescaler for 16 bit timers (solution as in LPC11xx), default prescaler 31 for max 28 ms period time

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file stm32f7xx_hal_gpio_ex.h
<> 144:ef7eb2e8f9f7 4 * @author MCD Application Team
<> 144:ef7eb2e8f9f7 5 * @version V1.1.0
<> 144:ef7eb2e8f9f7 6 * @date 22-April-2016
<> 144:ef7eb2e8f9f7 7 * @brief Header file of GPIO HAL Extension module.
<> 144:ef7eb2e8f9f7 8 ******************************************************************************
<> 144:ef7eb2e8f9f7 9 * @attention
<> 144:ef7eb2e8f9f7 10 *
<> 144:ef7eb2e8f9f7 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 144:ef7eb2e8f9f7 12 *
<> 144:ef7eb2e8f9f7 13 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 14 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 15 * 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 16 * this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 18 * this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 19 * and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 21 * may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 22 * without specific prior written permission.
<> 144:ef7eb2e8f9f7 23 *
<> 144:ef7eb2e8f9f7 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 34 *
<> 144:ef7eb2e8f9f7 35 ******************************************************************************
<> 144:ef7eb2e8f9f7 36 */
<> 144:ef7eb2e8f9f7 37
<> 144:ef7eb2e8f9f7 38 /* Define to prevent recursive inclusion -------------------------------------*/
<> 144:ef7eb2e8f9f7 39 #ifndef __STM32F7xx_HAL_GPIO_EX_H
<> 144:ef7eb2e8f9f7 40 #define __STM32F7xx_HAL_GPIO_EX_H
<> 144:ef7eb2e8f9f7 41
<> 144:ef7eb2e8f9f7 42 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 43 extern "C" {
<> 144:ef7eb2e8f9f7 44 #endif
<> 144:ef7eb2e8f9f7 45
<> 144:ef7eb2e8f9f7 46 /* Includes ------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 47 #include "stm32f7xx_hal_def.h"
<> 144:ef7eb2e8f9f7 48
<> 144:ef7eb2e8f9f7 49 /** @addtogroup STM32F7xx_HAL_Driver
<> 144:ef7eb2e8f9f7 50 * @{
<> 144:ef7eb2e8f9f7 51 */
<> 144:ef7eb2e8f9f7 52
<> 144:ef7eb2e8f9f7 53 /** @defgroup GPIOEx GPIOEx
<> 144:ef7eb2e8f9f7 54 * @{
<> 144:ef7eb2e8f9f7 55 */
<> 144:ef7eb2e8f9f7 56
<> 144:ef7eb2e8f9f7 57 /* Exported types ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 58
<> 144:ef7eb2e8f9f7 59 /* Exported constants --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 60 /** @defgroup GPIOEx_Exported_Constants GPIO Exported Constants
<> 144:ef7eb2e8f9f7 61 * @{
<> 144:ef7eb2e8f9f7 62 */
<> 144:ef7eb2e8f9f7 63
<> 144:ef7eb2e8f9f7 64 /** @defgroup GPIO_Alternate_function_selection GPIO Alternate Function Selection
<> 144:ef7eb2e8f9f7 65 * @{
<> 144:ef7eb2e8f9f7 66 */
<> 144:ef7eb2e8f9f7 67
<> 144:ef7eb2e8f9f7 68 /**
<> 144:ef7eb2e8f9f7 69 * @brief AF 0 selection
<> 144:ef7eb2e8f9f7 70 */
<> 144:ef7eb2e8f9f7 71 #define GPIO_AF0_RTC_50Hz ((uint8_t)0x00U) /* RTC_50Hz Alternate Function mapping */
<> 144:ef7eb2e8f9f7 72 #define GPIO_AF0_MCO ((uint8_t)0x00U) /* MCO (MCO1 and MCO2) Alternate Function mapping */
<> 144:ef7eb2e8f9f7 73 #define GPIO_AF0_SWJ ((uint8_t)0x00U) /* SWJ (SWD and JTAG) Alternate Function mapping */
<> 144:ef7eb2e8f9f7 74 #define GPIO_AF0_TRACE ((uint8_t)0x00U) /* TRACE Alternate Function mapping */
<> 144:ef7eb2e8f9f7 75
<> 144:ef7eb2e8f9f7 76 /**
<> 144:ef7eb2e8f9f7 77 * @brief AF 1 selection
<> 144:ef7eb2e8f9f7 78 */
<> 144:ef7eb2e8f9f7 79 #define GPIO_AF1_TIM1 ((uint8_t)0x01U) /* TIM1 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 80 #define GPIO_AF1_TIM2 ((uint8_t)0x01U) /* TIM2 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 81 #if defined (STM32F765xx) || defined(STM32F767xx) || defined(STM32F769xx) || defined(STM32F777xx) || defined(STM32F779xx)
<> 144:ef7eb2e8f9f7 82 #define GPIO_AF1_UART5 ((uint8_t)0x01U) /* UART5 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 83 #define GPIO_AF1_I2C4 ((uint8_t)0x01U) /* I2C4 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 84 #endif /* STM32F767xx || STM32F769xx || STM32F777xx || STM32F779xx */
<> 144:ef7eb2e8f9f7 85
<> 144:ef7eb2e8f9f7 86 /**
<> 144:ef7eb2e8f9f7 87 * @brief AF 2 selection
<> 144:ef7eb2e8f9f7 88 */
<> 144:ef7eb2e8f9f7 89 #define GPIO_AF2_TIM3 ((uint8_t)0x02U) /* TIM3 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 90 #define GPIO_AF2_TIM4 ((uint8_t)0x02U) /* TIM4 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 91 #define GPIO_AF2_TIM5 ((uint8_t)0x02U) /* TIM5 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 92
<> 144:ef7eb2e8f9f7 93 /**
<> 144:ef7eb2e8f9f7 94 * @brief AF 3 selection
<> 144:ef7eb2e8f9f7 95 */
<> 144:ef7eb2e8f9f7 96 #define GPIO_AF3_TIM8 ((uint8_t)0x03U) /* TIM8 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 97 #define GPIO_AF3_TIM9 ((uint8_t)0x03U) /* TIM9 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 98 #define GPIO_AF3_TIM10 ((uint8_t)0x03U) /* TIM10 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 99 #define GPIO_AF3_TIM11 ((uint8_t)0x03U) /* TIM11 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 100 #define GPIO_AF3_LPTIM1 ((uint8_t)0x03U) /* LPTIM1 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 101 #define GPIO_AF3_CEC ((uint8_t)0x03U) /* CEC Alternate Function mapping */
<> 144:ef7eb2e8f9f7 102 #if defined (STM32F765xx) || defined(STM32F767xx) || defined(STM32F769xx) || defined(STM32F777xx) || defined(STM32F779xx)
<> 144:ef7eb2e8f9f7 103 #define GPIO_AF3_DFSDM1 ((uint8_t)0x03U) /* DFSDM1 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 104 #endif /* STM32F767xx || STM32F769xx || STM32F777xx || STM32F779xx */
<> 144:ef7eb2e8f9f7 105 /**
<> 144:ef7eb2e8f9f7 106 * @brief AF 4 selection
<> 144:ef7eb2e8f9f7 107 */
<> 144:ef7eb2e8f9f7 108 #define GPIO_AF4_I2C1 ((uint8_t)0x04U) /* I2C1 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 109 #define GPIO_AF4_I2C2 ((uint8_t)0x04U) /* I2C2 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 110 #define GPIO_AF4_I2C3 ((uint8_t)0x04U) /* I2C3 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 111 #define GPIO_AF4_I2C4 ((uint8_t)0x04U) /* I2C4 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 112 #define GPIO_AF4_CEC ((uint8_t)0x04U) /* CEC Alternate Function mapping */
<> 144:ef7eb2e8f9f7 113 #if defined (STM32F765xx) || defined(STM32F767xx) || defined(STM32F769xx) || defined(STM32F777xx) || defined(STM32F779xx)
<> 144:ef7eb2e8f9f7 114 #define GPIO_AF4_USART1 ((uint8_t)0x04) /* USART1 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 115 #endif /* STM32F767xx || STM32F769xx || STM32F777xx || STM32F779xx */
<> 144:ef7eb2e8f9f7 116
<> 144:ef7eb2e8f9f7 117 /**
<> 144:ef7eb2e8f9f7 118 * @brief AF 5 selection
<> 144:ef7eb2e8f9f7 119 */
<> 144:ef7eb2e8f9f7 120 #define GPIO_AF5_SPI1 ((uint8_t)0x05U) /* SPI1 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 121 #define GPIO_AF5_SPI2 ((uint8_t)0x05U) /* SPI2/I2S2 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 122 #define GPIO_AF5_SPI3 ((uint8_t)0x05U) /* SPI3/I2S3 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 123 #define GPIO_AF5_SPI4 ((uint8_t)0x05U) /* SPI4 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 124 #define GPIO_AF5_SPI5 ((uint8_t)0x05U) /* SPI5 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 125 #define GPIO_AF5_SPI6 ((uint8_t)0x05U) /* SPI6 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 126
<> 144:ef7eb2e8f9f7 127 /**
<> 144:ef7eb2e8f9f7 128 * @brief AF 6 selection
<> 144:ef7eb2e8f9f7 129 */
<> 144:ef7eb2e8f9f7 130 #define GPIO_AF6_SPI3 ((uint8_t)0x06U) /* SPI3/I2S3 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 131 #define GPIO_AF6_SAI1 ((uint8_t)0x06U) /* SAI1 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 132 #if defined (STM32F765xx) || defined(STM32F767xx) || defined(STM32F769xx) || defined(STM32F777xx) || defined(STM32F779xx)
<> 144:ef7eb2e8f9f7 133 #define GPIO_AF6_UART4 ((uint8_t)0x06U) /* UART4 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 134 #define GPIO_AF6_DFSDM1 ((uint8_t)0x06U) /* DFSDM1 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 135 #endif /* STM32F767xx || STM32F769xx || STM32F777xx || STM32F779xx */
<> 144:ef7eb2e8f9f7 136
<> 144:ef7eb2e8f9f7 137 /**
<> 144:ef7eb2e8f9f7 138 * @brief AF 7 selection
<> 144:ef7eb2e8f9f7 139 */
<> 144:ef7eb2e8f9f7 140 #define GPIO_AF7_USART1 ((uint8_t)0x07U) /* USART1 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 141 #define GPIO_AF7_USART2 ((uint8_t)0x07U) /* USART2 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 142 #define GPIO_AF7_USART3 ((uint8_t)0x07U) /* USART3 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 143 #define GPIO_AF7_UART5 ((uint8_t)0x07U) /* UART5 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 144 #define GPIO_AF7_SPDIFRX ((uint8_t)0x07U) /* SPDIF-RX Alternate Function mapping */
<> 144:ef7eb2e8f9f7 145 #define GPIO_AF7_SPI2 ((uint8_t)0x07U) /* SPI2 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 146 #define GPIO_AF7_SPI3 ((uint8_t)0x07U) /* SPI3 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 147 #if defined (STM32F765xx) || defined(STM32F767xx) || defined(STM32F769xx) || defined(STM32F777xx) || defined(STM32F779xx)
<> 144:ef7eb2e8f9f7 148 #define GPIO_AF7_SPI6 ((uint8_t)0x07U) /* SPI6 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 149 #define GPIO_AF7_DFSDM1 ((uint8_t)0x07U) /* DFSDM1 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 150 #endif /* STM32F767xx || STM32F769xx || STM32F777xx || STM32F779xx */
<> 144:ef7eb2e8f9f7 151
<> 144:ef7eb2e8f9f7 152 /**
<> 144:ef7eb2e8f9f7 153 * @brief AF 8 selection
<> 144:ef7eb2e8f9f7 154 */
<> 144:ef7eb2e8f9f7 155 #define GPIO_AF8_UART4 ((uint8_t)0x08U) /* UART4 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 156 #define GPIO_AF8_UART5 ((uint8_t)0x08U) /* UART5 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 157 #define GPIO_AF8_USART6 ((uint8_t)0x08U) /* USART6 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 158 #define GPIO_AF8_UART7 ((uint8_t)0x08U) /* UART7 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 159 #define GPIO_AF8_UART8 ((uint8_t)0x08U) /* UART8 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 160 #define GPIO_AF8_SPDIFRX ((uint8_t)0x08U) /* SPIDIF-RX Alternate Function mapping */
<> 144:ef7eb2e8f9f7 161 #define GPIO_AF8_SAI2 ((uint8_t)0x08U) /* SAI2 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 162 #if defined (STM32F765xx) || defined(STM32F767xx) || defined(STM32F769xx) || defined(STM32F777xx) || defined(STM32F779xx)
<> 144:ef7eb2e8f9f7 163 #define GPIO_AF8_SPI6 ((uint8_t)0x08U) /* SPI6 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 164 #endif /* STM32F767xx || STM32F769xx || STM32F777xx || STM32F779xx */
<> 144:ef7eb2e8f9f7 165
<> 144:ef7eb2e8f9f7 166
<> 144:ef7eb2e8f9f7 167 /**
<> 144:ef7eb2e8f9f7 168 * @brief AF 9 selection
<> 144:ef7eb2e8f9f7 169 */
<> 144:ef7eb2e8f9f7 170 #define GPIO_AF9_CAN1 ((uint8_t)0x09U) /* CAN1 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 171 #define GPIO_AF9_CAN2 ((uint8_t)0x09U) /* CAN2 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 172 #define GPIO_AF9_TIM12 ((uint8_t)0x09U) /* TIM12 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 173 #define GPIO_AF9_TIM13 ((uint8_t)0x09U) /* TIM13 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 174 #define GPIO_AF9_TIM14 ((uint8_t)0x09U) /* TIM14 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 175 #define GPIO_AF9_QUADSPI ((uint8_t)0x09U) /* QUADSPI Alternate Function mapping */
<> 144:ef7eb2e8f9f7 176 #if defined(STM32F746xx) || defined(STM32F756xx) || defined(STM32F767xx) || defined(STM32F769xx) || defined(STM32F777xx) || defined(STM32F779xx)
<> 144:ef7eb2e8f9f7 177 #define GPIO_AF9_LTDC ((uint8_t)0x09U) /* LCD-TFT Alternate Function mapping */
<> 144:ef7eb2e8f9f7 178 #endif /* STM32F746xx || STM32F756xx || STM32F767xx || STM32F769xx || STM32F777xx || STM32F779xx */
<> 144:ef7eb2e8f9f7 179 #if defined(STM32F746xx) || defined(STM32F756xx) || defined(STM32F765xx) || defined(STM32F765xx) || defined(STM32F767xx) || defined(STM32F769xx) || defined(STM32F777xx) || defined(STM32F779xx)
<> 144:ef7eb2e8f9f7 180 #define GPIO_AF9_FMC ((uint8_t)0x09U) /* FMC Alternate Function mapping */
<> 144:ef7eb2e8f9f7 181 #endif /* STM32F746xx || STM32F756xx || STM32F767xx || STM32F769xx || STM32F777xx || STM32F779xx */
<> 144:ef7eb2e8f9f7 182 /**
<> 144:ef7eb2e8f9f7 183 * @brief AF 10 selection
<> 144:ef7eb2e8f9f7 184 */
<> 144:ef7eb2e8f9f7 185 #define GPIO_AF10_OTG_FS ((uint8_t)0xAU) /* OTG_FS Alternate Function mapping */
<> 144:ef7eb2e8f9f7 186 #define GPIO_AF10_OTG_HS ((uint8_t)0xAU) /* OTG_HS Alternate Function mapping */
<> 144:ef7eb2e8f9f7 187 #define GPIO_AF10_QUADSPI ((uint8_t)0xAU) /* QUADSPI Alternate Function mapping */
<> 144:ef7eb2e8f9f7 188 #define GPIO_AF10_SAI2 ((uint8_t)0xAU) /* SAI2 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 189 #if defined (STM32F765xx) || defined(STM32F767xx) || defined(STM32F769xx) || defined(STM32F777xx) || defined(STM32F779xx)
<> 144:ef7eb2e8f9f7 190 #define GPIO_AF10_DFSDM1 ((uint8_t)0x0AU) /* DFSDM1 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 191 #define GPIO_AF10_SDMMC2 ((uint8_t)0x0AU) /* SDMMC2 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 192 #endif /* STM32F767xx || STM32F769xx || STM32F777xx || STM32F779xx */
<> 144:ef7eb2e8f9f7 193
<> 144:ef7eb2e8f9f7 194 /**
<> 144:ef7eb2e8f9f7 195 * @brief AF 11 selection
<> 144:ef7eb2e8f9f7 196 */
<> 144:ef7eb2e8f9f7 197 #define GPIO_AF11_ETH ((uint8_t)0x0BU) /* ETHERNET Alternate Function mapping */
<> 144:ef7eb2e8f9f7 198 #if defined(STM32F765xx) || defined (STM32F767xx) || defined (STM32F769xx) || defined (STM32F777xx) || defined (STM32F779xx)
<> 144:ef7eb2e8f9f7 199 #define GPIO_AF11_CAN3 ((uint8_t)0x0BU) /* CAN3 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 200 #define GPIO_AF11_SDMMC2 ((uint8_t)0x0BU) /* SDMMC2 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 201 #define GPIO_AF11_I2C4 ((uint8_t)0x0BU) /* I2C4 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 202 #endif /* STM32F767xx || STM32F769xx || STM32F777xx || STM32F779xx */
<> 144:ef7eb2e8f9f7 203
<> 144:ef7eb2e8f9f7 204 /**
<> 144:ef7eb2e8f9f7 205 * @brief AF 12 selection
<> 144:ef7eb2e8f9f7 206 */
<> 144:ef7eb2e8f9f7 207 #define GPIO_AF12_FMC ((uint8_t)0xCU) /* FMC Alternate Function mapping */
<> 144:ef7eb2e8f9f7 208 #define GPIO_AF12_OTG_HS_FS ((uint8_t)0xCU) /* OTG HS configured in FS, Alternate Function mapping */
<> 144:ef7eb2e8f9f7 209 #define GPIO_AF12_SDMMC1 ((uint8_t)0xCU) /* SDMMC1 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 210 #if defined(STM32F765xx) || defined (STM32F767xx) || defined (STM32F769xx) || defined (STM32F777xx) || defined (STM32F779xx)
<> 144:ef7eb2e8f9f7 211 #define GPIO_AF12_MDIOS ((uint8_t)0xCU) /* SDMMC1 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 212 #define GPIO_AF12_UART7 ((uint8_t)0xCU) /* UART7 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 213 #endif /* STM32F767xx || STM32F769xx || STM32F777xx || STM32F779xx */
<> 144:ef7eb2e8f9f7 214
<> 144:ef7eb2e8f9f7 215 /**
<> 144:ef7eb2e8f9f7 216 * @brief AF 13 selection
<> 144:ef7eb2e8f9f7 217 */
<> 144:ef7eb2e8f9f7 218 #define GPIO_AF13_DCMI ((uint8_t)0x0DU) /* DCMI Alternate Function mapping */
<> 144:ef7eb2e8f9f7 219 #if defined (STM32F769xx) || defined (STM32F779xx)
<> 144:ef7eb2e8f9f7 220 #define GPIO_AF13_DSI ((uint8_t)0x0DU) /* DSI Alternate Function mapping */
<> 144:ef7eb2e8f9f7 221 #endif /* STM32F767xx || STM32F769xx || STM32F777xx || STM32F779xx */
<> 144:ef7eb2e8f9f7 222 #if defined(STM32F746xx) || defined(STM32F756xx) || defined(STM32F767xx) || defined(STM32F769xx) || defined(STM32F777xx) || defined(STM32F779xx)
<> 144:ef7eb2e8f9f7 223 #define GPIO_AF13_LTDC ((uint8_t)0x0DU) /* LTDC Alternate Function mapping */
<> 144:ef7eb2e8f9f7 224
<> 144:ef7eb2e8f9f7 225 /**
<> 144:ef7eb2e8f9f7 226 * @brief AF 14 selection
<> 144:ef7eb2e8f9f7 227 */
<> 144:ef7eb2e8f9f7 228 #define GPIO_AF14_LTDC ((uint8_t)0x0EU) /* LCD-TFT Alternate Function mapping */
<> 144:ef7eb2e8f9f7 229 #endif /* STM32F746xx || STM32F756xx || STM32F767xx || STM32F769xx || STM32F777xx || STM32F779xx */
<> 144:ef7eb2e8f9f7 230 /**
<> 144:ef7eb2e8f9f7 231 * @brief AF 15 selection
<> 144:ef7eb2e8f9f7 232 */
<> 144:ef7eb2e8f9f7 233 #define GPIO_AF15_EVENTOUT ((uint8_t)0x0FU) /* EVENTOUT Alternate Function mapping */
<> 144:ef7eb2e8f9f7 234
<> 144:ef7eb2e8f9f7 235
<> 144:ef7eb2e8f9f7 236 /**
<> 144:ef7eb2e8f9f7 237 * @}
<> 144:ef7eb2e8f9f7 238 */
<> 144:ef7eb2e8f9f7 239
<> 144:ef7eb2e8f9f7 240 /**
<> 144:ef7eb2e8f9f7 241 * @}
<> 144:ef7eb2e8f9f7 242 */
<> 144:ef7eb2e8f9f7 243
<> 144:ef7eb2e8f9f7 244 /* Exported macro ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 245 /** @defgroup GPIOEx_Exported_Macros GPIO Exported Macros
<> 144:ef7eb2e8f9f7 246 * @{
<> 144:ef7eb2e8f9f7 247 */
<> 144:ef7eb2e8f9f7 248 /**
<> 144:ef7eb2e8f9f7 249 * @}
<> 144:ef7eb2e8f9f7 250 */
<> 144:ef7eb2e8f9f7 251
<> 144:ef7eb2e8f9f7 252 /* Exported functions --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 253 /** @defgroup GPIOEx_Exported_Functions GPIO Exported Functions
<> 144:ef7eb2e8f9f7 254 * @{
<> 144:ef7eb2e8f9f7 255 */
<> 144:ef7eb2e8f9f7 256 /**
<> 144:ef7eb2e8f9f7 257 * @}
<> 144:ef7eb2e8f9f7 258 */
<> 144:ef7eb2e8f9f7 259 /* Private types -------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 260 /* Private variables ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 261 /* Private constants ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 262 /** @defgroup GPIOEx_Private_Constants GPIO Private Constants
<> 144:ef7eb2e8f9f7 263 * @{
<> 144:ef7eb2e8f9f7 264 */
<> 144:ef7eb2e8f9f7 265
<> 144:ef7eb2e8f9f7 266 /**
<> 144:ef7eb2e8f9f7 267 * @brief GPIO pin available on the platform
<> 144:ef7eb2e8f9f7 268 */
<> 144:ef7eb2e8f9f7 269 /* Defines the available pins per GPIOs */
<> 144:ef7eb2e8f9f7 270 #define GPIOA_PIN_AVAILABLE GPIO_PIN_All
<> 144:ef7eb2e8f9f7 271 #define GPIOB_PIN_AVAILABLE GPIO_PIN_All
<> 144:ef7eb2e8f9f7 272 #define GPIOC_PIN_AVAILABLE GPIO_PIN_All
<> 144:ef7eb2e8f9f7 273 #define GPIOD_PIN_AVAILABLE GPIO_PIN_All
<> 144:ef7eb2e8f9f7 274 #define GPIOE_PIN_AVAILABLE GPIO_PIN_All
<> 144:ef7eb2e8f9f7 275 #define GPIOF_PIN_AVAILABLE GPIO_PIN_All
<> 144:ef7eb2e8f9f7 276 #define GPIOG_PIN_AVAILABLE GPIO_PIN_All
<> 144:ef7eb2e8f9f7 277 #define GPIOI_PIN_AVAILABLE GPIO_PIN_All
<> 144:ef7eb2e8f9f7 278 #define GPIOJ_PIN_AVAILABLE GPIO_PIN_All
<> 144:ef7eb2e8f9f7 279 #define GPIOH_PIN_AVAILABLE GPIO_PIN_All
<> 144:ef7eb2e8f9f7 280 #define GPIOK_PIN_AVAILABLE (GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_3 | GPIO_PIN_4 | \
<> 144:ef7eb2e8f9f7 281 GPIO_PIN_5 | GPIO_PIN_6 | GPIO_PIN_7)
<> 144:ef7eb2e8f9f7 282
<> 144:ef7eb2e8f9f7 283 /**
<> 144:ef7eb2e8f9f7 284 * @}
<> 144:ef7eb2e8f9f7 285 */
<> 144:ef7eb2e8f9f7 286
<> 144:ef7eb2e8f9f7 287 /* Private macros ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 288 /** @defgroup GPIOEx_Private_Macros GPIO Private Macros
<> 144:ef7eb2e8f9f7 289 * @{
<> 144:ef7eb2e8f9f7 290 */
<> 144:ef7eb2e8f9f7 291 /** @defgroup GPIOEx_Get_Port_Index GPIO Get Port Index
<> 144:ef7eb2e8f9f7 292 * @{
<> 144:ef7eb2e8f9f7 293 */
<> 144:ef7eb2e8f9f7 294 #define GPIO_GET_INDEX(__GPIOx__) (uint8_t)(((__GPIOx__) == (GPIOA))? 0U :\
<> 144:ef7eb2e8f9f7 295 ((__GPIOx__) == (GPIOB))? 1U :\
<> 144:ef7eb2e8f9f7 296 ((__GPIOx__) == (GPIOC))? 2U :\
<> 144:ef7eb2e8f9f7 297 ((__GPIOx__) == (GPIOD))? 3U :\
<> 144:ef7eb2e8f9f7 298 ((__GPIOx__) == (GPIOE))? 4U :\
<> 144:ef7eb2e8f9f7 299 ((__GPIOx__) == (GPIOF))? 5U :\
<> 144:ef7eb2e8f9f7 300 ((__GPIOx__) == (GPIOG))? 6U :\
<> 144:ef7eb2e8f9f7 301 ((__GPIOx__) == (GPIOH))? 7U :\
<> 144:ef7eb2e8f9f7 302 ((__GPIOx__) == (GPIOI))? 8U :\
<> 144:ef7eb2e8f9f7 303 ((__GPIOx__) == (GPIOJ))? 9U : 10U)
<> 144:ef7eb2e8f9f7 304 /**
<> 144:ef7eb2e8f9f7 305 * @}
<> 144:ef7eb2e8f9f7 306 */
<> 144:ef7eb2e8f9f7 307
<> 144:ef7eb2e8f9f7 308 #define IS_GPIO_PIN_AVAILABLE(__INSTANCE__,__PIN__) \
<> 144:ef7eb2e8f9f7 309 ((((__INSTANCE__) == GPIOA) && (((__PIN__) & (GPIOA_PIN_AVAILABLE)) != 0) && (((__PIN__) | (GPIOA_PIN_AVAILABLE)) == (GPIOA_PIN_AVAILABLE))) || \
<> 144:ef7eb2e8f9f7 310 (((__INSTANCE__) == GPIOB) && (((__PIN__) & (GPIOB_PIN_AVAILABLE)) != 0) && (((__PIN__) | (GPIOB_PIN_AVAILABLE)) == (GPIOB_PIN_AVAILABLE))) || \
<> 144:ef7eb2e8f9f7 311 (((__INSTANCE__) == GPIOC) && (((__PIN__) & (GPIOC_PIN_AVAILABLE)) != 0) && (((__PIN__) | (GPIOC_PIN_AVAILABLE)) == (GPIOC_PIN_AVAILABLE))) || \
<> 144:ef7eb2e8f9f7 312 (((__INSTANCE__) == GPIOD) && (((__PIN__) & (GPIOD_PIN_AVAILABLE)) != 0) && (((__PIN__) | (GPIOD_PIN_AVAILABLE)) == (GPIOD_PIN_AVAILABLE))) || \
<> 144:ef7eb2e8f9f7 313 (((__INSTANCE__) == GPIOE) && (((__PIN__) & (GPIOE_PIN_AVAILABLE)) != 0) && (((__PIN__) | (GPIOE_PIN_AVAILABLE)) == (GPIOE_PIN_AVAILABLE))) || \
<> 144:ef7eb2e8f9f7 314 (((__INSTANCE__) == GPIOF) && (((__PIN__) & (GPIOF_PIN_AVAILABLE)) != 0) && (((__PIN__) | (GPIOF_PIN_AVAILABLE)) == (GPIOF_PIN_AVAILABLE))) || \
<> 144:ef7eb2e8f9f7 315 (((__INSTANCE__) == GPIOG) && (((__PIN__) & (GPIOG_PIN_AVAILABLE)) != 0) && (((__PIN__) | (GPIOG_PIN_AVAILABLE)) == (GPIOG_PIN_AVAILABLE))) || \
<> 144:ef7eb2e8f9f7 316 (((__INSTANCE__) == GPIOI) && (((__PIN__) & (GPIOI_PIN_AVAILABLE)) != 0) && (((__PIN__) | (GPIOI_PIN_AVAILABLE)) == (GPIOI_PIN_AVAILABLE))) || \
<> 144:ef7eb2e8f9f7 317 (((__INSTANCE__) == GPIOJ) && (((__PIN__) & (GPIOJ_PIN_AVAILABLE)) != 0) && (((__PIN__) | (GPIOJ_PIN_AVAILABLE)) == (GPIOJ_PIN_AVAILABLE))) || \
<> 144:ef7eb2e8f9f7 318 (((__INSTANCE__) == GPIOK) && (((__PIN__) & (GPIOK_PIN_AVAILABLE)) != 0) && (((__PIN__) | (GPIOK_PIN_AVAILABLE)) == (GPIOK_PIN_AVAILABLE))) || \
<> 144:ef7eb2e8f9f7 319 (((__INSTANCE__) == GPIOH) && (((__PIN__) & (GPIOH_PIN_AVAILABLE)) != 0) && (((__PIN__) | (GPIOH_PIN_AVAILABLE)) == (GPIOH_PIN_AVAILABLE))))
<> 144:ef7eb2e8f9f7 320 /** @defgroup GPIOEx_IS_Alternat_function_selection GPIO Check Alternate Function
<> 144:ef7eb2e8f9f7 321 * @{
<> 144:ef7eb2e8f9f7 322 */
<> 144:ef7eb2e8f9f7 323 #if defined(STM32F756xx) || defined(STM32F746xx)
<> 144:ef7eb2e8f9f7 324 #define IS_GPIO_AF(AF) (((AF) == GPIO_AF0_RTC_50Hz) || ((AF) == GPIO_AF1_TIM1) || \
<> 144:ef7eb2e8f9f7 325 ((AF) == GPIO_AF0_SWJ) || ((AF) == GPIO_AF0_TRACE) || \
<> 144:ef7eb2e8f9f7 326 ((AF) == GPIO_AF0_MCO) || ((AF) == GPIO_AF1_TIM2) || \
<> 144:ef7eb2e8f9f7 327 ((AF) == GPIO_AF2_TIM3) || ((AF) == GPIO_AF2_TIM4) || \
<> 144:ef7eb2e8f9f7 328 ((AF) == GPIO_AF2_TIM5) || ((AF) == GPIO_AF3_TIM8) || \
<> 144:ef7eb2e8f9f7 329 ((AF) == GPIO_AF3_TIM9) || ((AF) == GPIO_AF3_TIM10) || \
<> 144:ef7eb2e8f9f7 330 ((AF) == GPIO_AF3_TIM11) || ((AF) == GPIO_AF3_LPTIM1) || \
<> 144:ef7eb2e8f9f7 331 ((AF) == GPIO_AF3_CEC) || ((AF) == GPIO_AF4_CEC) || \
<> 144:ef7eb2e8f9f7 332 ((AF) == GPIO_AF4_I2C1) || ((AF) == GPIO_AF4_I2C2) || \
<> 144:ef7eb2e8f9f7 333 ((AF) == GPIO_AF4_I2C3) || ((AF) == GPIO_AF4_I2C4) || \
<> 144:ef7eb2e8f9f7 334 ((AF) == GPIO_AF5_SPI1) || ((AF) == GPIO_AF5_SPI2) || \
<> 144:ef7eb2e8f9f7 335 ((AF) == GPIO_AF5_SPI3) || ((AF) == GPIO_AF5_SPI4) || \
<> 144:ef7eb2e8f9f7 336 ((AF) == GPIO_AF5_SPI5) || ((AF) == GPIO_AF5_SPI6) || \
<> 144:ef7eb2e8f9f7 337 ((AF) == GPIO_AF6_SPI3) || ((AF) == GPIO_AF6_SAI1) || \
<> 144:ef7eb2e8f9f7 338 ((AF) == GPIO_AF7_SPI3) || ((AF) == GPIO_AF7_SPI2) || \
<> 144:ef7eb2e8f9f7 339 ((AF) == GPIO_AF7_USART1) || ((AF) == GPIO_AF7_USART2) || \
<> 144:ef7eb2e8f9f7 340 ((AF) == GPIO_AF7_USART3) || ((AF) == GPIO_AF7_UART5) || \
<> 144:ef7eb2e8f9f7 341 ((AF) == GPIO_AF7_SPDIFRX) || ((AF) == GPIO_AF8_SPDIFRX) || \
<> 144:ef7eb2e8f9f7 342 ((AF) == GPIO_AF8_SAI2) || ((AF) == GPIO_AF8_USART6) || \
<> 144:ef7eb2e8f9f7 343 ((AF) == GPIO_AF8_UART4) || ((AF) == GPIO_AF8_UART5) || \
<> 144:ef7eb2e8f9f7 344 ((AF) == GPIO_AF8_UART7) || ((AF) == GPIO_AF8_UART8) || \
<> 144:ef7eb2e8f9f7 345 ((AF) == GPIO_AF9_CAN1) || ((AF) == GPIO_AF9_CAN2) || \
<> 144:ef7eb2e8f9f7 346 ((AF) == GPIO_AF9_TIM12) || ((AF) == GPIO_AF9_TIM12) || \
<> 144:ef7eb2e8f9f7 347 ((AF) == GPIO_AF9_TIM14) || ((AF) == GPIO_AF9_QUADSPI) || \
<> 144:ef7eb2e8f9f7 348 ((AF) == GPIO_AF9_LTDC) || ((AF) == GPIO_AF10_OTG_FS) || \
<> 144:ef7eb2e8f9f7 349 ((AF) == GPIO_AF10_OTG_HS) || ((AF) == GPIO_AF10_SAI2) || \
<> 144:ef7eb2e8f9f7 350 ((AF) == GPIO_AF10_QUADSPI) || ((AF) == GPIO_AF11_ETH) || \
<> 144:ef7eb2e8f9f7 351 ((AF) == GPIO_AF12_OTG_HS_FS) || ((AF) == GPIO_AF12_SDMMC1) || \
<> 144:ef7eb2e8f9f7 352 ((AF) == GPIO_AF12_FMC) || ((AF) == GPIO_AF15_EVENTOUT) || \
<> 144:ef7eb2e8f9f7 353 ((AF) == GPIO_AF13_DCMI) || ((AF) == GPIO_AF14_LTDC))
<> 144:ef7eb2e8f9f7 354 #elif defined(STM32F745xx)
<> 144:ef7eb2e8f9f7 355 #define IS_GPIO_AF(AF) (((AF) == GPIO_AF0_RTC_50Hz) || ((AF) == GPIO_AF1_TIM1) || \
<> 144:ef7eb2e8f9f7 356 ((AF) == GPIO_AF0_SWJ) || ((AF) == GPIO_AF0_TRACE) || \
<> 144:ef7eb2e8f9f7 357 ((AF) == GPIO_AF0_MCO) || ((AF) == GPIO_AF1_TIM2) || \
<> 144:ef7eb2e8f9f7 358 ((AF) == GPIO_AF2_TIM3) || ((AF) == GPIO_AF2_TIM4) || \
<> 144:ef7eb2e8f9f7 359 ((AF) == GPIO_AF2_TIM5) || ((AF) == GPIO_AF3_TIM8) || \
<> 144:ef7eb2e8f9f7 360 ((AF) == GPIO_AF3_TIM9) || ((AF) == GPIO_AF3_TIM10) || \
<> 144:ef7eb2e8f9f7 361 ((AF) == GPIO_AF3_TIM11) || ((AF) == GPIO_AF3_LPTIM1) || \
<> 144:ef7eb2e8f9f7 362 ((AF) == GPIO_AF3_CEC) || ((AF) == GPIO_AF4_CEC) || \
<> 144:ef7eb2e8f9f7 363 ((AF) == GPIO_AF4_I2C1) || ((AF) == GPIO_AF4_I2C2) || \
<> 144:ef7eb2e8f9f7 364 ((AF) == GPIO_AF4_I2C3) || ((AF) == GPIO_AF4_I2C4) || \
<> 144:ef7eb2e8f9f7 365 ((AF) == GPIO_AF5_SPI1) || ((AF) == GPIO_AF5_SPI2) || \
<> 144:ef7eb2e8f9f7 366 ((AF) == GPIO_AF5_SPI3) || ((AF) == GPIO_AF5_SPI4) || \
<> 144:ef7eb2e8f9f7 367 ((AF) == GPIO_AF5_SPI5) || ((AF) == GPIO_AF5_SPI6) || \
<> 144:ef7eb2e8f9f7 368 ((AF) == GPIO_AF6_SPI3) || ((AF) == GPIO_AF6_SAI1) || \
<> 144:ef7eb2e8f9f7 369 ((AF) == GPIO_AF7_SPI3) || ((AF) == GPIO_AF7_SPI2) || \
<> 144:ef7eb2e8f9f7 370 ((AF) == GPIO_AF7_USART1) || ((AF) == GPIO_AF7_USART2) || \
<> 144:ef7eb2e8f9f7 371 ((AF) == GPIO_AF7_USART3) || ((AF) == GPIO_AF7_UART5) || \
<> 144:ef7eb2e8f9f7 372 ((AF) == GPIO_AF7_SPDIFRX) || ((AF) == GPIO_AF8_SPDIFRX) || \
<> 144:ef7eb2e8f9f7 373 ((AF) == GPIO_AF8_SAI2) || ((AF) == GPIO_AF8_USART6) || \
<> 144:ef7eb2e8f9f7 374 ((AF) == GPIO_AF8_UART4) || ((AF) == GPIO_AF8_UART5) || \
<> 144:ef7eb2e8f9f7 375 ((AF) == GPIO_AF8_UART7) || ((AF) == GPIO_AF8_UART8) || \
<> 144:ef7eb2e8f9f7 376 ((AF) == GPIO_AF9_CAN1) || ((AF) == GPIO_AF9_CAN2) || \
<> 144:ef7eb2e8f9f7 377 ((AF) == GPIO_AF9_TIM12) || ((AF) == GPIO_AF9_TIM12) || \
<> 144:ef7eb2e8f9f7 378 ((AF) == GPIO_AF9_TIM14) || ((AF) == GPIO_AF9_QUADSPI) || \
<> 144:ef7eb2e8f9f7 379 ((AF) == GPIO_AF13_DCMI) || ((AF) == GPIO_AF10_OTG_FS) || \
<> 144:ef7eb2e8f9f7 380 ((AF) == GPIO_AF10_OTG_HS) || ((AF) == GPIO_AF10_SAI2) || \
<> 144:ef7eb2e8f9f7 381 ((AF) == GPIO_AF10_QUADSPI) || ((AF) == GPIO_AF11_ETH) || \
<> 144:ef7eb2e8f9f7 382 ((AF) == GPIO_AF12_OTG_HS_FS) || ((AF) == GPIO_AF12_SDMMC1) || \
<> 144:ef7eb2e8f9f7 383 ((AF) == GPIO_AF12_FMC) || ((AF) == GPIO_AF15_EVENTOUT))
<> 144:ef7eb2e8f9f7 384 #elif defined(STM32F767xx) || defined(STM32F777xx)
<> 144:ef7eb2e8f9f7 385 #define IS_GPIO_AF(AF) (((AF) == GPIO_AF0_RTC_50Hz) || ((AF) == GPIO_AF1_TIM1) || \
<> 144:ef7eb2e8f9f7 386 ((AF) == GPIO_AF0_SWJ) || ((AF) == GPIO_AF0_TRACE) || \
<> 144:ef7eb2e8f9f7 387 ((AF) == GPIO_AF0_MCO) || ((AF) == GPIO_AF1_TIM2) || \
<> 144:ef7eb2e8f9f7 388 ((AF) == GPIO_AF2_TIM3) || ((AF) == GPIO_AF2_TIM4) || \
<> 144:ef7eb2e8f9f7 389 ((AF) == GPIO_AF2_TIM5) || ((AF) == GPIO_AF3_TIM8) || \
<> 144:ef7eb2e8f9f7 390 ((AF) == GPIO_AF3_TIM9) || ((AF) == GPIO_AF3_TIM10) || \
<> 144:ef7eb2e8f9f7 391 ((AF) == GPIO_AF3_TIM11) || ((AF) == GPIO_AF3_LPTIM1) || \
<> 144:ef7eb2e8f9f7 392 ((AF) == GPIO_AF3_CEC) || ((AF) == GPIO_AF4_CEC) || \
<> 144:ef7eb2e8f9f7 393 ((AF) == GPIO_AF4_I2C1) || ((AF) == GPIO_AF4_I2C2) || \
<> 144:ef7eb2e8f9f7 394 ((AF) == GPIO_AF4_I2C3) || ((AF) == GPIO_AF4_I2C4) || \
<> 144:ef7eb2e8f9f7 395 ((AF) == GPIO_AF5_SPI1) || ((AF) == GPIO_AF5_SPI2) || \
<> 144:ef7eb2e8f9f7 396 ((AF) == GPIO_AF5_SPI3) || ((AF) == GPIO_AF5_SPI4) || \
<> 144:ef7eb2e8f9f7 397 ((AF) == GPIO_AF5_SPI5) || ((AF) == GPIO_AF5_SPI6) || \
<> 144:ef7eb2e8f9f7 398 ((AF) == GPIO_AF6_SPI3) || ((AF) == GPIO_AF6_SAI1) || \
<> 144:ef7eb2e8f9f7 399 ((AF) == GPIO_AF7_SPI3) || ((AF) == GPIO_AF7_SPI2) || \
<> 144:ef7eb2e8f9f7 400 ((AF) == GPIO_AF7_USART1) || ((AF) == GPIO_AF7_USART2) || \
<> 144:ef7eb2e8f9f7 401 ((AF) == GPIO_AF7_USART3) || ((AF) == GPIO_AF7_UART5) || \
<> 144:ef7eb2e8f9f7 402 ((AF) == GPIO_AF7_SPDIFRX) || ((AF) == GPIO_AF8_SPDIFRX) || \
<> 144:ef7eb2e8f9f7 403 ((AF) == GPIO_AF8_SAI2) || ((AF) == GPIO_AF8_USART6) || \
<> 144:ef7eb2e8f9f7 404 ((AF) == GPIO_AF8_UART4) || ((AF) == GPIO_AF8_UART5) || \
<> 144:ef7eb2e8f9f7 405 ((AF) == GPIO_AF8_UART7) || ((AF) == GPIO_AF8_UART8) || \
<> 144:ef7eb2e8f9f7 406 ((AF) == GPIO_AF9_CAN1) || ((AF) == GPIO_AF9_CAN2) || \
<> 144:ef7eb2e8f9f7 407 ((AF) == GPIO_AF9_TIM12) || ((AF) == GPIO_AF9_TIM12) || \
<> 144:ef7eb2e8f9f7 408 ((AF) == GPIO_AF9_TIM14) || ((AF) == GPIO_AF9_QUADSPI) || \
<> 144:ef7eb2e8f9f7 409 ((AF) == GPIO_AF10_OTG_FS) || ((AF) == GPIO_AF9_LTDC) || \
<> 144:ef7eb2e8f9f7 410 ((AF) == GPIO_AF10_OTG_HS) || ((AF) == GPIO_AF10_SAI2) || \
<> 144:ef7eb2e8f9f7 411 ((AF) == GPIO_AF10_QUADSPI) || ((AF) == GPIO_AF11_ETH) || \
<> 144:ef7eb2e8f9f7 412 ((AF) == GPIO_AF11_CAN3) || ((AF) == GPIO_AF12_OTG_HS_FS) || \
<> 144:ef7eb2e8f9f7 413 ((AF) == GPIO_AF12_SDMMC1) || ((AF) == GPIO_AF12_FMC) || \
<> 144:ef7eb2e8f9f7 414 ((AF) == GPIO_AF15_EVENTOUT) || ((AF) == GPIO_AF13_DCMI) || \
<> 144:ef7eb2e8f9f7 415 ((AF) == GPIO_AF14_LTDC))
<> 144:ef7eb2e8f9f7 416 #elif defined(STM32F769xx) || defined(STM32F779xx)
<> 144:ef7eb2e8f9f7 417 #define IS_GPIO_AF(AF) (((AF) == GPIO_AF0_RTC_50Hz) || ((AF) == GPIO_AF1_TIM1) || \
<> 144:ef7eb2e8f9f7 418 ((AF) == GPIO_AF0_SWJ) || ((AF) == GPIO_AF0_TRACE) || \
<> 144:ef7eb2e8f9f7 419 ((AF) == GPIO_AF0_MCO) || ((AF) == GPIO_AF1_TIM2) || \
<> 144:ef7eb2e8f9f7 420 ((AF) == GPIO_AF2_TIM3) || ((AF) == GPIO_AF2_TIM4) || \
<> 144:ef7eb2e8f9f7 421 ((AF) == GPIO_AF2_TIM5) || ((AF) == GPIO_AF3_TIM8) || \
<> 144:ef7eb2e8f9f7 422 ((AF) == GPIO_AF3_TIM9) || ((AF) == GPIO_AF3_TIM10) || \
<> 144:ef7eb2e8f9f7 423 ((AF) == GPIO_AF3_TIM11) || ((AF) == GPIO_AF3_LPTIM1) || \
<> 144:ef7eb2e8f9f7 424 ((AF) == GPIO_AF3_CEC) || ((AF) == GPIO_AF4_CEC) || \
<> 144:ef7eb2e8f9f7 425 ((AF) == GPIO_AF4_I2C1) || ((AF) == GPIO_AF4_I2C2) || \
<> 144:ef7eb2e8f9f7 426 ((AF) == GPIO_AF4_I2C3) || ((AF) == GPIO_AF4_I2C4) || \
<> 144:ef7eb2e8f9f7 427 ((AF) == GPIO_AF5_SPI1) || ((AF) == GPIO_AF5_SPI2) || \
<> 144:ef7eb2e8f9f7 428 ((AF) == GPIO_AF5_SPI3) || ((AF) == GPIO_AF5_SPI4) || \
<> 144:ef7eb2e8f9f7 429 ((AF) == GPIO_AF5_SPI5) || ((AF) == GPIO_AF5_SPI6) || \
<> 144:ef7eb2e8f9f7 430 ((AF) == GPIO_AF6_SPI3) || ((AF) == GPIO_AF6_SAI1) || \
<> 144:ef7eb2e8f9f7 431 ((AF) == GPIO_AF7_SPI3) || ((AF) == GPIO_AF7_SPI2) || \
<> 144:ef7eb2e8f9f7 432 ((AF) == GPIO_AF7_USART1) || ((AF) == GPIO_AF7_USART2) || \
<> 144:ef7eb2e8f9f7 433 ((AF) == GPIO_AF7_USART3) || ((AF) == GPIO_AF7_UART5) || \
<> 144:ef7eb2e8f9f7 434 ((AF) == GPIO_AF7_SPDIFRX) || ((AF) == GPIO_AF8_SPDIFRX) || \
<> 144:ef7eb2e8f9f7 435 ((AF) == GPIO_AF8_SAI2) || ((AF) == GPIO_AF8_USART6) || \
<> 144:ef7eb2e8f9f7 436 ((AF) == GPIO_AF8_UART4) || ((AF) == GPIO_AF8_UART5) || \
<> 144:ef7eb2e8f9f7 437 ((AF) == GPIO_AF8_UART7) || ((AF) == GPIO_AF8_UART8) || \
<> 144:ef7eb2e8f9f7 438 ((AF) == GPIO_AF9_CAN1) || ((AF) == GPIO_AF9_CAN2) || \
<> 144:ef7eb2e8f9f7 439 ((AF) == GPIO_AF9_TIM12) || ((AF) == GPIO_AF9_TIM12) || \
<> 144:ef7eb2e8f9f7 440 ((AF) == GPIO_AF9_TIM14) || ((AF) == GPIO_AF9_QUADSPI) || \
<> 144:ef7eb2e8f9f7 441 ((AF) == GPIO_AF9_LTDC) || ((AF) == GPIO_AF10_OTG_FS) || \
<> 144:ef7eb2e8f9f7 442 ((AF) == GPIO_AF10_OTG_HS) || ((AF) == GPIO_AF10_SAI2) || \
<> 144:ef7eb2e8f9f7 443 ((AF) == GPIO_AF10_QUADSPI) || ((AF) == GPIO_AF11_ETH) || \
<> 144:ef7eb2e8f9f7 444 ((AF) == GPIO_AF11_CAN3) || ((AF) == GPIO_AF12_OTG_HS_FS) || \
<> 144:ef7eb2e8f9f7 445 ((AF) == GPIO_AF12_SDMMC1) || ((AF) == GPIO_AF12_FMC) || \
<> 144:ef7eb2e8f9f7 446 ((AF) == GPIO_AF15_EVENTOUT) || ((AF) == GPIO_AF13_DCMI) || \
<> 144:ef7eb2e8f9f7 447 ((AF) == GPIO_AF14_LTDC) || ((AF) == GPIO_AF13_DSI))
<> 144:ef7eb2e8f9f7 448 #elif defined(STM32F765xx)
<> 144:ef7eb2e8f9f7 449 #define IS_GPIO_AF(AF) (((AF) == GPIO_AF0_RTC_50Hz) || ((AF) == GPIO_AF1_TIM1) || \
<> 144:ef7eb2e8f9f7 450 ((AF) == GPIO_AF0_SWJ) || ((AF) == GPIO_AF0_TRACE) || \
<> 144:ef7eb2e8f9f7 451 ((AF) == GPIO_AF0_MCO) || ((AF) == GPIO_AF1_TIM2) || \
<> 144:ef7eb2e8f9f7 452 ((AF) == GPIO_AF2_TIM3) || ((AF) == GPIO_AF2_TIM4) || \
<> 144:ef7eb2e8f9f7 453 ((AF) == GPIO_AF2_TIM5) || ((AF) == GPIO_AF3_TIM8) || \
<> 144:ef7eb2e8f9f7 454 ((AF) == GPIO_AF3_TIM9) || ((AF) == GPIO_AF3_TIM10) || \
<> 144:ef7eb2e8f9f7 455 ((AF) == GPIO_AF3_TIM11) || ((AF) == GPIO_AF3_LPTIM1) || \
<> 144:ef7eb2e8f9f7 456 ((AF) == GPIO_AF3_CEC) || ((AF) == GPIO_AF4_CEC) || \
<> 144:ef7eb2e8f9f7 457 ((AF) == GPIO_AF4_I2C1) || ((AF) == GPIO_AF4_I2C2) || \
<> 144:ef7eb2e8f9f7 458 ((AF) == GPIO_AF4_I2C3) || ((AF) == GPIO_AF4_I2C4) || \
<> 144:ef7eb2e8f9f7 459 ((AF) == GPIO_AF5_SPI1) || ((AF) == GPIO_AF5_SPI2) || \
<> 144:ef7eb2e8f9f7 460 ((AF) == GPIO_AF5_SPI3) || ((AF) == GPIO_AF5_SPI4) || \
<> 144:ef7eb2e8f9f7 461 ((AF) == GPIO_AF5_SPI5) || ((AF) == GPIO_AF5_SPI6) || \
<> 144:ef7eb2e8f9f7 462 ((AF) == GPIO_AF6_SPI3) || ((AF) == GPIO_AF6_SAI1) || \
<> 144:ef7eb2e8f9f7 463 ((AF) == GPIO_AF7_SPI3) || ((AF) == GPIO_AF7_SPI2) || \
<> 144:ef7eb2e8f9f7 464 ((AF) == GPIO_AF7_USART1) || ((AF) == GPIO_AF7_USART2) || \
<> 144:ef7eb2e8f9f7 465 ((AF) == GPIO_AF7_USART3) || ((AF) == GPIO_AF7_UART5) || \
<> 144:ef7eb2e8f9f7 466 ((AF) == GPIO_AF7_SPDIFRX) || ((AF) == GPIO_AF8_SPDIFRX) || \
<> 144:ef7eb2e8f9f7 467 ((AF) == GPIO_AF8_SAI2) || ((AF) == GPIO_AF8_USART6) || \
<> 144:ef7eb2e8f9f7 468 ((AF) == GPIO_AF8_UART4) || ((AF) == GPIO_AF8_UART5) || \
<> 144:ef7eb2e8f9f7 469 ((AF) == GPIO_AF8_UART7) || ((AF) == GPIO_AF8_UART8) || \
<> 144:ef7eb2e8f9f7 470 ((AF) == GPIO_AF9_CAN1) || ((AF) == GPIO_AF9_CAN2) || \
<> 144:ef7eb2e8f9f7 471 ((AF) == GPIO_AF9_TIM12) || ((AF) == GPIO_AF9_TIM12) || \
<> 144:ef7eb2e8f9f7 472 ((AF) == GPIO_AF9_TIM14) || ((AF) == GPIO_AF9_QUADSPI) || \
<> 144:ef7eb2e8f9f7 473 ((AF) == GPIO_AF10_OTG_HS) || ((AF) == GPIO_AF10_SAI2) || \
<> 144:ef7eb2e8f9f7 474 ((AF) == GPIO_AF10_QUADSPI) || ((AF) == GPIO_AF11_ETH) || \
<> 144:ef7eb2e8f9f7 475 ((AF) == GPIO_AF11_CAN3) || ((AF) == GPIO_AF12_OTG_HS_FS) || \
<> 144:ef7eb2e8f9f7 476 ((AF) == GPIO_AF12_SDMMC1) || ((AF) == GPIO_AF12_FMC) || \
<> 144:ef7eb2e8f9f7 477 ((AF) == GPIO_AF15_EVENTOUT) || ((AF) == GPIO_AF13_DCMI) || \
<> 144:ef7eb2e8f9f7 478 ((AF) == GPIO_AF10_OTG_FS))
<> 144:ef7eb2e8f9f7 479 #endif /* STM32F756xx || STM32F746xx */
<> 144:ef7eb2e8f9f7 480 /**
<> 144:ef7eb2e8f9f7 481 * @}
<> 144:ef7eb2e8f9f7 482 */
<> 144:ef7eb2e8f9f7 483
<> 144:ef7eb2e8f9f7 484 /**
<> 144:ef7eb2e8f9f7 485 * @}
<> 144:ef7eb2e8f9f7 486 */
<> 144:ef7eb2e8f9f7 487
<> 144:ef7eb2e8f9f7 488 /* Private functions ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 489 /** @defgroup GPIOEx_Private_Functions GPIO Private Functions
<> 144:ef7eb2e8f9f7 490 * @{
<> 144:ef7eb2e8f9f7 491 */
<> 144:ef7eb2e8f9f7 492
<> 144:ef7eb2e8f9f7 493 /**
<> 144:ef7eb2e8f9f7 494 * @}
<> 144:ef7eb2e8f9f7 495 */
<> 144:ef7eb2e8f9f7 496
<> 144:ef7eb2e8f9f7 497 /**
<> 144:ef7eb2e8f9f7 498 * @}
<> 144:ef7eb2e8f9f7 499 */
<> 144:ef7eb2e8f9f7 500
<> 144:ef7eb2e8f9f7 501 /**
<> 144:ef7eb2e8f9f7 502 * @}
<> 144:ef7eb2e8f9f7 503 */
<> 144:ef7eb2e8f9f7 504
<> 144:ef7eb2e8f9f7 505 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 506 }
<> 144:ef7eb2e8f9f7 507 #endif
<> 144:ef7eb2e8f9f7 508
<> 144:ef7eb2e8f9f7 509 #endif /* __STM32F7xx_HAL_GPIO_EX_H */
<> 144:ef7eb2e8f9f7 510
<> 144:ef7eb2e8f9f7 511 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/