mbed-dev - added prescaler for 16 bit pwm in LPC1347 target

Users » JojoS » Code » mbed-dev

added prescaler for 16 bit pwm in LPC1347 target

targets/cmsis/TARGET_STM/TARGET_STM32F7/stm32f7xx_hal_cryp_ex.c@147:ba84b7dc41a7, 2016-09-10 (annotated)

Committer:: JojoS
Date:: Sat Sep 10 15:32:04 2016 +0000
Revision:: 147:ba84b7dc41a7
Parent:: 144:ef7eb2e8f9f7

added prescaler for 16 bit timers (solution as in LPC11xx), default prescaler 31 for max 28 ms period time

Who changed what in which revision?

User	Revision	Line number	New contents of line
<>	144:ef7eb2e8f9f7	1	/**
<>	144:ef7eb2e8f9f7	2	******************************************************************************
<>	144:ef7eb2e8f9f7	3	* @file stm32f7xx_hal_cryp_ex.c
<>	144:ef7eb2e8f9f7	4	* @author MCD Application Team
<>	144:ef7eb2e8f9f7	5	* @version V1.1.0
<>	144:ef7eb2e8f9f7	6	* @date 22-April-2016
<>	144:ef7eb2e8f9f7	7	* @brief Extended CRYP HAL module driver
<>	144:ef7eb2e8f9f7	8	* This file provides firmware functions to manage the following
<>	144:ef7eb2e8f9f7	9	* functionalities of CRYP extension peripheral:
<>	144:ef7eb2e8f9f7	10	* + Extended AES processing functions
<>	144:ef7eb2e8f9f7	11	*
<>	144:ef7eb2e8f9f7	12	@verbatim
<>	144:ef7eb2e8f9f7	13	==============================================================================
<>	144:ef7eb2e8f9f7	14	##### How to use this driver #####
<>	144:ef7eb2e8f9f7	15	==============================================================================
<>	144:ef7eb2e8f9f7	16	[..]
<>	144:ef7eb2e8f9f7	17	The CRYP Extension HAL driver can be used as follows:
<>	144:ef7eb2e8f9f7	18	(#)Initialize the CRYP low level resources by implementing the HAL_CRYP_MspInit():
<>	144:ef7eb2e8f9f7	19	(##) Enable the CRYP interface clock using __HAL_RCC_CRYP_CLK_ENABLE()
<>	144:ef7eb2e8f9f7	20	(##) In case of using interrupts (e.g. HAL_CRYPEx_AESGCM_Encrypt_IT())
<>	144:ef7eb2e8f9f7	21	(+++) Configure the CRYP interrupt priority using HAL_NVIC_SetPriority()
<>	144:ef7eb2e8f9f7	22	(+++) Enable the CRYP IRQ handler using HAL_NVIC_EnableIRQ()
<>	144:ef7eb2e8f9f7	23	(+++) In CRYP IRQ handler, call HAL_CRYP_IRQHandler()
<>	144:ef7eb2e8f9f7	24	(##) In case of using DMA to control data transfer (e.g. HAL_AES_ECB_Encrypt_DMA())
<>	144:ef7eb2e8f9f7	25	(+++) Enable the DMAx interface clock using __DMAx_CLK_ENABLE()
<>	144:ef7eb2e8f9f7	26	(+++) Configure and enable two DMA streams one for managing data transfer from
<>	144:ef7eb2e8f9f7	27	memory to peripheral (input stream) and another stream for managing data
<>	144:ef7eb2e8f9f7	28	transfer from peripheral to memory (output stream)
<>	144:ef7eb2e8f9f7	29	(+++) Associate the initialized DMA handle to the CRYP DMA handle
<>	144:ef7eb2e8f9f7	30	using __HAL_LINKDMA()
<>	144:ef7eb2e8f9f7	31	(+++) Configure the priority and enable the NVIC for the transfer complete
<>	144:ef7eb2e8f9f7	32	interrupt on the two DMA Streams. The output stream should have higher
<>	144:ef7eb2e8f9f7	33	priority than the input stream HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ()
<>	144:ef7eb2e8f9f7	34	(#)Initialize the CRYP HAL using HAL_CRYP_Init(). This function configures mainly:
<>	144:ef7eb2e8f9f7	35	(##) The data type: 1-bit, 8-bit, 16-bit and 32-bit
<>	144:ef7eb2e8f9f7	36	(##) The key size: 128, 192 and 256. This parameter is relevant only for AES
<>	144:ef7eb2e8f9f7	37	(##) The encryption/decryption key. Its size depends on the algorithm
<>	144:ef7eb2e8f9f7	38	used for encryption/decryption
<>	144:ef7eb2e8f9f7	39	(##) The initialization vector (counter). It is not used ECB mode.
<>	144:ef7eb2e8f9f7	40	(#)Three processing (encryption/decryption) functions are available:
<>	144:ef7eb2e8f9f7	41	(##) Polling mode: encryption and decryption APIs are blocking functions
<>	144:ef7eb2e8f9f7	42	i.e. they process the data and wait till the processing is finished
<>	144:ef7eb2e8f9f7	43	e.g. HAL_CRYPEx_AESGCM_Encrypt()
<>	144:ef7eb2e8f9f7	44	(##) Interrupt mode: encryption and decryption APIs are not blocking functions
<>	144:ef7eb2e8f9f7	45	i.e. they process the data under interrupt
<>	144:ef7eb2e8f9f7	46	e.g. HAL_CRYPEx_AESGCM_Encrypt_IT()
<>	144:ef7eb2e8f9f7	47	(##) DMA mode: encryption and decryption APIs are not blocking functions
<>	144:ef7eb2e8f9f7	48	i.e. the data transfer is ensured by DMA
<>	144:ef7eb2e8f9f7	49	e.g. HAL_CRYPEx_AESGCM_Encrypt_DMA()
<>	144:ef7eb2e8f9f7	50	(#)When the processing function is called at first time after HAL_CRYP_Init()
<>	144:ef7eb2e8f9f7	51	the CRYP peripheral is initialized and processes the buffer in input.
<>	144:ef7eb2e8f9f7	52	At second call, the processing function performs an append of the already
<>	144:ef7eb2e8f9f7	53	processed buffer.
<>	144:ef7eb2e8f9f7	54	When a new data block is to be processed, call HAL_CRYP_Init() then the
<>	144:ef7eb2e8f9f7	55	processing function.
<>	144:ef7eb2e8f9f7	56	(#)In AES-GCM and AES-CCM modes are an authenticated encryption algorithms
<>	144:ef7eb2e8f9f7	57	which provide authentication messages.
<>	144:ef7eb2e8f9f7	58	HAL_AES_GCM_Finish() and HAL_AES_CCM_Finish() are used to provide those
<>	144:ef7eb2e8f9f7	59	authentication messages.
<>	144:ef7eb2e8f9f7	60	Call those functions after the processing ones (polling, interrupt or DMA).
<>	144:ef7eb2e8f9f7	61	e.g. in AES-CCM mode call HAL_CRYPEx_AESCCM_Encrypt() to encrypt the plain data
<>	144:ef7eb2e8f9f7	62	then call HAL_CRYPEx_AESCCM_Finish() to get the authentication message
<>	144:ef7eb2e8f9f7	63	-@- For CCM Encrypt/Decrypt API's, only DataType = 8-bit is supported by this version.
<>	144:ef7eb2e8f9f7	64	-@- The HAL_CRYPEx_AESGCM_xxxx() implementation is limited to 32bits inputs data length
<>	144:ef7eb2e8f9f7	65	(Plain/Cyphertext, Header) compared with GCM standards specifications (800-38D).
<>	144:ef7eb2e8f9f7	66	(#)Call HAL_CRYP_DeInit() to deinitialize the CRYP peripheral.
<>	144:ef7eb2e8f9f7	67
<>	144:ef7eb2e8f9f7	68	@endverbatim
<>	144:ef7eb2e8f9f7	69	******************************************************************************
<>	144:ef7eb2e8f9f7	70	* @attention
<>	144:ef7eb2e8f9f7	71	*
<>	144:ef7eb2e8f9f7	72	* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<>	144:ef7eb2e8f9f7	73	*
<>	144:ef7eb2e8f9f7	74	* Redistribution and use in source and binary forms, with or without modification,
<>	144:ef7eb2e8f9f7	75	* are permitted provided that the following conditions are met:
<>	144:ef7eb2e8f9f7	76	* 1. Redistributions of source code must retain the above copyright notice,
<>	144:ef7eb2e8f9f7	77	* this list of conditions and the following disclaimer.
<>	144:ef7eb2e8f9f7	78	* 2. Redistributions in binary form must reproduce the above copyright notice,
<>	144:ef7eb2e8f9f7	79	* this list of conditions and the following disclaimer in the documentation
<>	144:ef7eb2e8f9f7	80	* and/or other materials provided with the distribution.
<>	144:ef7eb2e8f9f7	81	* 3. Neither the name of STMicroelectronics nor the names of its contributors
<>	144:ef7eb2e8f9f7	82	* may be used to endorse or promote products derived from this software
<>	144:ef7eb2e8f9f7	83	* without specific prior written permission.
<>	144:ef7eb2e8f9f7	84	*
<>	144:ef7eb2e8f9f7	85	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<>	144:ef7eb2e8f9f7	86	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<>	144:ef7eb2e8f9f7	87	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<>	144:ef7eb2e8f9f7	88	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<>	144:ef7eb2e8f9f7	89	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<>	144:ef7eb2e8f9f7	90	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<>	144:ef7eb2e8f9f7	91	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<>	144:ef7eb2e8f9f7	92	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<>	144:ef7eb2e8f9f7	93	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<>	144:ef7eb2e8f9f7	94	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<>	144:ef7eb2e8f9f7	95	*
<>	144:ef7eb2e8f9f7	96	******************************************************************************
<>	144:ef7eb2e8f9f7	97	*/
<>	144:ef7eb2e8f9f7	98
<>	144:ef7eb2e8f9f7	99	/* Includes ------------------------------------------------------------------*/
<>	144:ef7eb2e8f9f7	100	#include "stm32f7xx_hal.h"
<>	144:ef7eb2e8f9f7	101
<>	144:ef7eb2e8f9f7	102	/** @addtogroup STM32F7xx_HAL_Driver
<>	144:ef7eb2e8f9f7	103	* @{
<>	144:ef7eb2e8f9f7	104	*/
<>	144:ef7eb2e8f9f7	105	#if defined (STM32F756xx) \|\| defined (STM32F777xx) \|\| defined (STM32F779xx)
<>	144:ef7eb2e8f9f7	106	/** @defgroup CRYPEx CRYPEx
<>	144:ef7eb2e8f9f7	107	* @brief CRYP Extension HAL module driver.
<>	144:ef7eb2e8f9f7	108	* @{
<>	144:ef7eb2e8f9f7	109	*/
<>	144:ef7eb2e8f9f7	110
<>	144:ef7eb2e8f9f7	111
<>	144:ef7eb2e8f9f7	112	#ifdef HAL_CRYP_MODULE_ENABLED
<>	144:ef7eb2e8f9f7	113
<>	144:ef7eb2e8f9f7	114	/* Private typedef -----------------------------------------------------------*/
<>	144:ef7eb2e8f9f7	115	/* Private define ------------------------------------------------------------*/
<>	144:ef7eb2e8f9f7	116	/** @addtogroup CRYPEx_Private_define
<>	144:ef7eb2e8f9f7	117	* @{
<>	144:ef7eb2e8f9f7	118	*/
<>	144:ef7eb2e8f9f7	119	#define CRYPEx_TIMEOUT_VALUE 1
<>	144:ef7eb2e8f9f7	120	/**
<>	144:ef7eb2e8f9f7	121	* @}
<>	144:ef7eb2e8f9f7	122	*/
<>	144:ef7eb2e8f9f7	123
<>	144:ef7eb2e8f9f7	124	/* Private macro -------------------------------------------------------------*/
<>	144:ef7eb2e8f9f7	125	/* Private variables ---------------------------------------------------------*/
<>	144:ef7eb2e8f9f7	126	/* Private function prototypes -----------------------------------------------*/
<>	144:ef7eb2e8f9f7	127	/** @defgroup CRYPEx_Private_Functions_prototypes CRYP Private Functions Prototypes
<>	144:ef7eb2e8f9f7	128	* @{
<>	144:ef7eb2e8f9f7	129	*/
<>	144:ef7eb2e8f9f7	130	static void CRYPEx_GCMCCM_SetInitVector(CRYP_HandleTypeDef hcryp, uint8_t InitVector);
<>	144:ef7eb2e8f9f7	131	static void CRYPEx_GCMCCM_SetKey(CRYP_HandleTypeDef hcryp, uint8_t Key, uint32_t KeySize);
<>	144:ef7eb2e8f9f7	132	static HAL_StatusTypeDef CRYPEx_GCMCCM_ProcessData(CRYP_HandleTypeDef hcryp, uint8_t Input, uint16_t Ilength, uint8_t *Output, uint32_t Timeout);
<>	144:ef7eb2e8f9f7	133	static HAL_StatusTypeDef CRYPEx_GCMCCM_SetHeaderPhase(CRYP_HandleTypeDef hcryp, uint8_t Input, uint16_t Ilength, uint32_t Timeout);
<>	144:ef7eb2e8f9f7	134	static void CRYPEx_GCMCCM_DMAInCplt(DMA_HandleTypeDef *hdma);
<>	144:ef7eb2e8f9f7	135	static void CRYPEx_GCMCCM_DMAOutCplt(DMA_HandleTypeDef *hdma);
<>	144:ef7eb2e8f9f7	136	static void CRYPEx_GCMCCM_DMAError(DMA_HandleTypeDef *hdma);
<>	144:ef7eb2e8f9f7	137	static void CRYPEx_GCMCCM_SetDMAConfig(CRYP_HandleTypeDef *hcryp, uint32_t inputaddr, uint16_t Size, uint32_t outputaddr);
<>	144:ef7eb2e8f9f7	138	/**
<>	144:ef7eb2e8f9f7	139	* @}
<>	144:ef7eb2e8f9f7	140	*/
<>	144:ef7eb2e8f9f7	141
<>	144:ef7eb2e8f9f7	142	/* Private functions ---------------------------------------------------------*/
<>	144:ef7eb2e8f9f7	143	/** @addtogroup CRYPEx_Private_Functions
<>	144:ef7eb2e8f9f7	144	* @{
<>	144:ef7eb2e8f9f7	145	*/
<>	144:ef7eb2e8f9f7	146
<>	144:ef7eb2e8f9f7	147	/**
<>	144:ef7eb2e8f9f7	148	* @brief DMA CRYP Input Data process complete callback.
<>	144:ef7eb2e8f9f7	149	* @param hdma: DMA handle
<>	144:ef7eb2e8f9f7	150	* @retval None
<>	144:ef7eb2e8f9f7	151	*/
<>	144:ef7eb2e8f9f7	152	static void CRYPEx_GCMCCM_DMAInCplt(DMA_HandleTypeDef *hdma)
<>	144:ef7eb2e8f9f7	153	{
<>	144:ef7eb2e8f9f7	154	CRYP_HandleTypeDef* hcryp = ( CRYP_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
<>	144:ef7eb2e8f9f7	155
<>	144:ef7eb2e8f9f7	156	/* Disable the DMA transfer for input Fifo request by resetting the DIEN bit
<>	144:ef7eb2e8f9f7	157	in the DMACR register */
<>	144:ef7eb2e8f9f7	158	hcryp->Instance->DMACR &= (uint32_t)(~CRYP_DMACR_DIEN);
<>	144:ef7eb2e8f9f7	159
<>	144:ef7eb2e8f9f7	160	/* Call input data transfer complete callback */
<>	144:ef7eb2e8f9f7	161	HAL_CRYP_InCpltCallback(hcryp);
<>	144:ef7eb2e8f9f7	162	}
<>	144:ef7eb2e8f9f7	163
<>	144:ef7eb2e8f9f7	164	/**
<>	144:ef7eb2e8f9f7	165	* @brief DMA CRYP Output Data process complete callback.
<>	144:ef7eb2e8f9f7	166	* @param hdma: DMA handle
<>	144:ef7eb2e8f9f7	167	* @retval None
<>	144:ef7eb2e8f9f7	168	*/
<>	144:ef7eb2e8f9f7	169	static void CRYPEx_GCMCCM_DMAOutCplt(DMA_HandleTypeDef *hdma)
<>	144:ef7eb2e8f9f7	170	{
<>	144:ef7eb2e8f9f7	171	CRYP_HandleTypeDef* hcryp = ( CRYP_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
<>	144:ef7eb2e8f9f7	172
<>	144:ef7eb2e8f9f7	173	/* Disable the DMA transfer for output Fifo request by resetting the DOEN bit
<>	144:ef7eb2e8f9f7	174	in the DMACR register */
<>	144:ef7eb2e8f9f7	175	hcryp->Instance->DMACR &= (uint32_t)(~CRYP_DMACR_DOEN);
<>	144:ef7eb2e8f9f7	176
<>	144:ef7eb2e8f9f7	177	/* Enable the CRYP peripheral */
<>	144:ef7eb2e8f9f7	178	__HAL_CRYP_DISABLE(hcryp);
<>	144:ef7eb2e8f9f7	179
<>	144:ef7eb2e8f9f7	180	/* Change the CRYP peripheral state */
<>	144:ef7eb2e8f9f7	181	hcryp->State = HAL_CRYP_STATE_READY;
<>	144:ef7eb2e8f9f7	182
<>	144:ef7eb2e8f9f7	183	/* Call output data transfer complete callback */
<>	144:ef7eb2e8f9f7	184	HAL_CRYP_OutCpltCallback(hcryp);
<>	144:ef7eb2e8f9f7	185	}
<>	144:ef7eb2e8f9f7	186
<>	144:ef7eb2e8f9f7	187	/**
<>	144:ef7eb2e8f9f7	188	* @brief DMA CRYP communication error callback.
<>	144:ef7eb2e8f9f7	189	* @param hdma: DMA handle
<>	144:ef7eb2e8f9f7	190	* @retval None
<>	144:ef7eb2e8f9f7	191	*/
<>	144:ef7eb2e8f9f7	192	static void CRYPEx_GCMCCM_DMAError(DMA_HandleTypeDef *hdma)
<>	144:ef7eb2e8f9f7	193	{
<>	144:ef7eb2e8f9f7	194	CRYP_HandleTypeDef* hcryp = ( CRYP_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
<>	144:ef7eb2e8f9f7	195	hcryp->State= HAL_CRYP_STATE_READY;
<>	144:ef7eb2e8f9f7	196	HAL_CRYP_ErrorCallback(hcryp);
<>	144:ef7eb2e8f9f7	197	}
<>	144:ef7eb2e8f9f7	198
<>	144:ef7eb2e8f9f7	199	/**
<>	144:ef7eb2e8f9f7	200	* @brief Writes the Key in Key registers.
<>	144:ef7eb2e8f9f7	201	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	144:ef7eb2e8f9f7	202	* the configuration information for CRYP module
<>	144:ef7eb2e8f9f7	203	* @param Key: Pointer to Key buffer
<>	144:ef7eb2e8f9f7	204	* @param KeySize: Size of Key
<>	144:ef7eb2e8f9f7	205	* @retval None
<>	144:ef7eb2e8f9f7	206	*/
<>	144:ef7eb2e8f9f7	207	static void CRYPEx_GCMCCM_SetKey(CRYP_HandleTypeDef hcryp, uint8_t Key, uint32_t KeySize)
<>	144:ef7eb2e8f9f7	208	{
<>	144:ef7eb2e8f9f7	209	uint32_t keyaddr = (uint32_t)Key;
<>	144:ef7eb2e8f9f7	210
<>	144:ef7eb2e8f9f7	211	switch(KeySize)
<>	144:ef7eb2e8f9f7	212	{
<>	144:ef7eb2e8f9f7	213	case CRYP_KEYSIZE_256B:
<>	144:ef7eb2e8f9f7	214	/* Key Initialisation */
<>	144:ef7eb2e8f9f7	215	hcryp->Instance->K0LR = __REV((uint32_t)(keyaddr));
<>	144:ef7eb2e8f9f7	216	keyaddr+=4;
<>	144:ef7eb2e8f9f7	217	hcryp->Instance->K0RR = __REV((uint32_t)(keyaddr));
<>	144:ef7eb2e8f9f7	218	keyaddr+=4;
<>	144:ef7eb2e8f9f7	219	hcryp->Instance->K1LR = __REV((uint32_t)(keyaddr));
<>	144:ef7eb2e8f9f7	220	keyaddr+=4;
<>	144:ef7eb2e8f9f7	221	hcryp->Instance->K1RR = __REV((uint32_t)(keyaddr));
<>	144:ef7eb2e8f9f7	222	keyaddr+=4;
<>	144:ef7eb2e8f9f7	223	hcryp->Instance->K2LR = __REV((uint32_t)(keyaddr));
<>	144:ef7eb2e8f9f7	224	keyaddr+=4;
<>	144:ef7eb2e8f9f7	225	hcryp->Instance->K2RR = __REV((uint32_t)(keyaddr));
<>	144:ef7eb2e8f9f7	226	keyaddr+=4;
<>	144:ef7eb2e8f9f7	227	hcryp->Instance->K3LR = __REV((uint32_t)(keyaddr));
<>	144:ef7eb2e8f9f7	228	keyaddr+=4;
<>	144:ef7eb2e8f9f7	229	hcryp->Instance->K3RR = __REV((uint32_t)(keyaddr));
<>	144:ef7eb2e8f9f7	230	break;
<>	144:ef7eb2e8f9f7	231	case CRYP_KEYSIZE_192B:
<>	144:ef7eb2e8f9f7	232	hcryp->Instance->K1LR = __REV((uint32_t)(keyaddr));
<>	144:ef7eb2e8f9f7	233	keyaddr+=4;
<>	144:ef7eb2e8f9f7	234	hcryp->Instance->K1RR = __REV((uint32_t)(keyaddr));
<>	144:ef7eb2e8f9f7	235	keyaddr+=4;
<>	144:ef7eb2e8f9f7	236	hcryp->Instance->K2LR = __REV((uint32_t)(keyaddr));
<>	144:ef7eb2e8f9f7	237	keyaddr+=4;
<>	144:ef7eb2e8f9f7	238	hcryp->Instance->K2RR = __REV((uint32_t)(keyaddr));
<>	144:ef7eb2e8f9f7	239	keyaddr+=4;
<>	144:ef7eb2e8f9f7	240	hcryp->Instance->K3LR = __REV((uint32_t)(keyaddr));
<>	144:ef7eb2e8f9f7	241	keyaddr+=4;
<>	144:ef7eb2e8f9f7	242	hcryp->Instance->K3RR = __REV((uint32_t)(keyaddr));
<>	144:ef7eb2e8f9f7	243	break;
<>	144:ef7eb2e8f9f7	244	case CRYP_KEYSIZE_128B:
<>	144:ef7eb2e8f9f7	245	hcryp->Instance->K2LR = __REV((uint32_t)(keyaddr));
<>	144:ef7eb2e8f9f7	246	keyaddr+=4;
<>	144:ef7eb2e8f9f7	247	hcryp->Instance->K2RR = __REV((uint32_t)(keyaddr));
<>	144:ef7eb2e8f9f7	248	keyaddr+=4;
<>	144:ef7eb2e8f9f7	249	hcryp->Instance->K3LR = __REV((uint32_t)(keyaddr));
<>	144:ef7eb2e8f9f7	250	keyaddr+=4;
<>	144:ef7eb2e8f9f7	251	hcryp->Instance->K3RR = __REV((uint32_t)(keyaddr));
<>	144:ef7eb2e8f9f7	252	break;
<>	144:ef7eb2e8f9f7	253	default:
<>	144:ef7eb2e8f9f7	254	break;
<>	144:ef7eb2e8f9f7	255	}
<>	144:ef7eb2e8f9f7	256	}
<>	144:ef7eb2e8f9f7	257
<>	144:ef7eb2e8f9f7	258	/**
<>	144:ef7eb2e8f9f7	259	* @brief Writes the InitVector/InitCounter in IV registers.
<>	144:ef7eb2e8f9f7	260	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	144:ef7eb2e8f9f7	261	* the configuration information for CRYP module
<>	144:ef7eb2e8f9f7	262	* @param InitVector: Pointer to InitVector/InitCounter buffer
<>	144:ef7eb2e8f9f7	263	* @retval None
<>	144:ef7eb2e8f9f7	264	*/
<>	144:ef7eb2e8f9f7	265	static void CRYPEx_GCMCCM_SetInitVector(CRYP_HandleTypeDef hcryp, uint8_t InitVector)
<>	144:ef7eb2e8f9f7	266	{
<>	144:ef7eb2e8f9f7	267	uint32_t ivaddr = (uint32_t)InitVector;
<>	144:ef7eb2e8f9f7	268
<>	144:ef7eb2e8f9f7	269	hcryp->Instance->IV0LR = __REV((uint32_t)(ivaddr));
<>	144:ef7eb2e8f9f7	270	ivaddr+=4;
<>	144:ef7eb2e8f9f7	271	hcryp->Instance->IV0RR = __REV((uint32_t)(ivaddr));
<>	144:ef7eb2e8f9f7	272	ivaddr+=4;
<>	144:ef7eb2e8f9f7	273	hcryp->Instance->IV1LR = __REV((uint32_t)(ivaddr));
<>	144:ef7eb2e8f9f7	274	ivaddr+=4;
<>	144:ef7eb2e8f9f7	275	hcryp->Instance->IV1RR = __REV((uint32_t)(ivaddr));
<>	144:ef7eb2e8f9f7	276	}
<>	144:ef7eb2e8f9f7	277
<>	144:ef7eb2e8f9f7	278	/**
<>	144:ef7eb2e8f9f7	279	* @brief Process Data: Writes Input data in polling mode and read the Output data.
<>	144:ef7eb2e8f9f7	280	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	144:ef7eb2e8f9f7	281	* the configuration information for CRYP module
<>	144:ef7eb2e8f9f7	282	* @param Input: Pointer to the Input buffer.
<>	144:ef7eb2e8f9f7	283	* @param Ilength: Length of the Input buffer, must be a multiple of 16
<>	144:ef7eb2e8f9f7	284	* @param Output: Pointer to the returned buffer
<>	144:ef7eb2e8f9f7	285	* @param Timeout: Timeout value
<>	144:ef7eb2e8f9f7	286	* @retval None
<>	144:ef7eb2e8f9f7	287	*/
<>	144:ef7eb2e8f9f7	288	static HAL_StatusTypeDef CRYPEx_GCMCCM_ProcessData(CRYP_HandleTypeDef hcryp, uint8_t Input, uint16_t Ilength, uint8_t *Output, uint32_t Timeout)
<>	144:ef7eb2e8f9f7	289	{
<>	144:ef7eb2e8f9f7	290	uint32_t tickstart = 0;
<>	144:ef7eb2e8f9f7	291	uint32_t i = 0;
<>	144:ef7eb2e8f9f7	292	uint32_t inputaddr = (uint32_t)Input;
<>	144:ef7eb2e8f9f7	293	uint32_t outputaddr = (uint32_t)Output;
<>	144:ef7eb2e8f9f7	294
<>	144:ef7eb2e8f9f7	295	for(i=0; (i < Ilength); i+=16)
<>	144:ef7eb2e8f9f7	296	{
<>	144:ef7eb2e8f9f7	297	/* Write the Input block in the IN FIFO */
<>	144:ef7eb2e8f9f7	298	hcryp->Instance->DR = (uint32_t)(inputaddr);
<>	144:ef7eb2e8f9f7	299	inputaddr+=4;
<>	144:ef7eb2e8f9f7	300	hcryp->Instance->DR = (uint32_t)(inputaddr);
<>	144:ef7eb2e8f9f7	301	inputaddr+=4;
<>	144:ef7eb2e8f9f7	302	hcryp->Instance->DR = (uint32_t)(inputaddr);
<>	144:ef7eb2e8f9f7	303	inputaddr+=4;
<>	144:ef7eb2e8f9f7	304	hcryp->Instance->DR = (uint32_t)(inputaddr);
<>	144:ef7eb2e8f9f7	305	inputaddr+=4;
<>	144:ef7eb2e8f9f7	306
<>	144:ef7eb2e8f9f7	307	/* Get tick */
<>	144:ef7eb2e8f9f7	308	tickstart = HAL_GetTick();
<>	144:ef7eb2e8f9f7	309
<>	144:ef7eb2e8f9f7	310	while(HAL_IS_BIT_CLR(hcryp->Instance->SR, CRYP_FLAG_OFNE))
<>	144:ef7eb2e8f9f7	311	{
<>	144:ef7eb2e8f9f7	312	/* Check for the Timeout */
<>	144:ef7eb2e8f9f7	313	if(Timeout != HAL_MAX_DELAY)
<>	144:ef7eb2e8f9f7	314	{
<>	144:ef7eb2e8f9f7	315	if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE)
<>	144:ef7eb2e8f9f7	316	{
<>	144:ef7eb2e8f9f7	317	/* Change state */
<>	144:ef7eb2e8f9f7	318	hcryp->State = HAL_CRYP_STATE_TIMEOUT;
<>	144:ef7eb2e8f9f7	319
<>	144:ef7eb2e8f9f7	320	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	321	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	322
<>	144:ef7eb2e8f9f7	323	return HAL_TIMEOUT;
<>	144:ef7eb2e8f9f7	324	}
<>	144:ef7eb2e8f9f7	325	}
<>	144:ef7eb2e8f9f7	326	}
<>	144:ef7eb2e8f9f7	327	/* Read the Output block from the OUT FIFO */
<>	144:ef7eb2e8f9f7	328	(uint32_t)(outputaddr) = hcryp->Instance->DOUT;
<>	144:ef7eb2e8f9f7	329	outputaddr+=4;
<>	144:ef7eb2e8f9f7	330	(uint32_t)(outputaddr) = hcryp->Instance->DOUT;
<>	144:ef7eb2e8f9f7	331	outputaddr+=4;
<>	144:ef7eb2e8f9f7	332	(uint32_t)(outputaddr) = hcryp->Instance->DOUT;
<>	144:ef7eb2e8f9f7	333	outputaddr+=4;
<>	144:ef7eb2e8f9f7	334	(uint32_t)(outputaddr) = hcryp->Instance->DOUT;
<>	144:ef7eb2e8f9f7	335	outputaddr+=4;
<>	144:ef7eb2e8f9f7	336	}
<>	144:ef7eb2e8f9f7	337	/* Return function status */
<>	144:ef7eb2e8f9f7	338	return HAL_OK;
<>	144:ef7eb2e8f9f7	339	}
<>	144:ef7eb2e8f9f7	340
<>	144:ef7eb2e8f9f7	341	/**
<>	144:ef7eb2e8f9f7	342	* @brief Sets the header phase
<>	144:ef7eb2e8f9f7	343	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	144:ef7eb2e8f9f7	344	* the configuration information for CRYP module
<>	144:ef7eb2e8f9f7	345	* @param Input: Pointer to the Input buffer.
<>	144:ef7eb2e8f9f7	346	* @param Ilength: Length of the Input buffer, must be a multiple of 16
<>	144:ef7eb2e8f9f7	347	* @param Timeout: Timeout value
<>	144:ef7eb2e8f9f7	348	* @retval None
<>	144:ef7eb2e8f9f7	349	*/
<>	144:ef7eb2e8f9f7	350	static HAL_StatusTypeDef CRYPEx_GCMCCM_SetHeaderPhase(CRYP_HandleTypeDef hcryp, uint8_t Input, uint16_t Ilength, uint32_t Timeout)
<>	144:ef7eb2e8f9f7	351	{
<>	144:ef7eb2e8f9f7	352	uint32_t tickstart = 0;
<>	144:ef7eb2e8f9f7	353	uint32_t loopcounter = 0;
<>	144:ef7eb2e8f9f7	354	uint32_t headeraddr = (uint32_t)Input;
<>	144:ef7eb2e8f9f7	355
<>	144:ef7eb2e8f9f7	356	/*************************** Header phase *******************************/
<>	144:ef7eb2e8f9f7	357	if(hcryp->Init.HeaderSize != 0)
<>	144:ef7eb2e8f9f7	358	{
<>	144:ef7eb2e8f9f7	359	/* Select header phase */
<>	144:ef7eb2e8f9f7	360	__HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER);
<>	144:ef7eb2e8f9f7	361	/* Enable the CRYP peripheral */
<>	144:ef7eb2e8f9f7	362	__HAL_CRYP_ENABLE(hcryp);
<>	144:ef7eb2e8f9f7	363
<>	144:ef7eb2e8f9f7	364	for(loopcounter = 0; (loopcounter < hcryp->Init.HeaderSize); loopcounter+=16)
<>	144:ef7eb2e8f9f7	365	{
<>	144:ef7eb2e8f9f7	366	/* Get tick */
<>	144:ef7eb2e8f9f7	367	tickstart = HAL_GetTick();
<>	144:ef7eb2e8f9f7	368
<>	144:ef7eb2e8f9f7	369	while(HAL_IS_BIT_CLR(hcryp->Instance->SR, CRYP_FLAG_IFEM))
<>	144:ef7eb2e8f9f7	370	{
<>	144:ef7eb2e8f9f7	371	/* Check for the Timeout */
<>	144:ef7eb2e8f9f7	372	if(Timeout != HAL_MAX_DELAY)
<>	144:ef7eb2e8f9f7	373	{
<>	144:ef7eb2e8f9f7	374	if((Timeout == 0)\|\|((HAL_GetTick() - tickstart ) > Timeout))
<>	144:ef7eb2e8f9f7	375	{
<>	144:ef7eb2e8f9f7	376	/* Change state */
<>	144:ef7eb2e8f9f7	377	hcryp->State = HAL_CRYP_STATE_TIMEOUT;
<>	144:ef7eb2e8f9f7	378
<>	144:ef7eb2e8f9f7	379	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	380	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	381
<>	144:ef7eb2e8f9f7	382	return HAL_TIMEOUT;
<>	144:ef7eb2e8f9f7	383	}
<>	144:ef7eb2e8f9f7	384	}
<>	144:ef7eb2e8f9f7	385	}
<>	144:ef7eb2e8f9f7	386	/* Write the Input block in the IN FIFO */
<>	144:ef7eb2e8f9f7	387	hcryp->Instance->DR = (uint32_t)(headeraddr);
<>	144:ef7eb2e8f9f7	388	headeraddr+=4;
<>	144:ef7eb2e8f9f7	389	hcryp->Instance->DR = (uint32_t)(headeraddr);
<>	144:ef7eb2e8f9f7	390	headeraddr+=4;
<>	144:ef7eb2e8f9f7	391	hcryp->Instance->DR = (uint32_t)(headeraddr);
<>	144:ef7eb2e8f9f7	392	headeraddr+=4;
<>	144:ef7eb2e8f9f7	393	hcryp->Instance->DR = (uint32_t)(headeraddr);
<>	144:ef7eb2e8f9f7	394	headeraddr+=4;
<>	144:ef7eb2e8f9f7	395	}
<>	144:ef7eb2e8f9f7	396
<>	144:ef7eb2e8f9f7	397	/* Wait until the complete message has been processed */
<>	144:ef7eb2e8f9f7	398
<>	144:ef7eb2e8f9f7	399	/* Get tick */
<>	144:ef7eb2e8f9f7	400	tickstart = HAL_GetTick();
<>	144:ef7eb2e8f9f7	401
<>	144:ef7eb2e8f9f7	402	while((hcryp->Instance->SR & CRYP_FLAG_BUSY) == CRYP_FLAG_BUSY)
<>	144:ef7eb2e8f9f7	403	{
<>	144:ef7eb2e8f9f7	404	/* Check for the Timeout */
<>	144:ef7eb2e8f9f7	405	if(Timeout != HAL_MAX_DELAY)
<>	144:ef7eb2e8f9f7	406	{
<>	144:ef7eb2e8f9f7	407	if((Timeout == 0)\|\|((HAL_GetTick() - tickstart ) > Timeout))
<>	144:ef7eb2e8f9f7	408	{
<>	144:ef7eb2e8f9f7	409	/* Change state */
<>	144:ef7eb2e8f9f7	410	hcryp->State = HAL_CRYP_STATE_TIMEOUT;
<>	144:ef7eb2e8f9f7	411
<>	144:ef7eb2e8f9f7	412	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	413	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	414
<>	144:ef7eb2e8f9f7	415	return HAL_TIMEOUT;
<>	144:ef7eb2e8f9f7	416	}
<>	144:ef7eb2e8f9f7	417	}
<>	144:ef7eb2e8f9f7	418	}
<>	144:ef7eb2e8f9f7	419	}
<>	144:ef7eb2e8f9f7	420	/* Return function status */
<>	144:ef7eb2e8f9f7	421	return HAL_OK;
<>	144:ef7eb2e8f9f7	422	}
<>	144:ef7eb2e8f9f7	423
<>	144:ef7eb2e8f9f7	424	/**
<>	144:ef7eb2e8f9f7	425	* @brief Sets the DMA configuration and start the DMA transfer.
<>	144:ef7eb2e8f9f7	426	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	144:ef7eb2e8f9f7	427	* the configuration information for CRYP module
<>	144:ef7eb2e8f9f7	428	* @param inputaddr: Address of the Input buffer
<>	144:ef7eb2e8f9f7	429	* @param Size: Size of the Input buffer, must be a multiple of 16
<>	144:ef7eb2e8f9f7	430	* @param outputaddr: Address of the Output buffer
<>	144:ef7eb2e8f9f7	431	* @retval None
<>	144:ef7eb2e8f9f7	432	*/
<>	144:ef7eb2e8f9f7	433	static void CRYPEx_GCMCCM_SetDMAConfig(CRYP_HandleTypeDef *hcryp, uint32_t inputaddr, uint16_t Size, uint32_t outputaddr)
<>	144:ef7eb2e8f9f7	434	{
<>	144:ef7eb2e8f9f7	435	/* Set the CRYP DMA transfer complete callback */
<>	144:ef7eb2e8f9f7	436	hcryp->hdmain->XferCpltCallback = CRYPEx_GCMCCM_DMAInCplt;
<>	144:ef7eb2e8f9f7	437	/* Set the DMA error callback */
<>	144:ef7eb2e8f9f7	438	hcryp->hdmain->XferErrorCallback = CRYPEx_GCMCCM_DMAError;
<>	144:ef7eb2e8f9f7	439
<>	144:ef7eb2e8f9f7	440	/* Set the CRYP DMA transfer complete callback */
<>	144:ef7eb2e8f9f7	441	hcryp->hdmaout->XferCpltCallback = CRYPEx_GCMCCM_DMAOutCplt;
<>	144:ef7eb2e8f9f7	442	/* Set the DMA error callback */
<>	144:ef7eb2e8f9f7	443	hcryp->hdmaout->XferErrorCallback = CRYPEx_GCMCCM_DMAError;
<>	144:ef7eb2e8f9f7	444
<>	144:ef7eb2e8f9f7	445	/* Enable the CRYP peripheral */
<>	144:ef7eb2e8f9f7	446	__HAL_CRYP_ENABLE(hcryp);
<>	144:ef7eb2e8f9f7	447
<>	144:ef7eb2e8f9f7	448	/* Enable the DMA In DMA Stream */
<>	144:ef7eb2e8f9f7	449	HAL_DMA_Start_IT(hcryp->hdmain, inputaddr, (uint32_t)&hcryp->Instance->DR, Size/4);
<>	144:ef7eb2e8f9f7	450
<>	144:ef7eb2e8f9f7	451	/* Enable In DMA request */
<>	144:ef7eb2e8f9f7	452	hcryp->Instance->DMACR = CRYP_DMACR_DIEN;
<>	144:ef7eb2e8f9f7	453
<>	144:ef7eb2e8f9f7	454	/* Enable the DMA Out DMA Stream */
<>	144:ef7eb2e8f9f7	455	HAL_DMA_Start_IT(hcryp->hdmaout, (uint32_t)&hcryp->Instance->DOUT, outputaddr, Size/4);
<>	144:ef7eb2e8f9f7	456
<>	144:ef7eb2e8f9f7	457	/* Enable Out DMA request */
<>	144:ef7eb2e8f9f7	458	hcryp->Instance->DMACR \|= CRYP_DMACR_DOEN;
<>	144:ef7eb2e8f9f7	459	}
<>	144:ef7eb2e8f9f7	460
<>	144:ef7eb2e8f9f7	461	/**
<>	144:ef7eb2e8f9f7	462	* @}
<>	144:ef7eb2e8f9f7	463	*/
<>	144:ef7eb2e8f9f7	464
<>	144:ef7eb2e8f9f7	465	/* Exported functions---------------------------------------------------------*/
<>	144:ef7eb2e8f9f7	466	/** @addtogroup CRYPEx_Exported_Functions
<>	144:ef7eb2e8f9f7	467	* @{
<>	144:ef7eb2e8f9f7	468	*/
<>	144:ef7eb2e8f9f7	469
<>	144:ef7eb2e8f9f7	470	/** @defgroup CRYPEx_Exported_Functions_Group1 Extended AES processing functions
<>	144:ef7eb2e8f9f7	471	* @brief Extended processing functions.
<>	144:ef7eb2e8f9f7	472	*
<>	144:ef7eb2e8f9f7	473	@verbatim
<>	144:ef7eb2e8f9f7	474	==============================================================================
<>	144:ef7eb2e8f9f7	475	##### Extended AES processing functions #####
<>	144:ef7eb2e8f9f7	476	==============================================================================
<>	144:ef7eb2e8f9f7	477	[..] This section provides functions allowing to:
<>	144:ef7eb2e8f9f7	478	(+) Encrypt plaintext using AES-128/192/256 using GCM and CCM chaining modes
<>	144:ef7eb2e8f9f7	479	(+) Decrypt cyphertext using AES-128/192/256 using GCM and CCM chaining modes
<>	144:ef7eb2e8f9f7	480	(+) Finish the processing. This function is available only for GCM and CCM
<>	144:ef7eb2e8f9f7	481	[..] Three processing methods are available:
<>	144:ef7eb2e8f9f7	482	(+) Polling mode
<>	144:ef7eb2e8f9f7	483	(+) Interrupt mode
<>	144:ef7eb2e8f9f7	484	(+) DMA mode
<>	144:ef7eb2e8f9f7	485
<>	144:ef7eb2e8f9f7	486	@endverbatim
<>	144:ef7eb2e8f9f7	487	* @{
<>	144:ef7eb2e8f9f7	488	*/
<>	144:ef7eb2e8f9f7	489
<>	144:ef7eb2e8f9f7	490
<>	144:ef7eb2e8f9f7	491	/**
<>	144:ef7eb2e8f9f7	492	* @brief Initializes the CRYP peripheral in AES CCM encryption mode then
<>	144:ef7eb2e8f9f7	493	* encrypt pPlainData. The cypher data are available in pCypherData.
<>	144:ef7eb2e8f9f7	494	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	144:ef7eb2e8f9f7	495	* the configuration information for CRYP module
<>	144:ef7eb2e8f9f7	496	* @param pPlainData: Pointer to the plaintext buffer
<>	144:ef7eb2e8f9f7	497	* @param Size: Length of the plaintext buffer, must be a multiple of 16
<>	144:ef7eb2e8f9f7	498	* @param pCypherData: Pointer to the cyphertext buffer
<>	144:ef7eb2e8f9f7	499	* @param Timeout: Timeout duration
<>	144:ef7eb2e8f9f7	500	* @retval HAL status
<>	144:ef7eb2e8f9f7	501	*/
<>	144:ef7eb2e8f9f7	502	HAL_StatusTypeDef HAL_CRYPEx_AESCCM_Encrypt(CRYP_HandleTypeDef hcryp, uint8_t pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout)
<>	144:ef7eb2e8f9f7	503	{
<>	144:ef7eb2e8f9f7	504	uint32_t tickstart = 0;
<>	144:ef7eb2e8f9f7	505	uint32_t headersize = hcryp->Init.HeaderSize;
<>	144:ef7eb2e8f9f7	506	uint32_t headeraddr = (uint32_t)hcryp->Init.Header;
<>	144:ef7eb2e8f9f7	507	uint32_t loopcounter = 0;
<>	144:ef7eb2e8f9f7	508	uint32_t bufferidx = 0;
<>	144:ef7eb2e8f9f7	509	uint8_t blockb0[16] = {0};/* Block B0 */
<>	144:ef7eb2e8f9f7	510	uint8_t ctr[16] = {0}; /* Counter */
<>	144:ef7eb2e8f9f7	511	uint32_t b0addr = (uint32_t)blockb0;
<>	144:ef7eb2e8f9f7	512
<>	144:ef7eb2e8f9f7	513	/* Process Locked */
<>	144:ef7eb2e8f9f7	514	__HAL_LOCK(hcryp);
<>	144:ef7eb2e8f9f7	515
<>	144:ef7eb2e8f9f7	516	/* Change the CRYP peripheral state */
<>	144:ef7eb2e8f9f7	517	hcryp->State = HAL_CRYP_STATE_BUSY;
<>	144:ef7eb2e8f9f7	518
<>	144:ef7eb2e8f9f7	519	/* Check if initialization phase has already been performed */
<>	144:ef7eb2e8f9f7	520	if(hcryp->Phase == HAL_CRYP_PHASE_READY)
<>	144:ef7eb2e8f9f7	521	{
<>	144:ef7eb2e8f9f7	522	/********************** Formatting the header block *******************/
<>	144:ef7eb2e8f9f7	523	if(headersize != 0)
<>	144:ef7eb2e8f9f7	524	{
<>	144:ef7eb2e8f9f7	525	/* Check that the associated data (or header) length is lower than 2^16 - 2^8 = 65536 - 256 = 65280 */
<>	144:ef7eb2e8f9f7	526	if(headersize < 65280)
<>	144:ef7eb2e8f9f7	527	{
<>	144:ef7eb2e8f9f7	528	hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize >> 8) & 0xFF);
<>	144:ef7eb2e8f9f7	529	hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize) & 0xFF);
<>	144:ef7eb2e8f9f7	530	headersize += 2;
<>	144:ef7eb2e8f9f7	531	}
<>	144:ef7eb2e8f9f7	532	else
<>	144:ef7eb2e8f9f7	533	{
<>	144:ef7eb2e8f9f7	534	/* Header is encoded as 0xff \|\| 0xfe \|\| [headersize]32, i.e., six octets */
<>	144:ef7eb2e8f9f7	535	hcryp->Init.pScratch[bufferidx++] = 0xFF;
<>	144:ef7eb2e8f9f7	536	hcryp->Init.pScratch[bufferidx++] = 0xFE;
<>	144:ef7eb2e8f9f7	537	hcryp->Init.pScratch[bufferidx++] = headersize & 0xff000000U;
<>	144:ef7eb2e8f9f7	538	hcryp->Init.pScratch[bufferidx++] = headersize & 0x00ff0000U;
<>	144:ef7eb2e8f9f7	539	hcryp->Init.pScratch[bufferidx++] = headersize & 0x0000ff00U;
<>	144:ef7eb2e8f9f7	540	hcryp->Init.pScratch[bufferidx++] = headersize & 0x000000ffU;
<>	144:ef7eb2e8f9f7	541	headersize += 6;
<>	144:ef7eb2e8f9f7	542	}
<>	144:ef7eb2e8f9f7	543	/* Copy the header buffer in internal buffer "hcryp->Init.pScratch" */
<>	144:ef7eb2e8f9f7	544	for(loopcounter = 0; loopcounter < headersize; loopcounter++)
<>	144:ef7eb2e8f9f7	545	{
<>	144:ef7eb2e8f9f7	546	hcryp->Init.pScratch[bufferidx++] = hcryp->Init.Header[loopcounter];
<>	144:ef7eb2e8f9f7	547	}
<>	144:ef7eb2e8f9f7	548	/* Check if the header size is modulo 16 */
<>	144:ef7eb2e8f9f7	549	if ((headersize % 16) != 0)
<>	144:ef7eb2e8f9f7	550	{
<>	144:ef7eb2e8f9f7	551	/* Padd the header buffer with 0s till the hcryp->Init.pScratch length is modulo 16 */
<>	144:ef7eb2e8f9f7	552	for(loopcounter = headersize; loopcounter <= ((headersize/16) + 1) * 16; loopcounter++)
<>	144:ef7eb2e8f9f7	553	{
<>	144:ef7eb2e8f9f7	554	hcryp->Init.pScratch[loopcounter] = 0;
<>	144:ef7eb2e8f9f7	555	}
<>	144:ef7eb2e8f9f7	556	/* Set the header size to modulo 16 */
<>	144:ef7eb2e8f9f7	557	headersize = ((headersize/16) + 1) * 16;
<>	144:ef7eb2e8f9f7	558	}
<>	144:ef7eb2e8f9f7	559	/* Set the pointer headeraddr to hcryp->Init.pScratch */
<>	144:ef7eb2e8f9f7	560	headeraddr = (uint32_t)hcryp->Init.pScratch;
<>	144:ef7eb2e8f9f7	561	}
<>	144:ef7eb2e8f9f7	562	/********************* Formatting the block B0 ************************/
<>	144:ef7eb2e8f9f7	563	if(headersize != 0)
<>	144:ef7eb2e8f9f7	564	{
<>	144:ef7eb2e8f9f7	565	blockb0[0] = 0x40;
<>	144:ef7eb2e8f9f7	566	}
<>	144:ef7eb2e8f9f7	567	/* Flags byte */
<>	144:ef7eb2e8f9f7	568	/* blockb0[0] \|= 0u \| (((( (uint8_t) hcryp->Init.TagSize - 2) / 2) & 0x07 ) << 3 ) \| ( ( (uint8_t) (15 - hcryp->Init.IVSize) - 1) & 0x07) */
<>	144:ef7eb2e8f9f7	569	blockb0[0] \|= (uint8_t)((uint8_t)((uint8_t)(((uint8_t)(hcryp->Init.TagSize - (uint8_t)(2))) >> 1) & (uint8_t)0x07 ) << 3);
<>	144:ef7eb2e8f9f7	570	blockb0[0] \|= (uint8_t)((uint8_t)((uint8_t)((uint8_t)(15) - hcryp->Init.IVSize) - (uint8_t)1) & (uint8_t)0x07);
<>	144:ef7eb2e8f9f7	571
<>	144:ef7eb2e8f9f7	572	for (loopcounter = 0; loopcounter < hcryp->Init.IVSize; loopcounter++)
<>	144:ef7eb2e8f9f7	573	{
<>	144:ef7eb2e8f9f7	574	blockb0[loopcounter+1] = hcryp->Init.pInitVect[loopcounter];
<>	144:ef7eb2e8f9f7	575	}
<>	144:ef7eb2e8f9f7	576	for ( ; loopcounter < 13; loopcounter++)
<>	144:ef7eb2e8f9f7	577	{
<>	144:ef7eb2e8f9f7	578	blockb0[loopcounter+1] = 0;
<>	144:ef7eb2e8f9f7	579	}
<>	144:ef7eb2e8f9f7	580
<>	144:ef7eb2e8f9f7	581	blockb0[14] = (Size >> 8);
<>	144:ef7eb2e8f9f7	582	blockb0[15] = (Size & 0xFF);
<>	144:ef7eb2e8f9f7	583
<>	144:ef7eb2e8f9f7	584	/*********************** Formatting the initial counter ***************/
<>	144:ef7eb2e8f9f7	585	/* Byte 0:
<>	144:ef7eb2e8f9f7	586	Bits 7 and 6 are reserved and shall be set to 0
<>	144:ef7eb2e8f9f7	587	Bits 3, 4, and 5 shall also be set to 0, to ensure that all the counter blocks
<>	144:ef7eb2e8f9f7	588	are distinct from B0
<>	144:ef7eb2e8f9f7	589	Bits 0, 1, and 2 contain the same encoding of q as in B0
<>	144:ef7eb2e8f9f7	590	*/
<>	144:ef7eb2e8f9f7	591	ctr[0] = blockb0[0] & 0x07;
<>	144:ef7eb2e8f9f7	592	/* byte 1 to NonceSize is the IV (Nonce) */
<>	144:ef7eb2e8f9f7	593	for(loopcounter = 1; loopcounter < hcryp->Init.IVSize + 1; loopcounter++)
<>	144:ef7eb2e8f9f7	594	{
<>	144:ef7eb2e8f9f7	595	ctr[loopcounter] = blockb0[loopcounter];
<>	144:ef7eb2e8f9f7	596	}
<>	144:ef7eb2e8f9f7	597	/* Set the LSB to 1 */
<>	144:ef7eb2e8f9f7	598	ctr[15] \|= 0x01;
<>	144:ef7eb2e8f9f7	599
<>	144:ef7eb2e8f9f7	600	/* Set the key */
<>	144:ef7eb2e8f9f7	601	CRYPEx_GCMCCM_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
<>	144:ef7eb2e8f9f7	602
<>	144:ef7eb2e8f9f7	603	/* Set the CRYP peripheral in AES CCM mode */
<>	144:ef7eb2e8f9f7	604	__HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CCM_ENCRYPT);
<>	144:ef7eb2e8f9f7	605
<>	144:ef7eb2e8f9f7	606	/* Set the Initialization Vector */
<>	144:ef7eb2e8f9f7	607	CRYPEx_GCMCCM_SetInitVector(hcryp, ctr);
<>	144:ef7eb2e8f9f7	608
<>	144:ef7eb2e8f9f7	609	/* Select init phase */
<>	144:ef7eb2e8f9f7	610	__HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT);
<>	144:ef7eb2e8f9f7	611
<>	144:ef7eb2e8f9f7	612	b0addr = (uint32_t)blockb0;
<>	144:ef7eb2e8f9f7	613	/* Write the blockb0 block in the IN FIFO */
<>	144:ef7eb2e8f9f7	614	hcryp->Instance->DR = (uint32_t)(b0addr);
<>	144:ef7eb2e8f9f7	615	b0addr+=4;
<>	144:ef7eb2e8f9f7	616	hcryp->Instance->DR = (uint32_t)(b0addr);
<>	144:ef7eb2e8f9f7	617	b0addr+=4;
<>	144:ef7eb2e8f9f7	618	hcryp->Instance->DR = (uint32_t)(b0addr);
<>	144:ef7eb2e8f9f7	619	b0addr+=4;
<>	144:ef7eb2e8f9f7	620	hcryp->Instance->DR = (uint32_t)(b0addr);
<>	144:ef7eb2e8f9f7	621
<>	144:ef7eb2e8f9f7	622	/* Enable the CRYP peripheral */
<>	144:ef7eb2e8f9f7	623	__HAL_CRYP_ENABLE(hcryp);
<>	144:ef7eb2e8f9f7	624
<>	144:ef7eb2e8f9f7	625	/* Get tick */
<>	144:ef7eb2e8f9f7	626	tickstart = HAL_GetTick();
<>	144:ef7eb2e8f9f7	627
<>	144:ef7eb2e8f9f7	628	while((CRYP->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN)
<>	144:ef7eb2e8f9f7	629	{
<>	144:ef7eb2e8f9f7	630	/* Check for the Timeout */
<>	144:ef7eb2e8f9f7	631	if(Timeout != HAL_MAX_DELAY)
<>	144:ef7eb2e8f9f7	632	{
<>	144:ef7eb2e8f9f7	633	if((Timeout == 0)\|\|((HAL_GetTick() - tickstart ) > Timeout))
<>	144:ef7eb2e8f9f7	634	{
<>	144:ef7eb2e8f9f7	635	/* Change state */
<>	144:ef7eb2e8f9f7	636	hcryp->State = HAL_CRYP_STATE_TIMEOUT;
<>	144:ef7eb2e8f9f7	637
<>	144:ef7eb2e8f9f7	638	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	639	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	640
<>	144:ef7eb2e8f9f7	641	return HAL_TIMEOUT;
<>	144:ef7eb2e8f9f7	642	}
<>	144:ef7eb2e8f9f7	643	}
<>	144:ef7eb2e8f9f7	644	}
<>	144:ef7eb2e8f9f7	645	/*************************** Header phase *****************************/
<>	144:ef7eb2e8f9f7	646	if(headersize != 0)
<>	144:ef7eb2e8f9f7	647	{
<>	144:ef7eb2e8f9f7	648	/* Select header phase */
<>	144:ef7eb2e8f9f7	649	__HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER);
<>	144:ef7eb2e8f9f7	650
<>	144:ef7eb2e8f9f7	651	/* Enable the CRYP peripheral */
<>	144:ef7eb2e8f9f7	652	__HAL_CRYP_ENABLE(hcryp);
<>	144:ef7eb2e8f9f7	653
<>	144:ef7eb2e8f9f7	654	for(loopcounter = 0; (loopcounter < headersize); loopcounter+=16)
<>	144:ef7eb2e8f9f7	655	{
<>	144:ef7eb2e8f9f7	656	/* Get tick */
<>	144:ef7eb2e8f9f7	657	tickstart = HAL_GetTick();
<>	144:ef7eb2e8f9f7	658
<>	144:ef7eb2e8f9f7	659	while(HAL_IS_BIT_CLR(hcryp->Instance->SR, CRYP_FLAG_IFEM))
<>	144:ef7eb2e8f9f7	660	{
<>	144:ef7eb2e8f9f7	661	{
<>	144:ef7eb2e8f9f7	662	/* Check for the Timeout */
<>	144:ef7eb2e8f9f7	663	if(Timeout != HAL_MAX_DELAY)
<>	144:ef7eb2e8f9f7	664	{
<>	144:ef7eb2e8f9f7	665	if((Timeout == 0)\|\|((HAL_GetTick() - tickstart ) > Timeout))
<>	144:ef7eb2e8f9f7	666	{
<>	144:ef7eb2e8f9f7	667	/* Change state */
<>	144:ef7eb2e8f9f7	668	hcryp->State = HAL_CRYP_STATE_TIMEOUT;
<>	144:ef7eb2e8f9f7	669
<>	144:ef7eb2e8f9f7	670	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	671	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	672
<>	144:ef7eb2e8f9f7	673	return HAL_TIMEOUT;
<>	144:ef7eb2e8f9f7	674	}
<>	144:ef7eb2e8f9f7	675	}
<>	144:ef7eb2e8f9f7	676	}
<>	144:ef7eb2e8f9f7	677	}
<>	144:ef7eb2e8f9f7	678	/* Write the header block in the IN FIFO */
<>	144:ef7eb2e8f9f7	679	hcryp->Instance->DR = (uint32_t)(headeraddr);
<>	144:ef7eb2e8f9f7	680	headeraddr+=4;
<>	144:ef7eb2e8f9f7	681	hcryp->Instance->DR = (uint32_t)(headeraddr);
<>	144:ef7eb2e8f9f7	682	headeraddr+=4;
<>	144:ef7eb2e8f9f7	683	hcryp->Instance->DR = (uint32_t)(headeraddr);
<>	144:ef7eb2e8f9f7	684	headeraddr+=4;
<>	144:ef7eb2e8f9f7	685	hcryp->Instance->DR = (uint32_t)(headeraddr);
<>	144:ef7eb2e8f9f7	686	headeraddr+=4;
<>	144:ef7eb2e8f9f7	687	}
<>	144:ef7eb2e8f9f7	688
<>	144:ef7eb2e8f9f7	689	/* Get tick */
<>	144:ef7eb2e8f9f7	690	tickstart = HAL_GetTick();
<>	144:ef7eb2e8f9f7	691
<>	144:ef7eb2e8f9f7	692	while((hcryp->Instance->SR & CRYP_FLAG_BUSY) == CRYP_FLAG_BUSY)
<>	144:ef7eb2e8f9f7	693	{
<>	144:ef7eb2e8f9f7	694	/* Check for the Timeout */
<>	144:ef7eb2e8f9f7	695	if(Timeout != HAL_MAX_DELAY)
<>	144:ef7eb2e8f9f7	696	{
<>	144:ef7eb2e8f9f7	697	if((Timeout == 0)\|\|((HAL_GetTick() - tickstart ) > Timeout))
<>	144:ef7eb2e8f9f7	698	{
<>	144:ef7eb2e8f9f7	699	/* Change state */
<>	144:ef7eb2e8f9f7	700	hcryp->State = HAL_CRYP_STATE_TIMEOUT;
<>	144:ef7eb2e8f9f7	701
<>	144:ef7eb2e8f9f7	702	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	703	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	704
<>	144:ef7eb2e8f9f7	705	return HAL_TIMEOUT;
<>	144:ef7eb2e8f9f7	706	}
<>	144:ef7eb2e8f9f7	707	}
<>	144:ef7eb2e8f9f7	708	}
<>	144:ef7eb2e8f9f7	709	}
<>	144:ef7eb2e8f9f7	710	/* Save formatted counter into the scratch buffer pScratch */
<>	144:ef7eb2e8f9f7	711	for(loopcounter = 0; (loopcounter < 16); loopcounter++)
<>	144:ef7eb2e8f9f7	712	{
<>	144:ef7eb2e8f9f7	713	hcryp->Init.pScratch[loopcounter] = ctr[loopcounter];
<>	144:ef7eb2e8f9f7	714	}
<>	144:ef7eb2e8f9f7	715	/* Reset bit 0 */
<>	144:ef7eb2e8f9f7	716	hcryp->Init.pScratch[15] &= 0xfe;
<>	144:ef7eb2e8f9f7	717
<>	144:ef7eb2e8f9f7	718	/* Select payload phase once the header phase is performed */
<>	144:ef7eb2e8f9f7	719	__HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD);
<>	144:ef7eb2e8f9f7	720
<>	144:ef7eb2e8f9f7	721	/* Flush FIFO */
<>	144:ef7eb2e8f9f7	722	__HAL_CRYP_FIFO_FLUSH(hcryp);
<>	144:ef7eb2e8f9f7	723
<>	144:ef7eb2e8f9f7	724	/* Enable the CRYP peripheral */
<>	144:ef7eb2e8f9f7	725	__HAL_CRYP_ENABLE(hcryp);
<>	144:ef7eb2e8f9f7	726
<>	144:ef7eb2e8f9f7	727	/* Set the phase */
<>	144:ef7eb2e8f9f7	728	hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
<>	144:ef7eb2e8f9f7	729	}
<>	144:ef7eb2e8f9f7	730
<>	144:ef7eb2e8f9f7	731	/* Write Plain Data and Get Cypher Data */
<>	144:ef7eb2e8f9f7	732	if(CRYPEx_GCMCCM_ProcessData(hcryp,pPlainData, Size, pCypherData, Timeout) != HAL_OK)
<>	144:ef7eb2e8f9f7	733	{
<>	144:ef7eb2e8f9f7	734	return HAL_TIMEOUT;
<>	144:ef7eb2e8f9f7	735	}
<>	144:ef7eb2e8f9f7	736
<>	144:ef7eb2e8f9f7	737	/* Change the CRYP peripheral state */
<>	144:ef7eb2e8f9f7	738	hcryp->State = HAL_CRYP_STATE_READY;
<>	144:ef7eb2e8f9f7	739
<>	144:ef7eb2e8f9f7	740	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	741	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	742
<>	144:ef7eb2e8f9f7	743	/* Return function status */
<>	144:ef7eb2e8f9f7	744	return HAL_OK;
<>	144:ef7eb2e8f9f7	745	}
<>	144:ef7eb2e8f9f7	746
<>	144:ef7eb2e8f9f7	747	/**
<>	144:ef7eb2e8f9f7	748	* @brief Initializes the CRYP peripheral in AES GCM encryption mode then
<>	144:ef7eb2e8f9f7	749	* encrypt pPlainData. The cypher data are available in pCypherData.
<>	144:ef7eb2e8f9f7	750	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	144:ef7eb2e8f9f7	751	* the configuration information for CRYP module
<>	144:ef7eb2e8f9f7	752	* @param pPlainData: Pointer to the plaintext buffer
<>	144:ef7eb2e8f9f7	753	* @param Size: Length of the plaintext buffer, must be a multiple of 16
<>	144:ef7eb2e8f9f7	754	* @param pCypherData: Pointer to the cyphertext buffer
<>	144:ef7eb2e8f9f7	755	* @param Timeout: Timeout duration
<>	144:ef7eb2e8f9f7	756	* @retval HAL status
<>	144:ef7eb2e8f9f7	757	*/
<>	144:ef7eb2e8f9f7	758	HAL_StatusTypeDef HAL_CRYPEx_AESGCM_Encrypt(CRYP_HandleTypeDef hcryp, uint8_t pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout)
<>	144:ef7eb2e8f9f7	759	{
<>	144:ef7eb2e8f9f7	760	uint32_t tickstart = 0;
<>	144:ef7eb2e8f9f7	761
<>	144:ef7eb2e8f9f7	762	/* Process Locked */
<>	144:ef7eb2e8f9f7	763	__HAL_LOCK(hcryp);
<>	144:ef7eb2e8f9f7	764
<>	144:ef7eb2e8f9f7	765	/* Change the CRYP peripheral state */
<>	144:ef7eb2e8f9f7	766	hcryp->State = HAL_CRYP_STATE_BUSY;
<>	144:ef7eb2e8f9f7	767
<>	144:ef7eb2e8f9f7	768	/* Check if initialization phase has already been performed */
<>	144:ef7eb2e8f9f7	769	if(hcryp->Phase == HAL_CRYP_PHASE_READY)
<>	144:ef7eb2e8f9f7	770	{
<>	144:ef7eb2e8f9f7	771	/* Set the key */
<>	144:ef7eb2e8f9f7	772	CRYPEx_GCMCCM_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
<>	144:ef7eb2e8f9f7	773
<>	144:ef7eb2e8f9f7	774	/* Set the CRYP peripheral in AES GCM mode */
<>	144:ef7eb2e8f9f7	775	__HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_GCM_ENCRYPT);
<>	144:ef7eb2e8f9f7	776
<>	144:ef7eb2e8f9f7	777	/* Set the Initialization Vector */
<>	144:ef7eb2e8f9f7	778	CRYPEx_GCMCCM_SetInitVector(hcryp, hcryp->Init.pInitVect);
<>	144:ef7eb2e8f9f7	779
<>	144:ef7eb2e8f9f7	780	/* Flush FIFO */
<>	144:ef7eb2e8f9f7	781	__HAL_CRYP_FIFO_FLUSH(hcryp);
<>	144:ef7eb2e8f9f7	782
<>	144:ef7eb2e8f9f7	783	/* Enable the CRYP peripheral */
<>	144:ef7eb2e8f9f7	784	__HAL_CRYP_ENABLE(hcryp);
<>	144:ef7eb2e8f9f7	785
<>	144:ef7eb2e8f9f7	786	/* Get tick */
<>	144:ef7eb2e8f9f7	787	tickstart = HAL_GetTick();
<>	144:ef7eb2e8f9f7	788
<>	144:ef7eb2e8f9f7	789	while((CRYP->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN)
<>	144:ef7eb2e8f9f7	790	{
<>	144:ef7eb2e8f9f7	791	/* Check for the Timeout */
<>	144:ef7eb2e8f9f7	792	if(Timeout != HAL_MAX_DELAY)
<>	144:ef7eb2e8f9f7	793	{
<>	144:ef7eb2e8f9f7	794	if((Timeout == 0)\|\|((HAL_GetTick() - tickstart ) > Timeout))
<>	144:ef7eb2e8f9f7	795	{
<>	144:ef7eb2e8f9f7	796	/* Change state */
<>	144:ef7eb2e8f9f7	797	hcryp->State = HAL_CRYP_STATE_TIMEOUT;
<>	144:ef7eb2e8f9f7	798
<>	144:ef7eb2e8f9f7	799	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	800	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	801
<>	144:ef7eb2e8f9f7	802	return HAL_TIMEOUT;
<>	144:ef7eb2e8f9f7	803	}
<>	144:ef7eb2e8f9f7	804	}
<>	144:ef7eb2e8f9f7	805	}
<>	144:ef7eb2e8f9f7	806
<>	144:ef7eb2e8f9f7	807	/* Set the header phase */
<>	144:ef7eb2e8f9f7	808	if(CRYPEx_GCMCCM_SetHeaderPhase(hcryp, hcryp->Init.Header, hcryp->Init.HeaderSize, Timeout) != HAL_OK)
<>	144:ef7eb2e8f9f7	809	{
<>	144:ef7eb2e8f9f7	810	return HAL_TIMEOUT;
<>	144:ef7eb2e8f9f7	811	}
<>	144:ef7eb2e8f9f7	812
<>	144:ef7eb2e8f9f7	813	/* Disable the CRYP peripheral */
<>	144:ef7eb2e8f9f7	814	__HAL_CRYP_DISABLE(hcryp);
<>	144:ef7eb2e8f9f7	815
<>	144:ef7eb2e8f9f7	816	/* Select payload phase once the header phase is performed */
<>	144:ef7eb2e8f9f7	817	__HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD);
<>	144:ef7eb2e8f9f7	818
<>	144:ef7eb2e8f9f7	819	/* Flush FIFO */
<>	144:ef7eb2e8f9f7	820	__HAL_CRYP_FIFO_FLUSH(hcryp);
<>	144:ef7eb2e8f9f7	821
<>	144:ef7eb2e8f9f7	822	/* Enable the CRYP peripheral */
<>	144:ef7eb2e8f9f7	823	__HAL_CRYP_ENABLE(hcryp);
<>	144:ef7eb2e8f9f7	824
<>	144:ef7eb2e8f9f7	825	/* Set the phase */
<>	144:ef7eb2e8f9f7	826	hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
<>	144:ef7eb2e8f9f7	827	}
<>	144:ef7eb2e8f9f7	828
<>	144:ef7eb2e8f9f7	829	/* Write Plain Data and Get Cypher Data */
<>	144:ef7eb2e8f9f7	830	if(CRYPEx_GCMCCM_ProcessData(hcryp, pPlainData, Size, pCypherData, Timeout) != HAL_OK)
<>	144:ef7eb2e8f9f7	831	{
<>	144:ef7eb2e8f9f7	832	return HAL_TIMEOUT;
<>	144:ef7eb2e8f9f7	833	}
<>	144:ef7eb2e8f9f7	834
<>	144:ef7eb2e8f9f7	835	/* Change the CRYP peripheral state */
<>	144:ef7eb2e8f9f7	836	hcryp->State = HAL_CRYP_STATE_READY;
<>	144:ef7eb2e8f9f7	837
<>	144:ef7eb2e8f9f7	838	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	839	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	840
<>	144:ef7eb2e8f9f7	841	/* Return function status */
<>	144:ef7eb2e8f9f7	842	return HAL_OK;
<>	144:ef7eb2e8f9f7	843	}
<>	144:ef7eb2e8f9f7	844
<>	144:ef7eb2e8f9f7	845	/**
<>	144:ef7eb2e8f9f7	846	* @brief Initializes the CRYP peripheral in AES GCM decryption mode then
<>	144:ef7eb2e8f9f7	847	* decrypted pCypherData. The cypher data are available in pPlainData.
<>	144:ef7eb2e8f9f7	848	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	144:ef7eb2e8f9f7	849	* the configuration information for CRYP module
<>	144:ef7eb2e8f9f7	850	* @param pCypherData: Pointer to the cyphertext buffer
<>	144:ef7eb2e8f9f7	851	* @param Size: Length of the cyphertext buffer, must be a multiple of 16
<>	144:ef7eb2e8f9f7	852	* @param pPlainData: Pointer to the plaintext buffer
<>	144:ef7eb2e8f9f7	853	* @param Timeout: Timeout duration
<>	144:ef7eb2e8f9f7	854	* @retval HAL status
<>	144:ef7eb2e8f9f7	855	*/
<>	144:ef7eb2e8f9f7	856	HAL_StatusTypeDef HAL_CRYPEx_AESGCM_Decrypt(CRYP_HandleTypeDef hcryp, uint8_t pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout)
<>	144:ef7eb2e8f9f7	857	{
<>	144:ef7eb2e8f9f7	858	uint32_t tickstart = 0;
<>	144:ef7eb2e8f9f7	859
<>	144:ef7eb2e8f9f7	860	/* Process Locked */
<>	144:ef7eb2e8f9f7	861	__HAL_LOCK(hcryp);
<>	144:ef7eb2e8f9f7	862
<>	144:ef7eb2e8f9f7	863	/* Change the CRYP peripheral state */
<>	144:ef7eb2e8f9f7	864	hcryp->State = HAL_CRYP_STATE_BUSY;
<>	144:ef7eb2e8f9f7	865
<>	144:ef7eb2e8f9f7	866	/* Check if initialization phase has already been performed */
<>	144:ef7eb2e8f9f7	867	if(hcryp->Phase == HAL_CRYP_PHASE_READY)
<>	144:ef7eb2e8f9f7	868	{
<>	144:ef7eb2e8f9f7	869	/* Set the key */
<>	144:ef7eb2e8f9f7	870	CRYPEx_GCMCCM_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
<>	144:ef7eb2e8f9f7	871
<>	144:ef7eb2e8f9f7	872	/* Set the CRYP peripheral in AES GCM decryption mode */
<>	144:ef7eb2e8f9f7	873	__HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_GCM_DECRYPT);
<>	144:ef7eb2e8f9f7	874
<>	144:ef7eb2e8f9f7	875	/* Set the Initialization Vector */
<>	144:ef7eb2e8f9f7	876	CRYPEx_GCMCCM_SetInitVector(hcryp, hcryp->Init.pInitVect);
<>	144:ef7eb2e8f9f7	877
<>	144:ef7eb2e8f9f7	878	/* Flush FIFO */
<>	144:ef7eb2e8f9f7	879	__HAL_CRYP_FIFO_FLUSH(hcryp);
<>	144:ef7eb2e8f9f7	880
<>	144:ef7eb2e8f9f7	881	/* Enable the CRYP peripheral */
<>	144:ef7eb2e8f9f7	882	__HAL_CRYP_ENABLE(hcryp);
<>	144:ef7eb2e8f9f7	883
<>	144:ef7eb2e8f9f7	884	/* Get tick */
<>	144:ef7eb2e8f9f7	885	tickstart = HAL_GetTick();
<>	144:ef7eb2e8f9f7	886
<>	144:ef7eb2e8f9f7	887	while((CRYP->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN)
<>	144:ef7eb2e8f9f7	888	{
<>	144:ef7eb2e8f9f7	889	/* Check for the Timeout */
<>	144:ef7eb2e8f9f7	890	if(Timeout != HAL_MAX_DELAY)
<>	144:ef7eb2e8f9f7	891	{
<>	144:ef7eb2e8f9f7	892	if((Timeout == 0)\|\|((HAL_GetTick() - tickstart ) > Timeout))
<>	144:ef7eb2e8f9f7	893	{
<>	144:ef7eb2e8f9f7	894	/* Change state */
<>	144:ef7eb2e8f9f7	895	hcryp->State = HAL_CRYP_STATE_TIMEOUT;
<>	144:ef7eb2e8f9f7	896
<>	144:ef7eb2e8f9f7	897	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	898	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	899
<>	144:ef7eb2e8f9f7	900	return HAL_TIMEOUT;
<>	144:ef7eb2e8f9f7	901	}
<>	144:ef7eb2e8f9f7	902	}
<>	144:ef7eb2e8f9f7	903	}
<>	144:ef7eb2e8f9f7	904
<>	144:ef7eb2e8f9f7	905	/* Set the header phase */
<>	144:ef7eb2e8f9f7	906	if(CRYPEx_GCMCCM_SetHeaderPhase(hcryp, hcryp->Init.Header, hcryp->Init.HeaderSize, Timeout) != HAL_OK)
<>	144:ef7eb2e8f9f7	907	{
<>	144:ef7eb2e8f9f7	908	return HAL_TIMEOUT;
<>	144:ef7eb2e8f9f7	909	}
<>	144:ef7eb2e8f9f7	910	/* Disable the CRYP peripheral */
<>	144:ef7eb2e8f9f7	911	__HAL_CRYP_DISABLE(hcryp);
<>	144:ef7eb2e8f9f7	912
<>	144:ef7eb2e8f9f7	913	/* Select payload phase once the header phase is performed */
<>	144:ef7eb2e8f9f7	914	__HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD);
<>	144:ef7eb2e8f9f7	915
<>	144:ef7eb2e8f9f7	916	/* Enable the CRYP peripheral */
<>	144:ef7eb2e8f9f7	917	__HAL_CRYP_ENABLE(hcryp);
<>	144:ef7eb2e8f9f7	918
<>	144:ef7eb2e8f9f7	919	/* Set the phase */
<>	144:ef7eb2e8f9f7	920	hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
<>	144:ef7eb2e8f9f7	921	}
<>	144:ef7eb2e8f9f7	922
<>	144:ef7eb2e8f9f7	923	/* Write Plain Data and Get Cypher Data */
<>	144:ef7eb2e8f9f7	924	if(CRYPEx_GCMCCM_ProcessData(hcryp, pCypherData, Size, pPlainData, Timeout) != HAL_OK)
<>	144:ef7eb2e8f9f7	925	{
<>	144:ef7eb2e8f9f7	926	return HAL_TIMEOUT;
<>	144:ef7eb2e8f9f7	927	}
<>	144:ef7eb2e8f9f7	928
<>	144:ef7eb2e8f9f7	929	/* Change the CRYP peripheral state */
<>	144:ef7eb2e8f9f7	930	hcryp->State = HAL_CRYP_STATE_READY;
<>	144:ef7eb2e8f9f7	931
<>	144:ef7eb2e8f9f7	932	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	933	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	934
<>	144:ef7eb2e8f9f7	935	/* Return function status */
<>	144:ef7eb2e8f9f7	936	return HAL_OK;
<>	144:ef7eb2e8f9f7	937	}
<>	144:ef7eb2e8f9f7	938
<>	144:ef7eb2e8f9f7	939	/**
<>	144:ef7eb2e8f9f7	940	* @brief Computes the authentication TAG.
<>	144:ef7eb2e8f9f7	941	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	144:ef7eb2e8f9f7	942	* the configuration information for CRYP module
<>	144:ef7eb2e8f9f7	943	* @param Size: Total length of the plain/cyphertext buffer
<>	144:ef7eb2e8f9f7	944	* @param AuthTag: Pointer to the authentication buffer
<>	144:ef7eb2e8f9f7	945	* @param Timeout: Timeout duration
<>	144:ef7eb2e8f9f7	946	* @retval HAL status
<>	144:ef7eb2e8f9f7	947	*/
<>	144:ef7eb2e8f9f7	948	HAL_StatusTypeDef HAL_CRYPEx_AESGCM_Finish(CRYP_HandleTypeDef hcryp, uint32_t Size, uint8_t AuthTag, uint32_t Timeout)
<>	144:ef7eb2e8f9f7	949	{
<>	144:ef7eb2e8f9f7	950	uint32_t tickstart = 0;
<>	144:ef7eb2e8f9f7	951	uint64_t headerlength = hcryp->Init.HeaderSize * 8; /* Header length in bits */
<>	144:ef7eb2e8f9f7	952	uint64_t inputlength = Size * 8; /* input length in bits */
<>	144:ef7eb2e8f9f7	953	uint32_t tagaddr = (uint32_t)AuthTag;
<>	144:ef7eb2e8f9f7	954
<>	144:ef7eb2e8f9f7	955	/* Process Locked */
<>	144:ef7eb2e8f9f7	956	__HAL_LOCK(hcryp);
<>	144:ef7eb2e8f9f7	957
<>	144:ef7eb2e8f9f7	958	/* Change the CRYP peripheral state */
<>	144:ef7eb2e8f9f7	959	hcryp->State = HAL_CRYP_STATE_BUSY;
<>	144:ef7eb2e8f9f7	960
<>	144:ef7eb2e8f9f7	961	/* Check if initialization phase has already been performed */
<>	144:ef7eb2e8f9f7	962	if(hcryp->Phase == HAL_CRYP_PHASE_PROCESS)
<>	144:ef7eb2e8f9f7	963	{
<>	144:ef7eb2e8f9f7	964	/* Change the CRYP phase */
<>	144:ef7eb2e8f9f7	965	hcryp->Phase = HAL_CRYP_PHASE_FINAL;
<>	144:ef7eb2e8f9f7	966
<>	144:ef7eb2e8f9f7	967	/* Disable CRYP to start the final phase */
<>	144:ef7eb2e8f9f7	968	__HAL_CRYP_DISABLE(hcryp);
<>	144:ef7eb2e8f9f7	969
<>	144:ef7eb2e8f9f7	970	/* Select final phase */
<>	144:ef7eb2e8f9f7	971	__HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_FINAL);
<>	144:ef7eb2e8f9f7	972
<>	144:ef7eb2e8f9f7	973	/* Enable the CRYP peripheral */
<>	144:ef7eb2e8f9f7	974	__HAL_CRYP_ENABLE(hcryp);
<>	144:ef7eb2e8f9f7	975
<>	144:ef7eb2e8f9f7	976	/* Write the number of bits in header (64 bits) followed by the number of bits
<>	144:ef7eb2e8f9f7	977	in the payload */
<>	144:ef7eb2e8f9f7	978	if(hcryp->Init.DataType == CRYP_DATATYPE_1B)
<>	144:ef7eb2e8f9f7	979	{
<>	144:ef7eb2e8f9f7	980	hcryp->Instance->DR = __RBIT(headerlength >> 32);
<>	144:ef7eb2e8f9f7	981	hcryp->Instance->DR = __RBIT(headerlength);
<>	144:ef7eb2e8f9f7	982	hcryp->Instance->DR = __RBIT(inputlength >> 32);
<>	144:ef7eb2e8f9f7	983	hcryp->Instance->DR = __RBIT(inputlength);
<>	144:ef7eb2e8f9f7	984	}
<>	144:ef7eb2e8f9f7	985	else if(hcryp->Init.DataType == CRYP_DATATYPE_8B)
<>	144:ef7eb2e8f9f7	986	{
<>	144:ef7eb2e8f9f7	987	hcryp->Instance->DR = __REV(headerlength >> 32);
<>	144:ef7eb2e8f9f7	988	hcryp->Instance->DR = __REV(headerlength);
<>	144:ef7eb2e8f9f7	989	hcryp->Instance->DR = __REV(inputlength >> 32);
<>	144:ef7eb2e8f9f7	990	hcryp->Instance->DR = __REV(inputlength);
<>	144:ef7eb2e8f9f7	991	}
<>	144:ef7eb2e8f9f7	992	else if(hcryp->Init.DataType == CRYP_DATATYPE_16B)
<>	144:ef7eb2e8f9f7	993	{
<>	144:ef7eb2e8f9f7	994	hcryp->Instance->DR = __ROR((uint32_t)(headerlength >> 32), 16);
<>	144:ef7eb2e8f9f7	995	hcryp->Instance->DR = __ROR((uint32_t)headerlength, 16);
<>	144:ef7eb2e8f9f7	996	hcryp->Instance->DR = __ROR((uint32_t)(inputlength >> 32), 16);
<>	144:ef7eb2e8f9f7	997	hcryp->Instance->DR = __ROR((uint32_t)inputlength, 16);
<>	144:ef7eb2e8f9f7	998	}
<>	144:ef7eb2e8f9f7	999	else if(hcryp->Init.DataType == CRYP_DATATYPE_32B)
<>	144:ef7eb2e8f9f7	1000	{
<>	144:ef7eb2e8f9f7	1001	hcryp->Instance->DR = (uint32_t)(headerlength >> 32);
<>	144:ef7eb2e8f9f7	1002	hcryp->Instance->DR = (uint32_t)(headerlength);
<>	144:ef7eb2e8f9f7	1003	hcryp->Instance->DR = (uint32_t)(inputlength >> 32);
<>	144:ef7eb2e8f9f7	1004	hcryp->Instance->DR = (uint32_t)(inputlength);
<>	144:ef7eb2e8f9f7	1005	}
<>	144:ef7eb2e8f9f7	1006	/* Get tick */
<>	144:ef7eb2e8f9f7	1007	tickstart = HAL_GetTick();
<>	144:ef7eb2e8f9f7	1008
<>	144:ef7eb2e8f9f7	1009	while(HAL_IS_BIT_CLR(hcryp->Instance->SR, CRYP_FLAG_OFNE))
<>	144:ef7eb2e8f9f7	1010	{
<>	144:ef7eb2e8f9f7	1011	/* Check for the Timeout */
<>	144:ef7eb2e8f9f7	1012	if(Timeout != HAL_MAX_DELAY)
<>	144:ef7eb2e8f9f7	1013	{
<>	144:ef7eb2e8f9f7	1014	if((Timeout == 0)\|\|((HAL_GetTick() - tickstart ) > Timeout))
<>	144:ef7eb2e8f9f7	1015	{
<>	144:ef7eb2e8f9f7	1016	/* Change state */
<>	144:ef7eb2e8f9f7	1017	hcryp->State = HAL_CRYP_STATE_TIMEOUT;
<>	144:ef7eb2e8f9f7	1018
<>	144:ef7eb2e8f9f7	1019	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	1020	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	1021
<>	144:ef7eb2e8f9f7	1022	return HAL_TIMEOUT;
<>	144:ef7eb2e8f9f7	1023	}
<>	144:ef7eb2e8f9f7	1024	}
<>	144:ef7eb2e8f9f7	1025	}
<>	144:ef7eb2e8f9f7	1026
<>	144:ef7eb2e8f9f7	1027	/* Read the Auth TAG in the IN FIFO */
<>	144:ef7eb2e8f9f7	1028	(uint32_t)(tagaddr) = hcryp->Instance->DOUT;
<>	144:ef7eb2e8f9f7	1029	tagaddr+=4;
<>	144:ef7eb2e8f9f7	1030	(uint32_t)(tagaddr) = hcryp->Instance->DOUT;
<>	144:ef7eb2e8f9f7	1031	tagaddr+=4;
<>	144:ef7eb2e8f9f7	1032	(uint32_t)(tagaddr) = hcryp->Instance->DOUT;
<>	144:ef7eb2e8f9f7	1033	tagaddr+=4;
<>	144:ef7eb2e8f9f7	1034	(uint32_t)(tagaddr) = hcryp->Instance->DOUT;
<>	144:ef7eb2e8f9f7	1035	}
<>	144:ef7eb2e8f9f7	1036
<>	144:ef7eb2e8f9f7	1037	/* Change the CRYP peripheral state */
<>	144:ef7eb2e8f9f7	1038	hcryp->State = HAL_CRYP_STATE_READY;
<>	144:ef7eb2e8f9f7	1039
<>	144:ef7eb2e8f9f7	1040	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	1041	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	1042
<>	144:ef7eb2e8f9f7	1043	/* Return function status */
<>	144:ef7eb2e8f9f7	1044	return HAL_OK;
<>	144:ef7eb2e8f9f7	1045	}
<>	144:ef7eb2e8f9f7	1046
<>	144:ef7eb2e8f9f7	1047	/**
<>	144:ef7eb2e8f9f7	1048	* @brief Computes the authentication TAG for AES CCM mode.
<>	144:ef7eb2e8f9f7	1049	* @note This API is called after HAL_AES_CCM_Encrypt()/HAL_AES_CCM_Decrypt()
<>	144:ef7eb2e8f9f7	1050	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	144:ef7eb2e8f9f7	1051	* the configuration information for CRYP module
<>	144:ef7eb2e8f9f7	1052	* @param AuthTag: Pointer to the authentication buffer
<>	144:ef7eb2e8f9f7	1053	* @param Timeout: Timeout duration
<>	144:ef7eb2e8f9f7	1054	* @retval HAL status
<>	144:ef7eb2e8f9f7	1055	*/
<>	144:ef7eb2e8f9f7	1056	HAL_StatusTypeDef HAL_CRYPEx_AESCCM_Finish(CRYP_HandleTypeDef hcryp, uint8_t AuthTag, uint32_t Timeout)
<>	144:ef7eb2e8f9f7	1057	{
<>	144:ef7eb2e8f9f7	1058	uint32_t tickstart = 0;
<>	144:ef7eb2e8f9f7	1059	uint32_t tagaddr = (uint32_t)AuthTag;
<>	144:ef7eb2e8f9f7	1060	uint32_t ctraddr = (uint32_t)hcryp->Init.pScratch;
<>	144:ef7eb2e8f9f7	1061	uint32_t temptag[4] = {0}; /* Temporary TAG (MAC) */
<>	144:ef7eb2e8f9f7	1062	uint32_t loopcounter;
<>	144:ef7eb2e8f9f7	1063
<>	144:ef7eb2e8f9f7	1064	/* Process Locked */
<>	144:ef7eb2e8f9f7	1065	__HAL_LOCK(hcryp);
<>	144:ef7eb2e8f9f7	1066
<>	144:ef7eb2e8f9f7	1067	/* Change the CRYP peripheral state */
<>	144:ef7eb2e8f9f7	1068	hcryp->State = HAL_CRYP_STATE_BUSY;
<>	144:ef7eb2e8f9f7	1069
<>	144:ef7eb2e8f9f7	1070	/* Check if initialization phase has already been performed */
<>	144:ef7eb2e8f9f7	1071	if(hcryp->Phase == HAL_CRYP_PHASE_PROCESS)
<>	144:ef7eb2e8f9f7	1072	{
<>	144:ef7eb2e8f9f7	1073	/* Change the CRYP phase */
<>	144:ef7eb2e8f9f7	1074	hcryp->Phase = HAL_CRYP_PHASE_FINAL;
<>	144:ef7eb2e8f9f7	1075
<>	144:ef7eb2e8f9f7	1076	/* Disable CRYP to start the final phase */
<>	144:ef7eb2e8f9f7	1077	__HAL_CRYP_DISABLE(hcryp);
<>	144:ef7eb2e8f9f7	1078
<>	144:ef7eb2e8f9f7	1079	/* Select final phase */
<>	144:ef7eb2e8f9f7	1080	__HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_FINAL);
<>	144:ef7eb2e8f9f7	1081
<>	144:ef7eb2e8f9f7	1082	/* Enable the CRYP peripheral */
<>	144:ef7eb2e8f9f7	1083	__HAL_CRYP_ENABLE(hcryp);
<>	144:ef7eb2e8f9f7	1084
<>	144:ef7eb2e8f9f7	1085	/* Write the counter block in the IN FIFO */
<>	144:ef7eb2e8f9f7	1086	hcryp->Instance->DR = (uint32_t)ctraddr;
<>	144:ef7eb2e8f9f7	1087	ctraddr+=4;
<>	144:ef7eb2e8f9f7	1088	hcryp->Instance->DR = (uint32_t)ctraddr;
<>	144:ef7eb2e8f9f7	1089	ctraddr+=4;
<>	144:ef7eb2e8f9f7	1090	hcryp->Instance->DR = (uint32_t)ctraddr;
<>	144:ef7eb2e8f9f7	1091	ctraddr+=4;
<>	144:ef7eb2e8f9f7	1092	hcryp->Instance->DR = (uint32_t)ctraddr;
<>	144:ef7eb2e8f9f7	1093
<>	144:ef7eb2e8f9f7	1094	/* Get tick */
<>	144:ef7eb2e8f9f7	1095	tickstart = HAL_GetTick();
<>	144:ef7eb2e8f9f7	1096
<>	144:ef7eb2e8f9f7	1097	while(HAL_IS_BIT_CLR(hcryp->Instance->SR, CRYP_FLAG_OFNE))
<>	144:ef7eb2e8f9f7	1098	{
<>	144:ef7eb2e8f9f7	1099	/* Check for the Timeout */
<>	144:ef7eb2e8f9f7	1100	if(Timeout != HAL_MAX_DELAY)
<>	144:ef7eb2e8f9f7	1101	{
<>	144:ef7eb2e8f9f7	1102	if((Timeout == 0)\|\|((HAL_GetTick() - tickstart ) > Timeout))
<>	144:ef7eb2e8f9f7	1103	{
<>	144:ef7eb2e8f9f7	1104	/* Change state */
<>	144:ef7eb2e8f9f7	1105	hcryp->State = HAL_CRYP_STATE_TIMEOUT;
<>	144:ef7eb2e8f9f7	1106
<>	144:ef7eb2e8f9f7	1107	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	1108	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	1109
<>	144:ef7eb2e8f9f7	1110	return HAL_TIMEOUT;
<>	144:ef7eb2e8f9f7	1111	}
<>	144:ef7eb2e8f9f7	1112	}
<>	144:ef7eb2e8f9f7	1113	}
<>	144:ef7eb2e8f9f7	1114
<>	144:ef7eb2e8f9f7	1115	/* Read the Auth TAG in the IN FIFO */
<>	144:ef7eb2e8f9f7	1116	temptag[0] = hcryp->Instance->DOUT;
<>	144:ef7eb2e8f9f7	1117	temptag[1] = hcryp->Instance->DOUT;
<>	144:ef7eb2e8f9f7	1118	temptag[2] = hcryp->Instance->DOUT;
<>	144:ef7eb2e8f9f7	1119	temptag[3] = hcryp->Instance->DOUT;
<>	144:ef7eb2e8f9f7	1120	}
<>	144:ef7eb2e8f9f7	1121
<>	144:ef7eb2e8f9f7	1122	/* Copy temporary authentication TAG in user TAG buffer */
<>	144:ef7eb2e8f9f7	1123	for(loopcounter = 0; loopcounter < hcryp->Init.TagSize ; loopcounter++)
<>	144:ef7eb2e8f9f7	1124	{
<>	144:ef7eb2e8f9f7	1125	/* Set the authentication TAG buffer */
<>	144:ef7eb2e8f9f7	1126	((uint8_t)tagaddr+loopcounter) = ((uint8_t)temptag+loopcounter);
<>	144:ef7eb2e8f9f7	1127	}
<>	144:ef7eb2e8f9f7	1128
<>	144:ef7eb2e8f9f7	1129	/* Change the CRYP peripheral state */
<>	144:ef7eb2e8f9f7	1130	hcryp->State = HAL_CRYP_STATE_READY;
<>	144:ef7eb2e8f9f7	1131
<>	144:ef7eb2e8f9f7	1132	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	1133	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	1134
<>	144:ef7eb2e8f9f7	1135	/* Return function status */
<>	144:ef7eb2e8f9f7	1136	return HAL_OK;
<>	144:ef7eb2e8f9f7	1137	}
<>	144:ef7eb2e8f9f7	1138
<>	144:ef7eb2e8f9f7	1139	/**
<>	144:ef7eb2e8f9f7	1140	* @brief Initializes the CRYP peripheral in AES CCM decryption mode then
<>	144:ef7eb2e8f9f7	1141	* decrypted pCypherData. The cypher data are available in pPlainData.
<>	144:ef7eb2e8f9f7	1142	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	144:ef7eb2e8f9f7	1143	* the configuration information for CRYP module
<>	144:ef7eb2e8f9f7	1144	* @param pPlainData: Pointer to the plaintext buffer
<>	144:ef7eb2e8f9f7	1145	* @param Size: Length of the plaintext buffer, must be a multiple of 16
<>	144:ef7eb2e8f9f7	1146	* @param pCypherData: Pointer to the cyphertext buffer
<>	144:ef7eb2e8f9f7	1147	* @param Timeout: Timeout duration
<>	144:ef7eb2e8f9f7	1148	* @retval HAL status
<>	144:ef7eb2e8f9f7	1149	*/
<>	144:ef7eb2e8f9f7	1150	HAL_StatusTypeDef HAL_CRYPEx_AESCCM_Decrypt(CRYP_HandleTypeDef hcryp, uint8_t pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout)
<>	144:ef7eb2e8f9f7	1151	{
<>	144:ef7eb2e8f9f7	1152	uint32_t tickstart = 0;
<>	144:ef7eb2e8f9f7	1153	uint32_t headersize = hcryp->Init.HeaderSize;
<>	144:ef7eb2e8f9f7	1154	uint32_t headeraddr = (uint32_t)hcryp->Init.Header;
<>	144:ef7eb2e8f9f7	1155	uint32_t loopcounter = 0;
<>	144:ef7eb2e8f9f7	1156	uint32_t bufferidx = 0;
<>	144:ef7eb2e8f9f7	1157	uint8_t blockb0[16] = {0};/* Block B0 */
<>	144:ef7eb2e8f9f7	1158	uint8_t ctr[16] = {0}; /* Counter */
<>	144:ef7eb2e8f9f7	1159	uint32_t b0addr = (uint32_t)blockb0;
<>	144:ef7eb2e8f9f7	1160
<>	144:ef7eb2e8f9f7	1161	/* Process Locked */
<>	144:ef7eb2e8f9f7	1162	__HAL_LOCK(hcryp);
<>	144:ef7eb2e8f9f7	1163
<>	144:ef7eb2e8f9f7	1164	/* Change the CRYP peripheral state */
<>	144:ef7eb2e8f9f7	1165	hcryp->State = HAL_CRYP_STATE_BUSY;
<>	144:ef7eb2e8f9f7	1166
<>	144:ef7eb2e8f9f7	1167	/* Check if initialization phase has already been performed */
<>	144:ef7eb2e8f9f7	1168	if(hcryp->Phase == HAL_CRYP_PHASE_READY)
<>	144:ef7eb2e8f9f7	1169	{
<>	144:ef7eb2e8f9f7	1170	/********************** Formatting the header block *******************/
<>	144:ef7eb2e8f9f7	1171	if(headersize != 0)
<>	144:ef7eb2e8f9f7	1172	{
<>	144:ef7eb2e8f9f7	1173	/* Check that the associated data (or header) length is lower than 2^16 - 2^8 = 65536 - 256 = 65280 */
<>	144:ef7eb2e8f9f7	1174	if(headersize < 65280)
<>	144:ef7eb2e8f9f7	1175	{
<>	144:ef7eb2e8f9f7	1176	hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize >> 8) & 0xFFU);
<>	144:ef7eb2e8f9f7	1177	hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize) & 0xFFU);
<>	144:ef7eb2e8f9f7	1178	headersize += 2;
<>	144:ef7eb2e8f9f7	1179	}
<>	144:ef7eb2e8f9f7	1180	else
<>	144:ef7eb2e8f9f7	1181	{
<>	144:ef7eb2e8f9f7	1182	/* Header is encoded as 0xff \|\| 0xfe \|\| [headersize]32, i.e., six octets */
<>	144:ef7eb2e8f9f7	1183	hcryp->Init.pScratch[bufferidx++] = 0xFFU;
<>	144:ef7eb2e8f9f7	1184	hcryp->Init.pScratch[bufferidx++] = 0xFEU;
<>	144:ef7eb2e8f9f7	1185	hcryp->Init.pScratch[bufferidx++] = headersize & 0xff000000U;
<>	144:ef7eb2e8f9f7	1186	hcryp->Init.pScratch[bufferidx++] = headersize & 0x00ff0000U;
<>	144:ef7eb2e8f9f7	1187	hcryp->Init.pScratch[bufferidx++] = headersize & 0x0000ff00U;
<>	144:ef7eb2e8f9f7	1188	hcryp->Init.pScratch[bufferidx++] = headersize & 0x000000ffU;
<>	144:ef7eb2e8f9f7	1189	headersize += 6;
<>	144:ef7eb2e8f9f7	1190	}
<>	144:ef7eb2e8f9f7	1191	/* Copy the header buffer in internal buffer "hcryp->Init.pScratch" */
<>	144:ef7eb2e8f9f7	1192	for(loopcounter = 0; loopcounter < headersize; loopcounter++)
<>	144:ef7eb2e8f9f7	1193	{
<>	144:ef7eb2e8f9f7	1194	hcryp->Init.pScratch[bufferidx++] = hcryp->Init.Header[loopcounter];
<>	144:ef7eb2e8f9f7	1195	}
<>	144:ef7eb2e8f9f7	1196	/* Check if the header size is modulo 16 */
<>	144:ef7eb2e8f9f7	1197	if ((headersize % 16) != 0)
<>	144:ef7eb2e8f9f7	1198	{
<>	144:ef7eb2e8f9f7	1199	/* Padd the header buffer with 0s till the hcryp->Init.pScratch length is modulo 16 */
<>	144:ef7eb2e8f9f7	1200	for(loopcounter = headersize; loopcounter <= ((headersize/16) + 1) * 16; loopcounter++)
<>	144:ef7eb2e8f9f7	1201	{
<>	144:ef7eb2e8f9f7	1202	hcryp->Init.pScratch[loopcounter] = 0;
<>	144:ef7eb2e8f9f7	1203	}
<>	144:ef7eb2e8f9f7	1204	/* Set the header size to modulo 16 */
<>	144:ef7eb2e8f9f7	1205	headersize = ((headersize/16) + 1) * 16;
<>	144:ef7eb2e8f9f7	1206	}
<>	144:ef7eb2e8f9f7	1207	/* Set the pointer headeraddr to hcryp->Init.pScratch */
<>	144:ef7eb2e8f9f7	1208	headeraddr = (uint32_t)hcryp->Init.pScratch;
<>	144:ef7eb2e8f9f7	1209	}
<>	144:ef7eb2e8f9f7	1210	/********************* Formatting the block B0 ************************/
<>	144:ef7eb2e8f9f7	1211	if(headersize != 0)
<>	144:ef7eb2e8f9f7	1212	{
<>	144:ef7eb2e8f9f7	1213	blockb0[0] = 0x40;
<>	144:ef7eb2e8f9f7	1214	}
<>	144:ef7eb2e8f9f7	1215	/* Flags byte */
<>	144:ef7eb2e8f9f7	1216	/* blockb0[0] \|= 0u \| (((( (uint8_t) hcryp->Init.TagSize - 2) / 2) & 0x07 ) << 3 ) \| ( ( (uint8_t) (15 - hcryp->Init.IVSize) - 1) & 0x07) */
<>	144:ef7eb2e8f9f7	1217	blockb0[0] \|= (uint8_t)((uint8_t)((uint8_t)(((uint8_t)(hcryp->Init.TagSize - (uint8_t)(2))) >> 1) & (uint8_t)0x07 ) << 3);
<>	144:ef7eb2e8f9f7	1218	blockb0[0] \|= (uint8_t)((uint8_t)((uint8_t)((uint8_t)(15) - hcryp->Init.IVSize) - (uint8_t)1) & (uint8_t)0x07);
<>	144:ef7eb2e8f9f7	1219
<>	144:ef7eb2e8f9f7	1220	for (loopcounter = 0; loopcounter < hcryp->Init.IVSize; loopcounter++)
<>	144:ef7eb2e8f9f7	1221	{
<>	144:ef7eb2e8f9f7	1222	blockb0[loopcounter+1] = hcryp->Init.pInitVect[loopcounter];
<>	144:ef7eb2e8f9f7	1223	}
<>	144:ef7eb2e8f9f7	1224	for ( ; loopcounter < 13; loopcounter++)
<>	144:ef7eb2e8f9f7	1225	{
<>	144:ef7eb2e8f9f7	1226	blockb0[loopcounter+1] = 0;
<>	144:ef7eb2e8f9f7	1227	}
<>	144:ef7eb2e8f9f7	1228
<>	144:ef7eb2e8f9f7	1229	blockb0[14] = (Size >> 8);
<>	144:ef7eb2e8f9f7	1230	blockb0[15] = (Size & 0xFF);
<>	144:ef7eb2e8f9f7	1231
<>	144:ef7eb2e8f9f7	1232	/*********************** Formatting the initial counter ***************/
<>	144:ef7eb2e8f9f7	1233	/* Byte 0:
<>	144:ef7eb2e8f9f7	1234	Bits 7 and 6 are reserved and shall be set to 0
<>	144:ef7eb2e8f9f7	1235	Bits 3, 4, and 5 shall also be set to 0, to ensure that all the counter
<>	144:ef7eb2e8f9f7	1236	blocks are distinct from B0
<>	144:ef7eb2e8f9f7	1237	Bits 0, 1, and 2 contain the same encoding of q as in B0
<>	144:ef7eb2e8f9f7	1238	*/
<>	144:ef7eb2e8f9f7	1239	ctr[0] = blockb0[0] & 0x07;
<>	144:ef7eb2e8f9f7	1240	/* byte 1 to NonceSize is the IV (Nonce) */
<>	144:ef7eb2e8f9f7	1241	for(loopcounter = 1; loopcounter < hcryp->Init.IVSize + 1; loopcounter++)
<>	144:ef7eb2e8f9f7	1242	{
<>	144:ef7eb2e8f9f7	1243	ctr[loopcounter] = blockb0[loopcounter];
<>	144:ef7eb2e8f9f7	1244	}
<>	144:ef7eb2e8f9f7	1245	/* Set the LSB to 1 */
<>	144:ef7eb2e8f9f7	1246	ctr[15] \|= 0x01;
<>	144:ef7eb2e8f9f7	1247
<>	144:ef7eb2e8f9f7	1248	/* Set the key */
<>	144:ef7eb2e8f9f7	1249	CRYPEx_GCMCCM_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
<>	144:ef7eb2e8f9f7	1250
<>	144:ef7eb2e8f9f7	1251	/* Set the CRYP peripheral in AES CCM mode */
<>	144:ef7eb2e8f9f7	1252	__HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CCM_DECRYPT);
<>	144:ef7eb2e8f9f7	1253
<>	144:ef7eb2e8f9f7	1254	/* Set the Initialization Vector */
<>	144:ef7eb2e8f9f7	1255	CRYPEx_GCMCCM_SetInitVector(hcryp, ctr);
<>	144:ef7eb2e8f9f7	1256
<>	144:ef7eb2e8f9f7	1257	/* Select init phase */
<>	144:ef7eb2e8f9f7	1258	__HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT);
<>	144:ef7eb2e8f9f7	1259
<>	144:ef7eb2e8f9f7	1260	b0addr = (uint32_t)blockb0;
<>	144:ef7eb2e8f9f7	1261	/* Write the blockb0 block in the IN FIFO */
<>	144:ef7eb2e8f9f7	1262	hcryp->Instance->DR = (uint32_t)(b0addr);
<>	144:ef7eb2e8f9f7	1263	b0addr+=4;
<>	144:ef7eb2e8f9f7	1264	hcryp->Instance->DR = (uint32_t)(b0addr);
<>	144:ef7eb2e8f9f7	1265	b0addr+=4;
<>	144:ef7eb2e8f9f7	1266	hcryp->Instance->DR = (uint32_t)(b0addr);
<>	144:ef7eb2e8f9f7	1267	b0addr+=4;
<>	144:ef7eb2e8f9f7	1268	hcryp->Instance->DR = (uint32_t)(b0addr);
<>	144:ef7eb2e8f9f7	1269
<>	144:ef7eb2e8f9f7	1270	/* Enable the CRYP peripheral */
<>	144:ef7eb2e8f9f7	1271	__HAL_CRYP_ENABLE(hcryp);
<>	144:ef7eb2e8f9f7	1272
<>	144:ef7eb2e8f9f7	1273	/* Get tick */
<>	144:ef7eb2e8f9f7	1274	tickstart = HAL_GetTick();
<>	144:ef7eb2e8f9f7	1275
<>	144:ef7eb2e8f9f7	1276	while((CRYP->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN)
<>	144:ef7eb2e8f9f7	1277	{
<>	144:ef7eb2e8f9f7	1278	/* Check for the Timeout */
<>	144:ef7eb2e8f9f7	1279	if(Timeout != HAL_MAX_DELAY)
<>	144:ef7eb2e8f9f7	1280	{
<>	144:ef7eb2e8f9f7	1281	if((Timeout == 0)\|\|((HAL_GetTick() - tickstart ) > Timeout))
<>	144:ef7eb2e8f9f7	1282	{
<>	144:ef7eb2e8f9f7	1283	/* Change state */
<>	144:ef7eb2e8f9f7	1284	hcryp->State = HAL_CRYP_STATE_TIMEOUT;
<>	144:ef7eb2e8f9f7	1285
<>	144:ef7eb2e8f9f7	1286	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	1287	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	1288
<>	144:ef7eb2e8f9f7	1289	return HAL_TIMEOUT;
<>	144:ef7eb2e8f9f7	1290	}
<>	144:ef7eb2e8f9f7	1291	}
<>	144:ef7eb2e8f9f7	1292	}
<>	144:ef7eb2e8f9f7	1293	/*************************** Header phase *****************************/
<>	144:ef7eb2e8f9f7	1294	if(headersize != 0)
<>	144:ef7eb2e8f9f7	1295	{
<>	144:ef7eb2e8f9f7	1296	/* Select header phase */
<>	144:ef7eb2e8f9f7	1297	__HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER);
<>	144:ef7eb2e8f9f7	1298
<>	144:ef7eb2e8f9f7	1299	/* Enable Crypto processor */
<>	144:ef7eb2e8f9f7	1300	__HAL_CRYP_ENABLE(hcryp);
<>	144:ef7eb2e8f9f7	1301
<>	144:ef7eb2e8f9f7	1302	for(loopcounter = 0; (loopcounter < headersize); loopcounter+=16)
<>	144:ef7eb2e8f9f7	1303	{
<>	144:ef7eb2e8f9f7	1304	/* Get tick */
<>	144:ef7eb2e8f9f7	1305	tickstart = HAL_GetTick();
<>	144:ef7eb2e8f9f7	1306
<>	144:ef7eb2e8f9f7	1307	while(HAL_IS_BIT_CLR(hcryp->Instance->SR, CRYP_FLAG_IFEM))
<>	144:ef7eb2e8f9f7	1308	{
<>	144:ef7eb2e8f9f7	1309	/* Check for the Timeout */
<>	144:ef7eb2e8f9f7	1310	if(Timeout != HAL_MAX_DELAY)
<>	144:ef7eb2e8f9f7	1311	{
<>	144:ef7eb2e8f9f7	1312	if((Timeout == 0)\|\|((HAL_GetTick() - tickstart ) > Timeout))
<>	144:ef7eb2e8f9f7	1313	{
<>	144:ef7eb2e8f9f7	1314	/* Change state */
<>	144:ef7eb2e8f9f7	1315	hcryp->State = HAL_CRYP_STATE_TIMEOUT;
<>	144:ef7eb2e8f9f7	1316
<>	144:ef7eb2e8f9f7	1317	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	1318	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	1319
<>	144:ef7eb2e8f9f7	1320	return HAL_TIMEOUT;
<>	144:ef7eb2e8f9f7	1321	}
<>	144:ef7eb2e8f9f7	1322	}
<>	144:ef7eb2e8f9f7	1323	}
<>	144:ef7eb2e8f9f7	1324	/* Write the header block in the IN FIFO */
<>	144:ef7eb2e8f9f7	1325	hcryp->Instance->DR = (uint32_t)(headeraddr);
<>	144:ef7eb2e8f9f7	1326	headeraddr+=4;
<>	144:ef7eb2e8f9f7	1327	hcryp->Instance->DR = (uint32_t)(headeraddr);
<>	144:ef7eb2e8f9f7	1328	headeraddr+=4;
<>	144:ef7eb2e8f9f7	1329	hcryp->Instance->DR = (uint32_t)(headeraddr);
<>	144:ef7eb2e8f9f7	1330	headeraddr+=4;
<>	144:ef7eb2e8f9f7	1331	hcryp->Instance->DR = (uint32_t)(headeraddr);
<>	144:ef7eb2e8f9f7	1332	headeraddr+=4;
<>	144:ef7eb2e8f9f7	1333	}
<>	144:ef7eb2e8f9f7	1334
<>	144:ef7eb2e8f9f7	1335	/* Get tick */
<>	144:ef7eb2e8f9f7	1336	tickstart = HAL_GetTick();
<>	144:ef7eb2e8f9f7	1337
<>	144:ef7eb2e8f9f7	1338	while((hcryp->Instance->SR & CRYP_FLAG_BUSY) == CRYP_FLAG_BUSY)
<>	144:ef7eb2e8f9f7	1339	{
<>	144:ef7eb2e8f9f7	1340	/* Check for the Timeout */
<>	144:ef7eb2e8f9f7	1341	if(Timeout != HAL_MAX_DELAY)
<>	144:ef7eb2e8f9f7	1342	{
<>	144:ef7eb2e8f9f7	1343	if((Timeout == 0)\|\|((HAL_GetTick() - tickstart ) > Timeout))
<>	144:ef7eb2e8f9f7	1344	{
<>	144:ef7eb2e8f9f7	1345	/* Change state */
<>	144:ef7eb2e8f9f7	1346	hcryp->State = HAL_CRYP_STATE_TIMEOUT;
<>	144:ef7eb2e8f9f7	1347
<>	144:ef7eb2e8f9f7	1348	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	1349	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	1350
<>	144:ef7eb2e8f9f7	1351	return HAL_TIMEOUT;
<>	144:ef7eb2e8f9f7	1352	}
<>	144:ef7eb2e8f9f7	1353	}
<>	144:ef7eb2e8f9f7	1354	}
<>	144:ef7eb2e8f9f7	1355	}
<>	144:ef7eb2e8f9f7	1356	/* Save formatted counter into the scratch buffer pScratch */
<>	144:ef7eb2e8f9f7	1357	for(loopcounter = 0; (loopcounter < 16); loopcounter++)
<>	144:ef7eb2e8f9f7	1358	{
<>	144:ef7eb2e8f9f7	1359	hcryp->Init.pScratch[loopcounter] = ctr[loopcounter];
<>	144:ef7eb2e8f9f7	1360	}
<>	144:ef7eb2e8f9f7	1361	/* Reset bit 0 */
<>	144:ef7eb2e8f9f7	1362	hcryp->Init.pScratch[15] &= 0xfe;
<>	144:ef7eb2e8f9f7	1363	/* Select payload phase once the header phase is performed */
<>	144:ef7eb2e8f9f7	1364	__HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD);
<>	144:ef7eb2e8f9f7	1365
<>	144:ef7eb2e8f9f7	1366	/* Flush FIFO */
<>	144:ef7eb2e8f9f7	1367	__HAL_CRYP_FIFO_FLUSH(hcryp);
<>	144:ef7eb2e8f9f7	1368
<>	144:ef7eb2e8f9f7	1369	/* Enable the CRYP peripheral */
<>	144:ef7eb2e8f9f7	1370	__HAL_CRYP_ENABLE(hcryp);
<>	144:ef7eb2e8f9f7	1371
<>	144:ef7eb2e8f9f7	1372	/* Set the phase */
<>	144:ef7eb2e8f9f7	1373	hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
<>	144:ef7eb2e8f9f7	1374	}
<>	144:ef7eb2e8f9f7	1375
<>	144:ef7eb2e8f9f7	1376	/* Write Plain Data and Get Cypher Data */
<>	144:ef7eb2e8f9f7	1377	if(CRYPEx_GCMCCM_ProcessData(hcryp, pCypherData, Size, pPlainData, Timeout) != HAL_OK)
<>	144:ef7eb2e8f9f7	1378	{
<>	144:ef7eb2e8f9f7	1379	return HAL_TIMEOUT;
<>	144:ef7eb2e8f9f7	1380	}
<>	144:ef7eb2e8f9f7	1381
<>	144:ef7eb2e8f9f7	1382	/* Change the CRYP peripheral state */
<>	144:ef7eb2e8f9f7	1383	hcryp->State = HAL_CRYP_STATE_READY;
<>	144:ef7eb2e8f9f7	1384
<>	144:ef7eb2e8f9f7	1385	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	1386	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	1387
<>	144:ef7eb2e8f9f7	1388	/* Return function status */
<>	144:ef7eb2e8f9f7	1389	return HAL_OK;
<>	144:ef7eb2e8f9f7	1390	}
<>	144:ef7eb2e8f9f7	1391
<>	144:ef7eb2e8f9f7	1392	/**
<>	144:ef7eb2e8f9f7	1393	* @brief Initializes the CRYP peripheral in AES GCM encryption mode using IT.
<>	144:ef7eb2e8f9f7	1394	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	144:ef7eb2e8f9f7	1395	* the configuration information for CRYP module
<>	144:ef7eb2e8f9f7	1396	* @param pPlainData: Pointer to the plaintext buffer
<>	144:ef7eb2e8f9f7	1397	* @param Size: Length of the plaintext buffer, must be a multiple of 16
<>	144:ef7eb2e8f9f7	1398	* @param pCypherData: Pointer to the cyphertext buffer
<>	144:ef7eb2e8f9f7	1399	* @retval HAL status
<>	144:ef7eb2e8f9f7	1400	*/
<>	144:ef7eb2e8f9f7	1401	HAL_StatusTypeDef HAL_CRYPEx_AESGCM_Encrypt_IT(CRYP_HandleTypeDef hcryp, uint8_t pPlainData, uint16_t Size, uint8_t *pCypherData)
<>	144:ef7eb2e8f9f7	1402	{
<>	144:ef7eb2e8f9f7	1403	uint32_t tickstart = 0;
<>	144:ef7eb2e8f9f7	1404	uint32_t inputaddr;
<>	144:ef7eb2e8f9f7	1405	uint32_t outputaddr;
<>	144:ef7eb2e8f9f7	1406
<>	144:ef7eb2e8f9f7	1407	if(hcryp->State == HAL_CRYP_STATE_READY)
<>	144:ef7eb2e8f9f7	1408	{
<>	144:ef7eb2e8f9f7	1409	/* Process Locked */
<>	144:ef7eb2e8f9f7	1410	__HAL_LOCK(hcryp);
<>	144:ef7eb2e8f9f7	1411
<>	144:ef7eb2e8f9f7	1412	/* Get the buffer addresses and sizes */
<>	144:ef7eb2e8f9f7	1413	hcryp->CrypInCount = Size;
<>	144:ef7eb2e8f9f7	1414	hcryp->pCrypInBuffPtr = pPlainData;
<>	144:ef7eb2e8f9f7	1415	hcryp->pCrypOutBuffPtr = pCypherData;
<>	144:ef7eb2e8f9f7	1416	hcryp->CrypOutCount = Size;
<>	144:ef7eb2e8f9f7	1417
<>	144:ef7eb2e8f9f7	1418	/* Change the CRYP peripheral state */
<>	144:ef7eb2e8f9f7	1419	hcryp->State = HAL_CRYP_STATE_BUSY;
<>	144:ef7eb2e8f9f7	1420
<>	144:ef7eb2e8f9f7	1421	/* Check if initialization phase has already been performed */
<>	144:ef7eb2e8f9f7	1422	if(hcryp->Phase == HAL_CRYP_PHASE_READY)
<>	144:ef7eb2e8f9f7	1423	{
<>	144:ef7eb2e8f9f7	1424	/* Set the key */
<>	144:ef7eb2e8f9f7	1425	CRYPEx_GCMCCM_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
<>	144:ef7eb2e8f9f7	1426
<>	144:ef7eb2e8f9f7	1427	/* Set the CRYP peripheral in AES GCM mode */
<>	144:ef7eb2e8f9f7	1428	__HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_GCM_ENCRYPT);
<>	144:ef7eb2e8f9f7	1429
<>	144:ef7eb2e8f9f7	1430	/* Set the Initialization Vector */
<>	144:ef7eb2e8f9f7	1431	CRYPEx_GCMCCM_SetInitVector(hcryp, hcryp->Init.pInitVect);
<>	144:ef7eb2e8f9f7	1432
<>	144:ef7eb2e8f9f7	1433	/* Flush FIFO */
<>	144:ef7eb2e8f9f7	1434	__HAL_CRYP_FIFO_FLUSH(hcryp);
<>	144:ef7eb2e8f9f7	1435
<>	144:ef7eb2e8f9f7	1436	/* Enable CRYP to start the init phase */
<>	144:ef7eb2e8f9f7	1437	__HAL_CRYP_ENABLE(hcryp);
<>	144:ef7eb2e8f9f7	1438
<>	144:ef7eb2e8f9f7	1439	/* Get tick */
<>	144:ef7eb2e8f9f7	1440	tickstart = HAL_GetTick();
<>	144:ef7eb2e8f9f7	1441
<>	144:ef7eb2e8f9f7	1442	while((CRYP->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN)
<>	144:ef7eb2e8f9f7	1443	{
<>	144:ef7eb2e8f9f7	1444	/* Check for the Timeout */
<>	144:ef7eb2e8f9f7	1445
<>	144:ef7eb2e8f9f7	1446	if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE)
<>	144:ef7eb2e8f9f7	1447	{
<>	144:ef7eb2e8f9f7	1448	/* Change state */
<>	144:ef7eb2e8f9f7	1449	hcryp->State = HAL_CRYP_STATE_TIMEOUT;
<>	144:ef7eb2e8f9f7	1450
<>	144:ef7eb2e8f9f7	1451	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	1452	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	1453
<>	144:ef7eb2e8f9f7	1454	return HAL_TIMEOUT;
<>	144:ef7eb2e8f9f7	1455
<>	144:ef7eb2e8f9f7	1456	}
<>	144:ef7eb2e8f9f7	1457	}
<>	144:ef7eb2e8f9f7	1458
<>	144:ef7eb2e8f9f7	1459	/* Set the header phase */
<>	144:ef7eb2e8f9f7	1460	if(CRYPEx_GCMCCM_SetHeaderPhase(hcryp, hcryp->Init.Header, hcryp->Init.HeaderSize, 1) != HAL_OK)
<>	144:ef7eb2e8f9f7	1461	{
<>	144:ef7eb2e8f9f7	1462	return HAL_TIMEOUT;
<>	144:ef7eb2e8f9f7	1463	}
<>	144:ef7eb2e8f9f7	1464	/* Disable the CRYP peripheral */
<>	144:ef7eb2e8f9f7	1465	__HAL_CRYP_DISABLE(hcryp);
<>	144:ef7eb2e8f9f7	1466
<>	144:ef7eb2e8f9f7	1467	/* Select payload phase once the header phase is performed */
<>	144:ef7eb2e8f9f7	1468	__HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD);
<>	144:ef7eb2e8f9f7	1469
<>	144:ef7eb2e8f9f7	1470	/* Flush FIFO */
<>	144:ef7eb2e8f9f7	1471	__HAL_CRYP_FIFO_FLUSH(hcryp);
<>	144:ef7eb2e8f9f7	1472
<>	144:ef7eb2e8f9f7	1473	/* Set the phase */
<>	144:ef7eb2e8f9f7	1474	hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
<>	144:ef7eb2e8f9f7	1475	}
<>	144:ef7eb2e8f9f7	1476
<>	144:ef7eb2e8f9f7	1477	if(Size != 0)
<>	144:ef7eb2e8f9f7	1478	{
<>	144:ef7eb2e8f9f7	1479	/* Enable Interrupts */
<>	144:ef7eb2e8f9f7	1480	__HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_INI \| CRYP_IT_OUTI);
<>	144:ef7eb2e8f9f7	1481	/* Enable the CRYP peripheral */
<>	144:ef7eb2e8f9f7	1482	__HAL_CRYP_ENABLE(hcryp);
<>	144:ef7eb2e8f9f7	1483	}
<>	144:ef7eb2e8f9f7	1484	else
<>	144:ef7eb2e8f9f7	1485	{
<>	144:ef7eb2e8f9f7	1486	/* Process Locked */
<>	144:ef7eb2e8f9f7	1487	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	1488	/* Change the CRYP state and phase */
<>	144:ef7eb2e8f9f7	1489	hcryp->State = HAL_CRYP_STATE_READY;
<>	144:ef7eb2e8f9f7	1490	}
<>	144:ef7eb2e8f9f7	1491	/* Return function status */
<>	144:ef7eb2e8f9f7	1492	return HAL_OK;
<>	144:ef7eb2e8f9f7	1493	}
<>	144:ef7eb2e8f9f7	1494	else if (__HAL_CRYP_GET_IT(hcryp, CRYP_IT_INI))
<>	144:ef7eb2e8f9f7	1495	{
<>	144:ef7eb2e8f9f7	1496	inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
<>	144:ef7eb2e8f9f7	1497	/* Write the Input block in the IN FIFO */
<>	144:ef7eb2e8f9f7	1498	hcryp->Instance->DR = (uint32_t)(inputaddr);
<>	144:ef7eb2e8f9f7	1499	inputaddr+=4;
<>	144:ef7eb2e8f9f7	1500	hcryp->Instance->DR = (uint32_t)(inputaddr);
<>	144:ef7eb2e8f9f7	1501	inputaddr+=4;
<>	144:ef7eb2e8f9f7	1502	hcryp->Instance->DR = (uint32_t)(inputaddr);
<>	144:ef7eb2e8f9f7	1503	inputaddr+=4;
<>	144:ef7eb2e8f9f7	1504	hcryp->Instance->DR = (uint32_t)(inputaddr);
<>	144:ef7eb2e8f9f7	1505	hcryp->pCrypInBuffPtr += 16;
<>	144:ef7eb2e8f9f7	1506	hcryp->CrypInCount -= 16;
<>	144:ef7eb2e8f9f7	1507	if(hcryp->CrypInCount == 0)
<>	144:ef7eb2e8f9f7	1508	{
<>	144:ef7eb2e8f9f7	1509	__HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_INI);
<>	144:ef7eb2e8f9f7	1510	/* Call the Input data transfer complete callback */
<>	144:ef7eb2e8f9f7	1511	HAL_CRYP_InCpltCallback(hcryp);
<>	144:ef7eb2e8f9f7	1512	}
<>	144:ef7eb2e8f9f7	1513	}
<>	144:ef7eb2e8f9f7	1514	else if (__HAL_CRYP_GET_IT(hcryp, CRYP_IT_OUTI))
<>	144:ef7eb2e8f9f7	1515	{
<>	144:ef7eb2e8f9f7	1516	outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
<>	144:ef7eb2e8f9f7	1517	/* Read the Output block from the Output FIFO */
<>	144:ef7eb2e8f9f7	1518	(uint32_t)(outputaddr) = hcryp->Instance->DOUT;
<>	144:ef7eb2e8f9f7	1519	outputaddr+=4;
<>	144:ef7eb2e8f9f7	1520	(uint32_t)(outputaddr) = hcryp->Instance->DOUT;
<>	144:ef7eb2e8f9f7	1521	outputaddr+=4;
<>	144:ef7eb2e8f9f7	1522	(uint32_t)(outputaddr) = hcryp->Instance->DOUT;
<>	144:ef7eb2e8f9f7	1523	outputaddr+=4;
<>	144:ef7eb2e8f9f7	1524	(uint32_t)(outputaddr) = hcryp->Instance->DOUT;
<>	144:ef7eb2e8f9f7	1525	hcryp->pCrypOutBuffPtr += 16;
<>	144:ef7eb2e8f9f7	1526	hcryp->CrypOutCount -= 16;
<>	144:ef7eb2e8f9f7	1527	if(hcryp->CrypOutCount == 0)
<>	144:ef7eb2e8f9f7	1528	{
<>	144:ef7eb2e8f9f7	1529	__HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_OUTI);
<>	144:ef7eb2e8f9f7	1530	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	1531	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	1532	/* Change the CRYP peripheral state */
<>	144:ef7eb2e8f9f7	1533	hcryp->State = HAL_CRYP_STATE_READY;
<>	144:ef7eb2e8f9f7	1534	/* Call Input transfer complete callback */
<>	144:ef7eb2e8f9f7	1535	HAL_CRYP_OutCpltCallback(hcryp);
<>	144:ef7eb2e8f9f7	1536	}
<>	144:ef7eb2e8f9f7	1537	}
<>	144:ef7eb2e8f9f7	1538
<>	144:ef7eb2e8f9f7	1539	/* Return function status */
<>	144:ef7eb2e8f9f7	1540	return HAL_OK;
<>	144:ef7eb2e8f9f7	1541	}
<>	144:ef7eb2e8f9f7	1542
<>	144:ef7eb2e8f9f7	1543	/**
<>	144:ef7eb2e8f9f7	1544	* @brief Initializes the CRYP peripheral in AES CCM encryption mode using interrupt.
<>	144:ef7eb2e8f9f7	1545	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	144:ef7eb2e8f9f7	1546	* the configuration information for CRYP module
<>	144:ef7eb2e8f9f7	1547	* @param pPlainData: Pointer to the plaintext buffer
<>	144:ef7eb2e8f9f7	1548	* @param Size: Length of the plaintext buffer, must be a multiple of 16
<>	144:ef7eb2e8f9f7	1549	* @param pCypherData: Pointer to the cyphertext buffer
<>	144:ef7eb2e8f9f7	1550	* @retval HAL status
<>	144:ef7eb2e8f9f7	1551	*/
<>	144:ef7eb2e8f9f7	1552	HAL_StatusTypeDef HAL_CRYPEx_AESCCM_Encrypt_IT(CRYP_HandleTypeDef hcryp, uint8_t pPlainData, uint16_t Size, uint8_t *pCypherData)
<>	144:ef7eb2e8f9f7	1553	{
<>	144:ef7eb2e8f9f7	1554	uint32_t tickstart = 0;
<>	144:ef7eb2e8f9f7	1555	uint32_t inputaddr;
<>	144:ef7eb2e8f9f7	1556	uint32_t outputaddr;
<>	144:ef7eb2e8f9f7	1557
<>	144:ef7eb2e8f9f7	1558	uint32_t headersize = hcryp->Init.HeaderSize;
<>	144:ef7eb2e8f9f7	1559	uint32_t headeraddr = (uint32_t)hcryp->Init.Header;
<>	144:ef7eb2e8f9f7	1560	uint32_t loopcounter = 0;
<>	144:ef7eb2e8f9f7	1561	uint32_t bufferidx = 0;
<>	144:ef7eb2e8f9f7	1562	uint8_t blockb0[16] = {0};/* Block B0 */
<>	144:ef7eb2e8f9f7	1563	uint8_t ctr[16] = {0}; /* Counter */
<>	144:ef7eb2e8f9f7	1564	uint32_t b0addr = (uint32_t)blockb0;
<>	144:ef7eb2e8f9f7	1565
<>	144:ef7eb2e8f9f7	1566	if(hcryp->State == HAL_CRYP_STATE_READY)
<>	144:ef7eb2e8f9f7	1567	{
<>	144:ef7eb2e8f9f7	1568	/* Process Locked */
<>	144:ef7eb2e8f9f7	1569	__HAL_LOCK(hcryp);
<>	144:ef7eb2e8f9f7	1570
<>	144:ef7eb2e8f9f7	1571	hcryp->CrypInCount = Size;
<>	144:ef7eb2e8f9f7	1572	hcryp->pCrypInBuffPtr = pPlainData;
<>	144:ef7eb2e8f9f7	1573	hcryp->pCrypOutBuffPtr = pCypherData;
<>	144:ef7eb2e8f9f7	1574	hcryp->CrypOutCount = Size;
<>	144:ef7eb2e8f9f7	1575
<>	144:ef7eb2e8f9f7	1576	/* Change the CRYP peripheral state */
<>	144:ef7eb2e8f9f7	1577	hcryp->State = HAL_CRYP_STATE_BUSY;
<>	144:ef7eb2e8f9f7	1578
<>	144:ef7eb2e8f9f7	1579	/* Check if initialization phase has already been performed */
<>	144:ef7eb2e8f9f7	1580	if(hcryp->Phase == HAL_CRYP_PHASE_READY)
<>	144:ef7eb2e8f9f7	1581	{
<>	144:ef7eb2e8f9f7	1582	/********************** Formatting the header block *****************/
<>	144:ef7eb2e8f9f7	1583	if(headersize != 0)
<>	144:ef7eb2e8f9f7	1584	{
<>	144:ef7eb2e8f9f7	1585	/* Check that the associated data (or header) length is lower than 2^16 - 2^8 = 65536 - 256 = 65280 */
<>	144:ef7eb2e8f9f7	1586	if(headersize < 65280)
<>	144:ef7eb2e8f9f7	1587	{
<>	144:ef7eb2e8f9f7	1588	hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize >> 8) & 0xFFU);
<>	144:ef7eb2e8f9f7	1589	hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize) & 0xFFU);
<>	144:ef7eb2e8f9f7	1590	headersize += 2;
<>	144:ef7eb2e8f9f7	1591	}
<>	144:ef7eb2e8f9f7	1592	else
<>	144:ef7eb2e8f9f7	1593	{
<>	144:ef7eb2e8f9f7	1594	/* Header is encoded as 0xff \|\| 0xfe \|\| [headersize]32, i.e., six octets */
<>	144:ef7eb2e8f9f7	1595	hcryp->Init.pScratch[bufferidx++] = 0xFFU;
<>	144:ef7eb2e8f9f7	1596	hcryp->Init.pScratch[bufferidx++] = 0xFEU;
<>	144:ef7eb2e8f9f7	1597	hcryp->Init.pScratch[bufferidx++] = headersize & 0xff000000U;
<>	144:ef7eb2e8f9f7	1598	hcryp->Init.pScratch[bufferidx++] = headersize & 0x00ff0000U;
<>	144:ef7eb2e8f9f7	1599	hcryp->Init.pScratch[bufferidx++] = headersize & 0x0000ff00U;
<>	144:ef7eb2e8f9f7	1600	hcryp->Init.pScratch[bufferidx++] = headersize & 0x000000ffU;
<>	144:ef7eb2e8f9f7	1601	headersize += 6;
<>	144:ef7eb2e8f9f7	1602	}
<>	144:ef7eb2e8f9f7	1603	/* Copy the header buffer in internal buffer "hcryp->Init.pScratch" */
<>	144:ef7eb2e8f9f7	1604	for(loopcounter = 0; loopcounter < headersize; loopcounter++)
<>	144:ef7eb2e8f9f7	1605	{
<>	144:ef7eb2e8f9f7	1606	hcryp->Init.pScratch[bufferidx++] = hcryp->Init.Header[loopcounter];
<>	144:ef7eb2e8f9f7	1607	}
<>	144:ef7eb2e8f9f7	1608	/* Check if the header size is modulo 16 */
<>	144:ef7eb2e8f9f7	1609	if ((headersize % 16) != 0)
<>	144:ef7eb2e8f9f7	1610	{
<>	144:ef7eb2e8f9f7	1611	/* Padd the header buffer with 0s till the hcryp->Init.pScratch length is modulo 16 */
<>	144:ef7eb2e8f9f7	1612	for(loopcounter = headersize; loopcounter <= ((headersize/16) + 1) * 16; loopcounter++)
<>	144:ef7eb2e8f9f7	1613	{
<>	144:ef7eb2e8f9f7	1614	hcryp->Init.pScratch[loopcounter] = 0;
<>	144:ef7eb2e8f9f7	1615	}
<>	144:ef7eb2e8f9f7	1616	/* Set the header size to modulo 16 */
<>	144:ef7eb2e8f9f7	1617	headersize = ((headersize/16) + 1) * 16;
<>	144:ef7eb2e8f9f7	1618	}
<>	144:ef7eb2e8f9f7	1619	/* Set the pointer headeraddr to hcryp->Init.pScratch */
<>	144:ef7eb2e8f9f7	1620	headeraddr = (uint32_t)hcryp->Init.pScratch;
<>	144:ef7eb2e8f9f7	1621	}
<>	144:ef7eb2e8f9f7	1622	/********************* Formatting the block B0 **********************/
<>	144:ef7eb2e8f9f7	1623	if(headersize != 0)
<>	144:ef7eb2e8f9f7	1624	{
<>	144:ef7eb2e8f9f7	1625	blockb0[0] = 0x40;
<>	144:ef7eb2e8f9f7	1626	}
<>	144:ef7eb2e8f9f7	1627	/* Flags byte */
<>	144:ef7eb2e8f9f7	1628	/* blockb0[0] \|= 0u \| (((( (uint8_t) hcryp->Init.TagSize - 2) / 2) & 0x07 ) << 3 ) \| ( ( (uint8_t) (15 - hcryp->Init.IVSize) - 1) & 0x07) */
<>	144:ef7eb2e8f9f7	1629	blockb0[0] \|= (uint8_t)((uint8_t)((uint8_t)(((uint8_t)(hcryp->Init.TagSize - (uint8_t)(2))) >> 1) & (uint8_t)0x07 ) << 3);
<>	144:ef7eb2e8f9f7	1630	blockb0[0] \|= (uint8_t)((uint8_t)((uint8_t)((uint8_t)(15) - hcryp->Init.IVSize) - (uint8_t)1) & (uint8_t)0x07);
<>	144:ef7eb2e8f9f7	1631
<>	144:ef7eb2e8f9f7	1632	for (loopcounter = 0; loopcounter < hcryp->Init.IVSize; loopcounter++)
<>	144:ef7eb2e8f9f7	1633	{
<>	144:ef7eb2e8f9f7	1634	blockb0[loopcounter+1] = hcryp->Init.pInitVect[loopcounter];
<>	144:ef7eb2e8f9f7	1635	}
<>	144:ef7eb2e8f9f7	1636	for ( ; loopcounter < 13; loopcounter++)
<>	144:ef7eb2e8f9f7	1637	{
<>	144:ef7eb2e8f9f7	1638	blockb0[loopcounter+1] = 0;
<>	144:ef7eb2e8f9f7	1639	}
<>	144:ef7eb2e8f9f7	1640
<>	144:ef7eb2e8f9f7	1641	blockb0[14] = (Size >> 8);
<>	144:ef7eb2e8f9f7	1642	blockb0[15] = (Size & 0xFF);
<>	144:ef7eb2e8f9f7	1643
<>	144:ef7eb2e8f9f7	1644	/*********************** Formatting the initial counter *************/
<>	144:ef7eb2e8f9f7	1645	/* Byte 0:
<>	144:ef7eb2e8f9f7	1646	Bits 7 and 6 are reserved and shall be set to 0
<>	144:ef7eb2e8f9f7	1647	Bits 3, 4, and 5 shall also be set to 0, to ensure that all the counter
<>	144:ef7eb2e8f9f7	1648	blocks are distinct from B0
<>	144:ef7eb2e8f9f7	1649	Bits 0, 1, and 2 contain the same encoding of q as in B0
<>	144:ef7eb2e8f9f7	1650	*/
<>	144:ef7eb2e8f9f7	1651	ctr[0] = blockb0[0] & 0x07;
<>	144:ef7eb2e8f9f7	1652	/* byte 1 to NonceSize is the IV (Nonce) */
<>	144:ef7eb2e8f9f7	1653	for(loopcounter = 1; loopcounter < hcryp->Init.IVSize + 1; loopcounter++)
<>	144:ef7eb2e8f9f7	1654	{
<>	144:ef7eb2e8f9f7	1655	ctr[loopcounter] = blockb0[loopcounter];
<>	144:ef7eb2e8f9f7	1656	}
<>	144:ef7eb2e8f9f7	1657	/* Set the LSB to 1 */
<>	144:ef7eb2e8f9f7	1658	ctr[15] \|= 0x01;
<>	144:ef7eb2e8f9f7	1659
<>	144:ef7eb2e8f9f7	1660	/* Set the key */
<>	144:ef7eb2e8f9f7	1661	CRYPEx_GCMCCM_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
<>	144:ef7eb2e8f9f7	1662
<>	144:ef7eb2e8f9f7	1663	/* Set the CRYP peripheral in AES CCM mode */
<>	144:ef7eb2e8f9f7	1664	__HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CCM_ENCRYPT);
<>	144:ef7eb2e8f9f7	1665
<>	144:ef7eb2e8f9f7	1666	/* Set the Initialization Vector */
<>	144:ef7eb2e8f9f7	1667	CRYPEx_GCMCCM_SetInitVector(hcryp, ctr);
<>	144:ef7eb2e8f9f7	1668
<>	144:ef7eb2e8f9f7	1669	/* Select init phase */
<>	144:ef7eb2e8f9f7	1670	__HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT);
<>	144:ef7eb2e8f9f7	1671
<>	144:ef7eb2e8f9f7	1672	b0addr = (uint32_t)blockb0;
<>	144:ef7eb2e8f9f7	1673	/* Write the blockb0 block in the IN FIFO */
<>	144:ef7eb2e8f9f7	1674	hcryp->Instance->DR = (uint32_t)(b0addr);
<>	144:ef7eb2e8f9f7	1675	b0addr+=4;
<>	144:ef7eb2e8f9f7	1676	hcryp->Instance->DR = (uint32_t)(b0addr);
<>	144:ef7eb2e8f9f7	1677	b0addr+=4;
<>	144:ef7eb2e8f9f7	1678	hcryp->Instance->DR = (uint32_t)(b0addr);
<>	144:ef7eb2e8f9f7	1679	b0addr+=4;
<>	144:ef7eb2e8f9f7	1680	hcryp->Instance->DR = (uint32_t)(b0addr);
<>	144:ef7eb2e8f9f7	1681
<>	144:ef7eb2e8f9f7	1682	/* Enable the CRYP peripheral */
<>	144:ef7eb2e8f9f7	1683	__HAL_CRYP_ENABLE(hcryp);
<>	144:ef7eb2e8f9f7	1684
<>	144:ef7eb2e8f9f7	1685	/* Get tick */
<>	144:ef7eb2e8f9f7	1686	tickstart = HAL_GetTick();
<>	144:ef7eb2e8f9f7	1687
<>	144:ef7eb2e8f9f7	1688	while((CRYP->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN)
<>	144:ef7eb2e8f9f7	1689	{
<>	144:ef7eb2e8f9f7	1690	/* Check for the Timeout */
<>	144:ef7eb2e8f9f7	1691	if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE)
<>	144:ef7eb2e8f9f7	1692	{
<>	144:ef7eb2e8f9f7	1693	/* Change state */
<>	144:ef7eb2e8f9f7	1694	hcryp->State = HAL_CRYP_STATE_TIMEOUT;
<>	144:ef7eb2e8f9f7	1695
<>	144:ef7eb2e8f9f7	1696	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	1697	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	1698
<>	144:ef7eb2e8f9f7	1699	return HAL_TIMEOUT;
<>	144:ef7eb2e8f9f7	1700	}
<>	144:ef7eb2e8f9f7	1701	}
<>	144:ef7eb2e8f9f7	1702	/*************************** Header phase ***************************/
<>	144:ef7eb2e8f9f7	1703	if(headersize != 0)
<>	144:ef7eb2e8f9f7	1704	{
<>	144:ef7eb2e8f9f7	1705	/* Select header phase */
<>	144:ef7eb2e8f9f7	1706	__HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER);
<>	144:ef7eb2e8f9f7	1707
<>	144:ef7eb2e8f9f7	1708	/* Enable Crypto processor */
<>	144:ef7eb2e8f9f7	1709	__HAL_CRYP_ENABLE(hcryp);
<>	144:ef7eb2e8f9f7	1710
<>	144:ef7eb2e8f9f7	1711	for(loopcounter = 0; (loopcounter < headersize); loopcounter+=16)
<>	144:ef7eb2e8f9f7	1712	{
<>	144:ef7eb2e8f9f7	1713	/* Get tick */
<>	144:ef7eb2e8f9f7	1714	tickstart = HAL_GetTick();
<>	144:ef7eb2e8f9f7	1715
<>	144:ef7eb2e8f9f7	1716	while(HAL_IS_BIT_CLR(hcryp->Instance->SR, CRYP_FLAG_IFEM))
<>	144:ef7eb2e8f9f7	1717	{
<>	144:ef7eb2e8f9f7	1718	/* Check for the Timeout */
<>	144:ef7eb2e8f9f7	1719	if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE)
<>	144:ef7eb2e8f9f7	1720	{
<>	144:ef7eb2e8f9f7	1721	/* Change state */
<>	144:ef7eb2e8f9f7	1722	hcryp->State = HAL_CRYP_STATE_TIMEOUT;
<>	144:ef7eb2e8f9f7	1723
<>	144:ef7eb2e8f9f7	1724	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	1725	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	1726
<>	144:ef7eb2e8f9f7	1727	return HAL_TIMEOUT;
<>	144:ef7eb2e8f9f7	1728	}
<>	144:ef7eb2e8f9f7	1729	}
<>	144:ef7eb2e8f9f7	1730	/* Write the header block in the IN FIFO */
<>	144:ef7eb2e8f9f7	1731	hcryp->Instance->DR = (uint32_t)(headeraddr);
<>	144:ef7eb2e8f9f7	1732	headeraddr+=4;
<>	144:ef7eb2e8f9f7	1733	hcryp->Instance->DR = (uint32_t)(headeraddr);
<>	144:ef7eb2e8f9f7	1734	headeraddr+=4;
<>	144:ef7eb2e8f9f7	1735	hcryp->Instance->DR = (uint32_t)(headeraddr);
<>	144:ef7eb2e8f9f7	1736	headeraddr+=4;
<>	144:ef7eb2e8f9f7	1737	hcryp->Instance->DR = (uint32_t)(headeraddr);
<>	144:ef7eb2e8f9f7	1738	headeraddr+=4;
<>	144:ef7eb2e8f9f7	1739	}
<>	144:ef7eb2e8f9f7	1740
<>	144:ef7eb2e8f9f7	1741	/* Get tick */
<>	144:ef7eb2e8f9f7	1742	tickstart = HAL_GetTick();
<>	144:ef7eb2e8f9f7	1743
<>	144:ef7eb2e8f9f7	1744	while((hcryp->Instance->SR & CRYP_FLAG_BUSY) == CRYP_FLAG_BUSY)
<>	144:ef7eb2e8f9f7	1745	{
<>	144:ef7eb2e8f9f7	1746	/* Check for the Timeout */
<>	144:ef7eb2e8f9f7	1747	if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE)
<>	144:ef7eb2e8f9f7	1748	{
<>	144:ef7eb2e8f9f7	1749	/* Change state */
<>	144:ef7eb2e8f9f7	1750	hcryp->State = HAL_CRYP_STATE_TIMEOUT;
<>	144:ef7eb2e8f9f7	1751
<>	144:ef7eb2e8f9f7	1752	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	1753	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	1754
<>	144:ef7eb2e8f9f7	1755	return HAL_TIMEOUT;
<>	144:ef7eb2e8f9f7	1756	}
<>	144:ef7eb2e8f9f7	1757	}
<>	144:ef7eb2e8f9f7	1758	}
<>	144:ef7eb2e8f9f7	1759	/* Save formatted counter into the scratch buffer pScratch */
<>	144:ef7eb2e8f9f7	1760	for(loopcounter = 0; (loopcounter < 16); loopcounter++)
<>	144:ef7eb2e8f9f7	1761	{
<>	144:ef7eb2e8f9f7	1762	hcryp->Init.pScratch[loopcounter] = ctr[loopcounter];
<>	144:ef7eb2e8f9f7	1763	}
<>	144:ef7eb2e8f9f7	1764	/* Reset bit 0 */
<>	144:ef7eb2e8f9f7	1765	hcryp->Init.pScratch[15] &= 0xfe;
<>	144:ef7eb2e8f9f7	1766
<>	144:ef7eb2e8f9f7	1767	/* Select payload phase once the header phase is performed */
<>	144:ef7eb2e8f9f7	1768	__HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD);
<>	144:ef7eb2e8f9f7	1769
<>	144:ef7eb2e8f9f7	1770	/* Flush FIFO */
<>	144:ef7eb2e8f9f7	1771	__HAL_CRYP_FIFO_FLUSH(hcryp);
<>	144:ef7eb2e8f9f7	1772
<>	144:ef7eb2e8f9f7	1773	/* Set the phase */
<>	144:ef7eb2e8f9f7	1774	hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
<>	144:ef7eb2e8f9f7	1775	}
<>	144:ef7eb2e8f9f7	1776
<>	144:ef7eb2e8f9f7	1777	if(Size != 0)
<>	144:ef7eb2e8f9f7	1778	{
<>	144:ef7eb2e8f9f7	1779	/* Enable Interrupts */
<>	144:ef7eb2e8f9f7	1780	__HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_INI \| CRYP_IT_OUTI);
<>	144:ef7eb2e8f9f7	1781	/* Enable the CRYP peripheral */
<>	144:ef7eb2e8f9f7	1782	__HAL_CRYP_ENABLE(hcryp);
<>	144:ef7eb2e8f9f7	1783	}
<>	144:ef7eb2e8f9f7	1784	else
<>	144:ef7eb2e8f9f7	1785	{
<>	144:ef7eb2e8f9f7	1786	/* Change the CRYP state and phase */
<>	144:ef7eb2e8f9f7	1787	hcryp->State = HAL_CRYP_STATE_READY;
<>	144:ef7eb2e8f9f7	1788	}
<>	144:ef7eb2e8f9f7	1789
<>	144:ef7eb2e8f9f7	1790	/* Return function status */
<>	144:ef7eb2e8f9f7	1791	return HAL_OK;
<>	144:ef7eb2e8f9f7	1792	}
<>	144:ef7eb2e8f9f7	1793	else if (__HAL_CRYP_GET_IT(hcryp, CRYP_IT_INI))
<>	144:ef7eb2e8f9f7	1794	{
<>	144:ef7eb2e8f9f7	1795	inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
<>	144:ef7eb2e8f9f7	1796	/* Write the Input block in the IN FIFO */
<>	144:ef7eb2e8f9f7	1797	hcryp->Instance->DR = (uint32_t)(inputaddr);
<>	144:ef7eb2e8f9f7	1798	inputaddr+=4;
<>	144:ef7eb2e8f9f7	1799	hcryp->Instance->DR = (uint32_t)(inputaddr);
<>	144:ef7eb2e8f9f7	1800	inputaddr+=4;
<>	144:ef7eb2e8f9f7	1801	hcryp->Instance->DR = (uint32_t)(inputaddr);
<>	144:ef7eb2e8f9f7	1802	inputaddr+=4;
<>	144:ef7eb2e8f9f7	1803	hcryp->Instance->DR = (uint32_t)(inputaddr);
<>	144:ef7eb2e8f9f7	1804	hcryp->pCrypInBuffPtr += 16;
<>	144:ef7eb2e8f9f7	1805	hcryp->CrypInCount -= 16;
<>	144:ef7eb2e8f9f7	1806	if(hcryp->CrypInCount == 0)
<>	144:ef7eb2e8f9f7	1807	{
<>	144:ef7eb2e8f9f7	1808	__HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_INI);
<>	144:ef7eb2e8f9f7	1809	/* Call Input transfer complete callback */
<>	144:ef7eb2e8f9f7	1810	HAL_CRYP_InCpltCallback(hcryp);
<>	144:ef7eb2e8f9f7	1811	}
<>	144:ef7eb2e8f9f7	1812	}
<>	144:ef7eb2e8f9f7	1813	else if (__HAL_CRYP_GET_IT(hcryp, CRYP_IT_OUTI))
<>	144:ef7eb2e8f9f7	1814	{
<>	144:ef7eb2e8f9f7	1815	outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
<>	144:ef7eb2e8f9f7	1816	/* Read the Output block from the Output FIFO */
<>	144:ef7eb2e8f9f7	1817	(uint32_t)(outputaddr) = hcryp->Instance->DOUT;
<>	144:ef7eb2e8f9f7	1818	outputaddr+=4;
<>	144:ef7eb2e8f9f7	1819	(uint32_t)(outputaddr) = hcryp->Instance->DOUT;
<>	144:ef7eb2e8f9f7	1820	outputaddr+=4;
<>	144:ef7eb2e8f9f7	1821	(uint32_t)(outputaddr) = hcryp->Instance->DOUT;
<>	144:ef7eb2e8f9f7	1822	outputaddr+=4;
<>	144:ef7eb2e8f9f7	1823	(uint32_t)(outputaddr) = hcryp->Instance->DOUT;
<>	144:ef7eb2e8f9f7	1824	hcryp->pCrypOutBuffPtr += 16;
<>	144:ef7eb2e8f9f7	1825	hcryp->CrypOutCount -= 16;
<>	144:ef7eb2e8f9f7	1826	if(hcryp->CrypOutCount == 0)
<>	144:ef7eb2e8f9f7	1827	{
<>	144:ef7eb2e8f9f7	1828	__HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_OUTI);
<>	144:ef7eb2e8f9f7	1829	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	1830	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	1831	/* Change the CRYP peripheral state */
<>	144:ef7eb2e8f9f7	1832	hcryp->State = HAL_CRYP_STATE_READY;
<>	144:ef7eb2e8f9f7	1833	/* Call Input transfer complete callback */
<>	144:ef7eb2e8f9f7	1834	HAL_CRYP_OutCpltCallback(hcryp);
<>	144:ef7eb2e8f9f7	1835	}
<>	144:ef7eb2e8f9f7	1836	}
<>	144:ef7eb2e8f9f7	1837
<>	144:ef7eb2e8f9f7	1838	/* Return function status */
<>	144:ef7eb2e8f9f7	1839	return HAL_OK;
<>	144:ef7eb2e8f9f7	1840	}
<>	144:ef7eb2e8f9f7	1841
<>	144:ef7eb2e8f9f7	1842	/**
<>	144:ef7eb2e8f9f7	1843	* @brief Initializes the CRYP peripheral in AES GCM decryption mode using IT.
<>	144:ef7eb2e8f9f7	1844	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	144:ef7eb2e8f9f7	1845	* the configuration information for CRYP module
<>	144:ef7eb2e8f9f7	1846	* @param pCypherData: Pointer to the cyphertext buffer
<>	144:ef7eb2e8f9f7	1847	* @param Size: Length of the cyphertext buffer, must be a multiple of 16
<>	144:ef7eb2e8f9f7	1848	* @param pPlainData: Pointer to the plaintext buffer
<>	144:ef7eb2e8f9f7	1849	* @retval HAL status
<>	144:ef7eb2e8f9f7	1850	*/
<>	144:ef7eb2e8f9f7	1851	HAL_StatusTypeDef HAL_CRYPEx_AESGCM_Decrypt_IT(CRYP_HandleTypeDef hcryp, uint8_t pCypherData, uint16_t Size, uint8_t *pPlainData)
<>	144:ef7eb2e8f9f7	1852	{
<>	144:ef7eb2e8f9f7	1853	uint32_t tickstart = 0;
<>	144:ef7eb2e8f9f7	1854	uint32_t inputaddr;
<>	144:ef7eb2e8f9f7	1855	uint32_t outputaddr;
<>	144:ef7eb2e8f9f7	1856
<>	144:ef7eb2e8f9f7	1857	if(hcryp->State == HAL_CRYP_STATE_READY)
<>	144:ef7eb2e8f9f7	1858	{
<>	144:ef7eb2e8f9f7	1859	/* Process Locked */
<>	144:ef7eb2e8f9f7	1860	__HAL_LOCK(hcryp);
<>	144:ef7eb2e8f9f7	1861
<>	144:ef7eb2e8f9f7	1862	/* Get the buffer addresses and sizes */
<>	144:ef7eb2e8f9f7	1863	hcryp->CrypInCount = Size;
<>	144:ef7eb2e8f9f7	1864	hcryp->pCrypInBuffPtr = pCypherData;
<>	144:ef7eb2e8f9f7	1865	hcryp->pCrypOutBuffPtr = pPlainData;
<>	144:ef7eb2e8f9f7	1866	hcryp->CrypOutCount = Size;
<>	144:ef7eb2e8f9f7	1867
<>	144:ef7eb2e8f9f7	1868	/* Change the CRYP peripheral state */
<>	144:ef7eb2e8f9f7	1869	hcryp->State = HAL_CRYP_STATE_BUSY;
<>	144:ef7eb2e8f9f7	1870
<>	144:ef7eb2e8f9f7	1871	/* Check if initialization phase has already been performed */
<>	144:ef7eb2e8f9f7	1872	if(hcryp->Phase == HAL_CRYP_PHASE_READY)
<>	144:ef7eb2e8f9f7	1873	{
<>	144:ef7eb2e8f9f7	1874	/* Set the key */
<>	144:ef7eb2e8f9f7	1875	CRYPEx_GCMCCM_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
<>	144:ef7eb2e8f9f7	1876
<>	144:ef7eb2e8f9f7	1877	/* Set the CRYP peripheral in AES GCM decryption mode */
<>	144:ef7eb2e8f9f7	1878	__HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_GCM_DECRYPT);
<>	144:ef7eb2e8f9f7	1879
<>	144:ef7eb2e8f9f7	1880	/* Set the Initialization Vector */
<>	144:ef7eb2e8f9f7	1881	CRYPEx_GCMCCM_SetInitVector(hcryp, hcryp->Init.pInitVect);
<>	144:ef7eb2e8f9f7	1882
<>	144:ef7eb2e8f9f7	1883	/* Flush FIFO */
<>	144:ef7eb2e8f9f7	1884	__HAL_CRYP_FIFO_FLUSH(hcryp);
<>	144:ef7eb2e8f9f7	1885
<>	144:ef7eb2e8f9f7	1886	/* Enable CRYP to start the init phase */
<>	144:ef7eb2e8f9f7	1887	__HAL_CRYP_ENABLE(hcryp);
<>	144:ef7eb2e8f9f7	1888
<>	144:ef7eb2e8f9f7	1889	/* Get tick */
<>	144:ef7eb2e8f9f7	1890	tickstart = HAL_GetTick();
<>	144:ef7eb2e8f9f7	1891
<>	144:ef7eb2e8f9f7	1892	while((CRYP->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN)
<>	144:ef7eb2e8f9f7	1893	{
<>	144:ef7eb2e8f9f7	1894	/* Check for the Timeout */
<>	144:ef7eb2e8f9f7	1895	if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE)
<>	144:ef7eb2e8f9f7	1896	{
<>	144:ef7eb2e8f9f7	1897	/* Change state */
<>	144:ef7eb2e8f9f7	1898	hcryp->State = HAL_CRYP_STATE_TIMEOUT;
<>	144:ef7eb2e8f9f7	1899
<>	144:ef7eb2e8f9f7	1900	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	1901	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	1902
<>	144:ef7eb2e8f9f7	1903	return HAL_TIMEOUT;
<>	144:ef7eb2e8f9f7	1904	}
<>	144:ef7eb2e8f9f7	1905	}
<>	144:ef7eb2e8f9f7	1906
<>	144:ef7eb2e8f9f7	1907	/* Set the header phase */
<>	144:ef7eb2e8f9f7	1908	if(CRYPEx_GCMCCM_SetHeaderPhase(hcryp, hcryp->Init.Header, hcryp->Init.HeaderSize, 1) != HAL_OK)
<>	144:ef7eb2e8f9f7	1909	{
<>	144:ef7eb2e8f9f7	1910	return HAL_TIMEOUT;
<>	144:ef7eb2e8f9f7	1911	}
<>	144:ef7eb2e8f9f7	1912	/* Disable the CRYP peripheral */
<>	144:ef7eb2e8f9f7	1913	__HAL_CRYP_DISABLE(hcryp);
<>	144:ef7eb2e8f9f7	1914
<>	144:ef7eb2e8f9f7	1915	/* Select payload phase once the header phase is performed */
<>	144:ef7eb2e8f9f7	1916	__HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD);
<>	144:ef7eb2e8f9f7	1917
<>	144:ef7eb2e8f9f7	1918	/* Set the phase */
<>	144:ef7eb2e8f9f7	1919	hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
<>	144:ef7eb2e8f9f7	1920	}
<>	144:ef7eb2e8f9f7	1921
<>	144:ef7eb2e8f9f7	1922	if(Size != 0)
<>	144:ef7eb2e8f9f7	1923	{
<>	144:ef7eb2e8f9f7	1924	/* Enable Interrupts */
<>	144:ef7eb2e8f9f7	1925	__HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_INI \| CRYP_IT_OUTI);
<>	144:ef7eb2e8f9f7	1926	/* Enable the CRYP peripheral */
<>	144:ef7eb2e8f9f7	1927	__HAL_CRYP_ENABLE(hcryp);
<>	144:ef7eb2e8f9f7	1928	}
<>	144:ef7eb2e8f9f7	1929	else
<>	144:ef7eb2e8f9f7	1930	{
<>	144:ef7eb2e8f9f7	1931	/* Process Locked */
<>	144:ef7eb2e8f9f7	1932	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	1933	/* Change the CRYP state and phase */
<>	144:ef7eb2e8f9f7	1934	hcryp->State = HAL_CRYP_STATE_READY;
<>	144:ef7eb2e8f9f7	1935	}
<>	144:ef7eb2e8f9f7	1936
<>	144:ef7eb2e8f9f7	1937	/* Return function status */
<>	144:ef7eb2e8f9f7	1938	return HAL_OK;
<>	144:ef7eb2e8f9f7	1939	}
<>	144:ef7eb2e8f9f7	1940	else if (__HAL_CRYP_GET_IT(hcryp, CRYP_IT_INI))
<>	144:ef7eb2e8f9f7	1941	{
<>	144:ef7eb2e8f9f7	1942	inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
<>	144:ef7eb2e8f9f7	1943	/* Write the Input block in the IN FIFO */
<>	144:ef7eb2e8f9f7	1944	hcryp->Instance->DR = (uint32_t)(inputaddr);
<>	144:ef7eb2e8f9f7	1945	inputaddr+=4;
<>	144:ef7eb2e8f9f7	1946	hcryp->Instance->DR = (uint32_t)(inputaddr);
<>	144:ef7eb2e8f9f7	1947	inputaddr+=4;
<>	144:ef7eb2e8f9f7	1948	hcryp->Instance->DR = (uint32_t)(inputaddr);
<>	144:ef7eb2e8f9f7	1949	inputaddr+=4;
<>	144:ef7eb2e8f9f7	1950	hcryp->Instance->DR = (uint32_t)(inputaddr);
<>	144:ef7eb2e8f9f7	1951	hcryp->pCrypInBuffPtr += 16;
<>	144:ef7eb2e8f9f7	1952	hcryp->CrypInCount -= 16;
<>	144:ef7eb2e8f9f7	1953	if(hcryp->CrypInCount == 0)
<>	144:ef7eb2e8f9f7	1954	{
<>	144:ef7eb2e8f9f7	1955	__HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_INI);
<>	144:ef7eb2e8f9f7	1956	/* Call the Input data transfer complete callback */
<>	144:ef7eb2e8f9f7	1957	HAL_CRYP_InCpltCallback(hcryp);
<>	144:ef7eb2e8f9f7	1958	}
<>	144:ef7eb2e8f9f7	1959	}
<>	144:ef7eb2e8f9f7	1960	else if (__HAL_CRYP_GET_IT(hcryp, CRYP_IT_OUTI))
<>	144:ef7eb2e8f9f7	1961	{
<>	144:ef7eb2e8f9f7	1962	outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
<>	144:ef7eb2e8f9f7	1963	/* Read the Output block from the Output FIFO */
<>	144:ef7eb2e8f9f7	1964	(uint32_t)(outputaddr) = hcryp->Instance->DOUT;
<>	144:ef7eb2e8f9f7	1965	outputaddr+=4;
<>	144:ef7eb2e8f9f7	1966	(uint32_t)(outputaddr) = hcryp->Instance->DOUT;
<>	144:ef7eb2e8f9f7	1967	outputaddr+=4;
<>	144:ef7eb2e8f9f7	1968	(uint32_t)(outputaddr) = hcryp->Instance->DOUT;
<>	144:ef7eb2e8f9f7	1969	outputaddr+=4;
<>	144:ef7eb2e8f9f7	1970	(uint32_t)(outputaddr) = hcryp->Instance->DOUT;
<>	144:ef7eb2e8f9f7	1971	hcryp->pCrypOutBuffPtr += 16;
<>	144:ef7eb2e8f9f7	1972	hcryp->CrypOutCount -= 16;
<>	144:ef7eb2e8f9f7	1973	if(hcryp->CrypOutCount == 0)
<>	144:ef7eb2e8f9f7	1974	{
<>	144:ef7eb2e8f9f7	1975	__HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_OUTI);
<>	144:ef7eb2e8f9f7	1976	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	1977	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	1978	/* Change the CRYP peripheral state */
<>	144:ef7eb2e8f9f7	1979	hcryp->State = HAL_CRYP_STATE_READY;
<>	144:ef7eb2e8f9f7	1980	/* Call Input transfer complete callback */
<>	144:ef7eb2e8f9f7	1981	HAL_CRYP_OutCpltCallback(hcryp);
<>	144:ef7eb2e8f9f7	1982	}
<>	144:ef7eb2e8f9f7	1983	}
<>	144:ef7eb2e8f9f7	1984
<>	144:ef7eb2e8f9f7	1985	/* Return function status */
<>	144:ef7eb2e8f9f7	1986	return HAL_OK;
<>	144:ef7eb2e8f9f7	1987	}
<>	144:ef7eb2e8f9f7	1988
<>	144:ef7eb2e8f9f7	1989	/**
<>	144:ef7eb2e8f9f7	1990	* @brief Initializes the CRYP peripheral in AES CCM decryption mode using interrupt
<>	144:ef7eb2e8f9f7	1991	* then decrypted pCypherData. The cypher data are available in pPlainData.
<>	144:ef7eb2e8f9f7	1992	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	144:ef7eb2e8f9f7	1993	* the configuration information for CRYP module
<>	144:ef7eb2e8f9f7	1994	* @param pCypherData: Pointer to the cyphertext buffer
<>	144:ef7eb2e8f9f7	1995	* @param Size: Length of the plaintext buffer, must be a multiple of 16
<>	144:ef7eb2e8f9f7	1996	* @param pPlainData: Pointer to the plaintext buffer
<>	144:ef7eb2e8f9f7	1997	* @retval HAL status
<>	144:ef7eb2e8f9f7	1998	*/
<>	144:ef7eb2e8f9f7	1999	HAL_StatusTypeDef HAL_CRYPEx_AESCCM_Decrypt_IT(CRYP_HandleTypeDef hcryp, uint8_t pCypherData, uint16_t Size, uint8_t *pPlainData)
<>	144:ef7eb2e8f9f7	2000	{
<>	144:ef7eb2e8f9f7	2001	uint32_t inputaddr;
<>	144:ef7eb2e8f9f7	2002	uint32_t outputaddr;
<>	144:ef7eb2e8f9f7	2003	uint32_t tickstart = 0;
<>	144:ef7eb2e8f9f7	2004	uint32_t headersize = hcryp->Init.HeaderSize;
<>	144:ef7eb2e8f9f7	2005	uint32_t headeraddr = (uint32_t)hcryp->Init.Header;
<>	144:ef7eb2e8f9f7	2006	uint32_t loopcounter = 0;
<>	144:ef7eb2e8f9f7	2007	uint32_t bufferidx = 0;
<>	144:ef7eb2e8f9f7	2008	uint8_t blockb0[16] = {0};/* Block B0 */
<>	144:ef7eb2e8f9f7	2009	uint8_t ctr[16] = {0}; /* Counter */
<>	144:ef7eb2e8f9f7	2010	uint32_t b0addr = (uint32_t)blockb0;
<>	144:ef7eb2e8f9f7	2011
<>	144:ef7eb2e8f9f7	2012	if(hcryp->State == HAL_CRYP_STATE_READY)
<>	144:ef7eb2e8f9f7	2013	{
<>	144:ef7eb2e8f9f7	2014	/* Process Locked */
<>	144:ef7eb2e8f9f7	2015	__HAL_LOCK(hcryp);
<>	144:ef7eb2e8f9f7	2016
<>	144:ef7eb2e8f9f7	2017	hcryp->CrypInCount = Size;
<>	144:ef7eb2e8f9f7	2018	hcryp->pCrypInBuffPtr = pCypherData;
<>	144:ef7eb2e8f9f7	2019	hcryp->pCrypOutBuffPtr = pPlainData;
<>	144:ef7eb2e8f9f7	2020	hcryp->CrypOutCount = Size;
<>	144:ef7eb2e8f9f7	2021
<>	144:ef7eb2e8f9f7	2022	/* Change the CRYP peripheral state */
<>	144:ef7eb2e8f9f7	2023	hcryp->State = HAL_CRYP_STATE_BUSY;
<>	144:ef7eb2e8f9f7	2024
<>	144:ef7eb2e8f9f7	2025	/* Check if initialization phase has already been performed */
<>	144:ef7eb2e8f9f7	2026	if(hcryp->Phase == HAL_CRYP_PHASE_READY)
<>	144:ef7eb2e8f9f7	2027	{
<>	144:ef7eb2e8f9f7	2028	/********************** Formatting the header block *****************/
<>	144:ef7eb2e8f9f7	2029	if(headersize != 0)
<>	144:ef7eb2e8f9f7	2030	{
<>	144:ef7eb2e8f9f7	2031	/* Check that the associated data (or header) length is lower than 2^16 - 2^8 = 65536 - 256 = 65280 */
<>	144:ef7eb2e8f9f7	2032	if(headersize < 65280)
<>	144:ef7eb2e8f9f7	2033	{
<>	144:ef7eb2e8f9f7	2034	hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize >> 8) & 0xFFU);
<>	144:ef7eb2e8f9f7	2035	hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize) & 0xFFU);
<>	144:ef7eb2e8f9f7	2036	headersize += 2;
<>	144:ef7eb2e8f9f7	2037	}
<>	144:ef7eb2e8f9f7	2038	else
<>	144:ef7eb2e8f9f7	2039	{
<>	144:ef7eb2e8f9f7	2040	/* Header is encoded as 0xff \|\| 0xfe \|\| [headersize]32, i.e., six octets */
<>	144:ef7eb2e8f9f7	2041	hcryp->Init.pScratch[bufferidx++] = 0xFFU;
<>	144:ef7eb2e8f9f7	2042	hcryp->Init.pScratch[bufferidx++] = 0xFEU;
<>	144:ef7eb2e8f9f7	2043	hcryp->Init.pScratch[bufferidx++] = headersize & 0xff000000U;
<>	144:ef7eb2e8f9f7	2044	hcryp->Init.pScratch[bufferidx++] = headersize & 0x00ff0000U;
<>	144:ef7eb2e8f9f7	2045	hcryp->Init.pScratch[bufferidx++] = headersize & 0x0000ff00U;
<>	144:ef7eb2e8f9f7	2046	hcryp->Init.pScratch[bufferidx++] = headersize & 0x000000ffU;
<>	144:ef7eb2e8f9f7	2047	headersize += 6;
<>	144:ef7eb2e8f9f7	2048	}
<>	144:ef7eb2e8f9f7	2049	/* Copy the header buffer in internal buffer "hcryp->Init.pScratch" */
<>	144:ef7eb2e8f9f7	2050	for(loopcounter = 0; loopcounter < headersize; loopcounter++)
<>	144:ef7eb2e8f9f7	2051	{
<>	144:ef7eb2e8f9f7	2052	hcryp->Init.pScratch[bufferidx++] = hcryp->Init.Header[loopcounter];
<>	144:ef7eb2e8f9f7	2053	}
<>	144:ef7eb2e8f9f7	2054	/* Check if the header size is modulo 16 */
<>	144:ef7eb2e8f9f7	2055	if ((headersize % 16) != 0)
<>	144:ef7eb2e8f9f7	2056	{
<>	144:ef7eb2e8f9f7	2057	/* Padd the header buffer with 0s till the hcryp->Init.pScratch length is modulo 16 */
<>	144:ef7eb2e8f9f7	2058	for(loopcounter = headersize; loopcounter <= ((headersize/16) + 1) * 16; loopcounter++)
<>	144:ef7eb2e8f9f7	2059	{
<>	144:ef7eb2e8f9f7	2060	hcryp->Init.pScratch[loopcounter] = 0;
<>	144:ef7eb2e8f9f7	2061	}
<>	144:ef7eb2e8f9f7	2062	/* Set the header size to modulo 16 */
<>	144:ef7eb2e8f9f7	2063	headersize = ((headersize/16) + 1) * 16;
<>	144:ef7eb2e8f9f7	2064	}
<>	144:ef7eb2e8f9f7	2065	/* Set the pointer headeraddr to hcryp->Init.pScratch */
<>	144:ef7eb2e8f9f7	2066	headeraddr = (uint32_t)hcryp->Init.pScratch;
<>	144:ef7eb2e8f9f7	2067	}
<>	144:ef7eb2e8f9f7	2068	/********************* Formatting the block B0 **********************/
<>	144:ef7eb2e8f9f7	2069	if(headersize != 0)
<>	144:ef7eb2e8f9f7	2070	{
<>	144:ef7eb2e8f9f7	2071	blockb0[0] = 0x40;
<>	144:ef7eb2e8f9f7	2072	}
<>	144:ef7eb2e8f9f7	2073	/* Flags byte */
<>	144:ef7eb2e8f9f7	2074	/* blockb0[0] \|= 0u \| (((( (uint8_t) hcryp->Init.TagSize - 2) / 2) & 0x07 ) << 3 ) \| ( ( (uint8_t) (15 - hcryp->Init.IVSize) - 1) & 0x07) */
<>	144:ef7eb2e8f9f7	2075	blockb0[0] \|= (uint8_t)((uint8_t)((uint8_t)(((uint8_t)(hcryp->Init.TagSize - (uint8_t)(2))) >> 1) & (uint8_t)0x07 ) << 3);
<>	144:ef7eb2e8f9f7	2076	blockb0[0] \|= (uint8_t)((uint8_t)((uint8_t)((uint8_t)(15) - hcryp->Init.IVSize) - (uint8_t)1) & (uint8_t)0x07);
<>	144:ef7eb2e8f9f7	2077
<>	144:ef7eb2e8f9f7	2078	for (loopcounter = 0; loopcounter < hcryp->Init.IVSize; loopcounter++)
<>	144:ef7eb2e8f9f7	2079	{
<>	144:ef7eb2e8f9f7	2080	blockb0[loopcounter+1] = hcryp->Init.pInitVect[loopcounter];
<>	144:ef7eb2e8f9f7	2081	}
<>	144:ef7eb2e8f9f7	2082	for ( ; loopcounter < 13; loopcounter++)
<>	144:ef7eb2e8f9f7	2083	{
<>	144:ef7eb2e8f9f7	2084	blockb0[loopcounter+1] = 0;
<>	144:ef7eb2e8f9f7	2085	}
<>	144:ef7eb2e8f9f7	2086
<>	144:ef7eb2e8f9f7	2087	blockb0[14] = (Size >> 8);
<>	144:ef7eb2e8f9f7	2088	blockb0[15] = (Size & 0xFF);
<>	144:ef7eb2e8f9f7	2089
<>	144:ef7eb2e8f9f7	2090	/*********************** Formatting the initial counter *************/
<>	144:ef7eb2e8f9f7	2091	/* Byte 0:
<>	144:ef7eb2e8f9f7	2092	Bits 7 and 6 are reserved and shall be set to 0
<>	144:ef7eb2e8f9f7	2093	Bits 3, 4, and 5 shall also be set to 0, to ensure that all the counter
<>	144:ef7eb2e8f9f7	2094	blocks are distinct from B0
<>	144:ef7eb2e8f9f7	2095	Bits 0, 1, and 2 contain the same encoding of q as in B0
<>	144:ef7eb2e8f9f7	2096	*/
<>	144:ef7eb2e8f9f7	2097	ctr[0] = blockb0[0] & 0x07;
<>	144:ef7eb2e8f9f7	2098	/* byte 1 to NonceSize is the IV (Nonce) */
<>	144:ef7eb2e8f9f7	2099	for(loopcounter = 1; loopcounter < hcryp->Init.IVSize + 1; loopcounter++)
<>	144:ef7eb2e8f9f7	2100	{
<>	144:ef7eb2e8f9f7	2101	ctr[loopcounter] = blockb0[loopcounter];
<>	144:ef7eb2e8f9f7	2102	}
<>	144:ef7eb2e8f9f7	2103	/* Set the LSB to 1 */
<>	144:ef7eb2e8f9f7	2104	ctr[15] \|= 0x01;
<>	144:ef7eb2e8f9f7	2105
<>	144:ef7eb2e8f9f7	2106	/* Set the key */
<>	144:ef7eb2e8f9f7	2107	CRYPEx_GCMCCM_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
<>	144:ef7eb2e8f9f7	2108
<>	144:ef7eb2e8f9f7	2109	/* Set the CRYP peripheral in AES CCM mode */
<>	144:ef7eb2e8f9f7	2110	__HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CCM_DECRYPT);
<>	144:ef7eb2e8f9f7	2111
<>	144:ef7eb2e8f9f7	2112	/* Set the Initialization Vector */
<>	144:ef7eb2e8f9f7	2113	CRYPEx_GCMCCM_SetInitVector(hcryp, ctr);
<>	144:ef7eb2e8f9f7	2114
<>	144:ef7eb2e8f9f7	2115	/* Select init phase */
<>	144:ef7eb2e8f9f7	2116	__HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT);
<>	144:ef7eb2e8f9f7	2117
<>	144:ef7eb2e8f9f7	2118	b0addr = (uint32_t)blockb0;
<>	144:ef7eb2e8f9f7	2119	/* Write the blockb0 block in the IN FIFO */
<>	144:ef7eb2e8f9f7	2120	hcryp->Instance->DR = (uint32_t)(b0addr);
<>	144:ef7eb2e8f9f7	2121	b0addr+=4;
<>	144:ef7eb2e8f9f7	2122	hcryp->Instance->DR = (uint32_t)(b0addr);
<>	144:ef7eb2e8f9f7	2123	b0addr+=4;
<>	144:ef7eb2e8f9f7	2124	hcryp->Instance->DR = (uint32_t)(b0addr);
<>	144:ef7eb2e8f9f7	2125	b0addr+=4;
<>	144:ef7eb2e8f9f7	2126	hcryp->Instance->DR = (uint32_t)(b0addr);
<>	144:ef7eb2e8f9f7	2127
<>	144:ef7eb2e8f9f7	2128	/* Enable the CRYP peripheral */
<>	144:ef7eb2e8f9f7	2129	__HAL_CRYP_ENABLE(hcryp);
<>	144:ef7eb2e8f9f7	2130
<>	144:ef7eb2e8f9f7	2131	/* Get tick */
<>	144:ef7eb2e8f9f7	2132	tickstart = HAL_GetTick();
<>	144:ef7eb2e8f9f7	2133
<>	144:ef7eb2e8f9f7	2134	while((CRYP->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN)
<>	144:ef7eb2e8f9f7	2135	{
<>	144:ef7eb2e8f9f7	2136	/* Check for the Timeout */
<>	144:ef7eb2e8f9f7	2137	if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE)
<>	144:ef7eb2e8f9f7	2138	{
<>	144:ef7eb2e8f9f7	2139	/* Change state */
<>	144:ef7eb2e8f9f7	2140	hcryp->State = HAL_CRYP_STATE_TIMEOUT;
<>	144:ef7eb2e8f9f7	2141
<>	144:ef7eb2e8f9f7	2142	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	2143	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	2144
<>	144:ef7eb2e8f9f7	2145	return HAL_TIMEOUT;
<>	144:ef7eb2e8f9f7	2146	}
<>	144:ef7eb2e8f9f7	2147	}
<>	144:ef7eb2e8f9f7	2148	/*************************** Header phase ***************************/
<>	144:ef7eb2e8f9f7	2149	if(headersize != 0)
<>	144:ef7eb2e8f9f7	2150	{
<>	144:ef7eb2e8f9f7	2151	/* Select header phase */
<>	144:ef7eb2e8f9f7	2152	__HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER);
<>	144:ef7eb2e8f9f7	2153
<>	144:ef7eb2e8f9f7	2154	/* Enable Crypto processor */
<>	144:ef7eb2e8f9f7	2155	__HAL_CRYP_ENABLE(hcryp);
<>	144:ef7eb2e8f9f7	2156
<>	144:ef7eb2e8f9f7	2157	for(loopcounter = 0; (loopcounter < headersize); loopcounter+=16)
<>	144:ef7eb2e8f9f7	2158	{
<>	144:ef7eb2e8f9f7	2159	/* Get tick */
<>	144:ef7eb2e8f9f7	2160	tickstart = HAL_GetTick();
<>	144:ef7eb2e8f9f7	2161
<>	144:ef7eb2e8f9f7	2162	while(HAL_IS_BIT_CLR(hcryp->Instance->SR, CRYP_FLAG_IFEM))
<>	144:ef7eb2e8f9f7	2163	{
<>	144:ef7eb2e8f9f7	2164	/* Check for the Timeout */
<>	144:ef7eb2e8f9f7	2165	if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE)
<>	144:ef7eb2e8f9f7	2166	{
<>	144:ef7eb2e8f9f7	2167	/* Change state */
<>	144:ef7eb2e8f9f7	2168	hcryp->State = HAL_CRYP_STATE_TIMEOUT;
<>	144:ef7eb2e8f9f7	2169
<>	144:ef7eb2e8f9f7	2170	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	2171	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	2172
<>	144:ef7eb2e8f9f7	2173	return HAL_TIMEOUT;
<>	144:ef7eb2e8f9f7	2174	}
<>	144:ef7eb2e8f9f7	2175	}
<>	144:ef7eb2e8f9f7	2176	/* Write the header block in the IN FIFO */
<>	144:ef7eb2e8f9f7	2177	hcryp->Instance->DR = (uint32_t)(headeraddr);
<>	144:ef7eb2e8f9f7	2178	headeraddr+=4;
<>	144:ef7eb2e8f9f7	2179	hcryp->Instance->DR = (uint32_t)(headeraddr);
<>	144:ef7eb2e8f9f7	2180	headeraddr+=4;
<>	144:ef7eb2e8f9f7	2181	hcryp->Instance->DR = (uint32_t)(headeraddr);
<>	144:ef7eb2e8f9f7	2182	headeraddr+=4;
<>	144:ef7eb2e8f9f7	2183	hcryp->Instance->DR = (uint32_t)(headeraddr);
<>	144:ef7eb2e8f9f7	2184	headeraddr+=4;
<>	144:ef7eb2e8f9f7	2185	}
<>	144:ef7eb2e8f9f7	2186
<>	144:ef7eb2e8f9f7	2187	/* Get tick */
<>	144:ef7eb2e8f9f7	2188	tickstart = HAL_GetTick();
<>	144:ef7eb2e8f9f7	2189
<>	144:ef7eb2e8f9f7	2190	while((hcryp->Instance->SR & CRYP_FLAG_BUSY) == CRYP_FLAG_BUSY)
<>	144:ef7eb2e8f9f7	2191	{
<>	144:ef7eb2e8f9f7	2192	/* Check for the Timeout */
<>	144:ef7eb2e8f9f7	2193	if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE)
<>	144:ef7eb2e8f9f7	2194	{
<>	144:ef7eb2e8f9f7	2195	/* Change state */
<>	144:ef7eb2e8f9f7	2196	hcryp->State = HAL_CRYP_STATE_TIMEOUT;
<>	144:ef7eb2e8f9f7	2197
<>	144:ef7eb2e8f9f7	2198	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	2199	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	2200
<>	144:ef7eb2e8f9f7	2201	return HAL_TIMEOUT;
<>	144:ef7eb2e8f9f7	2202	}
<>	144:ef7eb2e8f9f7	2203	}
<>	144:ef7eb2e8f9f7	2204	}
<>	144:ef7eb2e8f9f7	2205	/* Save formatted counter into the scratch buffer pScratch */
<>	144:ef7eb2e8f9f7	2206	for(loopcounter = 0; (loopcounter < 16); loopcounter++)
<>	144:ef7eb2e8f9f7	2207	{
<>	144:ef7eb2e8f9f7	2208	hcryp->Init.pScratch[loopcounter] = ctr[loopcounter];
<>	144:ef7eb2e8f9f7	2209	}
<>	144:ef7eb2e8f9f7	2210	/* Reset bit 0 */
<>	144:ef7eb2e8f9f7	2211	hcryp->Init.pScratch[15] &= 0xfe;
<>	144:ef7eb2e8f9f7	2212	/* Select payload phase once the header phase is performed */
<>	144:ef7eb2e8f9f7	2213	__HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD);
<>	144:ef7eb2e8f9f7	2214
<>	144:ef7eb2e8f9f7	2215	/* Flush FIFO */
<>	144:ef7eb2e8f9f7	2216	__HAL_CRYP_FIFO_FLUSH(hcryp);
<>	144:ef7eb2e8f9f7	2217
<>	144:ef7eb2e8f9f7	2218	/* Set the phase */
<>	144:ef7eb2e8f9f7	2219	hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
<>	144:ef7eb2e8f9f7	2220	}
<>	144:ef7eb2e8f9f7	2221
<>	144:ef7eb2e8f9f7	2222	/* Enable Interrupts */
<>	144:ef7eb2e8f9f7	2223	__HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_INI \| CRYP_IT_OUTI);
<>	144:ef7eb2e8f9f7	2224
<>	144:ef7eb2e8f9f7	2225	/* Enable the CRYP peripheral */
<>	144:ef7eb2e8f9f7	2226	__HAL_CRYP_ENABLE(hcryp);
<>	144:ef7eb2e8f9f7	2227
<>	144:ef7eb2e8f9f7	2228	/* Return function status */
<>	144:ef7eb2e8f9f7	2229	return HAL_OK;
<>	144:ef7eb2e8f9f7	2230	}
<>	144:ef7eb2e8f9f7	2231	else if (__HAL_CRYP_GET_IT(hcryp, CRYP_IT_INI))
<>	144:ef7eb2e8f9f7	2232	{
<>	144:ef7eb2e8f9f7	2233	inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
<>	144:ef7eb2e8f9f7	2234	/* Write the Input block in the IN FIFO */
<>	144:ef7eb2e8f9f7	2235	hcryp->Instance->DR = (uint32_t)(inputaddr);
<>	144:ef7eb2e8f9f7	2236	inputaddr+=4;
<>	144:ef7eb2e8f9f7	2237	hcryp->Instance->DR = (uint32_t)(inputaddr);
<>	144:ef7eb2e8f9f7	2238	inputaddr+=4;
<>	144:ef7eb2e8f9f7	2239	hcryp->Instance->DR = (uint32_t)(inputaddr);
<>	144:ef7eb2e8f9f7	2240	inputaddr+=4;
<>	144:ef7eb2e8f9f7	2241	hcryp->Instance->DR = (uint32_t)(inputaddr);
<>	144:ef7eb2e8f9f7	2242	hcryp->pCrypInBuffPtr += 16;
<>	144:ef7eb2e8f9f7	2243	hcryp->CrypInCount -= 16;
<>	144:ef7eb2e8f9f7	2244	if(hcryp->CrypInCount == 0)
<>	144:ef7eb2e8f9f7	2245	{
<>	144:ef7eb2e8f9f7	2246	__HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_INI);
<>	144:ef7eb2e8f9f7	2247	/* Call the Input data transfer complete callback */
<>	144:ef7eb2e8f9f7	2248	HAL_CRYP_InCpltCallback(hcryp);
<>	144:ef7eb2e8f9f7	2249	}
<>	144:ef7eb2e8f9f7	2250	}
<>	144:ef7eb2e8f9f7	2251	else if (__HAL_CRYP_GET_IT(hcryp, CRYP_IT_OUTI))
<>	144:ef7eb2e8f9f7	2252	{
<>	144:ef7eb2e8f9f7	2253	outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
<>	144:ef7eb2e8f9f7	2254	/* Read the Output block from the Output FIFO */
<>	144:ef7eb2e8f9f7	2255	(uint32_t)(outputaddr) = hcryp->Instance->DOUT;
<>	144:ef7eb2e8f9f7	2256	outputaddr+=4;
<>	144:ef7eb2e8f9f7	2257	(uint32_t)(outputaddr) = hcryp->Instance->DOUT;
<>	144:ef7eb2e8f9f7	2258	outputaddr+=4;
<>	144:ef7eb2e8f9f7	2259	(uint32_t)(outputaddr) = hcryp->Instance->DOUT;
<>	144:ef7eb2e8f9f7	2260	outputaddr+=4;
<>	144:ef7eb2e8f9f7	2261	(uint32_t)(outputaddr) = hcryp->Instance->DOUT;
<>	144:ef7eb2e8f9f7	2262	hcryp->pCrypOutBuffPtr += 16;
<>	144:ef7eb2e8f9f7	2263	hcryp->CrypOutCount -= 16;
<>	144:ef7eb2e8f9f7	2264	if(hcryp->CrypOutCount == 0)
<>	144:ef7eb2e8f9f7	2265	{
<>	144:ef7eb2e8f9f7	2266	__HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_OUTI);
<>	144:ef7eb2e8f9f7	2267	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	2268	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	2269	/* Change the CRYP peripheral state */
<>	144:ef7eb2e8f9f7	2270	hcryp->State = HAL_CRYP_STATE_READY;
<>	144:ef7eb2e8f9f7	2271	/* Call Input transfer complete callback */
<>	144:ef7eb2e8f9f7	2272	HAL_CRYP_OutCpltCallback(hcryp);
<>	144:ef7eb2e8f9f7	2273	}
<>	144:ef7eb2e8f9f7	2274	}
<>	144:ef7eb2e8f9f7	2275
<>	144:ef7eb2e8f9f7	2276	/* Return function status */
<>	144:ef7eb2e8f9f7	2277	return HAL_OK;
<>	144:ef7eb2e8f9f7	2278	}
<>	144:ef7eb2e8f9f7	2279
<>	144:ef7eb2e8f9f7	2280	/**
<>	144:ef7eb2e8f9f7	2281	* @brief Initializes the CRYP peripheral in AES GCM encryption mode using DMA.
<>	144:ef7eb2e8f9f7	2282	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	144:ef7eb2e8f9f7	2283	* the configuration information for CRYP module
<>	144:ef7eb2e8f9f7	2284	* @param pPlainData: Pointer to the plaintext buffer
<>	144:ef7eb2e8f9f7	2285	* @param Size: Length of the plaintext buffer, must be a multiple of 16
<>	144:ef7eb2e8f9f7	2286	* @param pCypherData: Pointer to the cyphertext buffer
<>	144:ef7eb2e8f9f7	2287	* @retval HAL status
<>	144:ef7eb2e8f9f7	2288	*/
<>	144:ef7eb2e8f9f7	2289	HAL_StatusTypeDef HAL_CRYPEx_AESGCM_Encrypt_DMA(CRYP_HandleTypeDef hcryp, uint8_t pPlainData, uint16_t Size, uint8_t *pCypherData)
<>	144:ef7eb2e8f9f7	2290	{
<>	144:ef7eb2e8f9f7	2291	uint32_t tickstart = 0;
<>	144:ef7eb2e8f9f7	2292	uint32_t inputaddr;
<>	144:ef7eb2e8f9f7	2293	uint32_t outputaddr;
<>	144:ef7eb2e8f9f7	2294
<>	144:ef7eb2e8f9f7	2295	if((hcryp->State == HAL_CRYP_STATE_READY) \|\| (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
<>	144:ef7eb2e8f9f7	2296	{
<>	144:ef7eb2e8f9f7	2297	/* Process Locked */
<>	144:ef7eb2e8f9f7	2298	__HAL_LOCK(hcryp);
<>	144:ef7eb2e8f9f7	2299
<>	144:ef7eb2e8f9f7	2300	inputaddr = (uint32_t)pPlainData;
<>	144:ef7eb2e8f9f7	2301	outputaddr = (uint32_t)pCypherData;
<>	144:ef7eb2e8f9f7	2302
<>	144:ef7eb2e8f9f7	2303	/* Change the CRYP peripheral state */
<>	144:ef7eb2e8f9f7	2304	hcryp->State = HAL_CRYP_STATE_BUSY;
<>	144:ef7eb2e8f9f7	2305
<>	144:ef7eb2e8f9f7	2306	/* Check if initialization phase has already been performed */
<>	144:ef7eb2e8f9f7	2307	if(hcryp->Phase == HAL_CRYP_PHASE_READY)
<>	144:ef7eb2e8f9f7	2308	{
<>	144:ef7eb2e8f9f7	2309	/* Set the key */
<>	144:ef7eb2e8f9f7	2310	CRYPEx_GCMCCM_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
<>	144:ef7eb2e8f9f7	2311
<>	144:ef7eb2e8f9f7	2312	/* Set the CRYP peripheral in AES GCM mode */
<>	144:ef7eb2e8f9f7	2313	__HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_GCM_ENCRYPT);
<>	144:ef7eb2e8f9f7	2314
<>	144:ef7eb2e8f9f7	2315	/* Set the Initialization Vector */
<>	144:ef7eb2e8f9f7	2316	CRYPEx_GCMCCM_SetInitVector(hcryp, hcryp->Init.pInitVect);
<>	144:ef7eb2e8f9f7	2317
<>	144:ef7eb2e8f9f7	2318	/* Flush FIFO */
<>	144:ef7eb2e8f9f7	2319	__HAL_CRYP_FIFO_FLUSH(hcryp);
<>	144:ef7eb2e8f9f7	2320
<>	144:ef7eb2e8f9f7	2321	/* Enable CRYP to start the init phase */
<>	144:ef7eb2e8f9f7	2322	__HAL_CRYP_ENABLE(hcryp);
<>	144:ef7eb2e8f9f7	2323
<>	144:ef7eb2e8f9f7	2324	/* Get tick */
<>	144:ef7eb2e8f9f7	2325	tickstart = HAL_GetTick();
<>	144:ef7eb2e8f9f7	2326
<>	144:ef7eb2e8f9f7	2327	while((CRYP->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN)
<>	144:ef7eb2e8f9f7	2328	{
<>	144:ef7eb2e8f9f7	2329	/* Check for the Timeout */
<>	144:ef7eb2e8f9f7	2330	if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE)
<>	144:ef7eb2e8f9f7	2331	{
<>	144:ef7eb2e8f9f7	2332	/* Change state */
<>	144:ef7eb2e8f9f7	2333	hcryp->State = HAL_CRYP_STATE_TIMEOUT;
<>	144:ef7eb2e8f9f7	2334
<>	144:ef7eb2e8f9f7	2335	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	2336	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	2337
<>	144:ef7eb2e8f9f7	2338	return HAL_TIMEOUT;
<>	144:ef7eb2e8f9f7	2339	}
<>	144:ef7eb2e8f9f7	2340	}
<>	144:ef7eb2e8f9f7	2341	/* Flush FIFO */
<>	144:ef7eb2e8f9f7	2342	__HAL_CRYP_FIFO_FLUSH(hcryp);
<>	144:ef7eb2e8f9f7	2343
<>	144:ef7eb2e8f9f7	2344	/* Set the header phase */
<>	144:ef7eb2e8f9f7	2345	if(CRYPEx_GCMCCM_SetHeaderPhase(hcryp, hcryp->Init.Header, hcryp->Init.HeaderSize, 1) != HAL_OK)
<>	144:ef7eb2e8f9f7	2346	{
<>	144:ef7eb2e8f9f7	2347	return HAL_TIMEOUT;
<>	144:ef7eb2e8f9f7	2348	}
<>	144:ef7eb2e8f9f7	2349	/* Disable the CRYP peripheral */
<>	144:ef7eb2e8f9f7	2350	__HAL_CRYP_DISABLE(hcryp);
<>	144:ef7eb2e8f9f7	2351
<>	144:ef7eb2e8f9f7	2352	/* Select payload phase once the header phase is performed */
<>	144:ef7eb2e8f9f7	2353	__HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD);
<>	144:ef7eb2e8f9f7	2354
<>	144:ef7eb2e8f9f7	2355	/* Flush FIFO */
<>	144:ef7eb2e8f9f7	2356	__HAL_CRYP_FIFO_FLUSH(hcryp);
<>	144:ef7eb2e8f9f7	2357
<>	144:ef7eb2e8f9f7	2358	/* Set the phase */
<>	144:ef7eb2e8f9f7	2359	hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
<>	144:ef7eb2e8f9f7	2360	}
<>	144:ef7eb2e8f9f7	2361
<>	144:ef7eb2e8f9f7	2362	/* Set the input and output addresses and start DMA transfer */
<>	144:ef7eb2e8f9f7	2363	CRYPEx_GCMCCM_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
<>	144:ef7eb2e8f9f7	2364
<>	144:ef7eb2e8f9f7	2365	/* Unlock process */
<>	144:ef7eb2e8f9f7	2366	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	2367
<>	144:ef7eb2e8f9f7	2368	/* Return function status */
<>	144:ef7eb2e8f9f7	2369	return HAL_OK;
<>	144:ef7eb2e8f9f7	2370	}
<>	144:ef7eb2e8f9f7	2371	else
<>	144:ef7eb2e8f9f7	2372	{
<>	144:ef7eb2e8f9f7	2373	return HAL_ERROR;
<>	144:ef7eb2e8f9f7	2374	}
<>	144:ef7eb2e8f9f7	2375	}
<>	144:ef7eb2e8f9f7	2376
<>	144:ef7eb2e8f9f7	2377	/**
<>	144:ef7eb2e8f9f7	2378	* @brief Initializes the CRYP peripheral in AES CCM encryption mode using interrupt.
<>	144:ef7eb2e8f9f7	2379	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	144:ef7eb2e8f9f7	2380	* the configuration information for CRYP module
<>	144:ef7eb2e8f9f7	2381	* @param pPlainData: Pointer to the plaintext buffer
<>	144:ef7eb2e8f9f7	2382	* @param Size: Length of the plaintext buffer, must be a multiple of 16
<>	144:ef7eb2e8f9f7	2383	* @param pCypherData: Pointer to the cyphertext buffer
<>	144:ef7eb2e8f9f7	2384	* @retval HAL status
<>	144:ef7eb2e8f9f7	2385	*/
<>	144:ef7eb2e8f9f7	2386	HAL_StatusTypeDef HAL_CRYPEx_AESCCM_Encrypt_DMA(CRYP_HandleTypeDef hcryp, uint8_t pPlainData, uint16_t Size, uint8_t *pCypherData)
<>	144:ef7eb2e8f9f7	2387	{
<>	144:ef7eb2e8f9f7	2388	uint32_t tickstart = 0;
<>	144:ef7eb2e8f9f7	2389	uint32_t inputaddr;
<>	144:ef7eb2e8f9f7	2390	uint32_t outputaddr;
<>	144:ef7eb2e8f9f7	2391	uint32_t headersize;
<>	144:ef7eb2e8f9f7	2392	uint32_t headeraddr;
<>	144:ef7eb2e8f9f7	2393	uint32_t loopcounter = 0;
<>	144:ef7eb2e8f9f7	2394	uint32_t bufferidx = 0;
<>	144:ef7eb2e8f9f7	2395	uint8_t blockb0[16] = {0};/* Block B0 */
<>	144:ef7eb2e8f9f7	2396	uint8_t ctr[16] = {0}; /* Counter */
<>	144:ef7eb2e8f9f7	2397	uint32_t b0addr = (uint32_t)blockb0;
<>	144:ef7eb2e8f9f7	2398
<>	144:ef7eb2e8f9f7	2399	if((hcryp->State == HAL_CRYP_STATE_READY) \|\| (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
<>	144:ef7eb2e8f9f7	2400	{
<>	144:ef7eb2e8f9f7	2401	/* Process Locked */
<>	144:ef7eb2e8f9f7	2402	__HAL_LOCK(hcryp);
<>	144:ef7eb2e8f9f7	2403
<>	144:ef7eb2e8f9f7	2404	inputaddr = (uint32_t)pPlainData;
<>	144:ef7eb2e8f9f7	2405	outputaddr = (uint32_t)pCypherData;
<>	144:ef7eb2e8f9f7	2406
<>	144:ef7eb2e8f9f7	2407	headersize = hcryp->Init.HeaderSize;
<>	144:ef7eb2e8f9f7	2408	headeraddr = (uint32_t)hcryp->Init.Header;
<>	144:ef7eb2e8f9f7	2409
<>	144:ef7eb2e8f9f7	2410	hcryp->CrypInCount = Size;
<>	144:ef7eb2e8f9f7	2411	hcryp->pCrypInBuffPtr = pPlainData;
<>	144:ef7eb2e8f9f7	2412	hcryp->pCrypOutBuffPtr = pCypherData;
<>	144:ef7eb2e8f9f7	2413	hcryp->CrypOutCount = Size;
<>	144:ef7eb2e8f9f7	2414
<>	144:ef7eb2e8f9f7	2415	/* Change the CRYP peripheral state */
<>	144:ef7eb2e8f9f7	2416	hcryp->State = HAL_CRYP_STATE_BUSY;
<>	144:ef7eb2e8f9f7	2417
<>	144:ef7eb2e8f9f7	2418	/* Check if initialization phase has already been performed */
<>	144:ef7eb2e8f9f7	2419	if(hcryp->Phase == HAL_CRYP_PHASE_READY)
<>	144:ef7eb2e8f9f7	2420	{
<>	144:ef7eb2e8f9f7	2421	/********************** Formatting the header block *****************/
<>	144:ef7eb2e8f9f7	2422	if(headersize != 0)
<>	144:ef7eb2e8f9f7	2423	{
<>	144:ef7eb2e8f9f7	2424	/* Check that the associated data (or header) length is lower than 2^16 - 2^8 = 65536 - 256 = 65280 */
<>	144:ef7eb2e8f9f7	2425	if(headersize < 65280)
<>	144:ef7eb2e8f9f7	2426	{
<>	144:ef7eb2e8f9f7	2427	hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize >> 8) & 0xFFU);
<>	144:ef7eb2e8f9f7	2428	hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize) & 0xFFU);
<>	144:ef7eb2e8f9f7	2429	headersize += 2;
<>	144:ef7eb2e8f9f7	2430	}
<>	144:ef7eb2e8f9f7	2431	else
<>	144:ef7eb2e8f9f7	2432	{
<>	144:ef7eb2e8f9f7	2433	/* Header is encoded as 0xff \|\| 0xfe \|\| [headersize]32, i.e., six octets */
<>	144:ef7eb2e8f9f7	2434	hcryp->Init.pScratch[bufferidx++] = 0xFFU;
<>	144:ef7eb2e8f9f7	2435	hcryp->Init.pScratch[bufferidx++] = 0xFEU;
<>	144:ef7eb2e8f9f7	2436	hcryp->Init.pScratch[bufferidx++] = headersize & 0xff000000U;
<>	144:ef7eb2e8f9f7	2437	hcryp->Init.pScratch[bufferidx++] = headersize & 0x00ff0000U;
<>	144:ef7eb2e8f9f7	2438	hcryp->Init.pScratch[bufferidx++] = headersize & 0x0000ff00U;
<>	144:ef7eb2e8f9f7	2439	hcryp->Init.pScratch[bufferidx++] = headersize & 0x000000ffU;
<>	144:ef7eb2e8f9f7	2440	headersize += 6;
<>	144:ef7eb2e8f9f7	2441	}
<>	144:ef7eb2e8f9f7	2442	/* Copy the header buffer in internal buffer "hcryp->Init.pScratch" */
<>	144:ef7eb2e8f9f7	2443	for(loopcounter = 0; loopcounter < headersize; loopcounter++)
<>	144:ef7eb2e8f9f7	2444	{
<>	144:ef7eb2e8f9f7	2445	hcryp->Init.pScratch[bufferidx++] = hcryp->Init.Header[loopcounter];
<>	144:ef7eb2e8f9f7	2446	}
<>	144:ef7eb2e8f9f7	2447	/* Check if the header size is modulo 16 */
<>	144:ef7eb2e8f9f7	2448	if ((headersize % 16) != 0)
<>	144:ef7eb2e8f9f7	2449	{
<>	144:ef7eb2e8f9f7	2450	/* Padd the header buffer with 0s till the hcryp->Init.pScratch length is modulo 16 */
<>	144:ef7eb2e8f9f7	2451	for(loopcounter = headersize; loopcounter <= ((headersize/16) + 1) * 16; loopcounter++)
<>	144:ef7eb2e8f9f7	2452	{
<>	144:ef7eb2e8f9f7	2453	hcryp->Init.pScratch[loopcounter] = 0;
<>	144:ef7eb2e8f9f7	2454	}
<>	144:ef7eb2e8f9f7	2455	/* Set the header size to modulo 16 */
<>	144:ef7eb2e8f9f7	2456	headersize = ((headersize/16) + 1) * 16;
<>	144:ef7eb2e8f9f7	2457	}
<>	144:ef7eb2e8f9f7	2458	/* Set the pointer headeraddr to hcryp->Init.pScratch */
<>	144:ef7eb2e8f9f7	2459	headeraddr = (uint32_t)hcryp->Init.pScratch;
<>	144:ef7eb2e8f9f7	2460	}
<>	144:ef7eb2e8f9f7	2461	/********************* Formatting the block B0 **********************/
<>	144:ef7eb2e8f9f7	2462	if(headersize != 0)
<>	144:ef7eb2e8f9f7	2463	{
<>	144:ef7eb2e8f9f7	2464	blockb0[0] = 0x40;
<>	144:ef7eb2e8f9f7	2465	}
<>	144:ef7eb2e8f9f7	2466	/* Flags byte */
<>	144:ef7eb2e8f9f7	2467	/* blockb0[0] \|= 0u \| (((( (uint8_t) hcryp->Init.TagSize - 2) / 2) & 0x07 ) << 3 ) \| ( ( (uint8_t) (15 - hcryp->Init.IVSize) - 1) & 0x07) */
<>	144:ef7eb2e8f9f7	2468	blockb0[0] \|= (uint8_t)((uint8_t)((uint8_t)(((uint8_t)(hcryp->Init.TagSize - (uint8_t)(2))) >> 1) & (uint8_t)0x07 ) << 3);
<>	144:ef7eb2e8f9f7	2469	blockb0[0] \|= (uint8_t)((uint8_t)((uint8_t)((uint8_t)(15) - hcryp->Init.IVSize) - (uint8_t)1) & (uint8_t)0x07);
<>	144:ef7eb2e8f9f7	2470
<>	144:ef7eb2e8f9f7	2471	for (loopcounter = 0; loopcounter < hcryp->Init.IVSize; loopcounter++)
<>	144:ef7eb2e8f9f7	2472	{
<>	144:ef7eb2e8f9f7	2473	blockb0[loopcounter+1] = hcryp->Init.pInitVect[loopcounter];
<>	144:ef7eb2e8f9f7	2474	}
<>	144:ef7eb2e8f9f7	2475	for ( ; loopcounter < 13; loopcounter++)
<>	144:ef7eb2e8f9f7	2476	{
<>	144:ef7eb2e8f9f7	2477	blockb0[loopcounter+1] = 0;
<>	144:ef7eb2e8f9f7	2478	}
<>	144:ef7eb2e8f9f7	2479
<>	144:ef7eb2e8f9f7	2480	blockb0[14] = (Size >> 8);
<>	144:ef7eb2e8f9f7	2481	blockb0[15] = (Size & 0xFF);
<>	144:ef7eb2e8f9f7	2482
<>	144:ef7eb2e8f9f7	2483	/*********************** Formatting the initial counter *************/
<>	144:ef7eb2e8f9f7	2484	/* Byte 0:
<>	144:ef7eb2e8f9f7	2485	Bits 7 and 6 are reserved and shall be set to 0
<>	144:ef7eb2e8f9f7	2486	Bits 3, 4, and 5 shall also be set to 0, to ensure that all the counter
<>	144:ef7eb2e8f9f7	2487	blocks are distinct from B0
<>	144:ef7eb2e8f9f7	2488	Bits 0, 1, and 2 contain the same encoding of q as in B0
<>	144:ef7eb2e8f9f7	2489	*/
<>	144:ef7eb2e8f9f7	2490	ctr[0] = blockb0[0] & 0x07;
<>	144:ef7eb2e8f9f7	2491	/* byte 1 to NonceSize is the IV (Nonce) */
<>	144:ef7eb2e8f9f7	2492	for(loopcounter = 1; loopcounter < hcryp->Init.IVSize + 1; loopcounter++)
<>	144:ef7eb2e8f9f7	2493	{
<>	144:ef7eb2e8f9f7	2494	ctr[loopcounter] = blockb0[loopcounter];
<>	144:ef7eb2e8f9f7	2495	}
<>	144:ef7eb2e8f9f7	2496	/* Set the LSB to 1 */
<>	144:ef7eb2e8f9f7	2497	ctr[15] \|= 0x01;
<>	144:ef7eb2e8f9f7	2498
<>	144:ef7eb2e8f9f7	2499	/* Set the key */
<>	144:ef7eb2e8f9f7	2500	CRYPEx_GCMCCM_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
<>	144:ef7eb2e8f9f7	2501
<>	144:ef7eb2e8f9f7	2502	/* Set the CRYP peripheral in AES CCM mode */
<>	144:ef7eb2e8f9f7	2503	__HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CCM_ENCRYPT);
<>	144:ef7eb2e8f9f7	2504
<>	144:ef7eb2e8f9f7	2505	/* Set the Initialization Vector */
<>	144:ef7eb2e8f9f7	2506	CRYPEx_GCMCCM_SetInitVector(hcryp, ctr);
<>	144:ef7eb2e8f9f7	2507
<>	144:ef7eb2e8f9f7	2508	/* Select init phase */
<>	144:ef7eb2e8f9f7	2509	__HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT);
<>	144:ef7eb2e8f9f7	2510
<>	144:ef7eb2e8f9f7	2511	b0addr = (uint32_t)blockb0;
<>	144:ef7eb2e8f9f7	2512	/* Write the blockb0 block in the IN FIFO */
<>	144:ef7eb2e8f9f7	2513	hcryp->Instance->DR = (uint32_t)(b0addr);
<>	144:ef7eb2e8f9f7	2514	b0addr+=4;
<>	144:ef7eb2e8f9f7	2515	hcryp->Instance->DR = (uint32_t)(b0addr);
<>	144:ef7eb2e8f9f7	2516	b0addr+=4;
<>	144:ef7eb2e8f9f7	2517	hcryp->Instance->DR = (uint32_t)(b0addr);
<>	144:ef7eb2e8f9f7	2518	b0addr+=4;
<>	144:ef7eb2e8f9f7	2519	hcryp->Instance->DR = (uint32_t)(b0addr);
<>	144:ef7eb2e8f9f7	2520
<>	144:ef7eb2e8f9f7	2521	/* Enable the CRYP peripheral */
<>	144:ef7eb2e8f9f7	2522	__HAL_CRYP_ENABLE(hcryp);
<>	144:ef7eb2e8f9f7	2523
<>	144:ef7eb2e8f9f7	2524	/* Get tick */
<>	144:ef7eb2e8f9f7	2525	tickstart = HAL_GetTick();
<>	144:ef7eb2e8f9f7	2526
<>	144:ef7eb2e8f9f7	2527	while((CRYP->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN)
<>	144:ef7eb2e8f9f7	2528	{
<>	144:ef7eb2e8f9f7	2529	/* Check for the Timeout */
<>	144:ef7eb2e8f9f7	2530	if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE)
<>	144:ef7eb2e8f9f7	2531	{
<>	144:ef7eb2e8f9f7	2532	/* Change state */
<>	144:ef7eb2e8f9f7	2533	hcryp->State = HAL_CRYP_STATE_TIMEOUT;
<>	144:ef7eb2e8f9f7	2534
<>	144:ef7eb2e8f9f7	2535	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	2536	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	2537
<>	144:ef7eb2e8f9f7	2538	return HAL_TIMEOUT;
<>	144:ef7eb2e8f9f7	2539	}
<>	144:ef7eb2e8f9f7	2540	}
<>	144:ef7eb2e8f9f7	2541	/*************************** Header phase ***************************/
<>	144:ef7eb2e8f9f7	2542	if(headersize != 0)
<>	144:ef7eb2e8f9f7	2543	{
<>	144:ef7eb2e8f9f7	2544	/* Select header phase */
<>	144:ef7eb2e8f9f7	2545	__HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER);
<>	144:ef7eb2e8f9f7	2546
<>	144:ef7eb2e8f9f7	2547	/* Enable Crypto processor */
<>	144:ef7eb2e8f9f7	2548	__HAL_CRYP_ENABLE(hcryp);
<>	144:ef7eb2e8f9f7	2549
<>	144:ef7eb2e8f9f7	2550	for(loopcounter = 0; (loopcounter < headersize); loopcounter+=16)
<>	144:ef7eb2e8f9f7	2551	{
<>	144:ef7eb2e8f9f7	2552	/* Get tick */
<>	144:ef7eb2e8f9f7	2553	tickstart = HAL_GetTick();
<>	144:ef7eb2e8f9f7	2554
<>	144:ef7eb2e8f9f7	2555	while(HAL_IS_BIT_CLR(hcryp->Instance->SR, CRYP_FLAG_IFEM))
<>	144:ef7eb2e8f9f7	2556	{
<>	144:ef7eb2e8f9f7	2557	/* Check for the Timeout */
<>	144:ef7eb2e8f9f7	2558	if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE)
<>	144:ef7eb2e8f9f7	2559	{
<>	144:ef7eb2e8f9f7	2560	/* Change state */
<>	144:ef7eb2e8f9f7	2561	hcryp->State = HAL_CRYP_STATE_TIMEOUT;
<>	144:ef7eb2e8f9f7	2562
<>	144:ef7eb2e8f9f7	2563	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	2564	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	2565
<>	144:ef7eb2e8f9f7	2566	return HAL_TIMEOUT;
<>	144:ef7eb2e8f9f7	2567	}
<>	144:ef7eb2e8f9f7	2568	}
<>	144:ef7eb2e8f9f7	2569	/* Write the header block in the IN FIFO */
<>	144:ef7eb2e8f9f7	2570	hcryp->Instance->DR = (uint32_t)(headeraddr);
<>	144:ef7eb2e8f9f7	2571	headeraddr+=4;
<>	144:ef7eb2e8f9f7	2572	hcryp->Instance->DR = (uint32_t)(headeraddr);
<>	144:ef7eb2e8f9f7	2573	headeraddr+=4;
<>	144:ef7eb2e8f9f7	2574	hcryp->Instance->DR = (uint32_t)(headeraddr);
<>	144:ef7eb2e8f9f7	2575	headeraddr+=4;
<>	144:ef7eb2e8f9f7	2576	hcryp->Instance->DR = (uint32_t)(headeraddr);
<>	144:ef7eb2e8f9f7	2577	headeraddr+=4;
<>	144:ef7eb2e8f9f7	2578	}
<>	144:ef7eb2e8f9f7	2579
<>	144:ef7eb2e8f9f7	2580	/* Get tick */
<>	144:ef7eb2e8f9f7	2581	tickstart = HAL_GetTick();
<>	144:ef7eb2e8f9f7	2582
<>	144:ef7eb2e8f9f7	2583	while((hcryp->Instance->SR & CRYP_FLAG_BUSY) == CRYP_FLAG_BUSY)
<>	144:ef7eb2e8f9f7	2584	{
<>	144:ef7eb2e8f9f7	2585	/* Check for the Timeout */
<>	144:ef7eb2e8f9f7	2586	if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE)
<>	144:ef7eb2e8f9f7	2587	{
<>	144:ef7eb2e8f9f7	2588	/* Change state */
<>	144:ef7eb2e8f9f7	2589	hcryp->State = HAL_CRYP_STATE_TIMEOUT;
<>	144:ef7eb2e8f9f7	2590
<>	144:ef7eb2e8f9f7	2591	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	2592	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	2593
<>	144:ef7eb2e8f9f7	2594	return HAL_TIMEOUT;
<>	144:ef7eb2e8f9f7	2595	}
<>	144:ef7eb2e8f9f7	2596	}
<>	144:ef7eb2e8f9f7	2597	}
<>	144:ef7eb2e8f9f7	2598	/* Save formatted counter into the scratch buffer pScratch */
<>	144:ef7eb2e8f9f7	2599	for(loopcounter = 0; (loopcounter < 16); loopcounter++)
<>	144:ef7eb2e8f9f7	2600	{
<>	144:ef7eb2e8f9f7	2601	hcryp->Init.pScratch[loopcounter] = ctr[loopcounter];
<>	144:ef7eb2e8f9f7	2602	}
<>	144:ef7eb2e8f9f7	2603	/* Reset bit 0 */
<>	144:ef7eb2e8f9f7	2604	hcryp->Init.pScratch[15] &= 0xfe;
<>	144:ef7eb2e8f9f7	2605
<>	144:ef7eb2e8f9f7	2606	/* Select payload phase once the header phase is performed */
<>	144:ef7eb2e8f9f7	2607	__HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD);
<>	144:ef7eb2e8f9f7	2608
<>	144:ef7eb2e8f9f7	2609	/* Flush FIFO */
<>	144:ef7eb2e8f9f7	2610	__HAL_CRYP_FIFO_FLUSH(hcryp);
<>	144:ef7eb2e8f9f7	2611
<>	144:ef7eb2e8f9f7	2612	/* Set the phase */
<>	144:ef7eb2e8f9f7	2613	hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
<>	144:ef7eb2e8f9f7	2614	}
<>	144:ef7eb2e8f9f7	2615
<>	144:ef7eb2e8f9f7	2616	/* Set the input and output addresses and start DMA transfer */
<>	144:ef7eb2e8f9f7	2617	CRYPEx_GCMCCM_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
<>	144:ef7eb2e8f9f7	2618
<>	144:ef7eb2e8f9f7	2619	/* Unlock process */
<>	144:ef7eb2e8f9f7	2620	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	2621
<>	144:ef7eb2e8f9f7	2622	/* Return function status */
<>	144:ef7eb2e8f9f7	2623	return HAL_OK;
<>	144:ef7eb2e8f9f7	2624	}
<>	144:ef7eb2e8f9f7	2625	else
<>	144:ef7eb2e8f9f7	2626	{
<>	144:ef7eb2e8f9f7	2627	return HAL_ERROR;
<>	144:ef7eb2e8f9f7	2628	}
<>	144:ef7eb2e8f9f7	2629	}
<>	144:ef7eb2e8f9f7	2630
<>	144:ef7eb2e8f9f7	2631	/**
<>	144:ef7eb2e8f9f7	2632	* @brief Initializes the CRYP peripheral in AES GCM decryption mode using DMA.
<>	144:ef7eb2e8f9f7	2633	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	144:ef7eb2e8f9f7	2634	* the configuration information for CRYP module
<>	144:ef7eb2e8f9f7	2635	* @param pCypherData: Pointer to the cyphertext buffer.
<>	144:ef7eb2e8f9f7	2636	* @param Size: Length of the cyphertext buffer, must be a multiple of 16
<>	144:ef7eb2e8f9f7	2637	* @param pPlainData: Pointer to the plaintext buffer
<>	144:ef7eb2e8f9f7	2638	* @retval HAL status
<>	144:ef7eb2e8f9f7	2639	*/
<>	144:ef7eb2e8f9f7	2640	HAL_StatusTypeDef HAL_CRYPEx_AESGCM_Decrypt_DMA(CRYP_HandleTypeDef hcryp, uint8_t pCypherData, uint16_t Size, uint8_t *pPlainData)
<>	144:ef7eb2e8f9f7	2641	{
<>	144:ef7eb2e8f9f7	2642	uint32_t tickstart = 0;
<>	144:ef7eb2e8f9f7	2643	uint32_t inputaddr;
<>	144:ef7eb2e8f9f7	2644	uint32_t outputaddr;
<>	144:ef7eb2e8f9f7	2645
<>	144:ef7eb2e8f9f7	2646	if((hcryp->State == HAL_CRYP_STATE_READY) \|\| (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
<>	144:ef7eb2e8f9f7	2647	{
<>	144:ef7eb2e8f9f7	2648	/* Process Locked */
<>	144:ef7eb2e8f9f7	2649	__HAL_LOCK(hcryp);
<>	144:ef7eb2e8f9f7	2650
<>	144:ef7eb2e8f9f7	2651	inputaddr = (uint32_t)pCypherData;
<>	144:ef7eb2e8f9f7	2652	outputaddr = (uint32_t)pPlainData;
<>	144:ef7eb2e8f9f7	2653
<>	144:ef7eb2e8f9f7	2654	/* Change the CRYP peripheral state */
<>	144:ef7eb2e8f9f7	2655	hcryp->State = HAL_CRYP_STATE_BUSY;
<>	144:ef7eb2e8f9f7	2656
<>	144:ef7eb2e8f9f7	2657	/* Check if initialization phase has already been performed */
<>	144:ef7eb2e8f9f7	2658	if(hcryp->Phase == HAL_CRYP_PHASE_READY)
<>	144:ef7eb2e8f9f7	2659	{
<>	144:ef7eb2e8f9f7	2660	/* Set the key */
<>	144:ef7eb2e8f9f7	2661	CRYPEx_GCMCCM_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
<>	144:ef7eb2e8f9f7	2662
<>	144:ef7eb2e8f9f7	2663	/* Set the CRYP peripheral in AES GCM decryption mode */
<>	144:ef7eb2e8f9f7	2664	__HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_GCM_DECRYPT);
<>	144:ef7eb2e8f9f7	2665
<>	144:ef7eb2e8f9f7	2666	/* Set the Initialization Vector */
<>	144:ef7eb2e8f9f7	2667	CRYPEx_GCMCCM_SetInitVector(hcryp, hcryp->Init.pInitVect);
<>	144:ef7eb2e8f9f7	2668
<>	144:ef7eb2e8f9f7	2669	/* Enable CRYP to start the init phase */
<>	144:ef7eb2e8f9f7	2670	__HAL_CRYP_ENABLE(hcryp);
<>	144:ef7eb2e8f9f7	2671
<>	144:ef7eb2e8f9f7	2672	/* Get tick */
<>	144:ef7eb2e8f9f7	2673	tickstart = HAL_GetTick();
<>	144:ef7eb2e8f9f7	2674
<>	144:ef7eb2e8f9f7	2675	while((CRYP->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN)
<>	144:ef7eb2e8f9f7	2676	{
<>	144:ef7eb2e8f9f7	2677	/* Check for the Timeout */
<>	144:ef7eb2e8f9f7	2678	if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE)
<>	144:ef7eb2e8f9f7	2679	{
<>	144:ef7eb2e8f9f7	2680	/* Change state */
<>	144:ef7eb2e8f9f7	2681	hcryp->State = HAL_CRYP_STATE_TIMEOUT;
<>	144:ef7eb2e8f9f7	2682
<>	144:ef7eb2e8f9f7	2683	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	2684	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	2685
<>	144:ef7eb2e8f9f7	2686	return HAL_TIMEOUT;
<>	144:ef7eb2e8f9f7	2687	}
<>	144:ef7eb2e8f9f7	2688	}
<>	144:ef7eb2e8f9f7	2689
<>	144:ef7eb2e8f9f7	2690	/* Set the header phase */
<>	144:ef7eb2e8f9f7	2691	if(CRYPEx_GCMCCM_SetHeaderPhase(hcryp, hcryp->Init.Header, hcryp->Init.HeaderSize, 1) != HAL_OK)
<>	144:ef7eb2e8f9f7	2692	{
<>	144:ef7eb2e8f9f7	2693	return HAL_TIMEOUT;
<>	144:ef7eb2e8f9f7	2694	}
<>	144:ef7eb2e8f9f7	2695	/* Disable the CRYP peripheral */
<>	144:ef7eb2e8f9f7	2696	__HAL_CRYP_DISABLE(hcryp);
<>	144:ef7eb2e8f9f7	2697
<>	144:ef7eb2e8f9f7	2698	/* Select payload phase once the header phase is performed */
<>	144:ef7eb2e8f9f7	2699	__HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD);
<>	144:ef7eb2e8f9f7	2700
<>	144:ef7eb2e8f9f7	2701	/* Set the phase */
<>	144:ef7eb2e8f9f7	2702	hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
<>	144:ef7eb2e8f9f7	2703	}
<>	144:ef7eb2e8f9f7	2704
<>	144:ef7eb2e8f9f7	2705	/* Set the input and output addresses and start DMA transfer */
<>	144:ef7eb2e8f9f7	2706	CRYPEx_GCMCCM_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
<>	144:ef7eb2e8f9f7	2707
<>	144:ef7eb2e8f9f7	2708	/* Unlock process */
<>	144:ef7eb2e8f9f7	2709	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	2710
<>	144:ef7eb2e8f9f7	2711	/* Return function status */
<>	144:ef7eb2e8f9f7	2712	return HAL_OK;
<>	144:ef7eb2e8f9f7	2713	}
<>	144:ef7eb2e8f9f7	2714	else
<>	144:ef7eb2e8f9f7	2715	{
<>	144:ef7eb2e8f9f7	2716	return HAL_ERROR;
<>	144:ef7eb2e8f9f7	2717	}
<>	144:ef7eb2e8f9f7	2718	}
<>	144:ef7eb2e8f9f7	2719
<>	144:ef7eb2e8f9f7	2720	/**
<>	144:ef7eb2e8f9f7	2721	* @brief Initializes the CRYP peripheral in AES CCM decryption mode using DMA
<>	144:ef7eb2e8f9f7	2722	* then decrypted pCypherData. The cypher data are available in pPlainData.
<>	144:ef7eb2e8f9f7	2723	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	144:ef7eb2e8f9f7	2724	* the configuration information for CRYP module
<>	144:ef7eb2e8f9f7	2725	* @param pCypherData: Pointer to the cyphertext buffer
<>	144:ef7eb2e8f9f7	2726	* @param Size: Length of the plaintext buffer, must be a multiple of 16
<>	144:ef7eb2e8f9f7	2727	* @param pPlainData: Pointer to the plaintext buffer
<>	144:ef7eb2e8f9f7	2728	* @retval HAL status
<>	144:ef7eb2e8f9f7	2729	*/
<>	144:ef7eb2e8f9f7	2730	HAL_StatusTypeDef HAL_CRYPEx_AESCCM_Decrypt_DMA(CRYP_HandleTypeDef hcryp, uint8_t pCypherData, uint16_t Size, uint8_t *pPlainData)
<>	144:ef7eb2e8f9f7	2731	{
<>	144:ef7eb2e8f9f7	2732	uint32_t tickstart = 0;
<>	144:ef7eb2e8f9f7	2733	uint32_t inputaddr;
<>	144:ef7eb2e8f9f7	2734	uint32_t outputaddr;
<>	144:ef7eb2e8f9f7	2735	uint32_t headersize;
<>	144:ef7eb2e8f9f7	2736	uint32_t headeraddr;
<>	144:ef7eb2e8f9f7	2737	uint32_t loopcounter = 0;
<>	144:ef7eb2e8f9f7	2738	uint32_t bufferidx = 0;
<>	144:ef7eb2e8f9f7	2739	uint8_t blockb0[16] = {0};/* Block B0 */
<>	144:ef7eb2e8f9f7	2740	uint8_t ctr[16] = {0}; /* Counter */
<>	144:ef7eb2e8f9f7	2741	uint32_t b0addr = (uint32_t)blockb0;
<>	144:ef7eb2e8f9f7	2742
<>	144:ef7eb2e8f9f7	2743	if((hcryp->State == HAL_CRYP_STATE_READY) \|\| (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
<>	144:ef7eb2e8f9f7	2744	{
<>	144:ef7eb2e8f9f7	2745	/* Process Locked */
<>	144:ef7eb2e8f9f7	2746	__HAL_LOCK(hcryp);
<>	144:ef7eb2e8f9f7	2747
<>	144:ef7eb2e8f9f7	2748	inputaddr = (uint32_t)pCypherData;
<>	144:ef7eb2e8f9f7	2749	outputaddr = (uint32_t)pPlainData;
<>	144:ef7eb2e8f9f7	2750
<>	144:ef7eb2e8f9f7	2751	headersize = hcryp->Init.HeaderSize;
<>	144:ef7eb2e8f9f7	2752	headeraddr = (uint32_t)hcryp->Init.Header;
<>	144:ef7eb2e8f9f7	2753
<>	144:ef7eb2e8f9f7	2754	hcryp->CrypInCount = Size;
<>	144:ef7eb2e8f9f7	2755	hcryp->pCrypInBuffPtr = pCypherData;
<>	144:ef7eb2e8f9f7	2756	hcryp->pCrypOutBuffPtr = pPlainData;
<>	144:ef7eb2e8f9f7	2757	hcryp->CrypOutCount = Size;
<>	144:ef7eb2e8f9f7	2758
<>	144:ef7eb2e8f9f7	2759	/* Change the CRYP peripheral state */
<>	144:ef7eb2e8f9f7	2760	hcryp->State = HAL_CRYP_STATE_BUSY;
<>	144:ef7eb2e8f9f7	2761
<>	144:ef7eb2e8f9f7	2762	/* Check if initialization phase has already been performed */
<>	144:ef7eb2e8f9f7	2763	if(hcryp->Phase == HAL_CRYP_PHASE_READY)
<>	144:ef7eb2e8f9f7	2764	{
<>	144:ef7eb2e8f9f7	2765	/********************** Formatting the header block *****************/
<>	144:ef7eb2e8f9f7	2766	if(headersize != 0)
<>	144:ef7eb2e8f9f7	2767	{
<>	144:ef7eb2e8f9f7	2768	/* Check that the associated data (or header) length is lower than 2^16 - 2^8 = 65536 - 256 = 65280 */
<>	144:ef7eb2e8f9f7	2769	if(headersize < 65280)
<>	144:ef7eb2e8f9f7	2770	{
<>	144:ef7eb2e8f9f7	2771	hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize >> 8) & 0xFFU);
<>	144:ef7eb2e8f9f7	2772	hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize) & 0xFFU);
<>	144:ef7eb2e8f9f7	2773	headersize += 2;
<>	144:ef7eb2e8f9f7	2774	}
<>	144:ef7eb2e8f9f7	2775	else
<>	144:ef7eb2e8f9f7	2776	{
<>	144:ef7eb2e8f9f7	2777	/* Header is encoded as 0xff \|\| 0xfe \|\| [headersize]32, i.e., six octets */
<>	144:ef7eb2e8f9f7	2778	hcryp->Init.pScratch[bufferidx++] = 0xFFU;
<>	144:ef7eb2e8f9f7	2779	hcryp->Init.pScratch[bufferidx++] = 0xFEU;
<>	144:ef7eb2e8f9f7	2780	hcryp->Init.pScratch[bufferidx++] = headersize & 0xff000000U;
<>	144:ef7eb2e8f9f7	2781	hcryp->Init.pScratch[bufferidx++] = headersize & 0x00ff0000U;
<>	144:ef7eb2e8f9f7	2782	hcryp->Init.pScratch[bufferidx++] = headersize & 0x0000ff00U;
<>	144:ef7eb2e8f9f7	2783	hcryp->Init.pScratch[bufferidx++] = headersize & 0x000000ffU;
<>	144:ef7eb2e8f9f7	2784	headersize += 6;
<>	144:ef7eb2e8f9f7	2785	}
<>	144:ef7eb2e8f9f7	2786	/* Copy the header buffer in internal buffer "hcryp->Init.pScratch" */
<>	144:ef7eb2e8f9f7	2787	for(loopcounter = 0; loopcounter < headersize; loopcounter++)
<>	144:ef7eb2e8f9f7	2788	{
<>	144:ef7eb2e8f9f7	2789	hcryp->Init.pScratch[bufferidx++] = hcryp->Init.Header[loopcounter];
<>	144:ef7eb2e8f9f7	2790	}
<>	144:ef7eb2e8f9f7	2791	/* Check if the header size is modulo 16 */
<>	144:ef7eb2e8f9f7	2792	if ((headersize % 16) != 0)
<>	144:ef7eb2e8f9f7	2793	{
<>	144:ef7eb2e8f9f7	2794	/* Padd the header buffer with 0s till the hcryp->Init.pScratch length is modulo 16 */
<>	144:ef7eb2e8f9f7	2795	for(loopcounter = headersize; loopcounter <= ((headersize/16) + 1) * 16; loopcounter++)
<>	144:ef7eb2e8f9f7	2796	{
<>	144:ef7eb2e8f9f7	2797	hcryp->Init.pScratch[loopcounter] = 0;
<>	144:ef7eb2e8f9f7	2798	}
<>	144:ef7eb2e8f9f7	2799	/* Set the header size to modulo 16 */
<>	144:ef7eb2e8f9f7	2800	headersize = ((headersize/16) + 1) * 16;
<>	144:ef7eb2e8f9f7	2801	}
<>	144:ef7eb2e8f9f7	2802	/* Set the pointer headeraddr to hcryp->Init.pScratch */
<>	144:ef7eb2e8f9f7	2803	headeraddr = (uint32_t)hcryp->Init.pScratch;
<>	144:ef7eb2e8f9f7	2804	}
<>	144:ef7eb2e8f9f7	2805	/********************* Formatting the block B0 **********************/
<>	144:ef7eb2e8f9f7	2806	if(headersize != 0)
<>	144:ef7eb2e8f9f7	2807	{
<>	144:ef7eb2e8f9f7	2808	blockb0[0] = 0x40;
<>	144:ef7eb2e8f9f7	2809	}
<>	144:ef7eb2e8f9f7	2810	/* Flags byte */
<>	144:ef7eb2e8f9f7	2811	/* blockb0[0] \|= 0u \| (((( (uint8_t) hcryp->Init.TagSize - 2) / 2) & 0x07 ) << 3 ) \| ( ( (uint8_t) (15 - hcryp->Init.IVSize) - 1) & 0x07) */
<>	144:ef7eb2e8f9f7	2812	blockb0[0] \|= (uint8_t)((uint8_t)((uint8_t)(((uint8_t)(hcryp->Init.TagSize - (uint8_t)(2))) >> 1) & (uint8_t)0x07 ) << 3);
<>	144:ef7eb2e8f9f7	2813	blockb0[0] \|= (uint8_t)((uint8_t)((uint8_t)((uint8_t)(15) - hcryp->Init.IVSize) - (uint8_t)1) & (uint8_t)0x07);
<>	144:ef7eb2e8f9f7	2814
<>	144:ef7eb2e8f9f7	2815	for (loopcounter = 0; loopcounter < hcryp->Init.IVSize; loopcounter++)
<>	144:ef7eb2e8f9f7	2816	{
<>	144:ef7eb2e8f9f7	2817	blockb0[loopcounter+1] = hcryp->Init.pInitVect[loopcounter];
<>	144:ef7eb2e8f9f7	2818	}
<>	144:ef7eb2e8f9f7	2819	for ( ; loopcounter < 13; loopcounter++)
<>	144:ef7eb2e8f9f7	2820	{
<>	144:ef7eb2e8f9f7	2821	blockb0[loopcounter+1] = 0;
<>	144:ef7eb2e8f9f7	2822	}
<>	144:ef7eb2e8f9f7	2823
<>	144:ef7eb2e8f9f7	2824	blockb0[14] = (Size >> 8);
<>	144:ef7eb2e8f9f7	2825	blockb0[15] = (Size & 0xFF);
<>	144:ef7eb2e8f9f7	2826
<>	144:ef7eb2e8f9f7	2827	/*********************** Formatting the initial counter *************/
<>	144:ef7eb2e8f9f7	2828	/* Byte 0:
<>	144:ef7eb2e8f9f7	2829	Bits 7 and 6 are reserved and shall be set to 0
<>	144:ef7eb2e8f9f7	2830	Bits 3, 4, and 5 shall also be set to 0, to ensure that all the counter
<>	144:ef7eb2e8f9f7	2831	blocks are distinct from B0
<>	144:ef7eb2e8f9f7	2832	Bits 0, 1, and 2 contain the same encoding of q as in B0
<>	144:ef7eb2e8f9f7	2833	*/
<>	144:ef7eb2e8f9f7	2834	ctr[0] = blockb0[0] & 0x07;
<>	144:ef7eb2e8f9f7	2835	/* byte 1 to NonceSize is the IV (Nonce) */
<>	144:ef7eb2e8f9f7	2836	for(loopcounter = 1; loopcounter < hcryp->Init.IVSize + 1; loopcounter++)
<>	144:ef7eb2e8f9f7	2837	{
<>	144:ef7eb2e8f9f7	2838	ctr[loopcounter] = blockb0[loopcounter];
<>	144:ef7eb2e8f9f7	2839	}
<>	144:ef7eb2e8f9f7	2840	/* Set the LSB to 1 */
<>	144:ef7eb2e8f9f7	2841	ctr[15] \|= 0x01;
<>	144:ef7eb2e8f9f7	2842
<>	144:ef7eb2e8f9f7	2843	/* Set the key */
<>	144:ef7eb2e8f9f7	2844	CRYPEx_GCMCCM_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
<>	144:ef7eb2e8f9f7	2845
<>	144:ef7eb2e8f9f7	2846	/* Set the CRYP peripheral in AES CCM mode */
<>	144:ef7eb2e8f9f7	2847	__HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CCM_DECRYPT);
<>	144:ef7eb2e8f9f7	2848
<>	144:ef7eb2e8f9f7	2849	/* Set the Initialization Vector */
<>	144:ef7eb2e8f9f7	2850	CRYPEx_GCMCCM_SetInitVector(hcryp, ctr);
<>	144:ef7eb2e8f9f7	2851
<>	144:ef7eb2e8f9f7	2852	/* Select init phase */
<>	144:ef7eb2e8f9f7	2853	__HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT);
<>	144:ef7eb2e8f9f7	2854
<>	144:ef7eb2e8f9f7	2855	b0addr = (uint32_t)blockb0;
<>	144:ef7eb2e8f9f7	2856	/* Write the blockb0 block in the IN FIFO */
<>	144:ef7eb2e8f9f7	2857	hcryp->Instance->DR = (uint32_t)(b0addr);
<>	144:ef7eb2e8f9f7	2858	b0addr+=4;
<>	144:ef7eb2e8f9f7	2859	hcryp->Instance->DR = (uint32_t)(b0addr);
<>	144:ef7eb2e8f9f7	2860	b0addr+=4;
<>	144:ef7eb2e8f9f7	2861	hcryp->Instance->DR = (uint32_t)(b0addr);
<>	144:ef7eb2e8f9f7	2862	b0addr+=4;
<>	144:ef7eb2e8f9f7	2863	hcryp->Instance->DR = (uint32_t)(b0addr);
<>	144:ef7eb2e8f9f7	2864
<>	144:ef7eb2e8f9f7	2865	/* Enable the CRYP peripheral */
<>	144:ef7eb2e8f9f7	2866	__HAL_CRYP_ENABLE(hcryp);
<>	144:ef7eb2e8f9f7	2867
<>	144:ef7eb2e8f9f7	2868	/* Get tick */
<>	144:ef7eb2e8f9f7	2869	tickstart = HAL_GetTick();
<>	144:ef7eb2e8f9f7	2870
<>	144:ef7eb2e8f9f7	2871	while((CRYP->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN)
<>	144:ef7eb2e8f9f7	2872	{
<>	144:ef7eb2e8f9f7	2873	/* Check for the Timeout */
<>	144:ef7eb2e8f9f7	2874
<>	144:ef7eb2e8f9f7	2875	if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE)
<>	144:ef7eb2e8f9f7	2876	{
<>	144:ef7eb2e8f9f7	2877	/* Change state */
<>	144:ef7eb2e8f9f7	2878	hcryp->State = HAL_CRYP_STATE_TIMEOUT;
<>	144:ef7eb2e8f9f7	2879
<>	144:ef7eb2e8f9f7	2880	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	2881	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	2882
<>	144:ef7eb2e8f9f7	2883	return HAL_TIMEOUT;
<>	144:ef7eb2e8f9f7	2884
<>	144:ef7eb2e8f9f7	2885	}
<>	144:ef7eb2e8f9f7	2886	}
<>	144:ef7eb2e8f9f7	2887	/*************************** Header phase ***************************/
<>	144:ef7eb2e8f9f7	2888	if(headersize != 0)
<>	144:ef7eb2e8f9f7	2889	{
<>	144:ef7eb2e8f9f7	2890	/* Select header phase */
<>	144:ef7eb2e8f9f7	2891	__HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER);
<>	144:ef7eb2e8f9f7	2892
<>	144:ef7eb2e8f9f7	2893	/* Enable Crypto processor */
<>	144:ef7eb2e8f9f7	2894	__HAL_CRYP_ENABLE(hcryp);
<>	144:ef7eb2e8f9f7	2895
<>	144:ef7eb2e8f9f7	2896	for(loopcounter = 0; (loopcounter < headersize); loopcounter+=16)
<>	144:ef7eb2e8f9f7	2897	{
<>	144:ef7eb2e8f9f7	2898	/* Get tick */
<>	144:ef7eb2e8f9f7	2899	tickstart = HAL_GetTick();
<>	144:ef7eb2e8f9f7	2900
<>	144:ef7eb2e8f9f7	2901	while(HAL_IS_BIT_CLR(hcryp->Instance->SR, CRYP_FLAG_IFEM))
<>	144:ef7eb2e8f9f7	2902	{
<>	144:ef7eb2e8f9f7	2903	/* Check for the Timeout */
<>	144:ef7eb2e8f9f7	2904	if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE)
<>	144:ef7eb2e8f9f7	2905	{
<>	144:ef7eb2e8f9f7	2906	/* Change state */
<>	144:ef7eb2e8f9f7	2907	hcryp->State = HAL_CRYP_STATE_TIMEOUT;
<>	144:ef7eb2e8f9f7	2908
<>	144:ef7eb2e8f9f7	2909	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	2910	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	2911
<>	144:ef7eb2e8f9f7	2912	return HAL_TIMEOUT;
<>	144:ef7eb2e8f9f7	2913	}
<>	144:ef7eb2e8f9f7	2914	}
<>	144:ef7eb2e8f9f7	2915	/* Write the header block in the IN FIFO */
<>	144:ef7eb2e8f9f7	2916	hcryp->Instance->DR = (uint32_t)(headeraddr);
<>	144:ef7eb2e8f9f7	2917	headeraddr+=4;
<>	144:ef7eb2e8f9f7	2918	hcryp->Instance->DR = (uint32_t)(headeraddr);
<>	144:ef7eb2e8f9f7	2919	headeraddr+=4;
<>	144:ef7eb2e8f9f7	2920	hcryp->Instance->DR = (uint32_t)(headeraddr);
<>	144:ef7eb2e8f9f7	2921	headeraddr+=4;
<>	144:ef7eb2e8f9f7	2922	hcryp->Instance->DR = (uint32_t)(headeraddr);
<>	144:ef7eb2e8f9f7	2923	headeraddr+=4;
<>	144:ef7eb2e8f9f7	2924	}
<>	144:ef7eb2e8f9f7	2925
<>	144:ef7eb2e8f9f7	2926	/* Get tick */
<>	144:ef7eb2e8f9f7	2927	tickstart = HAL_GetTick();
<>	144:ef7eb2e8f9f7	2928
<>	144:ef7eb2e8f9f7	2929	while((hcryp->Instance->SR & CRYP_FLAG_BUSY) == CRYP_FLAG_BUSY)
<>	144:ef7eb2e8f9f7	2930	{
<>	144:ef7eb2e8f9f7	2931	/* Check for the Timeout */
<>	144:ef7eb2e8f9f7	2932	if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE)
<>	144:ef7eb2e8f9f7	2933	{
<>	144:ef7eb2e8f9f7	2934	/* Change state */
<>	144:ef7eb2e8f9f7	2935	hcryp->State = HAL_CRYP_STATE_TIMEOUT;
<>	144:ef7eb2e8f9f7	2936
<>	144:ef7eb2e8f9f7	2937	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	2938	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	2939
<>	144:ef7eb2e8f9f7	2940	return HAL_TIMEOUT;
<>	144:ef7eb2e8f9f7	2941	}
<>	144:ef7eb2e8f9f7	2942	}
<>	144:ef7eb2e8f9f7	2943	}
<>	144:ef7eb2e8f9f7	2944	/* Save formatted counter into the scratch buffer pScratch */
<>	144:ef7eb2e8f9f7	2945	for(loopcounter = 0; (loopcounter < 16); loopcounter++)
<>	144:ef7eb2e8f9f7	2946	{
<>	144:ef7eb2e8f9f7	2947	hcryp->Init.pScratch[loopcounter] = ctr[loopcounter];
<>	144:ef7eb2e8f9f7	2948	}
<>	144:ef7eb2e8f9f7	2949	/* Reset bit 0 */
<>	144:ef7eb2e8f9f7	2950	hcryp->Init.pScratch[15] &= 0xfe;
<>	144:ef7eb2e8f9f7	2951	/* Select payload phase once the header phase is performed */
<>	144:ef7eb2e8f9f7	2952	__HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD);
<>	144:ef7eb2e8f9f7	2953
<>	144:ef7eb2e8f9f7	2954	/* Flush FIFO */
<>	144:ef7eb2e8f9f7	2955	__HAL_CRYP_FIFO_FLUSH(hcryp);
<>	144:ef7eb2e8f9f7	2956
<>	144:ef7eb2e8f9f7	2957	/* Set the phase */
<>	144:ef7eb2e8f9f7	2958	hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
<>	144:ef7eb2e8f9f7	2959	}
<>	144:ef7eb2e8f9f7	2960	/* Set the input and output addresses and start DMA transfer */
<>	144:ef7eb2e8f9f7	2961	CRYPEx_GCMCCM_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
<>	144:ef7eb2e8f9f7	2962
<>	144:ef7eb2e8f9f7	2963	/* Unlock process */
<>	144:ef7eb2e8f9f7	2964	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	2965
<>	144:ef7eb2e8f9f7	2966	/* Return function status */
<>	144:ef7eb2e8f9f7	2967	return HAL_OK;
<>	144:ef7eb2e8f9f7	2968	}
<>	144:ef7eb2e8f9f7	2969	else
<>	144:ef7eb2e8f9f7	2970	{
<>	144:ef7eb2e8f9f7	2971	return HAL_ERROR;
<>	144:ef7eb2e8f9f7	2972	}
<>	144:ef7eb2e8f9f7	2973	}
<>	144:ef7eb2e8f9f7	2974
<>	144:ef7eb2e8f9f7	2975	/**
<>	144:ef7eb2e8f9f7	2976	* @}
<>	144:ef7eb2e8f9f7	2977	*/
<>	144:ef7eb2e8f9f7	2978
<>	144:ef7eb2e8f9f7	2979	/** @defgroup CRYPEx_Exported_Functions_Group2 CRYPEx IRQ handler management
<>	144:ef7eb2e8f9f7	2980	* @brief CRYPEx IRQ handler.
<>	144:ef7eb2e8f9f7	2981	*
<>	144:ef7eb2e8f9f7	2982	@verbatim
<>	144:ef7eb2e8f9f7	2983	==============================================================================
<>	144:ef7eb2e8f9f7	2984	##### CRYPEx IRQ handler management #####
<>	144:ef7eb2e8f9f7	2985	==============================================================================
<>	144:ef7eb2e8f9f7	2986	[..] This section provides CRYPEx IRQ handler function.
<>	144:ef7eb2e8f9f7	2987
<>	144:ef7eb2e8f9f7	2988	@endverbatim
<>	144:ef7eb2e8f9f7	2989	* @{
<>	144:ef7eb2e8f9f7	2990	*/
<>	144:ef7eb2e8f9f7	2991
<>	144:ef7eb2e8f9f7	2992	/**
<>	144:ef7eb2e8f9f7	2993	* @brief This function handles CRYPEx interrupt request.
<>	144:ef7eb2e8f9f7	2994	* @param hcryp: pointer to a CRYPEx_HandleTypeDef structure that contains
<>	144:ef7eb2e8f9f7	2995	* the configuration information for CRYP module
<>	144:ef7eb2e8f9f7	2996	* @retval None
<>	144:ef7eb2e8f9f7	2997	*/
<>	144:ef7eb2e8f9f7	2998	void HAL_CRYPEx_GCMCCM_IRQHandler(CRYP_HandleTypeDef *hcryp)
<>	144:ef7eb2e8f9f7	2999	{
<>	144:ef7eb2e8f9f7	3000	switch(CRYP->CR & CRYP_CR_ALGOMODE_DIRECTION)
<>	144:ef7eb2e8f9f7	3001	{
<>	144:ef7eb2e8f9f7	3002	case CRYP_CR_ALGOMODE_AES_GCM_ENCRYPT:
<>	144:ef7eb2e8f9f7	3003	HAL_CRYPEx_AESGCM_Encrypt_IT(hcryp, NULL, 0, NULL);
<>	144:ef7eb2e8f9f7	3004	break;
<>	144:ef7eb2e8f9f7	3005
<>	144:ef7eb2e8f9f7	3006	case CRYP_CR_ALGOMODE_AES_GCM_DECRYPT:
<>	144:ef7eb2e8f9f7	3007	HAL_CRYPEx_AESGCM_Decrypt_IT(hcryp, NULL, 0, NULL);
<>	144:ef7eb2e8f9f7	3008	break;
<>	144:ef7eb2e8f9f7	3009
<>	144:ef7eb2e8f9f7	3010	case CRYP_CR_ALGOMODE_AES_CCM_ENCRYPT:
<>	144:ef7eb2e8f9f7	3011	HAL_CRYPEx_AESCCM_Encrypt_IT(hcryp, NULL, 0, NULL);
<>	144:ef7eb2e8f9f7	3012	break;
<>	144:ef7eb2e8f9f7	3013
<>	144:ef7eb2e8f9f7	3014	case CRYP_CR_ALGOMODE_AES_CCM_DECRYPT:
<>	144:ef7eb2e8f9f7	3015	HAL_CRYPEx_AESCCM_Decrypt_IT(hcryp, NULL, 0, NULL);
<>	144:ef7eb2e8f9f7	3016	break;
<>	144:ef7eb2e8f9f7	3017
<>	144:ef7eb2e8f9f7	3018	default:
<>	144:ef7eb2e8f9f7	3019	break;
<>	144:ef7eb2e8f9f7	3020	}
<>	144:ef7eb2e8f9f7	3021	}
<>	144:ef7eb2e8f9f7	3022
<>	144:ef7eb2e8f9f7	3023	/**
<>	144:ef7eb2e8f9f7	3024	* @}
<>	144:ef7eb2e8f9f7	3025	*/
<>	144:ef7eb2e8f9f7	3026
<>	144:ef7eb2e8f9f7	3027	/**
<>	144:ef7eb2e8f9f7	3028	* @}
<>	144:ef7eb2e8f9f7	3029	*/
<>	144:ef7eb2e8f9f7	3030	#endif /* HAL_CRYP_MODULE_ENABLED */
<>	144:ef7eb2e8f9f7	3031
<>	144:ef7eb2e8f9f7	3032	/**
<>	144:ef7eb2e8f9f7	3033	* @}
<>	144:ef7eb2e8f9f7	3034	*/
<>	144:ef7eb2e8f9f7	3035	#endif /* STM32F756xx \|\| STM32F777xx \|\| STM32F779xx */
<>	144:ef7eb2e8f9f7	3036	/**
<>	144:ef7eb2e8f9f7	3037	* @}
<>	144:ef7eb2e8f9f7	3038	*/
<>	144:ef7eb2e8f9f7	3039
<>	144:ef7eb2e8f9f7	3040	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/

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Type:	Library
Created:	10 Sep 2016
Imports:	1
Forks:	0
Commits:	148
Dependents:	0
Dependencies:	0
Followers:	1

targets/cmsis/TARGET_STM/TARGET_STM32F7/stm32f7xx_hal_cryp_ex.c@147:ba84b7dc41a7, 2016-09-10 (annotated)

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