added prescaler for 16 bit pwm in LPC1347 target

Fork of mbed-dev by mbed official

Committer:
JojoS
Date:
Sat Sep 10 15:32:04 2016 +0000
Revision:
147:ba84b7dc41a7
Parent:
144:ef7eb2e8f9f7
added prescaler for 16 bit timers (solution as in LPC11xx), default prescaler 31 for max 28 ms period time

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file stm32f7xx_hal.c
<> 144:ef7eb2e8f9f7 4 * @author MCD Application Team
<> 144:ef7eb2e8f9f7 5 * @version V1.1.0
<> 144:ef7eb2e8f9f7 6 * @date 22-April-2016
<> 144:ef7eb2e8f9f7 7 * @brief HAL module driver.
<> 144:ef7eb2e8f9f7 8 * This is the common part of the HAL initialization
<> 144:ef7eb2e8f9f7 9 *
<> 144:ef7eb2e8f9f7 10 @verbatim
<> 144:ef7eb2e8f9f7 11 ==============================================================================
<> 144:ef7eb2e8f9f7 12 ##### How to use this driver #####
<> 144:ef7eb2e8f9f7 13 ==============================================================================
<> 144:ef7eb2e8f9f7 14 [..]
<> 144:ef7eb2e8f9f7 15 The common HAL driver contains a set of generic and common APIs that can be
<> 144:ef7eb2e8f9f7 16 used by the PPP peripheral drivers and the user to start using the HAL.
<> 144:ef7eb2e8f9f7 17 [..]
<> 144:ef7eb2e8f9f7 18 The HAL contains two APIs' categories:
<> 144:ef7eb2e8f9f7 19 (+) Common HAL APIs
<> 144:ef7eb2e8f9f7 20 (+) Services HAL APIs
<> 144:ef7eb2e8f9f7 21
<> 144:ef7eb2e8f9f7 22 @endverbatim
<> 144:ef7eb2e8f9f7 23 ******************************************************************************
<> 144:ef7eb2e8f9f7 24 * @attention
<> 144:ef7eb2e8f9f7 25 *
<> 144:ef7eb2e8f9f7 26 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 144:ef7eb2e8f9f7 27 *
<> 144:ef7eb2e8f9f7 28 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 29 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 30 * 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 31 * this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 32 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 33 * this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 34 * and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 35 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 36 * may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 37 * without specific prior written permission.
<> 144:ef7eb2e8f9f7 38 *
<> 144:ef7eb2e8f9f7 39 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 40 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 41 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 42 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 43 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 44 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 45 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 46 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 47 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 48 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 49 *
<> 144:ef7eb2e8f9f7 50 ******************************************************************************
<> 144:ef7eb2e8f9f7 51 */
<> 144:ef7eb2e8f9f7 52
<> 144:ef7eb2e8f9f7 53 /* Includes ------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 54 #include "stm32f7xx_hal.h"
<> 144:ef7eb2e8f9f7 55
<> 144:ef7eb2e8f9f7 56 /** @addtogroup STM32F7xx_HAL_Driver
<> 144:ef7eb2e8f9f7 57 * @{
<> 144:ef7eb2e8f9f7 58 */
<> 144:ef7eb2e8f9f7 59
<> 144:ef7eb2e8f9f7 60 /** @defgroup HAL HAL
<> 144:ef7eb2e8f9f7 61 * @brief HAL module driver.
<> 144:ef7eb2e8f9f7 62 * @{
<> 144:ef7eb2e8f9f7 63 */
<> 144:ef7eb2e8f9f7 64
<> 144:ef7eb2e8f9f7 65 /* Private typedef -----------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 66 /* Private define ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 67 /** @addtogroup HAL_Private_Constants
<> 144:ef7eb2e8f9f7 68 * @{
<> 144:ef7eb2e8f9f7 69 */
<> 144:ef7eb2e8f9f7 70 /**
<> 144:ef7eb2e8f9f7 71 * @brief STM32F7xx HAL Driver version number V1.1.0
<> 144:ef7eb2e8f9f7 72 */
<> 144:ef7eb2e8f9f7 73 #define __STM32F7xx_HAL_VERSION_MAIN (0x01) /*!< [31:24] main version */
<> 144:ef7eb2e8f9f7 74 #define __STM32F7xx_HAL_VERSION_SUB1 (0x01) /*!< [23:16] sub1 version */
<> 144:ef7eb2e8f9f7 75 #define __STM32F7xx_HAL_VERSION_SUB2 (0x00) /*!< [15:8] sub2 version */
<> 144:ef7eb2e8f9f7 76 #define __STM32F7xx_HAL_VERSION_RC (0x00) /*!< [7:0] release candidate */
<> 144:ef7eb2e8f9f7 77 #define __STM32F7xx_HAL_VERSION ((__STM32F7xx_HAL_VERSION_MAIN << 24)\
<> 144:ef7eb2e8f9f7 78 |(__STM32F7xx_HAL_VERSION_SUB1 << 16)\
<> 144:ef7eb2e8f9f7 79 |(__STM32F7xx_HAL_VERSION_SUB2 << 8 )\
<> 144:ef7eb2e8f9f7 80 |(__STM32F7xx_HAL_VERSION_RC))
<> 144:ef7eb2e8f9f7 81
<> 144:ef7eb2e8f9f7 82 #define IDCODE_DEVID_MASK ((uint32_t)0x00000FFF)
<> 144:ef7eb2e8f9f7 83 /**
<> 144:ef7eb2e8f9f7 84 * @}
<> 144:ef7eb2e8f9f7 85 */
<> 144:ef7eb2e8f9f7 86
<> 144:ef7eb2e8f9f7 87 /* Private macro -------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 88 /* Private variables ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 89 /** @addtogroup HAL_Private_Variables
<> 144:ef7eb2e8f9f7 90 * @{
<> 144:ef7eb2e8f9f7 91 */
<> 144:ef7eb2e8f9f7 92 __IO uint32_t uwTick;
<> 144:ef7eb2e8f9f7 93 /**
<> 144:ef7eb2e8f9f7 94 * @}
<> 144:ef7eb2e8f9f7 95 */
<> 144:ef7eb2e8f9f7 96
<> 144:ef7eb2e8f9f7 97 /* Private function prototypes -----------------------------------------------*/
<> 144:ef7eb2e8f9f7 98 /* Private functions ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 99
<> 144:ef7eb2e8f9f7 100 /** @defgroup HAL_Exported_Functions HAL Exported Functions
<> 144:ef7eb2e8f9f7 101 * @{
<> 144:ef7eb2e8f9f7 102 */
<> 144:ef7eb2e8f9f7 103
<> 144:ef7eb2e8f9f7 104 /** @defgroup HAL_Exported_Functions_Group1 Initialization and de-initialization Functions
<> 144:ef7eb2e8f9f7 105 * @brief Initialization and de-initialization functions
<> 144:ef7eb2e8f9f7 106 *
<> 144:ef7eb2e8f9f7 107 @verbatim
<> 144:ef7eb2e8f9f7 108 ===============================================================================
<> 144:ef7eb2e8f9f7 109 ##### Initialization and de-initialization functions #####
<> 144:ef7eb2e8f9f7 110 ===============================================================================
<> 144:ef7eb2e8f9f7 111 [..] This section provides functions allowing to:
<> 144:ef7eb2e8f9f7 112 (+) Initializes the Flash interface the NVIC allocation and initial clock
<> 144:ef7eb2e8f9f7 113 configuration. It initializes the systick also when timeout is needed
<> 144:ef7eb2e8f9f7 114 and the backup domain when enabled.
<> 144:ef7eb2e8f9f7 115 (+) de-Initializes common part of the HAL
<> 144:ef7eb2e8f9f7 116 (+) Configure The time base source to have 1ms time base with a dedicated
<> 144:ef7eb2e8f9f7 117 Tick interrupt priority.
<> 144:ef7eb2e8f9f7 118 (++) Systick timer is used by default as source of time base, but user
<> 144:ef7eb2e8f9f7 119 can eventually implement his proper time base source (a general purpose
<> 144:ef7eb2e8f9f7 120 timer for example or other time source), keeping in mind that Time base
<> 144:ef7eb2e8f9f7 121 duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and
<> 144:ef7eb2e8f9f7 122 handled in milliseconds basis.
<> 144:ef7eb2e8f9f7 123 (++) Time base configuration function (HAL_InitTick ()) is called automatically
<> 144:ef7eb2e8f9f7 124 at the beginning of the program after reset by HAL_Init() or at any time
<> 144:ef7eb2e8f9f7 125 when clock is configured, by HAL_RCC_ClockConfig().
<> 144:ef7eb2e8f9f7 126 (++) Source of time base is configured to generate interrupts at regular
<> 144:ef7eb2e8f9f7 127 time intervals. Care must be taken if HAL_Delay() is called from a
<> 144:ef7eb2e8f9f7 128 peripheral ISR process, the Tick interrupt line must have higher priority
<> 144:ef7eb2e8f9f7 129 (numerically lower) than the peripheral interrupt. Otherwise the caller
<> 144:ef7eb2e8f9f7 130 ISR process will be blocked.
<> 144:ef7eb2e8f9f7 131 (++) functions affecting time base configurations are declared as __weak
<> 144:ef7eb2e8f9f7 132 to make override possible in case of other implementations in user file.
<> 144:ef7eb2e8f9f7 133 @endverbatim
<> 144:ef7eb2e8f9f7 134 * @{
<> 144:ef7eb2e8f9f7 135 */
<> 144:ef7eb2e8f9f7 136
<> 144:ef7eb2e8f9f7 137 /**
<> 144:ef7eb2e8f9f7 138 * @brief This function is used to initialize the HAL Library; it must be the first
<> 144:ef7eb2e8f9f7 139 * instruction to be executed in the main program (before to call any other
<> 144:ef7eb2e8f9f7 140 * HAL function), it performs the following:
<> 144:ef7eb2e8f9f7 141 * Configure the Flash prefetch, and instruction cache through ART accelerator.
<> 144:ef7eb2e8f9f7 142 * Configures the SysTick to generate an interrupt each 1 millisecond,
<> 144:ef7eb2e8f9f7 143 * which is clocked by the HSI (at this stage, the clock is not yet
<> 144:ef7eb2e8f9f7 144 * configured and thus the system is running from the internal HSI at 16 MHz).
<> 144:ef7eb2e8f9f7 145 * Set NVIC Group Priority to 4.
<> 144:ef7eb2e8f9f7 146 * Calls the HAL_MspInit() callback function defined in user file
<> 144:ef7eb2e8f9f7 147 * "stm32f7xx_hal_msp.c" to do the global low level hardware initialization
<> 144:ef7eb2e8f9f7 148 *
<> 144:ef7eb2e8f9f7 149 * @note SysTick is used as time base for the HAL_Delay() function, the application
<> 144:ef7eb2e8f9f7 150 * need to ensure that the SysTick time base is always set to 1 millisecond
<> 144:ef7eb2e8f9f7 151 * to have correct HAL operation.
<> 144:ef7eb2e8f9f7 152 * @retval HAL status
<> 144:ef7eb2e8f9f7 153 */
<> 144:ef7eb2e8f9f7 154 HAL_StatusTypeDef HAL_Init(void)
<> 144:ef7eb2e8f9f7 155 {
<> 144:ef7eb2e8f9f7 156 /* Configure Flash prefetch and Instruction cache through ART accelerator */
<> 144:ef7eb2e8f9f7 157 #if (ART_ACCLERATOR_ENABLE != 0)
<> 144:ef7eb2e8f9f7 158 __HAL_FLASH_ART_ENABLE();
<> 144:ef7eb2e8f9f7 159 #endif /* ART_ACCLERATOR_ENABLE */
<> 144:ef7eb2e8f9f7 160
<> 144:ef7eb2e8f9f7 161 /* Set Interrupt Group Priority */
<> 144:ef7eb2e8f9f7 162 HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
<> 144:ef7eb2e8f9f7 163
<> 144:ef7eb2e8f9f7 164 /* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */
<> 144:ef7eb2e8f9f7 165 HAL_InitTick(TICK_INT_PRIORITY);
<> 144:ef7eb2e8f9f7 166
<> 144:ef7eb2e8f9f7 167 /* Init the low level hardware */
<> 144:ef7eb2e8f9f7 168 HAL_MspInit();
<> 144:ef7eb2e8f9f7 169
<> 144:ef7eb2e8f9f7 170 /* Return function status */
<> 144:ef7eb2e8f9f7 171 return HAL_OK;
<> 144:ef7eb2e8f9f7 172 }
<> 144:ef7eb2e8f9f7 173
<> 144:ef7eb2e8f9f7 174 /**
<> 144:ef7eb2e8f9f7 175 * @brief This function de-Initializes common part of the HAL and stops the systick.
<> 144:ef7eb2e8f9f7 176 * This function is optional.
<> 144:ef7eb2e8f9f7 177 * @retval HAL status
<> 144:ef7eb2e8f9f7 178 */
<> 144:ef7eb2e8f9f7 179 HAL_StatusTypeDef HAL_DeInit(void)
<> 144:ef7eb2e8f9f7 180 {
<> 144:ef7eb2e8f9f7 181 /* Reset of all peripherals */
<> 144:ef7eb2e8f9f7 182 __HAL_RCC_APB1_FORCE_RESET();
<> 144:ef7eb2e8f9f7 183 __HAL_RCC_APB1_RELEASE_RESET();
<> 144:ef7eb2e8f9f7 184
<> 144:ef7eb2e8f9f7 185 __HAL_RCC_APB2_FORCE_RESET();
<> 144:ef7eb2e8f9f7 186 __HAL_RCC_APB2_RELEASE_RESET();
<> 144:ef7eb2e8f9f7 187
<> 144:ef7eb2e8f9f7 188 __HAL_RCC_AHB1_FORCE_RESET();
<> 144:ef7eb2e8f9f7 189 __HAL_RCC_AHB1_RELEASE_RESET();
<> 144:ef7eb2e8f9f7 190
<> 144:ef7eb2e8f9f7 191 __HAL_RCC_AHB2_FORCE_RESET();
<> 144:ef7eb2e8f9f7 192 __HAL_RCC_AHB2_RELEASE_RESET();
<> 144:ef7eb2e8f9f7 193
<> 144:ef7eb2e8f9f7 194 __HAL_RCC_AHB3_FORCE_RESET();
<> 144:ef7eb2e8f9f7 195 __HAL_RCC_AHB3_RELEASE_RESET();
<> 144:ef7eb2e8f9f7 196
<> 144:ef7eb2e8f9f7 197 /* De-Init the low level hardware */
<> 144:ef7eb2e8f9f7 198 HAL_MspDeInit();
<> 144:ef7eb2e8f9f7 199
<> 144:ef7eb2e8f9f7 200 /* Return function status */
<> 144:ef7eb2e8f9f7 201 return HAL_OK;
<> 144:ef7eb2e8f9f7 202 }
<> 144:ef7eb2e8f9f7 203
<> 144:ef7eb2e8f9f7 204 /**
<> 144:ef7eb2e8f9f7 205 * @brief Initializes the MSP.
<> 144:ef7eb2e8f9f7 206 * @retval None
<> 144:ef7eb2e8f9f7 207 */
<> 144:ef7eb2e8f9f7 208 __weak void HAL_MspInit(void)
<> 144:ef7eb2e8f9f7 209 {
<> 144:ef7eb2e8f9f7 210 /* NOTE : This function Should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 211 the HAL_MspInit could be implemented in the user file
<> 144:ef7eb2e8f9f7 212 */
<> 144:ef7eb2e8f9f7 213 }
<> 144:ef7eb2e8f9f7 214
<> 144:ef7eb2e8f9f7 215 /**
<> 144:ef7eb2e8f9f7 216 * @brief DeInitializes the MSP.
<> 144:ef7eb2e8f9f7 217 * @retval None
<> 144:ef7eb2e8f9f7 218 */
<> 144:ef7eb2e8f9f7 219 __weak void HAL_MspDeInit(void)
<> 144:ef7eb2e8f9f7 220 {
<> 144:ef7eb2e8f9f7 221 /* NOTE : This function Should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 222 the HAL_MspDeInit could be implemented in the user file
<> 144:ef7eb2e8f9f7 223 */
<> 144:ef7eb2e8f9f7 224 }
<> 144:ef7eb2e8f9f7 225
<> 144:ef7eb2e8f9f7 226 /**
<> 144:ef7eb2e8f9f7 227 * @brief This function configures the source of the time base.
<> 144:ef7eb2e8f9f7 228 * The time source is configured to have 1ms time base with a dedicated
<> 144:ef7eb2e8f9f7 229 * Tick interrupt priority.
<> 144:ef7eb2e8f9f7 230 * @note This function is called automatically at the beginning of program after
<> 144:ef7eb2e8f9f7 231 * reset by HAL_Init() or at any time when clock is reconfigured by HAL_RCC_ClockConfig().
<> 144:ef7eb2e8f9f7 232 * @note In the default implementation, SysTick timer is the source of time base.
<> 144:ef7eb2e8f9f7 233 * It is used to generate interrupts at regular time intervals.
<> 144:ef7eb2e8f9f7 234 * Care must be taken if HAL_Delay() is called from a peripheral ISR process,
<> 144:ef7eb2e8f9f7 235 * The the SysTick interrupt must have higher priority (numerically lower)
<> 144:ef7eb2e8f9f7 236 * than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
<> 144:ef7eb2e8f9f7 237 * The function is declared as __weak to be overwritten in case of other
<> 144:ef7eb2e8f9f7 238 * implementation in user file.
<> 144:ef7eb2e8f9f7 239 * @param TickPriority: Tick interrupt priority.
<> 144:ef7eb2e8f9f7 240 * @retval HAL status
<> 144:ef7eb2e8f9f7 241 */
<> 144:ef7eb2e8f9f7 242 __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
<> 144:ef7eb2e8f9f7 243 {
<> 144:ef7eb2e8f9f7 244 /*Configure the SysTick to have interrupt in 1ms time basis*/
<> 144:ef7eb2e8f9f7 245 HAL_SYSTICK_Config(SystemCoreClock/1000);
<> 144:ef7eb2e8f9f7 246
<> 144:ef7eb2e8f9f7 247 /*Configure the SysTick IRQ priority */
<> 144:ef7eb2e8f9f7 248 HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority ,0);
<> 144:ef7eb2e8f9f7 249
<> 144:ef7eb2e8f9f7 250 /* Return function status */
<> 144:ef7eb2e8f9f7 251 return HAL_OK;
<> 144:ef7eb2e8f9f7 252 }
<> 144:ef7eb2e8f9f7 253
<> 144:ef7eb2e8f9f7 254 /**
<> 144:ef7eb2e8f9f7 255 * @}
<> 144:ef7eb2e8f9f7 256 */
<> 144:ef7eb2e8f9f7 257
<> 144:ef7eb2e8f9f7 258 /** @defgroup HAL_Exported_Functions_Group2 HAL Control functions
<> 144:ef7eb2e8f9f7 259 * @brief HAL Control functions
<> 144:ef7eb2e8f9f7 260 *
<> 144:ef7eb2e8f9f7 261 @verbatim
<> 144:ef7eb2e8f9f7 262 ===============================================================================
<> 144:ef7eb2e8f9f7 263 ##### HAL Control functions #####
<> 144:ef7eb2e8f9f7 264 ===============================================================================
<> 144:ef7eb2e8f9f7 265 [..] This section provides functions allowing to:
<> 144:ef7eb2e8f9f7 266 (+) Provide a tick value in millisecond
<> 144:ef7eb2e8f9f7 267 (+) Provide a blocking delay in millisecond
<> 144:ef7eb2e8f9f7 268 (+) Suspend the time base source interrupt
<> 144:ef7eb2e8f9f7 269 (+) Resume the time base source interrupt
<> 144:ef7eb2e8f9f7 270 (+) Get the HAL API driver version
<> 144:ef7eb2e8f9f7 271 (+) Get the device identifier
<> 144:ef7eb2e8f9f7 272 (+) Get the device revision identifier
<> 144:ef7eb2e8f9f7 273 (+) Enable/Disable Debug module during SLEEP mode
<> 144:ef7eb2e8f9f7 274 (+) Enable/Disable Debug module during STOP mode
<> 144:ef7eb2e8f9f7 275 (+) Enable/Disable Debug module during STANDBY mode
<> 144:ef7eb2e8f9f7 276
<> 144:ef7eb2e8f9f7 277 @endverbatim
<> 144:ef7eb2e8f9f7 278 * @{
<> 144:ef7eb2e8f9f7 279 */
<> 144:ef7eb2e8f9f7 280
<> 144:ef7eb2e8f9f7 281 /**
<> 144:ef7eb2e8f9f7 282 * @brief This function is called to increment a global variable "uwTick"
<> 144:ef7eb2e8f9f7 283 * used as application time base.
<> 144:ef7eb2e8f9f7 284 * @note In the default implementation, this variable is incremented each 1ms
<> 144:ef7eb2e8f9f7 285 * in Systick ISR.
<> 144:ef7eb2e8f9f7 286 * @note This function is declared as __weak to be overwritten in case of other
<> 144:ef7eb2e8f9f7 287 * implementations in user file.
<> 144:ef7eb2e8f9f7 288 * @retval None
<> 144:ef7eb2e8f9f7 289 */
<> 144:ef7eb2e8f9f7 290 __weak void HAL_IncTick(void)
<> 144:ef7eb2e8f9f7 291 {
<> 144:ef7eb2e8f9f7 292 uwTick++;
<> 144:ef7eb2e8f9f7 293 }
<> 144:ef7eb2e8f9f7 294
<> 144:ef7eb2e8f9f7 295 /**
<> 144:ef7eb2e8f9f7 296 * @brief Provides a tick value in millisecond.
<> 144:ef7eb2e8f9f7 297 * @note This function is declared as __weak to be overwritten in case of other
<> 144:ef7eb2e8f9f7 298 * implementations in user file.
<> 144:ef7eb2e8f9f7 299 * @retval tick value
<> 144:ef7eb2e8f9f7 300 */
<> 144:ef7eb2e8f9f7 301 __weak uint32_t HAL_GetTick(void)
<> 144:ef7eb2e8f9f7 302 {
<> 144:ef7eb2e8f9f7 303 return uwTick;
<> 144:ef7eb2e8f9f7 304 }
<> 144:ef7eb2e8f9f7 305
<> 144:ef7eb2e8f9f7 306 /**
<> 144:ef7eb2e8f9f7 307 * @brief This function provides accurate delay (in milliseconds) based
<> 144:ef7eb2e8f9f7 308 * on variable incremented.
<> 144:ef7eb2e8f9f7 309 * @note In the default implementation , SysTick timer is the source of time base.
<> 144:ef7eb2e8f9f7 310 * It is used to generate interrupts at regular time intervals where uwTick
<> 144:ef7eb2e8f9f7 311 * is incremented.
<> 144:ef7eb2e8f9f7 312 * @note This function is declared as __weak to be overwritten in case of other
<> 144:ef7eb2e8f9f7 313 * implementations in user file.
<> 144:ef7eb2e8f9f7 314 * @param Delay: specifies the delay time length, in milliseconds.
<> 144:ef7eb2e8f9f7 315 * @retval None
<> 144:ef7eb2e8f9f7 316 */
<> 144:ef7eb2e8f9f7 317 __weak void HAL_Delay(__IO uint32_t Delay)
<> 144:ef7eb2e8f9f7 318 {
<> 144:ef7eb2e8f9f7 319 uint32_t tickstart = 0;
<> 144:ef7eb2e8f9f7 320 tickstart = HAL_GetTick();
<> 144:ef7eb2e8f9f7 321 while((HAL_GetTick() - tickstart) < Delay)
<> 144:ef7eb2e8f9f7 322 {
<> 144:ef7eb2e8f9f7 323 }
<> 144:ef7eb2e8f9f7 324 }
<> 144:ef7eb2e8f9f7 325
<> 144:ef7eb2e8f9f7 326 /**
<> 144:ef7eb2e8f9f7 327 * @brief Suspend Tick increment.
<> 144:ef7eb2e8f9f7 328 * @note In the default implementation , SysTick timer is the source of time base. It is
<> 144:ef7eb2e8f9f7 329 * used to generate interrupts at regular time intervals. Once HAL_SuspendTick()
<> 144:ef7eb2e8f9f7 330 * is called, the SysTick interrupt will be disabled and so Tick increment
<> 144:ef7eb2e8f9f7 331 * is suspended.
<> 144:ef7eb2e8f9f7 332 * @note This function is declared as __weak to be overwritten in case of other
<> 144:ef7eb2e8f9f7 333 * implementations in user file.
<> 144:ef7eb2e8f9f7 334 * @retval None
<> 144:ef7eb2e8f9f7 335 */
<> 144:ef7eb2e8f9f7 336 __weak void HAL_SuspendTick(void)
<> 144:ef7eb2e8f9f7 337 {
<> 144:ef7eb2e8f9f7 338 /* Disable SysTick Interrupt */
<> 144:ef7eb2e8f9f7 339 SysTick->CTRL &= ~SysTick_CTRL_TICKINT_Msk;
<> 144:ef7eb2e8f9f7 340 }
<> 144:ef7eb2e8f9f7 341
<> 144:ef7eb2e8f9f7 342 /**
<> 144:ef7eb2e8f9f7 343 * @brief Resume Tick increment.
<> 144:ef7eb2e8f9f7 344 * @note In the default implementation , SysTick timer is the source of time base. It is
<> 144:ef7eb2e8f9f7 345 * used to generate interrupts at regular time intervals. Once HAL_ResumeTick()
<> 144:ef7eb2e8f9f7 346 * is called, the SysTick interrupt will be enabled and so Tick increment
<> 144:ef7eb2e8f9f7 347 * is resumed.
<> 144:ef7eb2e8f9f7 348 * @note This function is declared as __weak to be overwritten in case of other
<> 144:ef7eb2e8f9f7 349 * implementations in user file.
<> 144:ef7eb2e8f9f7 350 * @retval None
<> 144:ef7eb2e8f9f7 351 */
<> 144:ef7eb2e8f9f7 352 __weak void HAL_ResumeTick(void)
<> 144:ef7eb2e8f9f7 353 {
<> 144:ef7eb2e8f9f7 354 /* Enable SysTick Interrupt */
<> 144:ef7eb2e8f9f7 355 SysTick->CTRL |= SysTick_CTRL_TICKINT_Msk;
<> 144:ef7eb2e8f9f7 356 }
<> 144:ef7eb2e8f9f7 357
<> 144:ef7eb2e8f9f7 358 /**
<> 144:ef7eb2e8f9f7 359 * @brief Returns the HAL revision
<> 144:ef7eb2e8f9f7 360 * @retval version : 0xXYZR (8bits for each decimal, R for RC)
<> 144:ef7eb2e8f9f7 361 */
<> 144:ef7eb2e8f9f7 362 uint32_t HAL_GetHalVersion(void)
<> 144:ef7eb2e8f9f7 363 {
<> 144:ef7eb2e8f9f7 364 return __STM32F7xx_HAL_VERSION;
<> 144:ef7eb2e8f9f7 365 }
<> 144:ef7eb2e8f9f7 366
<> 144:ef7eb2e8f9f7 367 /**
<> 144:ef7eb2e8f9f7 368 * @brief Returns the device revision identifier.
<> 144:ef7eb2e8f9f7 369 * @retval Device revision identifier
<> 144:ef7eb2e8f9f7 370 */
<> 144:ef7eb2e8f9f7 371 uint32_t HAL_GetREVID(void)
<> 144:ef7eb2e8f9f7 372 {
<> 144:ef7eb2e8f9f7 373 return((DBGMCU->IDCODE) >> 16U);
<> 144:ef7eb2e8f9f7 374 }
<> 144:ef7eb2e8f9f7 375
<> 144:ef7eb2e8f9f7 376 /**
<> 144:ef7eb2e8f9f7 377 * @brief Returns the device identifier.
<> 144:ef7eb2e8f9f7 378 * @retval Device identifier
<> 144:ef7eb2e8f9f7 379 */
<> 144:ef7eb2e8f9f7 380 uint32_t HAL_GetDEVID(void)
<> 144:ef7eb2e8f9f7 381 {
<> 144:ef7eb2e8f9f7 382 return((DBGMCU->IDCODE) & IDCODE_DEVID_MASK);
<> 144:ef7eb2e8f9f7 383 }
<> 144:ef7eb2e8f9f7 384
<> 144:ef7eb2e8f9f7 385 /**
<> 144:ef7eb2e8f9f7 386 * @brief Enable the Debug Module during SLEEP mode
<> 144:ef7eb2e8f9f7 387 * @retval None
<> 144:ef7eb2e8f9f7 388 */
<> 144:ef7eb2e8f9f7 389 void HAL_DBGMCU_EnableDBGSleepMode(void)
<> 144:ef7eb2e8f9f7 390 {
<> 144:ef7eb2e8f9f7 391 SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_SLEEP);
<> 144:ef7eb2e8f9f7 392 }
<> 144:ef7eb2e8f9f7 393
<> 144:ef7eb2e8f9f7 394 /**
<> 144:ef7eb2e8f9f7 395 * @brief Disable the Debug Module during SLEEP mode
<> 144:ef7eb2e8f9f7 396 * @retval None
<> 144:ef7eb2e8f9f7 397 */
<> 144:ef7eb2e8f9f7 398 void HAL_DBGMCU_DisableDBGSleepMode(void)
<> 144:ef7eb2e8f9f7 399 {
<> 144:ef7eb2e8f9f7 400 CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_SLEEP);
<> 144:ef7eb2e8f9f7 401 }
<> 144:ef7eb2e8f9f7 402
<> 144:ef7eb2e8f9f7 403 /**
<> 144:ef7eb2e8f9f7 404 * @brief Enable the Debug Module during STOP mode
<> 144:ef7eb2e8f9f7 405 * @retval None
<> 144:ef7eb2e8f9f7 406 */
<> 144:ef7eb2e8f9f7 407 void HAL_DBGMCU_EnableDBGStopMode(void)
<> 144:ef7eb2e8f9f7 408 {
<> 144:ef7eb2e8f9f7 409 SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STOP);
<> 144:ef7eb2e8f9f7 410 }
<> 144:ef7eb2e8f9f7 411
<> 144:ef7eb2e8f9f7 412 /**
<> 144:ef7eb2e8f9f7 413 * @brief Disable the Debug Module during STOP mode
<> 144:ef7eb2e8f9f7 414 * @retval None
<> 144:ef7eb2e8f9f7 415 */
<> 144:ef7eb2e8f9f7 416 void HAL_DBGMCU_DisableDBGStopMode(void)
<> 144:ef7eb2e8f9f7 417 {
<> 144:ef7eb2e8f9f7 418 CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STOP);
<> 144:ef7eb2e8f9f7 419 }
<> 144:ef7eb2e8f9f7 420
<> 144:ef7eb2e8f9f7 421 /**
<> 144:ef7eb2e8f9f7 422 * @brief Enable the Debug Module during STANDBY mode
<> 144:ef7eb2e8f9f7 423 * @retval None
<> 144:ef7eb2e8f9f7 424 */
<> 144:ef7eb2e8f9f7 425 void HAL_DBGMCU_EnableDBGStandbyMode(void)
<> 144:ef7eb2e8f9f7 426 {
<> 144:ef7eb2e8f9f7 427 SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STANDBY);
<> 144:ef7eb2e8f9f7 428 }
<> 144:ef7eb2e8f9f7 429
<> 144:ef7eb2e8f9f7 430 /**
<> 144:ef7eb2e8f9f7 431 * @brief Disable the Debug Module during STANDBY mode
<> 144:ef7eb2e8f9f7 432 * @retval None
<> 144:ef7eb2e8f9f7 433 */
<> 144:ef7eb2e8f9f7 434 void HAL_DBGMCU_DisableDBGStandbyMode(void)
<> 144:ef7eb2e8f9f7 435 {
<> 144:ef7eb2e8f9f7 436 CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STANDBY);
<> 144:ef7eb2e8f9f7 437 }
<> 144:ef7eb2e8f9f7 438
<> 144:ef7eb2e8f9f7 439 /**
<> 144:ef7eb2e8f9f7 440 * @brief Enables the I/O Compensation Cell.
<> 144:ef7eb2e8f9f7 441 * @note The I/O compensation cell can be used only when the device supply
<> 144:ef7eb2e8f9f7 442 * voltage ranges from 2.4 to 3.6 V.
<> 144:ef7eb2e8f9f7 443 * @retval None
<> 144:ef7eb2e8f9f7 444 */
<> 144:ef7eb2e8f9f7 445 void HAL_EnableCompensationCell(void)
<> 144:ef7eb2e8f9f7 446 {
<> 144:ef7eb2e8f9f7 447 SYSCFG->CMPCR |= SYSCFG_CMPCR_CMP_PD;
<> 144:ef7eb2e8f9f7 448 }
<> 144:ef7eb2e8f9f7 449
<> 144:ef7eb2e8f9f7 450 /**
<> 144:ef7eb2e8f9f7 451 * @brief Power-down the I/O Compensation Cell.
<> 144:ef7eb2e8f9f7 452 * @note The I/O compensation cell can be used only when the device supply
<> 144:ef7eb2e8f9f7 453 * voltage ranges from 2.4 to 3.6 V.
<> 144:ef7eb2e8f9f7 454 * @retval None
<> 144:ef7eb2e8f9f7 455 */
<> 144:ef7eb2e8f9f7 456 void HAL_DisableCompensationCell(void)
<> 144:ef7eb2e8f9f7 457 {
<> 144:ef7eb2e8f9f7 458 SYSCFG->CMPCR &= (uint32_t)~((uint32_t)SYSCFG_CMPCR_CMP_PD);
<> 144:ef7eb2e8f9f7 459 }
<> 144:ef7eb2e8f9f7 460
<> 144:ef7eb2e8f9f7 461 /**
<> 144:ef7eb2e8f9f7 462 * @brief Enables the FMC Memory Mapping Swapping.
<> 144:ef7eb2e8f9f7 463 *
<> 144:ef7eb2e8f9f7 464 * @note SDRAM is accessible at 0x60000000
<> 144:ef7eb2e8f9f7 465 * and NOR/RAM is accessible at 0xC0000000
<> 144:ef7eb2e8f9f7 466 *
<> 144:ef7eb2e8f9f7 467 * @retval None
<> 144:ef7eb2e8f9f7 468 */
<> 144:ef7eb2e8f9f7 469 void HAL_EnableFMCMemorySwapping(void)
<> 144:ef7eb2e8f9f7 470 {
<> 144:ef7eb2e8f9f7 471 SYSCFG->MEMRMP |= SYSCFG_MEMRMP_SWP_FMC_0;
<> 144:ef7eb2e8f9f7 472 }
<> 144:ef7eb2e8f9f7 473
<> 144:ef7eb2e8f9f7 474 /**
<> 144:ef7eb2e8f9f7 475 * @brief Disables the FMC Memory Mapping Swapping
<> 144:ef7eb2e8f9f7 476 *
<> 144:ef7eb2e8f9f7 477 * @note SDRAM is accessible at 0xC0000000 (default mapping)
<> 144:ef7eb2e8f9f7 478 * and NOR/RAM is accessible at 0x60000000 (default mapping)
<> 144:ef7eb2e8f9f7 479 *
<> 144:ef7eb2e8f9f7 480 * @retval None
<> 144:ef7eb2e8f9f7 481 */
<> 144:ef7eb2e8f9f7 482 void HAL_DisableFMCMemorySwapping(void)
<> 144:ef7eb2e8f9f7 483 {
<> 144:ef7eb2e8f9f7 484
<> 144:ef7eb2e8f9f7 485 SYSCFG->MEMRMP &= (uint32_t)~((uint32_t)SYSCFG_MEMRMP_SWP_FMC);
<> 144:ef7eb2e8f9f7 486 }
<> 144:ef7eb2e8f9f7 487
<> 144:ef7eb2e8f9f7 488 #if defined (STM32F765xx) || defined (STM32F767xx) || defined (STM32F769xx) || defined (STM32F777xx) || defined (STM32F779xx)
<> 144:ef7eb2e8f9f7 489 /**
<> 144:ef7eb2e8f9f7 490 * @brief Enable the Internal FLASH Bank Swapping.
<> 144:ef7eb2e8f9f7 491 *
<> 144:ef7eb2e8f9f7 492 * @note This function can be used only for STM32F77xx/STM32F76xx devices.
<> 144:ef7eb2e8f9f7 493 *
<> 144:ef7eb2e8f9f7 494 * @note Flash Bank2 mapped at 0x08000000 (AXI) (aliased at 0x00200000 (TCM))
<> 144:ef7eb2e8f9f7 495 * and Flash Bank1 mapped at 0x08100000 (AXI) (aliased at 0x00300000 (TCM))
<> 144:ef7eb2e8f9f7 496 *
<> 144:ef7eb2e8f9f7 497 * @retval None
<> 144:ef7eb2e8f9f7 498 */
<> 144:ef7eb2e8f9f7 499 void HAL_EnableMemorySwappingBank(void)
<> 144:ef7eb2e8f9f7 500 {
<> 144:ef7eb2e8f9f7 501 SET_BIT(SYSCFG->MEMRMP, SYSCFG_MEMRMP_SWP_FB);
<> 144:ef7eb2e8f9f7 502 }
<> 144:ef7eb2e8f9f7 503
<> 144:ef7eb2e8f9f7 504 /**
<> 144:ef7eb2e8f9f7 505 * @brief Disable the Internal FLASH Bank Swapping.
<> 144:ef7eb2e8f9f7 506 *
<> 144:ef7eb2e8f9f7 507 * @note This function can be used only for STM32F77xx/STM32F76xx devices.
<> 144:ef7eb2e8f9f7 508 *
<> 144:ef7eb2e8f9f7 509 * @note The default state : Flash Bank1 mapped at 0x08000000 (AXI) (aliased at 0x00200000 (TCM))
<> 144:ef7eb2e8f9f7 510 * and Flash Bank2 mapped at 0x08100000 (AXI)( aliased at 0x00300000 (TCM))
<> 144:ef7eb2e8f9f7 511 *
<> 144:ef7eb2e8f9f7 512 * @retval None
<> 144:ef7eb2e8f9f7 513 */
<> 144:ef7eb2e8f9f7 514 void HAL_DisableMemorySwappingBank(void)
<> 144:ef7eb2e8f9f7 515 {
<> 144:ef7eb2e8f9f7 516 CLEAR_BIT(SYSCFG->MEMRMP, SYSCFG_MEMRMP_SWP_FB);
<> 144:ef7eb2e8f9f7 517 }
<> 144:ef7eb2e8f9f7 518 #endif /* STM32F767xx || STM32F769xx || STM32F777xx || STM32F779xx */
<> 144:ef7eb2e8f9f7 519
<> 144:ef7eb2e8f9f7 520 /**
<> 144:ef7eb2e8f9f7 521 * @}
<> 144:ef7eb2e8f9f7 522 */
<> 144:ef7eb2e8f9f7 523
<> 144:ef7eb2e8f9f7 524 /**
<> 144:ef7eb2e8f9f7 525 * @}
<> 144:ef7eb2e8f9f7 526 */
<> 144:ef7eb2e8f9f7 527
<> 144:ef7eb2e8f9f7 528 /**
<> 144:ef7eb2e8f9f7 529 * @}
<> 144:ef7eb2e8f9f7 530 */
<> 144:ef7eb2e8f9f7 531
<> 144:ef7eb2e8f9f7 532 /**
<> 144:ef7eb2e8f9f7 533 * @}
<> 144:ef7eb2e8f9f7 534 */
<> 144:ef7eb2e8f9f7 535
<> 144:ef7eb2e8f9f7 536 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/