added prescaler for 16 bit pwm in LPC1347 target

Fork of mbed-dev by mbed official

Committer:
JojoS
Date:
Sat Sep 10 15:32:04 2016 +0000
Revision:
147:ba84b7dc41a7
Parent:
144:ef7eb2e8f9f7
added prescaler for 16 bit timers (solution as in LPC11xx), default prescaler 31 for max 28 ms period time

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 ;/******************** (C) COPYRIGHT 2016 STMicroelectronics ********************
<> 144:ef7eb2e8f9f7 2 ;* File Name : startup_stm32f746xx.s
<> 144:ef7eb2e8f9f7 3 ;* Author : MCD Application Team
<> 144:ef7eb2e8f9f7 4 ;* Version : V1.0.2
<> 144:ef7eb2e8f9f7 5 ;* Date : 21-September-2015
<> 144:ef7eb2e8f9f7 6 ;* Description : STM32F746xx devices vector table for EWARM toolchain.
<> 144:ef7eb2e8f9f7 7 ;* This module performs:
<> 144:ef7eb2e8f9f7 8 ;* - Set the initial SP
<> 144:ef7eb2e8f9f7 9 ;* - Set the initial PC == _iar_program_start,
<> 144:ef7eb2e8f9f7 10 ;* - Set the vector table entries with the exceptions ISR
<> 144:ef7eb2e8f9f7 11 ;* address.
<> 144:ef7eb2e8f9f7 12 ;* - Branches to main in the C library (which eventually
<> 144:ef7eb2e8f9f7 13 ;* calls main()).
<> 144:ef7eb2e8f9f7 14 ;* After Reset the Cortex-M7 processor is in Thread mode,
<> 144:ef7eb2e8f9f7 15 ;* priority is Privileged, and the Stack is set to Main.
<> 144:ef7eb2e8f9f7 16 ;********************************************************************************
<> 144:ef7eb2e8f9f7 17 ;*
<> 144:ef7eb2e8f9f7 18 ;* Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 19 ;* are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 20 ;* 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 21 ;* this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 22 ;* 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 23 ;* this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 24 ;* and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 25 ;* 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 26 ;* may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 27 ;* without specific prior written permission.
<> 144:ef7eb2e8f9f7 28 ;*
<> 144:ef7eb2e8f9f7 29 ;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 30 ;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 31 ;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 32 ;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 33 ;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 34 ;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 35 ;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 36 ;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 37 ;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 38 ;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 39 ;*
<> 144:ef7eb2e8f9f7 40 ;*******************************************************************************
<> 144:ef7eb2e8f9f7 41 ;
<> 144:ef7eb2e8f9f7 42 ;
<> 144:ef7eb2e8f9f7 43 ; The modules in this file are included in the libraries, and may be replaced
<> 144:ef7eb2e8f9f7 44 ; by any user-defined modules that define the PUBLIC symbol _program_start or
<> 144:ef7eb2e8f9f7 45 ; a user defined start symbol.
<> 144:ef7eb2e8f9f7 46 ; To override the cstartup defined in the library, simply add your modified
<> 144:ef7eb2e8f9f7 47 ; version to the workbench project.
<> 144:ef7eb2e8f9f7 48 ;
<> 144:ef7eb2e8f9f7 49 ; The vector table is normally located at address 0.
<> 144:ef7eb2e8f9f7 50 ; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
<> 144:ef7eb2e8f9f7 51 ; The name "__vector_table" has special meaning for C-SPY:
<> 144:ef7eb2e8f9f7 52 ; it is where the SP start value is found, and the NVIC vector
<> 144:ef7eb2e8f9f7 53 ; table register (VTOR) is initialized to this address if != 0.
<> 144:ef7eb2e8f9f7 54 ;
<> 144:ef7eb2e8f9f7 55 ; Cortex-M version
<> 144:ef7eb2e8f9f7 56 ;
<> 144:ef7eb2e8f9f7 57
<> 144:ef7eb2e8f9f7 58 MODULE ?cstartup
<> 144:ef7eb2e8f9f7 59
<> 144:ef7eb2e8f9f7 60 ;; Forward declaration of sections.
<> 144:ef7eb2e8f9f7 61 SECTION CSTACK:DATA:NOROOT(3)
<> 144:ef7eb2e8f9f7 62
<> 144:ef7eb2e8f9f7 63 SECTION .intvec:CODE:NOROOT(2)
<> 144:ef7eb2e8f9f7 64
<> 144:ef7eb2e8f9f7 65 EXTERN __iar_program_start
<> 144:ef7eb2e8f9f7 66 EXTERN SystemInit
<> 144:ef7eb2e8f9f7 67 PUBLIC __vector_table
<> 144:ef7eb2e8f9f7 68
<> 144:ef7eb2e8f9f7 69 DATA
<> 144:ef7eb2e8f9f7 70 __vector_table
<> 144:ef7eb2e8f9f7 71 DCD sfe(CSTACK)
<> 144:ef7eb2e8f9f7 72 DCD Reset_Handler ; Reset Handler
<> 144:ef7eb2e8f9f7 73
<> 144:ef7eb2e8f9f7 74 DCD NMI_Handler ; NMI Handler
<> 144:ef7eb2e8f9f7 75 DCD HardFault_Handler ; Hard Fault Handler
<> 144:ef7eb2e8f9f7 76 DCD MemManage_Handler ; MPU Fault Handler
<> 144:ef7eb2e8f9f7 77 DCD BusFault_Handler ; Bus Fault Handler
<> 144:ef7eb2e8f9f7 78 DCD UsageFault_Handler ; Usage Fault Handler
<> 144:ef7eb2e8f9f7 79 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 80 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 81 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 82 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 83 DCD SVC_Handler ; SVCall Handler
<> 144:ef7eb2e8f9f7 84 DCD DebugMon_Handler ; Debug Monitor Handler
<> 144:ef7eb2e8f9f7 85 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 86 DCD PendSV_Handler ; PendSV Handler
<> 144:ef7eb2e8f9f7 87 DCD SysTick_Handler ; SysTick Handler
<> 144:ef7eb2e8f9f7 88
<> 144:ef7eb2e8f9f7 89 ; External Interrupts
<> 144:ef7eb2e8f9f7 90 DCD WWDG_IRQHandler ; Window WatchDog
<> 144:ef7eb2e8f9f7 91 DCD PVD_IRQHandler ; PVD through EXTI Line detection
<> 144:ef7eb2e8f9f7 92 DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line
<> 144:ef7eb2e8f9f7 93 DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
<> 144:ef7eb2e8f9f7 94 DCD FLASH_IRQHandler ; FLASH
<> 144:ef7eb2e8f9f7 95 DCD RCC_IRQHandler ; RCC
<> 144:ef7eb2e8f9f7 96 DCD EXTI0_IRQHandler ; EXTI Line0
<> 144:ef7eb2e8f9f7 97 DCD EXTI1_IRQHandler ; EXTI Line1
<> 144:ef7eb2e8f9f7 98 DCD EXTI2_IRQHandler ; EXTI Line2
<> 144:ef7eb2e8f9f7 99 DCD EXTI3_IRQHandler ; EXTI Line3
<> 144:ef7eb2e8f9f7 100 DCD EXTI4_IRQHandler ; EXTI Line4
<> 144:ef7eb2e8f9f7 101 DCD DMA1_Stream0_IRQHandler ; DMA1 Stream 0
<> 144:ef7eb2e8f9f7 102 DCD DMA1_Stream1_IRQHandler ; DMA1 Stream 1
<> 144:ef7eb2e8f9f7 103 DCD DMA1_Stream2_IRQHandler ; DMA1 Stream 2
<> 144:ef7eb2e8f9f7 104 DCD DMA1_Stream3_IRQHandler ; DMA1 Stream 3
<> 144:ef7eb2e8f9f7 105 DCD DMA1_Stream4_IRQHandler ; DMA1 Stream 4
<> 144:ef7eb2e8f9f7 106 DCD DMA1_Stream5_IRQHandler ; DMA1 Stream 5
<> 144:ef7eb2e8f9f7 107 DCD DMA1_Stream6_IRQHandler ; DMA1 Stream 6
<> 144:ef7eb2e8f9f7 108 DCD ADC_IRQHandler ; ADC1, ADC2 and ADC3s
<> 144:ef7eb2e8f9f7 109 DCD CAN1_TX_IRQHandler ; CAN1 TX
<> 144:ef7eb2e8f9f7 110 DCD CAN1_RX0_IRQHandler ; CAN1 RX0
<> 144:ef7eb2e8f9f7 111 DCD CAN1_RX1_IRQHandler ; CAN1 RX1
<> 144:ef7eb2e8f9f7 112 DCD CAN1_SCE_IRQHandler ; CAN1 SCE
<> 144:ef7eb2e8f9f7 113 DCD EXTI9_5_IRQHandler ; External Line[9:5]s
<> 144:ef7eb2e8f9f7 114 DCD TIM1_BRK_TIM9_IRQHandler ; TIM1 Break and TIM9
<> 144:ef7eb2e8f9f7 115 DCD TIM1_UP_TIM10_IRQHandler ; TIM1 Update and TIM10
<> 144:ef7eb2e8f9f7 116 DCD TIM1_TRG_COM_TIM11_IRQHandler ; TIM1 Trigger and Commutation and TIM11
<> 144:ef7eb2e8f9f7 117 DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
<> 144:ef7eb2e8f9f7 118 DCD TIM2_IRQHandler ; TIM2
<> 144:ef7eb2e8f9f7 119 DCD TIM3_IRQHandler ; TIM3
<> 144:ef7eb2e8f9f7 120 DCD TIM4_IRQHandler ; TIM4
<> 144:ef7eb2e8f9f7 121 DCD I2C1_EV_IRQHandler ; I2C1 Event
<> 144:ef7eb2e8f9f7 122 DCD I2C1_ER_IRQHandler ; I2C1 Error
<> 144:ef7eb2e8f9f7 123 DCD I2C2_EV_IRQHandler ; I2C2 Event
<> 144:ef7eb2e8f9f7 124 DCD I2C2_ER_IRQHandler ; I2C2 Error
<> 144:ef7eb2e8f9f7 125 DCD SPI1_IRQHandler ; SPI1
<> 144:ef7eb2e8f9f7 126 DCD SPI2_IRQHandler ; SPI2
<> 144:ef7eb2e8f9f7 127 DCD USART1_IRQHandler ; USART1
<> 144:ef7eb2e8f9f7 128 DCD USART2_IRQHandler ; USART2
<> 144:ef7eb2e8f9f7 129 DCD USART3_IRQHandler ; USART3
<> 144:ef7eb2e8f9f7 130 DCD EXTI15_10_IRQHandler ; External Line[15:10]s
<> 144:ef7eb2e8f9f7 131 DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
<> 144:ef7eb2e8f9f7 132 DCD OTG_FS_WKUP_IRQHandler ; USB OTG FS Wakeup through EXTI line
<> 144:ef7eb2e8f9f7 133 DCD TIM8_BRK_TIM12_IRQHandler ; TIM8 Break and TIM12
<> 144:ef7eb2e8f9f7 134 DCD TIM8_UP_TIM13_IRQHandler ; TIM8 Update and TIM13
<> 144:ef7eb2e8f9f7 135 DCD TIM8_TRG_COM_TIM14_IRQHandler ; TIM8 Trigger and Commutation and TIM14
<> 144:ef7eb2e8f9f7 136 DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare
<> 144:ef7eb2e8f9f7 137 DCD DMA1_Stream7_IRQHandler ; DMA1 Stream7
<> 144:ef7eb2e8f9f7 138 DCD FMC_IRQHandler ; FMC
<> 144:ef7eb2e8f9f7 139 DCD SDMMC1_IRQHandler ; SDMMC1
<> 144:ef7eb2e8f9f7 140 DCD TIM5_IRQHandler ; TIM5
<> 144:ef7eb2e8f9f7 141 DCD SPI3_IRQHandler ; SPI3
<> 144:ef7eb2e8f9f7 142 DCD UART4_IRQHandler ; UART4
<> 144:ef7eb2e8f9f7 143 DCD UART5_IRQHandler ; UART5
<> 144:ef7eb2e8f9f7 144 DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&2 underrun errors
<> 144:ef7eb2e8f9f7 145 DCD TIM7_IRQHandler ; TIM7
<> 144:ef7eb2e8f9f7 146 DCD DMA2_Stream0_IRQHandler ; DMA2 Stream 0
<> 144:ef7eb2e8f9f7 147 DCD DMA2_Stream1_IRQHandler ; DMA2 Stream 1
<> 144:ef7eb2e8f9f7 148 DCD DMA2_Stream2_IRQHandler ; DMA2 Stream 2
<> 144:ef7eb2e8f9f7 149 DCD DMA2_Stream3_IRQHandler ; DMA2 Stream 3
<> 144:ef7eb2e8f9f7 150 DCD DMA2_Stream4_IRQHandler ; DMA2 Stream 4
<> 144:ef7eb2e8f9f7 151 DCD ETH_IRQHandler ; Ethernet
<> 144:ef7eb2e8f9f7 152 DCD ETH_WKUP_IRQHandler ; Ethernet Wakeup through EXTI line
<> 144:ef7eb2e8f9f7 153 DCD CAN2_TX_IRQHandler ; CAN2 TX
<> 144:ef7eb2e8f9f7 154 DCD CAN2_RX0_IRQHandler ; CAN2 RX0
<> 144:ef7eb2e8f9f7 155 DCD CAN2_RX1_IRQHandler ; CAN2 RX1
<> 144:ef7eb2e8f9f7 156 DCD CAN2_SCE_IRQHandler ; CAN2 SCE
<> 144:ef7eb2e8f9f7 157 DCD OTG_FS_IRQHandler ; USB OTG FS
<> 144:ef7eb2e8f9f7 158 DCD DMA2_Stream5_IRQHandler ; DMA2 Stream 5
<> 144:ef7eb2e8f9f7 159 DCD DMA2_Stream6_IRQHandler ; DMA2 Stream 6
<> 144:ef7eb2e8f9f7 160 DCD DMA2_Stream7_IRQHandler ; DMA2 Stream 7
<> 144:ef7eb2e8f9f7 161 DCD USART6_IRQHandler ; USART6
<> 144:ef7eb2e8f9f7 162 DCD I2C3_EV_IRQHandler ; I2C3 event
<> 144:ef7eb2e8f9f7 163 DCD I2C3_ER_IRQHandler ; I2C3 error
<> 144:ef7eb2e8f9f7 164 DCD OTG_HS_EP1_OUT_IRQHandler ; USB OTG HS End Point 1 Out
<> 144:ef7eb2e8f9f7 165 DCD OTG_HS_EP1_IN_IRQHandler ; USB OTG HS End Point 1 In
<> 144:ef7eb2e8f9f7 166 DCD OTG_HS_WKUP_IRQHandler ; USB OTG HS Wakeup through EXTI
<> 144:ef7eb2e8f9f7 167 DCD OTG_HS_IRQHandler ; USB OTG HS
<> 144:ef7eb2e8f9f7 168 DCD DCMI_IRQHandler ; DCMI
<> 144:ef7eb2e8f9f7 169 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 170 DCD RNG_IRQHandler ; Rng
<> 144:ef7eb2e8f9f7 171 DCD FPU_IRQHandler ; FPU
<> 144:ef7eb2e8f9f7 172 DCD UART7_IRQHandler ; UART7
<> 144:ef7eb2e8f9f7 173 DCD UART8_IRQHandler ; UART8
<> 144:ef7eb2e8f9f7 174 DCD SPI4_IRQHandler ; SPI4
<> 144:ef7eb2e8f9f7 175 DCD SPI5_IRQHandler ; SPI5
<> 144:ef7eb2e8f9f7 176 DCD SPI6_IRQHandler ; SPI6
<> 144:ef7eb2e8f9f7 177 DCD SAI1_IRQHandler ; SAI1
<> 144:ef7eb2e8f9f7 178 DCD LTDC_IRQHandler ; LTDC
<> 144:ef7eb2e8f9f7 179 DCD LTDC_ER_IRQHandler ; LTDC error
<> 144:ef7eb2e8f9f7 180 DCD DMA2D_IRQHandler ; DMA2D
<> 144:ef7eb2e8f9f7 181 DCD SAI2_IRQHandler ; SAI2
<> 144:ef7eb2e8f9f7 182 DCD QUADSPI_IRQHandler ; QUADSPI
<> 144:ef7eb2e8f9f7 183 DCD LPTIM1_IRQHandler ; LPTIM1
<> 144:ef7eb2e8f9f7 184 DCD CEC_IRQHandler ; HDMI_CEC
<> 144:ef7eb2e8f9f7 185 DCD I2C4_EV_IRQHandler ; I2C4 Event
<> 144:ef7eb2e8f9f7 186 DCD I2C4_ER_IRQHandler ; I2C4 Error
<> 144:ef7eb2e8f9f7 187 DCD SPDIF_RX_IRQHandler ; SPDIF_RX
<> 144:ef7eb2e8f9f7 188 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
<> 144:ef7eb2e8f9f7 189 ;;
<> 144:ef7eb2e8f9f7 190 ;; Default interrupt handlers.
<> 144:ef7eb2e8f9f7 191 ;;
<> 144:ef7eb2e8f9f7 192 THUMB
<> 144:ef7eb2e8f9f7 193 PUBWEAK Reset_Handler
<> 144:ef7eb2e8f9f7 194 SECTION .text:CODE:NOROOT:REORDER(2)
<> 144:ef7eb2e8f9f7 195 Reset_Handler
<> 144:ef7eb2e8f9f7 196
<> 144:ef7eb2e8f9f7 197 LDR R0, =SystemInit
<> 144:ef7eb2e8f9f7 198 BLX R0
<> 144:ef7eb2e8f9f7 199 LDR R0, =__iar_program_start
<> 144:ef7eb2e8f9f7 200 BX R0
<> 144:ef7eb2e8f9f7 201
<> 144:ef7eb2e8f9f7 202 PUBWEAK NMI_Handler
<> 144:ef7eb2e8f9f7 203 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 204 NMI_Handler
<> 144:ef7eb2e8f9f7 205 B NMI_Handler
<> 144:ef7eb2e8f9f7 206
<> 144:ef7eb2e8f9f7 207 PUBWEAK HardFault_Handler
<> 144:ef7eb2e8f9f7 208 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 209 HardFault_Handler
<> 144:ef7eb2e8f9f7 210 B HardFault_Handler
<> 144:ef7eb2e8f9f7 211
<> 144:ef7eb2e8f9f7 212 PUBWEAK MemManage_Handler
<> 144:ef7eb2e8f9f7 213 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 214 MemManage_Handler
<> 144:ef7eb2e8f9f7 215 B MemManage_Handler
<> 144:ef7eb2e8f9f7 216
<> 144:ef7eb2e8f9f7 217 PUBWEAK BusFault_Handler
<> 144:ef7eb2e8f9f7 218 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 219 BusFault_Handler
<> 144:ef7eb2e8f9f7 220 B BusFault_Handler
<> 144:ef7eb2e8f9f7 221
<> 144:ef7eb2e8f9f7 222 PUBWEAK UsageFault_Handler
<> 144:ef7eb2e8f9f7 223 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 224 UsageFault_Handler
<> 144:ef7eb2e8f9f7 225 B UsageFault_Handler
<> 144:ef7eb2e8f9f7 226
<> 144:ef7eb2e8f9f7 227 PUBWEAK SVC_Handler
<> 144:ef7eb2e8f9f7 228 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 229 SVC_Handler
<> 144:ef7eb2e8f9f7 230 B SVC_Handler
<> 144:ef7eb2e8f9f7 231
<> 144:ef7eb2e8f9f7 232 PUBWEAK DebugMon_Handler
<> 144:ef7eb2e8f9f7 233 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 234 DebugMon_Handler
<> 144:ef7eb2e8f9f7 235 B DebugMon_Handler
<> 144:ef7eb2e8f9f7 236
<> 144:ef7eb2e8f9f7 237 PUBWEAK PendSV_Handler
<> 144:ef7eb2e8f9f7 238 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 239 PendSV_Handler
<> 144:ef7eb2e8f9f7 240 B PendSV_Handler
<> 144:ef7eb2e8f9f7 241
<> 144:ef7eb2e8f9f7 242 PUBWEAK SysTick_Handler
<> 144:ef7eb2e8f9f7 243 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 244 SysTick_Handler
<> 144:ef7eb2e8f9f7 245 B SysTick_Handler
<> 144:ef7eb2e8f9f7 246
<> 144:ef7eb2e8f9f7 247 PUBWEAK WWDG_IRQHandler
<> 144:ef7eb2e8f9f7 248 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 249 WWDG_IRQHandler
<> 144:ef7eb2e8f9f7 250 B WWDG_IRQHandler
<> 144:ef7eb2e8f9f7 251
<> 144:ef7eb2e8f9f7 252 PUBWEAK PVD_IRQHandler
<> 144:ef7eb2e8f9f7 253 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 254 PVD_IRQHandler
<> 144:ef7eb2e8f9f7 255 B PVD_IRQHandler
<> 144:ef7eb2e8f9f7 256
<> 144:ef7eb2e8f9f7 257 PUBWEAK TAMP_STAMP_IRQHandler
<> 144:ef7eb2e8f9f7 258 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 259 TAMP_STAMP_IRQHandler
<> 144:ef7eb2e8f9f7 260 B TAMP_STAMP_IRQHandler
<> 144:ef7eb2e8f9f7 261
<> 144:ef7eb2e8f9f7 262 PUBWEAK RTC_WKUP_IRQHandler
<> 144:ef7eb2e8f9f7 263 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 264 RTC_WKUP_IRQHandler
<> 144:ef7eb2e8f9f7 265 B RTC_WKUP_IRQHandler
<> 144:ef7eb2e8f9f7 266
<> 144:ef7eb2e8f9f7 267 PUBWEAK FLASH_IRQHandler
<> 144:ef7eb2e8f9f7 268 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 269 FLASH_IRQHandler
<> 144:ef7eb2e8f9f7 270 B FLASH_IRQHandler
<> 144:ef7eb2e8f9f7 271
<> 144:ef7eb2e8f9f7 272 PUBWEAK RCC_IRQHandler
<> 144:ef7eb2e8f9f7 273 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 274 RCC_IRQHandler
<> 144:ef7eb2e8f9f7 275 B RCC_IRQHandler
<> 144:ef7eb2e8f9f7 276
<> 144:ef7eb2e8f9f7 277 PUBWEAK EXTI0_IRQHandler
<> 144:ef7eb2e8f9f7 278 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 279 EXTI0_IRQHandler
<> 144:ef7eb2e8f9f7 280 B EXTI0_IRQHandler
<> 144:ef7eb2e8f9f7 281
<> 144:ef7eb2e8f9f7 282 PUBWEAK EXTI1_IRQHandler
<> 144:ef7eb2e8f9f7 283 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 284 EXTI1_IRQHandler
<> 144:ef7eb2e8f9f7 285 B EXTI1_IRQHandler
<> 144:ef7eb2e8f9f7 286
<> 144:ef7eb2e8f9f7 287 PUBWEAK EXTI2_IRQHandler
<> 144:ef7eb2e8f9f7 288 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 289 EXTI2_IRQHandler
<> 144:ef7eb2e8f9f7 290 B EXTI2_IRQHandler
<> 144:ef7eb2e8f9f7 291
<> 144:ef7eb2e8f9f7 292 PUBWEAK EXTI3_IRQHandler
<> 144:ef7eb2e8f9f7 293 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 294 EXTI3_IRQHandler
<> 144:ef7eb2e8f9f7 295 B EXTI3_IRQHandler
<> 144:ef7eb2e8f9f7 296
<> 144:ef7eb2e8f9f7 297 PUBWEAK EXTI4_IRQHandler
<> 144:ef7eb2e8f9f7 298 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 299 EXTI4_IRQHandler
<> 144:ef7eb2e8f9f7 300 B EXTI4_IRQHandler
<> 144:ef7eb2e8f9f7 301
<> 144:ef7eb2e8f9f7 302 PUBWEAK DMA1_Stream0_IRQHandler
<> 144:ef7eb2e8f9f7 303 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 304 DMA1_Stream0_IRQHandler
<> 144:ef7eb2e8f9f7 305 B DMA1_Stream0_IRQHandler
<> 144:ef7eb2e8f9f7 306
<> 144:ef7eb2e8f9f7 307 PUBWEAK DMA1_Stream1_IRQHandler
<> 144:ef7eb2e8f9f7 308 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 309 DMA1_Stream1_IRQHandler
<> 144:ef7eb2e8f9f7 310 B DMA1_Stream1_IRQHandler
<> 144:ef7eb2e8f9f7 311
<> 144:ef7eb2e8f9f7 312 PUBWEAK DMA1_Stream2_IRQHandler
<> 144:ef7eb2e8f9f7 313 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 314 DMA1_Stream2_IRQHandler
<> 144:ef7eb2e8f9f7 315 B DMA1_Stream2_IRQHandler
<> 144:ef7eb2e8f9f7 316
<> 144:ef7eb2e8f9f7 317 PUBWEAK DMA1_Stream3_IRQHandler
<> 144:ef7eb2e8f9f7 318 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 319 DMA1_Stream3_IRQHandler
<> 144:ef7eb2e8f9f7 320 B DMA1_Stream3_IRQHandler
<> 144:ef7eb2e8f9f7 321
<> 144:ef7eb2e8f9f7 322 PUBWEAK DMA1_Stream4_IRQHandler
<> 144:ef7eb2e8f9f7 323 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 324 DMA1_Stream4_IRQHandler
<> 144:ef7eb2e8f9f7 325 B DMA1_Stream4_IRQHandler
<> 144:ef7eb2e8f9f7 326
<> 144:ef7eb2e8f9f7 327 PUBWEAK DMA1_Stream5_IRQHandler
<> 144:ef7eb2e8f9f7 328 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 329 DMA1_Stream5_IRQHandler
<> 144:ef7eb2e8f9f7 330 B DMA1_Stream5_IRQHandler
<> 144:ef7eb2e8f9f7 331
<> 144:ef7eb2e8f9f7 332 PUBWEAK DMA1_Stream6_IRQHandler
<> 144:ef7eb2e8f9f7 333 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 334 DMA1_Stream6_IRQHandler
<> 144:ef7eb2e8f9f7 335 B DMA1_Stream6_IRQHandler
<> 144:ef7eb2e8f9f7 336
<> 144:ef7eb2e8f9f7 337 PUBWEAK ADC_IRQHandler
<> 144:ef7eb2e8f9f7 338 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 339 ADC_IRQHandler
<> 144:ef7eb2e8f9f7 340 B ADC_IRQHandler
<> 144:ef7eb2e8f9f7 341
<> 144:ef7eb2e8f9f7 342 PUBWEAK CAN1_TX_IRQHandler
<> 144:ef7eb2e8f9f7 343 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 344 CAN1_TX_IRQHandler
<> 144:ef7eb2e8f9f7 345 B CAN1_TX_IRQHandler
<> 144:ef7eb2e8f9f7 346
<> 144:ef7eb2e8f9f7 347 PUBWEAK CAN1_RX0_IRQHandler
<> 144:ef7eb2e8f9f7 348 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 349 CAN1_RX0_IRQHandler
<> 144:ef7eb2e8f9f7 350 B CAN1_RX0_IRQHandler
<> 144:ef7eb2e8f9f7 351
<> 144:ef7eb2e8f9f7 352 PUBWEAK CAN1_RX1_IRQHandler
<> 144:ef7eb2e8f9f7 353 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 354 CAN1_RX1_IRQHandler
<> 144:ef7eb2e8f9f7 355 B CAN1_RX1_IRQHandler
<> 144:ef7eb2e8f9f7 356
<> 144:ef7eb2e8f9f7 357 PUBWEAK CAN1_SCE_IRQHandler
<> 144:ef7eb2e8f9f7 358 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 359 CAN1_SCE_IRQHandler
<> 144:ef7eb2e8f9f7 360 B CAN1_SCE_IRQHandler
<> 144:ef7eb2e8f9f7 361
<> 144:ef7eb2e8f9f7 362 PUBWEAK EXTI9_5_IRQHandler
<> 144:ef7eb2e8f9f7 363 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 364 EXTI9_5_IRQHandler
<> 144:ef7eb2e8f9f7 365 B EXTI9_5_IRQHandler
<> 144:ef7eb2e8f9f7 366
<> 144:ef7eb2e8f9f7 367 PUBWEAK TIM1_BRK_TIM9_IRQHandler
<> 144:ef7eb2e8f9f7 368 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 369 TIM1_BRK_TIM9_IRQHandler
<> 144:ef7eb2e8f9f7 370 B TIM1_BRK_TIM9_IRQHandler
<> 144:ef7eb2e8f9f7 371
<> 144:ef7eb2e8f9f7 372 PUBWEAK TIM1_UP_TIM10_IRQHandler
<> 144:ef7eb2e8f9f7 373 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 374 TIM1_UP_TIM10_IRQHandler
<> 144:ef7eb2e8f9f7 375 B TIM1_UP_TIM10_IRQHandler
<> 144:ef7eb2e8f9f7 376
<> 144:ef7eb2e8f9f7 377 PUBWEAK TIM1_TRG_COM_TIM11_IRQHandler
<> 144:ef7eb2e8f9f7 378 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 379 TIM1_TRG_COM_TIM11_IRQHandler
<> 144:ef7eb2e8f9f7 380 B TIM1_TRG_COM_TIM11_IRQHandler
<> 144:ef7eb2e8f9f7 381
<> 144:ef7eb2e8f9f7 382 PUBWEAK TIM1_CC_IRQHandler
<> 144:ef7eb2e8f9f7 383 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 384 TIM1_CC_IRQHandler
<> 144:ef7eb2e8f9f7 385 B TIM1_CC_IRQHandler
<> 144:ef7eb2e8f9f7 386
<> 144:ef7eb2e8f9f7 387 PUBWEAK TIM2_IRQHandler
<> 144:ef7eb2e8f9f7 388 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 389 TIM2_IRQHandler
<> 144:ef7eb2e8f9f7 390 B TIM2_IRQHandler
<> 144:ef7eb2e8f9f7 391
<> 144:ef7eb2e8f9f7 392 PUBWEAK TIM3_IRQHandler
<> 144:ef7eb2e8f9f7 393 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 394 TIM3_IRQHandler
<> 144:ef7eb2e8f9f7 395 B TIM3_IRQHandler
<> 144:ef7eb2e8f9f7 396
<> 144:ef7eb2e8f9f7 397 PUBWEAK TIM4_IRQHandler
<> 144:ef7eb2e8f9f7 398 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 399 TIM4_IRQHandler
<> 144:ef7eb2e8f9f7 400 B TIM4_IRQHandler
<> 144:ef7eb2e8f9f7 401
<> 144:ef7eb2e8f9f7 402 PUBWEAK I2C1_EV_IRQHandler
<> 144:ef7eb2e8f9f7 403 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 404 I2C1_EV_IRQHandler
<> 144:ef7eb2e8f9f7 405 B I2C1_EV_IRQHandler
<> 144:ef7eb2e8f9f7 406
<> 144:ef7eb2e8f9f7 407 PUBWEAK I2C1_ER_IRQHandler
<> 144:ef7eb2e8f9f7 408 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 409 I2C1_ER_IRQHandler
<> 144:ef7eb2e8f9f7 410 B I2C1_ER_IRQHandler
<> 144:ef7eb2e8f9f7 411
<> 144:ef7eb2e8f9f7 412 PUBWEAK I2C2_EV_IRQHandler
<> 144:ef7eb2e8f9f7 413 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 414 I2C2_EV_IRQHandler
<> 144:ef7eb2e8f9f7 415 B I2C2_EV_IRQHandler
<> 144:ef7eb2e8f9f7 416
<> 144:ef7eb2e8f9f7 417 PUBWEAK I2C2_ER_IRQHandler
<> 144:ef7eb2e8f9f7 418 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 419 I2C2_ER_IRQHandler
<> 144:ef7eb2e8f9f7 420 B I2C2_ER_IRQHandler
<> 144:ef7eb2e8f9f7 421
<> 144:ef7eb2e8f9f7 422 PUBWEAK SPI1_IRQHandler
<> 144:ef7eb2e8f9f7 423 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 424 SPI1_IRQHandler
<> 144:ef7eb2e8f9f7 425 B SPI1_IRQHandler
<> 144:ef7eb2e8f9f7 426
<> 144:ef7eb2e8f9f7 427 PUBWEAK SPI2_IRQHandler
<> 144:ef7eb2e8f9f7 428 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 429 SPI2_IRQHandler
<> 144:ef7eb2e8f9f7 430 B SPI2_IRQHandler
<> 144:ef7eb2e8f9f7 431
<> 144:ef7eb2e8f9f7 432 PUBWEAK USART1_IRQHandler
<> 144:ef7eb2e8f9f7 433 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 434 USART1_IRQHandler
<> 144:ef7eb2e8f9f7 435 B USART1_IRQHandler
<> 144:ef7eb2e8f9f7 436
<> 144:ef7eb2e8f9f7 437 PUBWEAK USART2_IRQHandler
<> 144:ef7eb2e8f9f7 438 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 439 USART2_IRQHandler
<> 144:ef7eb2e8f9f7 440 B USART2_IRQHandler
<> 144:ef7eb2e8f9f7 441
<> 144:ef7eb2e8f9f7 442 PUBWEAK USART3_IRQHandler
<> 144:ef7eb2e8f9f7 443 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 444 USART3_IRQHandler
<> 144:ef7eb2e8f9f7 445 B USART3_IRQHandler
<> 144:ef7eb2e8f9f7 446
<> 144:ef7eb2e8f9f7 447 PUBWEAK EXTI15_10_IRQHandler
<> 144:ef7eb2e8f9f7 448 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 449 EXTI15_10_IRQHandler
<> 144:ef7eb2e8f9f7 450 B EXTI15_10_IRQHandler
<> 144:ef7eb2e8f9f7 451
<> 144:ef7eb2e8f9f7 452 PUBWEAK RTC_Alarm_IRQHandler
<> 144:ef7eb2e8f9f7 453 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 454 RTC_Alarm_IRQHandler
<> 144:ef7eb2e8f9f7 455 B RTC_Alarm_IRQHandler
<> 144:ef7eb2e8f9f7 456
<> 144:ef7eb2e8f9f7 457 PUBWEAK OTG_FS_WKUP_IRQHandler
<> 144:ef7eb2e8f9f7 458 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 459 OTG_FS_WKUP_IRQHandler
<> 144:ef7eb2e8f9f7 460 B OTG_FS_WKUP_IRQHandler
<> 144:ef7eb2e8f9f7 461
<> 144:ef7eb2e8f9f7 462 PUBWEAK TIM8_BRK_TIM12_IRQHandler
<> 144:ef7eb2e8f9f7 463 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 464 TIM8_BRK_TIM12_IRQHandler
<> 144:ef7eb2e8f9f7 465 B TIM8_BRK_TIM12_IRQHandler
<> 144:ef7eb2e8f9f7 466
<> 144:ef7eb2e8f9f7 467 PUBWEAK TIM8_UP_TIM13_IRQHandler
<> 144:ef7eb2e8f9f7 468 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 469 TIM8_UP_TIM13_IRQHandler
<> 144:ef7eb2e8f9f7 470 B TIM8_UP_TIM13_IRQHandler
<> 144:ef7eb2e8f9f7 471
<> 144:ef7eb2e8f9f7 472 PUBWEAK TIM8_TRG_COM_TIM14_IRQHandler
<> 144:ef7eb2e8f9f7 473 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 474 TIM8_TRG_COM_TIM14_IRQHandler
<> 144:ef7eb2e8f9f7 475 B TIM8_TRG_COM_TIM14_IRQHandler
<> 144:ef7eb2e8f9f7 476
<> 144:ef7eb2e8f9f7 477 PUBWEAK TIM8_CC_IRQHandler
<> 144:ef7eb2e8f9f7 478 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 479 TIM8_CC_IRQHandler
<> 144:ef7eb2e8f9f7 480 B TIM8_CC_IRQHandler
<> 144:ef7eb2e8f9f7 481
<> 144:ef7eb2e8f9f7 482 PUBWEAK DMA1_Stream7_IRQHandler
<> 144:ef7eb2e8f9f7 483 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 484 DMA1_Stream7_IRQHandler
<> 144:ef7eb2e8f9f7 485 B DMA1_Stream7_IRQHandler
<> 144:ef7eb2e8f9f7 486
<> 144:ef7eb2e8f9f7 487 PUBWEAK FMC_IRQHandler
<> 144:ef7eb2e8f9f7 488 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 489 FMC_IRQHandler
<> 144:ef7eb2e8f9f7 490 B FMC_IRQHandler
<> 144:ef7eb2e8f9f7 491
<> 144:ef7eb2e8f9f7 492 PUBWEAK SDMMC1_IRQHandler
<> 144:ef7eb2e8f9f7 493 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 494 SDMMC1_IRQHandler
<> 144:ef7eb2e8f9f7 495 B SDMMC1_IRQHandler
<> 144:ef7eb2e8f9f7 496
<> 144:ef7eb2e8f9f7 497 PUBWEAK TIM5_IRQHandler
<> 144:ef7eb2e8f9f7 498 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 499 TIM5_IRQHandler
<> 144:ef7eb2e8f9f7 500 B TIM5_IRQHandler
<> 144:ef7eb2e8f9f7 501
<> 144:ef7eb2e8f9f7 502 PUBWEAK SPI3_IRQHandler
<> 144:ef7eb2e8f9f7 503 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 504 SPI3_IRQHandler
<> 144:ef7eb2e8f9f7 505 B SPI3_IRQHandler
<> 144:ef7eb2e8f9f7 506
<> 144:ef7eb2e8f9f7 507 PUBWEAK UART4_IRQHandler
<> 144:ef7eb2e8f9f7 508 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 509 UART4_IRQHandler
<> 144:ef7eb2e8f9f7 510 B UART4_IRQHandler
<> 144:ef7eb2e8f9f7 511
<> 144:ef7eb2e8f9f7 512 PUBWEAK UART5_IRQHandler
<> 144:ef7eb2e8f9f7 513 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 514 UART5_IRQHandler
<> 144:ef7eb2e8f9f7 515 B UART5_IRQHandler
<> 144:ef7eb2e8f9f7 516
<> 144:ef7eb2e8f9f7 517 PUBWEAK TIM6_DAC_IRQHandler
<> 144:ef7eb2e8f9f7 518 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 519 TIM6_DAC_IRQHandler
<> 144:ef7eb2e8f9f7 520 B TIM6_DAC_IRQHandler
<> 144:ef7eb2e8f9f7 521
<> 144:ef7eb2e8f9f7 522 PUBWEAK TIM7_IRQHandler
<> 144:ef7eb2e8f9f7 523 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 524 TIM7_IRQHandler
<> 144:ef7eb2e8f9f7 525 B TIM7_IRQHandler
<> 144:ef7eb2e8f9f7 526
<> 144:ef7eb2e8f9f7 527 PUBWEAK DMA2_Stream0_IRQHandler
<> 144:ef7eb2e8f9f7 528 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 529 DMA2_Stream0_IRQHandler
<> 144:ef7eb2e8f9f7 530 B DMA2_Stream0_IRQHandler
<> 144:ef7eb2e8f9f7 531
<> 144:ef7eb2e8f9f7 532 PUBWEAK DMA2_Stream1_IRQHandler
<> 144:ef7eb2e8f9f7 533 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 534 DMA2_Stream1_IRQHandler
<> 144:ef7eb2e8f9f7 535 B DMA2_Stream1_IRQHandler
<> 144:ef7eb2e8f9f7 536
<> 144:ef7eb2e8f9f7 537 PUBWEAK DMA2_Stream2_IRQHandler
<> 144:ef7eb2e8f9f7 538 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 539 DMA2_Stream2_IRQHandler
<> 144:ef7eb2e8f9f7 540 B DMA2_Stream2_IRQHandler
<> 144:ef7eb2e8f9f7 541
<> 144:ef7eb2e8f9f7 542 PUBWEAK DMA2_Stream3_IRQHandler
<> 144:ef7eb2e8f9f7 543 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 544 DMA2_Stream3_IRQHandler
<> 144:ef7eb2e8f9f7 545 B DMA2_Stream3_IRQHandler
<> 144:ef7eb2e8f9f7 546
<> 144:ef7eb2e8f9f7 547 PUBWEAK DMA2_Stream4_IRQHandler
<> 144:ef7eb2e8f9f7 548 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 549 DMA2_Stream4_IRQHandler
<> 144:ef7eb2e8f9f7 550 B DMA2_Stream4_IRQHandler
<> 144:ef7eb2e8f9f7 551
<> 144:ef7eb2e8f9f7 552 PUBWEAK ETH_IRQHandler
<> 144:ef7eb2e8f9f7 553 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 554 ETH_IRQHandler
<> 144:ef7eb2e8f9f7 555 B ETH_IRQHandler
<> 144:ef7eb2e8f9f7 556
<> 144:ef7eb2e8f9f7 557 PUBWEAK ETH_WKUP_IRQHandler
<> 144:ef7eb2e8f9f7 558 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 559 ETH_WKUP_IRQHandler
<> 144:ef7eb2e8f9f7 560 B ETH_WKUP_IRQHandler
<> 144:ef7eb2e8f9f7 561
<> 144:ef7eb2e8f9f7 562 PUBWEAK CAN2_TX_IRQHandler
<> 144:ef7eb2e8f9f7 563 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 564 CAN2_TX_IRQHandler
<> 144:ef7eb2e8f9f7 565 B CAN2_TX_IRQHandler
<> 144:ef7eb2e8f9f7 566
<> 144:ef7eb2e8f9f7 567 PUBWEAK CAN2_RX0_IRQHandler
<> 144:ef7eb2e8f9f7 568 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 569 CAN2_RX0_IRQHandler
<> 144:ef7eb2e8f9f7 570 B CAN2_RX0_IRQHandler
<> 144:ef7eb2e8f9f7 571
<> 144:ef7eb2e8f9f7 572 PUBWEAK CAN2_RX1_IRQHandler
<> 144:ef7eb2e8f9f7 573 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 574 CAN2_RX1_IRQHandler
<> 144:ef7eb2e8f9f7 575 B CAN2_RX1_IRQHandler
<> 144:ef7eb2e8f9f7 576
<> 144:ef7eb2e8f9f7 577 PUBWEAK CAN2_SCE_IRQHandler
<> 144:ef7eb2e8f9f7 578 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 579 CAN2_SCE_IRQHandler
<> 144:ef7eb2e8f9f7 580 B CAN2_SCE_IRQHandler
<> 144:ef7eb2e8f9f7 581
<> 144:ef7eb2e8f9f7 582 PUBWEAK OTG_FS_IRQHandler
<> 144:ef7eb2e8f9f7 583 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 584 OTG_FS_IRQHandler
<> 144:ef7eb2e8f9f7 585 B OTG_FS_IRQHandler
<> 144:ef7eb2e8f9f7 586
<> 144:ef7eb2e8f9f7 587 PUBWEAK DMA2_Stream5_IRQHandler
<> 144:ef7eb2e8f9f7 588 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 589 DMA2_Stream5_IRQHandler
<> 144:ef7eb2e8f9f7 590 B DMA2_Stream5_IRQHandler
<> 144:ef7eb2e8f9f7 591
<> 144:ef7eb2e8f9f7 592 PUBWEAK DMA2_Stream6_IRQHandler
<> 144:ef7eb2e8f9f7 593 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 594 DMA2_Stream6_IRQHandler
<> 144:ef7eb2e8f9f7 595 B DMA2_Stream6_IRQHandler
<> 144:ef7eb2e8f9f7 596
<> 144:ef7eb2e8f9f7 597 PUBWEAK DMA2_Stream7_IRQHandler
<> 144:ef7eb2e8f9f7 598 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 599 DMA2_Stream7_IRQHandler
<> 144:ef7eb2e8f9f7 600 B DMA2_Stream7_IRQHandler
<> 144:ef7eb2e8f9f7 601
<> 144:ef7eb2e8f9f7 602 PUBWEAK USART6_IRQHandler
<> 144:ef7eb2e8f9f7 603 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 604 USART6_IRQHandler
<> 144:ef7eb2e8f9f7 605 B USART6_IRQHandler
<> 144:ef7eb2e8f9f7 606
<> 144:ef7eb2e8f9f7 607 PUBWEAK I2C3_EV_IRQHandler
<> 144:ef7eb2e8f9f7 608 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 609 I2C3_EV_IRQHandler
<> 144:ef7eb2e8f9f7 610 B I2C3_EV_IRQHandler
<> 144:ef7eb2e8f9f7 611
<> 144:ef7eb2e8f9f7 612 PUBWEAK I2C3_ER_IRQHandler
<> 144:ef7eb2e8f9f7 613 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 614 I2C3_ER_IRQHandler
<> 144:ef7eb2e8f9f7 615 B I2C3_ER_IRQHandler
<> 144:ef7eb2e8f9f7 616
<> 144:ef7eb2e8f9f7 617 PUBWEAK OTG_HS_EP1_OUT_IRQHandler
<> 144:ef7eb2e8f9f7 618 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 619 OTG_HS_EP1_OUT_IRQHandler
<> 144:ef7eb2e8f9f7 620 B OTG_HS_EP1_OUT_IRQHandler
<> 144:ef7eb2e8f9f7 621
<> 144:ef7eb2e8f9f7 622 PUBWEAK OTG_HS_EP1_IN_IRQHandler
<> 144:ef7eb2e8f9f7 623 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 624 OTG_HS_EP1_IN_IRQHandler
<> 144:ef7eb2e8f9f7 625 B OTG_HS_EP1_IN_IRQHandler
<> 144:ef7eb2e8f9f7 626
<> 144:ef7eb2e8f9f7 627 PUBWEAK OTG_HS_WKUP_IRQHandler
<> 144:ef7eb2e8f9f7 628 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 629 OTG_HS_WKUP_IRQHandler
<> 144:ef7eb2e8f9f7 630 B OTG_HS_WKUP_IRQHandler
<> 144:ef7eb2e8f9f7 631
<> 144:ef7eb2e8f9f7 632 PUBWEAK OTG_HS_IRQHandler
<> 144:ef7eb2e8f9f7 633 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 634 OTG_HS_IRQHandler
<> 144:ef7eb2e8f9f7 635 B OTG_HS_IRQHandler
<> 144:ef7eb2e8f9f7 636
<> 144:ef7eb2e8f9f7 637 PUBWEAK DCMI_IRQHandler
<> 144:ef7eb2e8f9f7 638 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 639 DCMI_IRQHandler
<> 144:ef7eb2e8f9f7 640 B DCMI_IRQHandler
<> 144:ef7eb2e8f9f7 641
<> 144:ef7eb2e8f9f7 642 PUBWEAK RNG_IRQHandler
<> 144:ef7eb2e8f9f7 643 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 644 RNG_IRQHandler
<> 144:ef7eb2e8f9f7 645 B RNG_IRQHandler
<> 144:ef7eb2e8f9f7 646
<> 144:ef7eb2e8f9f7 647 PUBWEAK FPU_IRQHandler
<> 144:ef7eb2e8f9f7 648 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 649 FPU_IRQHandler
<> 144:ef7eb2e8f9f7 650 B FPU_IRQHandler
<> 144:ef7eb2e8f9f7 651
<> 144:ef7eb2e8f9f7 652 PUBWEAK UART7_IRQHandler
<> 144:ef7eb2e8f9f7 653 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 654 UART7_IRQHandler
<> 144:ef7eb2e8f9f7 655 B UART7_IRQHandler
<> 144:ef7eb2e8f9f7 656
<> 144:ef7eb2e8f9f7 657 PUBWEAK UART8_IRQHandler
<> 144:ef7eb2e8f9f7 658 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 659 UART8_IRQHandler
<> 144:ef7eb2e8f9f7 660 B UART8_IRQHandler
<> 144:ef7eb2e8f9f7 661
<> 144:ef7eb2e8f9f7 662 PUBWEAK SPI4_IRQHandler
<> 144:ef7eb2e8f9f7 663 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 664 SPI4_IRQHandler
<> 144:ef7eb2e8f9f7 665 B SPI4_IRQHandler
<> 144:ef7eb2e8f9f7 666
<> 144:ef7eb2e8f9f7 667 PUBWEAK SPI5_IRQHandler
<> 144:ef7eb2e8f9f7 668 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 669 SPI5_IRQHandler
<> 144:ef7eb2e8f9f7 670 B SPI5_IRQHandler
<> 144:ef7eb2e8f9f7 671
<> 144:ef7eb2e8f9f7 672 PUBWEAK SPI6_IRQHandler
<> 144:ef7eb2e8f9f7 673 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 674 SPI6_IRQHandler
<> 144:ef7eb2e8f9f7 675 B SPI6_IRQHandler
<> 144:ef7eb2e8f9f7 676
<> 144:ef7eb2e8f9f7 677 PUBWEAK SAI1_IRQHandler
<> 144:ef7eb2e8f9f7 678 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 679 SAI1_IRQHandler
<> 144:ef7eb2e8f9f7 680 B SAI1_IRQHandler
<> 144:ef7eb2e8f9f7 681
<> 144:ef7eb2e8f9f7 682 PUBWEAK LTDC_IRQHandler
<> 144:ef7eb2e8f9f7 683 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 684 LTDC_IRQHandler
<> 144:ef7eb2e8f9f7 685 B LTDC_IRQHandler
<> 144:ef7eb2e8f9f7 686
<> 144:ef7eb2e8f9f7 687 PUBWEAK LTDC_ER_IRQHandler
<> 144:ef7eb2e8f9f7 688 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 689 LTDC_ER_IRQHandler
<> 144:ef7eb2e8f9f7 690 B LTDC_ER_IRQHandler
<> 144:ef7eb2e8f9f7 691
<> 144:ef7eb2e8f9f7 692 PUBWEAK DMA2D_IRQHandler
<> 144:ef7eb2e8f9f7 693 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 694 DMA2D_IRQHandler
<> 144:ef7eb2e8f9f7 695 B DMA2D_IRQHandler
<> 144:ef7eb2e8f9f7 696
<> 144:ef7eb2e8f9f7 697 PUBWEAK SAI2_IRQHandler
<> 144:ef7eb2e8f9f7 698 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 699 SAI2_IRQHandler
<> 144:ef7eb2e8f9f7 700 B SAI2_IRQHandler
<> 144:ef7eb2e8f9f7 701
<> 144:ef7eb2e8f9f7 702 PUBWEAK QUADSPI_IRQHandler
<> 144:ef7eb2e8f9f7 703 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 704 QUADSPI_IRQHandler
<> 144:ef7eb2e8f9f7 705 B QUADSPI_IRQHandler
<> 144:ef7eb2e8f9f7 706
<> 144:ef7eb2e8f9f7 707 PUBWEAK LPTIM1_IRQHandler
<> 144:ef7eb2e8f9f7 708 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 709 LPTIM1_IRQHandler
<> 144:ef7eb2e8f9f7 710 B LPTIM1_IRQHandler
<> 144:ef7eb2e8f9f7 711
<> 144:ef7eb2e8f9f7 712 PUBWEAK CEC_IRQHandler
<> 144:ef7eb2e8f9f7 713 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 714 CEC_IRQHandler
<> 144:ef7eb2e8f9f7 715 B CEC_IRQHandler
<> 144:ef7eb2e8f9f7 716
<> 144:ef7eb2e8f9f7 717 PUBWEAK I2C4_EV_IRQHandler
<> 144:ef7eb2e8f9f7 718 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 719 I2C4_EV_IRQHandler
<> 144:ef7eb2e8f9f7 720 B I2C4_EV_IRQHandler
<> 144:ef7eb2e8f9f7 721
<> 144:ef7eb2e8f9f7 722 PUBWEAK I2C4_ER_IRQHandler
<> 144:ef7eb2e8f9f7 723 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 724 I2C4_ER_IRQHandler
<> 144:ef7eb2e8f9f7 725 B I2C4_ER_IRQHandler
<> 144:ef7eb2e8f9f7 726
<> 144:ef7eb2e8f9f7 727 PUBWEAK SPDIF_RX_IRQHandler
<> 144:ef7eb2e8f9f7 728 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 729 SPDIF_RX_IRQHandler
<> 144:ef7eb2e8f9f7 730 B SPDIF_RX_IRQHandler
<> 144:ef7eb2e8f9f7 731 END
<> 144:ef7eb2e8f9f7 732 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/