Johannes Stratmann / mbed-dev

added prescaler for 16 bit pwm in LPC1347 target

Fork of mbed-dev by mbed official

targets/cmsis/TARGET_STM/TARGET_STM32F2/stm32f2xx_hal_uart.h@147:ba84b7dc41a7, 2016-09-10 (annotated)

Committer:
JojoS
Date:
Sat Sep 10 15:32:04 2016 +0000
Revision:
147:ba84b7dc41a7
Parent:
144:ef7eb2e8f9f7 
added prescaler for 16 bit timers (solution as in LPC11xx), default prescaler 31 for max 28 ms period time

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file stm32f2xx_hal_uart.h
<> 144:ef7eb2e8f9f7 4 * @author MCD Application Team
<> 144:ef7eb2e8f9f7 5 * @version V1.1.3
<> 144:ef7eb2e8f9f7 6 * @date 29-June-2016
<> 144:ef7eb2e8f9f7 7 * @brief Header file of UART HAL module.
<> 144:ef7eb2e8f9f7 8 ******************************************************************************
<> 144:ef7eb2e8f9f7 9 * @attention
<> 144:ef7eb2e8f9f7 10 *
<> 144:ef7eb2e8f9f7 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 144:ef7eb2e8f9f7 12 *
<> 144:ef7eb2e8f9f7 13 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 14 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 15 * 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 16 * this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 18 * this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 19 * and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 21 * may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 22 * without specific prior written permission.
<> 144:ef7eb2e8f9f7 23 *
<> 144:ef7eb2e8f9f7 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 34 *
<> 144:ef7eb2e8f9f7 35 ******************************************************************************
<> 144:ef7eb2e8f9f7 36 */
<> 144:ef7eb2e8f9f7 37
<> 144:ef7eb2e8f9f7 38 /* Define to prevent recursive inclusion -------------------------------------*/
<> 144:ef7eb2e8f9f7 39 #ifndef __STM32F2xx_HAL_UART_H
<> 144:ef7eb2e8f9f7 40 #define __STM32F2xx_HAL_UART_H
<> 144:ef7eb2e8f9f7 41
<> 144:ef7eb2e8f9f7 42 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 43 extern "C" {
<> 144:ef7eb2e8f9f7 44 #endif
<> 144:ef7eb2e8f9f7 45
<> 144:ef7eb2e8f9f7 46 /* Includes ------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 47 #include "stm32f2xx_hal_def.h"
<> 144:ef7eb2e8f9f7 48
<> 144:ef7eb2e8f9f7 49 /** @addtogroup STM32F2xx_HAL_Driver
<> 144:ef7eb2e8f9f7 50 * @{
<> 144:ef7eb2e8f9f7 51 */
<> 144:ef7eb2e8f9f7 52
<> 144:ef7eb2e8f9f7 53 /** @addtogroup UART
<> 144:ef7eb2e8f9f7 54 * @{
<> 144:ef7eb2e8f9f7 55 */
<> 144:ef7eb2e8f9f7 56
<> 144:ef7eb2e8f9f7 57 /* Exported types ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 58 /** @defgroup UART_Exported_Types UART Exported Types
<> 144:ef7eb2e8f9f7 59 * @{
<> 144:ef7eb2e8f9f7 60 */
<> 144:ef7eb2e8f9f7 61
<> 144:ef7eb2e8f9f7 62 /**
<> 144:ef7eb2e8f9f7 63 * @brief UART Init Structure definition
<> 144:ef7eb2e8f9f7 64 */
<> 144:ef7eb2e8f9f7 65 typedef struct
<> 144:ef7eb2e8f9f7 66 {
<> 144:ef7eb2e8f9f7 67 uint32_t BaudRate; /*!< This member configures the UART communication baud rate.
<> 144:ef7eb2e8f9f7 68 The baud rate is computed using the following formula:
<> 144:ef7eb2e8f9f7 69 - IntegerDivider = ((PCLKx) / (8 * (OVR8+1) * (huart->Init.BaudRate)))
<> 144:ef7eb2e8f9f7 70 - FractionalDivider = ((IntegerDivider - ((uint32_t) IntegerDivider)) * 8 * (OVR8+1)) + 0.5
<> 144:ef7eb2e8f9f7 71 Where OVR8 is the "oversampling by 8 mode" configuration bit in the CR1 register. */
<> 144:ef7eb2e8f9f7 72
<> 144:ef7eb2e8f9f7 73 uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame.
<> 144:ef7eb2e8f9f7 74 This parameter can be a value of @ref UART_Word_Length */
<> 144:ef7eb2e8f9f7 75
<> 144:ef7eb2e8f9f7 76 uint32_t StopBits; /*!< Specifies the number of stop bits transmitted.
<> 144:ef7eb2e8f9f7 77 This parameter can be a value of @ref UART_Stop_Bits */
<> 144:ef7eb2e8f9f7 78
<> 144:ef7eb2e8f9f7 79 uint32_t Parity; /*!< Specifies the parity mode.
<> 144:ef7eb2e8f9f7 80 This parameter can be a value of @ref UART_Parity
<> 144:ef7eb2e8f9f7 81 @note When parity is enabled, the computed parity is inserted
<> 144:ef7eb2e8f9f7 82 at the MSB position of the transmitted data (9th bit when
<> 144:ef7eb2e8f9f7 83 the word length is set to 9 data bits; 8th bit when the
<> 144:ef7eb2e8f9f7 84 word length is set to 8 data bits). */
<> 144:ef7eb2e8f9f7 85
<> 144:ef7eb2e8f9f7 86 uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled.
<> 144:ef7eb2e8f9f7 87 This parameter can be a value of @ref UART_Mode */
<> 144:ef7eb2e8f9f7 88
<> 144:ef7eb2e8f9f7 89 uint32_t HwFlowCtl; /*!< Specifies whether the hardware flow control mode is enabled
<> 144:ef7eb2e8f9f7 90 or disabled.
<> 144:ef7eb2e8f9f7 91 This parameter can be a value of @ref UART_Hardware_Flow_Control */
<> 144:ef7eb2e8f9f7 92
<> 144:ef7eb2e8f9f7 93 uint32_t OverSampling; /*!< Specifies whether the Over sampling 8 is enabled or disabled, to achieve higher speed (up to fPCLK/8).
<> 144:ef7eb2e8f9f7 94 This parameter can be a value of @ref UART_Over_Sampling */
<> 144:ef7eb2e8f9f7 95 }UART_InitTypeDef;
<> 144:ef7eb2e8f9f7 96
<> 144:ef7eb2e8f9f7 97 /**
<> 144:ef7eb2e8f9f7 98 * @brief HAL UART State structures definition
<> 144:ef7eb2e8f9f7 99 * @note HAL UART State value is a combination of 2 different substates: gState and RxState.
<> 144:ef7eb2e8f9f7 100 * - gState contains UART state information related to global Handle management
<> 144:ef7eb2e8f9f7 101 * and also information related to Tx operations.
<> 144:ef7eb2e8f9f7 102 * gState value coding follow below described bitmap :
<> 144:ef7eb2e8f9f7 103 * b7-b6 Error information
<> 144:ef7eb2e8f9f7 104 * 00 : No Error
<> 144:ef7eb2e8f9f7 105 * 01 : (Not Used)
<> 144:ef7eb2e8f9f7 106 * 10 : Timeout
<> 144:ef7eb2e8f9f7 107 * 11 : Error
<> 144:ef7eb2e8f9f7 108 * b5 IP initilisation status
<> 144:ef7eb2e8f9f7 109 * 0 : Reset (IP not initialized)
<> 144:ef7eb2e8f9f7 110 * 1 : Init done (IP not initialized. HAL UART Init function already called)
<> 144:ef7eb2e8f9f7 111 * b4-b3 (not used)
<> 144:ef7eb2e8f9f7 112 * xx : Should be set to 00
<> 144:ef7eb2e8f9f7 113 * b2 Intrinsic process state
<> 144:ef7eb2e8f9f7 114 * 0 : Ready
<> 144:ef7eb2e8f9f7 115 * 1 : Busy (IP busy with some configuration or internal operations)
<> 144:ef7eb2e8f9f7 116 * b1 (not used)
<> 144:ef7eb2e8f9f7 117 * x : Should be set to 0
<> 144:ef7eb2e8f9f7 118 * b0 Tx state
<> 144:ef7eb2e8f9f7 119 * 0 : Ready (no Tx operation ongoing)
<> 144:ef7eb2e8f9f7 120 * 1 : Busy (Tx operation ongoing)
<> 144:ef7eb2e8f9f7 121 * - RxState contains information related to Rx operations.
<> 144:ef7eb2e8f9f7 122 * RxState value coding follow below described bitmap :
<> 144:ef7eb2e8f9f7 123 * b7-b6 (not used)
<> 144:ef7eb2e8f9f7 124 * xx : Should be set to 00
<> 144:ef7eb2e8f9f7 125 * b5 IP initilisation status
<> 144:ef7eb2e8f9f7 126 * 0 : Reset (IP not initialized)
<> 144:ef7eb2e8f9f7 127 * 1 : Init done (IP not initialized)
<> 144:ef7eb2e8f9f7 128 * b4-b2 (not used)
<> 144:ef7eb2e8f9f7 129 * xxx : Should be set to 000
<> 144:ef7eb2e8f9f7 130 * b1 Rx state
<> 144:ef7eb2e8f9f7 131 * 0 : Ready (no Rx operation ongoing)
<> 144:ef7eb2e8f9f7 132 * 1 : Busy (Rx operation ongoing)
<> 144:ef7eb2e8f9f7 133 * b0 (not used)
<> 144:ef7eb2e8f9f7 134 * x : Should be set to 0.
<> 144:ef7eb2e8f9f7 135 */
<> 144:ef7eb2e8f9f7 136 typedef enum
<> 144:ef7eb2e8f9f7 137 {
<> 144:ef7eb2e8f9f7 138 HAL_UART_STATE_RESET = 0x00U, /*!< Peripheral is not yet Initialized
<> 144:ef7eb2e8f9f7 139 Value is allowed for gState and RxState */
<> 144:ef7eb2e8f9f7 140 HAL_UART_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use
<> 144:ef7eb2e8f9f7 141 Value is allowed for gState and RxState */
<> 144:ef7eb2e8f9f7 142 HAL_UART_STATE_BUSY = 0x24U, /*!< an internal process is ongoing
<> 144:ef7eb2e8f9f7 143 Value is allowed for gState only */
<> 144:ef7eb2e8f9f7 144 HAL_UART_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing
<> 144:ef7eb2e8f9f7 145 Value is allowed for gState only */
<> 144:ef7eb2e8f9f7 146 HAL_UART_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing
<> 144:ef7eb2e8f9f7 147 Value is allowed for RxState only */
<> 144:ef7eb2e8f9f7 148 HAL_UART_STATE_BUSY_TX_RX = 0x23U, /*!< Data Transmission and Reception process is ongoing
<> 144:ef7eb2e8f9f7 149 Not to be used for neither gState nor RxState.
<> 144:ef7eb2e8f9f7 150 Value is result of combination (Or) between gState and RxState values */
<> 144:ef7eb2e8f9f7 151 HAL_UART_STATE_TIMEOUT = 0xA0U, /*!< Timeout state
<> 144:ef7eb2e8f9f7 152 Value is allowed for gState only */
<> 144:ef7eb2e8f9f7 153 HAL_UART_STATE_ERROR = 0xE0U /*!< Error
<> 144:ef7eb2e8f9f7 154 Value is allowed for gState only */
<> 144:ef7eb2e8f9f7 155 }HAL_UART_StateTypeDef;
<> 144:ef7eb2e8f9f7 156
<> 144:ef7eb2e8f9f7 157 /**
<> 144:ef7eb2e8f9f7 158 * @brief UART handle Structure definition
<> 144:ef7eb2e8f9f7 159 */
<> 144:ef7eb2e8f9f7 160 typedef struct
<> 144:ef7eb2e8f9f7 161 {
<> 144:ef7eb2e8f9f7 162 USART_TypeDef *Instance; /*!< UART registers base address */
<> 144:ef7eb2e8f9f7 163
<> 144:ef7eb2e8f9f7 164 UART_InitTypeDef Init; /*!< UART communication parameters */
<> 144:ef7eb2e8f9f7 165
<> 144:ef7eb2e8f9f7 166 uint8_t *pTxBuffPtr; /*!< Pointer to UART Tx transfer Buffer */
<> 144:ef7eb2e8f9f7 167
<> 144:ef7eb2e8f9f7 168 uint16_t TxXferSize; /*!< UART Tx Transfer size */
<> 144:ef7eb2e8f9f7 169
<> 144:ef7eb2e8f9f7 170 __IO uint16_t TxXferCount; /*!< UART Tx Transfer Counter */
<> 144:ef7eb2e8f9f7 171
<> 144:ef7eb2e8f9f7 172 uint8_t *pRxBuffPtr; /*!< Pointer to UART Rx transfer Buffer */
<> 144:ef7eb2e8f9f7 173
<> 144:ef7eb2e8f9f7 174 uint16_t RxXferSize; /*!< UART Rx Transfer size */
<> 144:ef7eb2e8f9f7 175
<> 144:ef7eb2e8f9f7 176 __IO uint16_t RxXferCount; /*!< UART Rx Transfer Counter */
<> 144:ef7eb2e8f9f7 177
<> 144:ef7eb2e8f9f7 178 DMA_HandleTypeDef *hdmatx; /*!< UART Tx DMA Handle parameters */
<> 144:ef7eb2e8f9f7 179
<> 144:ef7eb2e8f9f7 180 DMA_HandleTypeDef *hdmarx; /*!< UART Rx DMA Handle parameters */
<> 144:ef7eb2e8f9f7 181
<> 144:ef7eb2e8f9f7 182 HAL_LockTypeDef Lock; /*!< Locking object */
<> 144:ef7eb2e8f9f7 183
<> 144:ef7eb2e8f9f7 184 __IO HAL_UART_StateTypeDef gState; /*!< UART state information related to global Handle management
<> 144:ef7eb2e8f9f7 185 and also related to Tx operations.
<> 144:ef7eb2e8f9f7 186 This parameter can be a value of @ref HAL_UART_StateTypeDef */
<> 144:ef7eb2e8f9f7 187
<> 144:ef7eb2e8f9f7 188 __IO HAL_UART_StateTypeDef RxState; /*!< UART state information related to Rx operations.
<> 144:ef7eb2e8f9f7 189 This parameter can be a value of @ref HAL_UART_StateTypeDef */
<> 144:ef7eb2e8f9f7 190
<> 144:ef7eb2e8f9f7 191 __IO uint32_t ErrorCode; /*!< UART Error code */
<> 144:ef7eb2e8f9f7 192
<> 144:ef7eb2e8f9f7 193 }UART_HandleTypeDef;
<> 144:ef7eb2e8f9f7 194 /**
<> 144:ef7eb2e8f9f7 195 * @}
<> 144:ef7eb2e8f9f7 196 */
<> 144:ef7eb2e8f9f7 197
<> 144:ef7eb2e8f9f7 198 /* Exported constants --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 199 /** @defgroup UART_Exported_Constants UART Exported constants
<> 144:ef7eb2e8f9f7 200 * @{
<> 144:ef7eb2e8f9f7 201 */
<> 144:ef7eb2e8f9f7 202
<> 144:ef7eb2e8f9f7 203 /** @defgroup UART_Error_Code UART Error Code
<> 144:ef7eb2e8f9f7 204 * @brief UART Error Code
<> 144:ef7eb2e8f9f7 205 * @{
<> 144:ef7eb2e8f9f7 206 */
<> 144:ef7eb2e8f9f7 207 #define HAL_UART_ERROR_NONE ((uint32_t)0x00000000U) /*!< No error */
<> 144:ef7eb2e8f9f7 208 #define HAL_UART_ERROR_PE ((uint32_t)0x00000001U) /*!< Parity error */
<> 144:ef7eb2e8f9f7 209 #define HAL_UART_ERROR_NE ((uint32_t)0x00000002U) /*!< Noise error */
<> 144:ef7eb2e8f9f7 210 #define HAL_UART_ERROR_FE ((uint32_t)0x00000004U) /*!< Frame error */
<> 144:ef7eb2e8f9f7 211 #define HAL_UART_ERROR_ORE ((uint32_t)0x00000008U) /*!< Overrun error */
<> 144:ef7eb2e8f9f7 212 #define HAL_UART_ERROR_DMA ((uint32_t)0x00000010U) /*!< DMA transfer error */
<> 144:ef7eb2e8f9f7 213 /**
<> 144:ef7eb2e8f9f7 214 * @}
<> 144:ef7eb2e8f9f7 215 */
<> 144:ef7eb2e8f9f7 216
<> 144:ef7eb2e8f9f7 217 /** @defgroup UART_Word_Length UART Word Length
<> 144:ef7eb2e8f9f7 218 * @{
<> 144:ef7eb2e8f9f7 219 */
<> 144:ef7eb2e8f9f7 220 #define UART_WORDLENGTH_8B ((uint32_t)0x00000000U)
<> 144:ef7eb2e8f9f7 221 #define UART_WORDLENGTH_9B ((uint32_t)USART_CR1_M)
<> 144:ef7eb2e8f9f7 222 /**
<> 144:ef7eb2e8f9f7 223 * @}
<> 144:ef7eb2e8f9f7 224 */
<> 144:ef7eb2e8f9f7 225
<> 144:ef7eb2e8f9f7 226 /** @defgroup UART_Stop_Bits UART Number of Stop Bits
<> 144:ef7eb2e8f9f7 227 * @{
<> 144:ef7eb2e8f9f7 228 */
<> 144:ef7eb2e8f9f7 229 #define UART_STOPBITS_1 ((uint32_t)0x00000000U)
<> 144:ef7eb2e8f9f7 230 #define UART_STOPBITS_2 ((uint32_t)USART_CR2_STOP_1)
<> 144:ef7eb2e8f9f7 231 /**
<> 144:ef7eb2e8f9f7 232 * @}
<> 144:ef7eb2e8f9f7 233 */
<> 144:ef7eb2e8f9f7 234
<> 144:ef7eb2e8f9f7 235 /** @defgroup UART_Parity UART Parity
<> 144:ef7eb2e8f9f7 236 * @{
<> 144:ef7eb2e8f9f7 237 */
<> 144:ef7eb2e8f9f7 238 #define UART_PARITY_NONE ((uint32_t)0x00000000U)
<> 144:ef7eb2e8f9f7 239 #define UART_PARITY_EVEN ((uint32_t)USART_CR1_PCE)
<> 144:ef7eb2e8f9f7 240 #define UART_PARITY_ODD ((uint32_t)(USART_CR1_PCE | USART_CR1_PS))
<> 144:ef7eb2e8f9f7 241 /**
<> 144:ef7eb2e8f9f7 242 * @}
<> 144:ef7eb2e8f9f7 243 */
<> 144:ef7eb2e8f9f7 244
<> 144:ef7eb2e8f9f7 245 /** @defgroup UART_Hardware_Flow_Control UART Hardware Flow Control
<> 144:ef7eb2e8f9f7 246 * @{
<> 144:ef7eb2e8f9f7 247 */
<> 144:ef7eb2e8f9f7 248 #define UART_HWCONTROL_NONE ((uint32_t)0x00000000U)
<> 144:ef7eb2e8f9f7 249 #define UART_HWCONTROL_RTS ((uint32_t)USART_CR3_RTSE)
<> 144:ef7eb2e8f9f7 250 #define UART_HWCONTROL_CTS ((uint32_t)USART_CR3_CTSE)
<> 144:ef7eb2e8f9f7 251 #define UART_HWCONTROL_RTS_CTS ((uint32_t)(USART_CR3_RTSE | USART_CR3_CTSE))
<> 144:ef7eb2e8f9f7 252 /**
<> 144:ef7eb2e8f9f7 253 * @}
<> 144:ef7eb2e8f9f7 254 */
<> 144:ef7eb2e8f9f7 255
<> 144:ef7eb2e8f9f7 256 /** @defgroup UART_Mode UART Transfer Mode
<> 144:ef7eb2e8f9f7 257 * @{
<> 144:ef7eb2e8f9f7 258 */
<> 144:ef7eb2e8f9f7 259 #define UART_MODE_RX ((uint32_t)USART_CR1_RE)
<> 144:ef7eb2e8f9f7 260 #define UART_MODE_TX ((uint32_t)USART_CR1_TE)
<> 144:ef7eb2e8f9f7 261 #define UART_MODE_TX_RX ((uint32_t)(USART_CR1_TE |USART_CR1_RE))
<> 144:ef7eb2e8f9f7 262 /**
<> 144:ef7eb2e8f9f7 263 * @}
<> 144:ef7eb2e8f9f7 264 */
<> 144:ef7eb2e8f9f7 265
<> 144:ef7eb2e8f9f7 266 /** @defgroup UART_State UART State
<> 144:ef7eb2e8f9f7 267 * @{
<> 144:ef7eb2e8f9f7 268 */
<> 144:ef7eb2e8f9f7 269 #define UART_STATE_DISABLE ((uint32_t)0x00000000U)
<> 144:ef7eb2e8f9f7 270 #define UART_STATE_ENABLE ((uint32_t)USART_CR1_UE)
<> 144:ef7eb2e8f9f7 271 /**
<> 144:ef7eb2e8f9f7 272 * @}
<> 144:ef7eb2e8f9f7 273 */
<> 144:ef7eb2e8f9f7 274
<> 144:ef7eb2e8f9f7 275 /** @defgroup UART_Over_Sampling UART Over Sampling
<> 144:ef7eb2e8f9f7 276 * @{
<> 144:ef7eb2e8f9f7 277 */
<> 144:ef7eb2e8f9f7 278 #define UART_OVERSAMPLING_16 ((uint32_t)0x00000000U)
<> 144:ef7eb2e8f9f7 279 #define UART_OVERSAMPLING_8 ((uint32_t)USART_CR1_OVER8)
<> 144:ef7eb2e8f9f7 280 /**
<> 144:ef7eb2e8f9f7 281 * @}
<> 144:ef7eb2e8f9f7 282 */
<> 144:ef7eb2e8f9f7 283
<> 144:ef7eb2e8f9f7 284 /** @defgroup UART_LIN_Break_Detection_Length UART LIN Break Detection Length
<> 144:ef7eb2e8f9f7 285 * @{
<> 144:ef7eb2e8f9f7 286 */
<> 144:ef7eb2e8f9f7 287 #define UART_LINBREAKDETECTLENGTH_10B ((uint32_t)0x00000000U)
<> 144:ef7eb2e8f9f7 288 #define UART_LINBREAKDETECTLENGTH_11B ((uint32_t)0x00000020U)
<> 144:ef7eb2e8f9f7 289 /**
<> 144:ef7eb2e8f9f7 290 * @}
<> 144:ef7eb2e8f9f7 291 */
<> 144:ef7eb2e8f9f7 292
<> 144:ef7eb2e8f9f7 293 /** @defgroup UART_WakeUp_functions UART Wakeup Functions
<> 144:ef7eb2e8f9f7 294 * @{
<> 144:ef7eb2e8f9f7 295 */
<> 144:ef7eb2e8f9f7 296 #define UART_WAKEUPMETHOD_IDLELINE ((uint32_t)0x00000000U)
<> 144:ef7eb2e8f9f7 297 #define UART_WAKEUPMETHOD_ADDRESSMARK ((uint32_t)0x00000800U)
<> 144:ef7eb2e8f9f7 298 /**
<> 144:ef7eb2e8f9f7 299 * @}
<> 144:ef7eb2e8f9f7 300 */
<> 144:ef7eb2e8f9f7 301
<> 144:ef7eb2e8f9f7 302 /** @defgroup UART_Flags UART FLags
<> 144:ef7eb2e8f9f7 303 * Elements values convention: 0xXXXX
<> 144:ef7eb2e8f9f7 304 * - 0xXXXX : Flag mask in the SR register
<> 144:ef7eb2e8f9f7 305 * @{
<> 144:ef7eb2e8f9f7 306 */
<> 144:ef7eb2e8f9f7 307 #define UART_FLAG_CTS ((uint32_t)USART_SR_CTS)
<> 144:ef7eb2e8f9f7 308 #define UART_FLAG_LBD ((uint32_t)USART_SR_LBD)
<> 144:ef7eb2e8f9f7 309 #define UART_FLAG_TXE ((uint32_t)USART_SR_TXE)
<> 144:ef7eb2e8f9f7 310 #define UART_FLAG_TC ((uint32_t)USART_SR_TC)
<> 144:ef7eb2e8f9f7 311 #define UART_FLAG_RXNE ((uint32_t)USART_SR_RXNE)
<> 144:ef7eb2e8f9f7 312 #define UART_FLAG_IDLE ((uint32_t)USART_SR_IDLE)
<> 144:ef7eb2e8f9f7 313 #define UART_FLAG_ORE ((uint32_t)USART_SR_ORE)
<> 144:ef7eb2e8f9f7 314 #define UART_FLAG_NE ((uint32_t)USART_SR_NE)
<> 144:ef7eb2e8f9f7 315 #define UART_FLAG_FE ((uint32_t)USART_SR_FE)
<> 144:ef7eb2e8f9f7 316 #define UART_FLAG_PE ((uint32_t)USART_SR_PE)
<> 144:ef7eb2e8f9f7 317 /**
<> 144:ef7eb2e8f9f7 318 * @}
<> 144:ef7eb2e8f9f7 319 */
<> 144:ef7eb2e8f9f7 320
<> 144:ef7eb2e8f9f7 321 /** @defgroup UART_Interrupt_definition UART Interrupt Definitions
<> 144:ef7eb2e8f9f7 322 * Elements values convention: 0xY000XXXX
<> 144:ef7eb2e8f9f7 323 * - XXXX : Interrupt mask (16 bits) in the Y register
<> 144:ef7eb2e8f9f7 324 * - Y : Interrupt source register (2bits)
<> 144:ef7eb2e8f9f7 325 * - 0001: CR1 register
<> 144:ef7eb2e8f9f7 326 * - 0010: CR2 register
<> 144:ef7eb2e8f9f7 327 * - 0011: CR3 register
<> 144:ef7eb2e8f9f7 328 *
<> 144:ef7eb2e8f9f7 329 * @{
<> 144:ef7eb2e8f9f7 330 */
<> 144:ef7eb2e8f9f7 331
<> 144:ef7eb2e8f9f7 332 #define UART_IT_PE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_PEIE))
<> 144:ef7eb2e8f9f7 333 #define UART_IT_TXE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_TXEIE))
<> 144:ef7eb2e8f9f7 334 #define UART_IT_TC ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_TCIE))
<> 144:ef7eb2e8f9f7 335 #define UART_IT_RXNE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_RXNEIE))
<> 144:ef7eb2e8f9f7 336 #define UART_IT_IDLE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_IDLEIE))
<> 144:ef7eb2e8f9f7 337
<> 144:ef7eb2e8f9f7 338 #define UART_IT_LBD ((uint32_t)(UART_CR2_REG_INDEX << 28U | USART_CR2_LBDIE))
<> 144:ef7eb2e8f9f7 339
<> 144:ef7eb2e8f9f7 340 #define UART_IT_CTS ((uint32_t)(UART_CR3_REG_INDEX << 28U | USART_CR3_CTSIE))
<> 144:ef7eb2e8f9f7 341 #define UART_IT_ERR ((uint32_t)(UART_CR3_REG_INDEX << 28U | USART_CR3_EIE))
<> 144:ef7eb2e8f9f7 342 /**
<> 144:ef7eb2e8f9f7 343 * @}
<> 144:ef7eb2e8f9f7 344 */
<> 144:ef7eb2e8f9f7 345
<> 144:ef7eb2e8f9f7 346 /**
<> 144:ef7eb2e8f9f7 347 * @}
<> 144:ef7eb2e8f9f7 348 */
<> 144:ef7eb2e8f9f7 349
<> 144:ef7eb2e8f9f7 350 /* Exported macro ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 351 /** @defgroup UART_Exported_Macros UART Exported Macros
<> 144:ef7eb2e8f9f7 352 * @{
<> 144:ef7eb2e8f9f7 353 */
<> 144:ef7eb2e8f9f7 354
<> 144:ef7eb2e8f9f7 355 /** @brief Reset UART handle gstate & RxState
<> 144:ef7eb2e8f9f7 356 * @param __HANDLE__: specifies the UART Handle.
<> 144:ef7eb2e8f9f7 357 * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
<> 144:ef7eb2e8f9f7 358 * UART peripheral.
<> 144:ef7eb2e8f9f7 359 * @retval None
<> 144:ef7eb2e8f9f7 360 */
<> 144:ef7eb2e8f9f7 361 #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \
<> 144:ef7eb2e8f9f7 362 (__HANDLE__)->gState = HAL_UART_STATE_RESET; \
<> 144:ef7eb2e8f9f7 363 (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \
<> 144:ef7eb2e8f9f7 364 } while(0)
<> 144:ef7eb2e8f9f7 365
<> 144:ef7eb2e8f9f7 366 /** @brief Flushes the UART DR register
<> 144:ef7eb2e8f9f7 367 * @param __HANDLE__: specifies the UART Handle.
<> 144:ef7eb2e8f9f7 368 */
<> 144:ef7eb2e8f9f7 369 #define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) ((__HANDLE__)->Instance->DR)
<> 144:ef7eb2e8f9f7 370
<> 144:ef7eb2e8f9f7 371 /** @brief Checks whether the specified UART flag is set or not.
<> 144:ef7eb2e8f9f7 372 * @param __HANDLE__: specifies the UART Handle.
<> 144:ef7eb2e8f9f7 373 * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
<> 144:ef7eb2e8f9f7 374 * UART peripheral.
<> 144:ef7eb2e8f9f7 375 * @param __FLAG__: specifies the flag to check.
<> 144:ef7eb2e8f9f7 376 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 377 * @arg UART_FLAG_CTS: CTS Change flag (not available for UART4 and UART5)
<> 144:ef7eb2e8f9f7 378 * @arg UART_FLAG_LBD: LIN Break detection flag
<> 144:ef7eb2e8f9f7 379 * @arg UART_FLAG_TXE: Transmit data register empty flag
<> 144:ef7eb2e8f9f7 380 * @arg UART_FLAG_TC: Transmission Complete flag
<> 144:ef7eb2e8f9f7 381 * @arg UART_FLAG_RXNE: Receive data register not empty flag
<> 144:ef7eb2e8f9f7 382 * @arg UART_FLAG_IDLE: Idle Line detection flag
<> 144:ef7eb2e8f9f7 383 * @arg UART_FLAG_ORE: Overrun Error flag
<> 144:ef7eb2e8f9f7 384 * @arg UART_FLAG_NE: Noise Error flag
<> 144:ef7eb2e8f9f7 385 * @arg UART_FLAG_FE: Framing Error flag
<> 144:ef7eb2e8f9f7 386 * @arg UART_FLAG_PE: Parity Error flag
<> 144:ef7eb2e8f9f7 387 * @retval The new state of __FLAG__ (TRUE or FALSE).
<> 144:ef7eb2e8f9f7 388 */
<> 144:ef7eb2e8f9f7 389
<> 144:ef7eb2e8f9f7 390 #define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__))
<> 144:ef7eb2e8f9f7 391
<> 144:ef7eb2e8f9f7 392 /** @brief Clears the specified UART pending flag.
<> 144:ef7eb2e8f9f7 393 * @param __HANDLE__: specifies the UART Handle.
<> 144:ef7eb2e8f9f7 394 * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
<> 144:ef7eb2e8f9f7 395 * UART peripheral.
<> 144:ef7eb2e8f9f7 396 * @param __FLAG__: specifies the flag to check.
<> 144:ef7eb2e8f9f7 397 * This parameter can be any combination of the following values:
<> 144:ef7eb2e8f9f7 398 * @arg UART_FLAG_CTS: CTS Change flag (not available for UART4 and UART5).
<> 144:ef7eb2e8f9f7 399 * @arg UART_FLAG_LBD: LIN Break detection flag.
<> 144:ef7eb2e8f9f7 400 * @arg UART_FLAG_TC: Transmission Complete flag.
<> 144:ef7eb2e8f9f7 401 * @arg UART_FLAG_RXNE: Receive data register not empty flag.
<> 144:ef7eb2e8f9f7 402 *
<> 144:ef7eb2e8f9f7 403 * @note PE (Parity error), FE (Framing error), NE (Noise error), ORE (Overrun
<> 144:ef7eb2e8f9f7 404 * error) and IDLE (Idle line detected) flags are cleared by software
<> 144:ef7eb2e8f9f7 405 * sequence: a read operation to USART_SR register followed by a read
<> 144:ef7eb2e8f9f7 406 * operation to USART_DR register.
<> 144:ef7eb2e8f9f7 407 * @note RXNE flag can be also cleared by a read to the USART_DR register.
<> 144:ef7eb2e8f9f7 408 * @note TC flag can be also cleared by software sequence: a read operation to
<> 144:ef7eb2e8f9f7 409 * USART_SR register followed by a write operation to USART_DR register.
<> 144:ef7eb2e8f9f7 410 * @note TXE flag is cleared only by a write to the USART_DR register.
<> 144:ef7eb2e8f9f7 411 *
<> 144:ef7eb2e8f9f7 412 * @retval None
<> 144:ef7eb2e8f9f7 413 */
<> 144:ef7eb2e8f9f7 414 #define __HAL_UART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR = ~(__FLAG__))
<> 144:ef7eb2e8f9f7 415
<> 144:ef7eb2e8f9f7 416 /** @brief Clear the UART PE pending flag.
<> 144:ef7eb2e8f9f7 417 * @param __HANDLE__: specifies the UART Handle.
<> 144:ef7eb2e8f9f7 418 * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
<> 144:ef7eb2e8f9f7 419 * UART peripheral.
<> 144:ef7eb2e8f9f7 420 * @retval None
<> 144:ef7eb2e8f9f7 421 */
<> 144:ef7eb2e8f9f7 422 #define __HAL_UART_CLEAR_PEFLAG(__HANDLE__) \
<> 144:ef7eb2e8f9f7 423 do{ \
<> 144:ef7eb2e8f9f7 424 __IO uint32_t tmpreg_pe = 0x00U; \
<> 144:ef7eb2e8f9f7 425 tmpreg_pe = (__HANDLE__)->Instance->SR; \
<> 144:ef7eb2e8f9f7 426 tmpreg_pe = (__HANDLE__)->Instance->DR; \
<> 144:ef7eb2e8f9f7 427 UNUSED(tmpreg_pe); \
<> 144:ef7eb2e8f9f7 428 } while(0)
<> 144:ef7eb2e8f9f7 429
<> 144:ef7eb2e8f9f7 430 /** @brief Clear the UART FE pending flag.
<> 144:ef7eb2e8f9f7 431 * @param __HANDLE__: specifies the UART Handle.
<> 144:ef7eb2e8f9f7 432 * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
<> 144:ef7eb2e8f9f7 433 * UART peripheral.
<> 144:ef7eb2e8f9f7 434 * @retval None
<> 144:ef7eb2e8f9f7 435 */
<> 144:ef7eb2e8f9f7 436 #define __HAL_UART_CLEAR_FEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__)
<> 144:ef7eb2e8f9f7 437
<> 144:ef7eb2e8f9f7 438 /** @brief Clear the UART NE pending flag.
<> 144:ef7eb2e8f9f7 439 * @param __HANDLE__: specifies the UART Handle.
<> 144:ef7eb2e8f9f7 440 * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
<> 144:ef7eb2e8f9f7 441 * UART peripheral.
<> 144:ef7eb2e8f9f7 442 * @retval None
<> 144:ef7eb2e8f9f7 443 */
<> 144:ef7eb2e8f9f7 444 #define __HAL_UART_CLEAR_NEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__)
<> 144:ef7eb2e8f9f7 445
<> 144:ef7eb2e8f9f7 446 /** @brief Clear the UART ORE pending flag.
<> 144:ef7eb2e8f9f7 447 * @param __HANDLE__: specifies the UART Handle.
<> 144:ef7eb2e8f9f7 448 * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
<> 144:ef7eb2e8f9f7 449 * UART peripheral.
<> 144:ef7eb2e8f9f7 450 * @retval None
<> 144:ef7eb2e8f9f7 451 */
<> 144:ef7eb2e8f9f7 452 #define __HAL_UART_CLEAR_OREFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__)
<> 144:ef7eb2e8f9f7 453
<> 144:ef7eb2e8f9f7 454 /** @brief Clear the UART IDLE pending flag.
<> 144:ef7eb2e8f9f7 455 * @param __HANDLE__: specifies the UART Handle.
<> 144:ef7eb2e8f9f7 456 * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
<> 144:ef7eb2e8f9f7 457 * UART peripheral.
<> 144:ef7eb2e8f9f7 458 * @retval None
<> 144:ef7eb2e8f9f7 459 */
<> 144:ef7eb2e8f9f7 460 #define __HAL_UART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__)
<> 144:ef7eb2e8f9f7 461
<> 144:ef7eb2e8f9f7 462 /** @brief Enable the specified UART interrupt.
<> 144:ef7eb2e8f9f7 463 * @param __HANDLE__: specifies the UART Handle.
<> 144:ef7eb2e8f9f7 464 * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
<> 144:ef7eb2e8f9f7 465 * UART peripheral.
<> 144:ef7eb2e8f9f7 466 * @param __INTERRUPT__: specifies the UART interrupt source to enable.
<> 144:ef7eb2e8f9f7 467 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 468 * @arg UART_IT_CTS: CTS change interrupt
<> 144:ef7eb2e8f9f7 469 * @arg UART_IT_LBD: LIN Break detection interrupt
<> 144:ef7eb2e8f9f7 470 * @arg UART_IT_TXE: Transmit Data Register empty interrupt
<> 144:ef7eb2e8f9f7 471 * @arg UART_IT_TC: Transmission complete interrupt
<> 144:ef7eb2e8f9f7 472 * @arg UART_IT_RXNE: Receive Data register not empty interrupt
<> 144:ef7eb2e8f9f7 473 * @arg UART_IT_IDLE: Idle line detection interrupt
<> 144:ef7eb2e8f9f7 474 * @arg UART_IT_PE: Parity Error interrupt
<> 144:ef7eb2e8f9f7 475 * @arg UART_IT_ERR: Error interrupt(Frame error, noise error, overrun error)
<> 144:ef7eb2e8f9f7 476 * @retval None
<> 144:ef7eb2e8f9f7 477 */
<> 144:ef7eb2e8f9f7 478 #define UART_IT_MASK ((uint32_t)0x0000FFFFU)
<> 144:ef7eb2e8f9f7 479 #define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28U) == 1U)? ((__HANDLE__)->Instance->CR1 |= ((__INTERRUPT__) & UART_IT_MASK)): \
<> 144:ef7eb2e8f9f7 480 (((__INTERRUPT__) >> 28U) == 2U)? ((__HANDLE__)->Instance->CR2 |= ((__INTERRUPT__) & UART_IT_MASK)): \
<> 144:ef7eb2e8f9f7 481 ((__HANDLE__)->Instance->CR3 |= ((__INTERRUPT__) & UART_IT_MASK)))
<> 144:ef7eb2e8f9f7 482 /** @brief Disable the specified UART interrupt.
<> 144:ef7eb2e8f9f7 483 * @param __HANDLE__: specifies the UART Handle.
<> 144:ef7eb2e8f9f7 484 * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
<> 144:ef7eb2e8f9f7 485 * UART peripheral.
<> 144:ef7eb2e8f9f7 486 * @param __INTERRUPT__: specifies the UART interrupt source to disable.
<> 144:ef7eb2e8f9f7 487 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 488 * @arg UART_IT_CTS: CTS change interrupt
<> 144:ef7eb2e8f9f7 489 * @arg UART_IT_LBD: LIN Break detection interrupt
<> 144:ef7eb2e8f9f7 490 * @arg UART_IT_TXE: Transmit Data Register empty interrupt
<> 144:ef7eb2e8f9f7 491 * @arg UART_IT_TC: Transmission complete interrupt
<> 144:ef7eb2e8f9f7 492 * @arg UART_IT_RXNE: Receive Data register not empty interrupt
<> 144:ef7eb2e8f9f7 493 * @arg UART_IT_IDLE: Idle line detection interrupt
<> 144:ef7eb2e8f9f7 494 * @arg UART_IT_PE: Parity Error interrupt
<> 144:ef7eb2e8f9f7 495 * @arg UART_IT_ERR: Error interrupt(Frame error, noise error, overrun error)
<> 144:ef7eb2e8f9f7 496 * @retval None
<> 144:ef7eb2e8f9f7 497 */
<> 144:ef7eb2e8f9f7 498 #define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28U) == 1U)? ((__HANDLE__)->Instance->CR1 &= ~((__INTERRUPT__) & UART_IT_MASK)): \
<> 144:ef7eb2e8f9f7 499 (((__INTERRUPT__) >> 28U) == 2U)? ((__HANDLE__)->Instance->CR2 &= ~((__INTERRUPT__) & UART_IT_MASK)): \
<> 144:ef7eb2e8f9f7 500 ((__HANDLE__)->Instance->CR3 &= ~ ((__INTERRUPT__) & UART_IT_MASK)))
<> 144:ef7eb2e8f9f7 501
<> 144:ef7eb2e8f9f7 502 /** @brief Checks whether the specified UART interrupt has occurred or not.
<> 144:ef7eb2e8f9f7 503 * @param __HANDLE__: specifies the UART Handle.
<> 144:ef7eb2e8f9f7 504 * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
<> 144:ef7eb2e8f9f7 505 * UART peripheral.
<> 144:ef7eb2e8f9f7 506 * @param __IT__: specifies the UART interrupt source to check.
<> 144:ef7eb2e8f9f7 507 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 508 * @arg UART_IT_CTS: CTS change interrupt (not available for UART4 and UART5)
<> 144:ef7eb2e8f9f7 509 * @arg UART_IT_LBD: LIN Break detection interrupt
<> 144:ef7eb2e8f9f7 510 * @arg UART_IT_TXE: Transmit Data Register empty interrupt
<> 144:ef7eb2e8f9f7 511 * @arg UART_IT_TC: Transmission complete interrupt
<> 144:ef7eb2e8f9f7 512 * @arg UART_IT_RXNE: Receive Data register not empty interrupt
<> 144:ef7eb2e8f9f7 513 * @arg UART_IT_IDLE: Idle line detection interrupt
<> 144:ef7eb2e8f9f7 514 * @arg USART_IT_ERR: Error interrupt
<> 144:ef7eb2e8f9f7 515 * @retval The new state of __IT__ (TRUE or FALSE).
<> 144:ef7eb2e8f9f7 516 */
<> 144:ef7eb2e8f9f7 517 #define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __IT__) (((((__IT__) >> 28U) == 1U)? (__HANDLE__)->Instance->CR1:(((((uint32_t)(__IT__)) >> 28U) == 2U)? \
<> 144:ef7eb2e8f9f7 518 (__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & (((uint32_t)(__IT__)) & UART_IT_MASK))
<> 144:ef7eb2e8f9f7 519
<> 144:ef7eb2e8f9f7 520 /** @brief Enable CTS flow control
<> 144:ef7eb2e8f9f7 521 * This macro allows to enable CTS hardware flow control for a given UART instance,
<> 144:ef7eb2e8f9f7 522 * without need to call HAL_UART_Init() function.
<> 144:ef7eb2e8f9f7 523 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
<> 144:ef7eb2e8f9f7 524 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need
<> 144:ef7eb2e8f9f7 525 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
<> 144:ef7eb2e8f9f7 526 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
<> 144:ef7eb2e8f9f7 527 * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
<> 144:ef7eb2e8f9f7 528 * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
<> 144:ef7eb2e8f9f7 529 * @param __HANDLE__: specifies the UART Handle.
<> 144:ef7eb2e8f9f7 530 * The Handle Instance can be USART1, USART2 or LPUART.
<> 144:ef7eb2e8f9f7 531 * @retval None
<> 144:ef7eb2e8f9f7 532 */
<> 144:ef7eb2e8f9f7 533 #define __HAL_UART_HWCONTROL_CTS_ENABLE(__HANDLE__) \
<> 144:ef7eb2e8f9f7 534 do{ \
<> 144:ef7eb2e8f9f7 535 SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \
<> 144:ef7eb2e8f9f7 536 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_CTSE; \
<> 144:ef7eb2e8f9f7 537 } while(0)
<> 144:ef7eb2e8f9f7 538
<> 144:ef7eb2e8f9f7 539 /** @brief Disable CTS flow control
<> 144:ef7eb2e8f9f7 540 * This macro allows to disable CTS hardware flow control for a given UART instance,
<> 144:ef7eb2e8f9f7 541 * without need to call HAL_UART_Init() function.
<> 144:ef7eb2e8f9f7 542 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
<> 144:ef7eb2e8f9f7 543 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need
<> 144:ef7eb2e8f9f7 544 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
<> 144:ef7eb2e8f9f7 545 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
<> 144:ef7eb2e8f9f7 546 * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
<> 144:ef7eb2e8f9f7 547 * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
<> 144:ef7eb2e8f9f7 548 * @param __HANDLE__: specifies the UART Handle.
<> 144:ef7eb2e8f9f7 549 * The Handle Instance can be USART1, USART2 or LPUART.
<> 144:ef7eb2e8f9f7 550 * @retval None
<> 144:ef7eb2e8f9f7 551 */
<> 144:ef7eb2e8f9f7 552 #define __HAL_UART_HWCONTROL_CTS_DISABLE(__HANDLE__) \
<> 144:ef7eb2e8f9f7 553 do{ \
<> 144:ef7eb2e8f9f7 554 CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \
<> 144:ef7eb2e8f9f7 555 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_CTSE); \
<> 144:ef7eb2e8f9f7 556 } while(0)
<> 144:ef7eb2e8f9f7 557
<> 144:ef7eb2e8f9f7 558 /** @brief Enable RTS flow control
<> 144:ef7eb2e8f9f7 559 * This macro allows to enable RTS hardware flow control for a given UART instance,
<> 144:ef7eb2e8f9f7 560 * without need to call HAL_UART_Init() function.
<> 144:ef7eb2e8f9f7 561 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
<> 144:ef7eb2e8f9f7 562 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need
<> 144:ef7eb2e8f9f7 563 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
<> 144:ef7eb2e8f9f7 564 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
<> 144:ef7eb2e8f9f7 565 * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
<> 144:ef7eb2e8f9f7 566 * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
<> 144:ef7eb2e8f9f7 567 * @param __HANDLE__: specifies the UART Handle.
<> 144:ef7eb2e8f9f7 568 * The Handle Instance can be USART1, USART2 or LPUART.
<> 144:ef7eb2e8f9f7 569 * @retval None
<> 144:ef7eb2e8f9f7 570 */
<> 144:ef7eb2e8f9f7 571 #define __HAL_UART_HWCONTROL_RTS_ENABLE(__HANDLE__) \
<> 144:ef7eb2e8f9f7 572 do{ \
<> 144:ef7eb2e8f9f7 573 SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \
<> 144:ef7eb2e8f9f7 574 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_RTSE; \
<> 144:ef7eb2e8f9f7 575 } while(0)
<> 144:ef7eb2e8f9f7 576
<> 144:ef7eb2e8f9f7 577 /** @brief Disable RTS flow control
<> 144:ef7eb2e8f9f7 578 * This macro allows to disable RTS hardware flow control for a given UART instance,
<> 144:ef7eb2e8f9f7 579 * without need to call HAL_UART_Init() function.
<> 144:ef7eb2e8f9f7 580 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
<> 144:ef7eb2e8f9f7 581 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need
<> 144:ef7eb2e8f9f7 582 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
<> 144:ef7eb2e8f9f7 583 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
<> 144:ef7eb2e8f9f7 584 * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
<> 144:ef7eb2e8f9f7 585 * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
<> 144:ef7eb2e8f9f7 586 * @param __HANDLE__: specifies the UART Handle.
<> 144:ef7eb2e8f9f7 587 * The Handle Instance can be USART1, USART2 or LPUART.
<> 144:ef7eb2e8f9f7 588 * @retval None
<> 144:ef7eb2e8f9f7 589 */
<> 144:ef7eb2e8f9f7 590 #define __HAL_UART_HWCONTROL_RTS_DISABLE(__HANDLE__) \
<> 144:ef7eb2e8f9f7 591 do{ \
<> 144:ef7eb2e8f9f7 592 CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\
<> 144:ef7eb2e8f9f7 593 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_RTSE); \
<> 144:ef7eb2e8f9f7 594 } while(0)
<> 144:ef7eb2e8f9f7 595
<> 144:ef7eb2e8f9f7 596 /** @brief macros to enables the UART's one bit sample method
<> 144:ef7eb2e8f9f7 597 * @param __HANDLE__: specifies the UART Handle.
<> 144:ef7eb2e8f9f7 598 * @retval None
<> 144:ef7eb2e8f9f7 599 */
<> 144:ef7eb2e8f9f7 600 #define __HAL_UART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT)
<> 144:ef7eb2e8f9f7 601
<> 144:ef7eb2e8f9f7 602 /** @brief macros to disables the UART's one bit sample method
<> 144:ef7eb2e8f9f7 603 * @param __HANDLE__: specifies the UART Handle.
<> 144:ef7eb2e8f9f7 604 * @retval None
<> 144:ef7eb2e8f9f7 605 */
<> 144:ef7eb2e8f9f7 606 #define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= (uint16_t)~((uint16_t)USART_CR3_ONEBIT))
<> 144:ef7eb2e8f9f7 607
<> 144:ef7eb2e8f9f7 608 /** @brief Enable UART
<> 144:ef7eb2e8f9f7 609 * @param __HANDLE__: specifies the UART Handle.
<> 144:ef7eb2e8f9f7 610 * @retval None
<> 144:ef7eb2e8f9f7 611 */
<> 144:ef7eb2e8f9f7 612 #define __HAL_UART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE)
<> 144:ef7eb2e8f9f7 613
<> 144:ef7eb2e8f9f7 614 /** @brief Disable UART
<> 144:ef7eb2e8f9f7 615 * @param __HANDLE__: specifies the UART Handle.
<> 144:ef7eb2e8f9f7 616 * @retval None
<> 144:ef7eb2e8f9f7 617 */
<> 144:ef7eb2e8f9f7 618 #define __HAL_UART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE)
<> 144:ef7eb2e8f9f7 619 /**
<> 144:ef7eb2e8f9f7 620 * @}
<> 144:ef7eb2e8f9f7 621 */
<> 144:ef7eb2e8f9f7 622
<> 144:ef7eb2e8f9f7 623 /* Exported functions --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 624 /** @addtogroup UART_Exported_Functions
<> 144:ef7eb2e8f9f7 625 * @{
<> 144:ef7eb2e8f9f7 626 */
<> 144:ef7eb2e8f9f7 627
<> 144:ef7eb2e8f9f7 628 /** @addtogroup UART_Exported_Functions_Group1
<> 144:ef7eb2e8f9f7 629 * @{
<> 144:ef7eb2e8f9f7 630 */
<> 144:ef7eb2e8f9f7 631 /* Initialization/de-initialization functions **********************************/
<> 144:ef7eb2e8f9f7 632 HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart);
<> 144:ef7eb2e8f9f7 633 HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart);
<> 144:ef7eb2e8f9f7 634 HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength);
<> 144:ef7eb2e8f9f7 635 HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod);
<> 144:ef7eb2e8f9f7 636 HAL_StatusTypeDef HAL_UART_DeInit (UART_HandleTypeDef *huart);
<> 144:ef7eb2e8f9f7 637 void HAL_UART_MspInit(UART_HandleTypeDef *huart);
<> 144:ef7eb2e8f9f7 638 void HAL_UART_MspDeInit(UART_HandleTypeDef *huart);
<> 144:ef7eb2e8f9f7 639 /**
<> 144:ef7eb2e8f9f7 640 * @}
<> 144:ef7eb2e8f9f7 641 */
<> 144:ef7eb2e8f9f7 642
<> 144:ef7eb2e8f9f7 643 /** @addtogroup UART_Exported_Functions_Group2
<> 144:ef7eb2e8f9f7 644 * @{
<> 144:ef7eb2e8f9f7 645 */
<> 144:ef7eb2e8f9f7 646 /* IO operation functions *******************************************************/
<> 144:ef7eb2e8f9f7 647 HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout);
<> 144:ef7eb2e8f9f7 648 HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout);
<> 144:ef7eb2e8f9f7 649 HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
<> 144:ef7eb2e8f9f7 650 HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
<> 144:ef7eb2e8f9f7 651 HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
<> 144:ef7eb2e8f9f7 652 HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
<> 144:ef7eb2e8f9f7 653 HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart);
<> 144:ef7eb2e8f9f7 654 HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart);
<> 144:ef7eb2e8f9f7 655 HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart);
<> 144:ef7eb2e8f9f7 656 void HAL_UART_IRQHandler(UART_HandleTypeDef *huart);
<> 144:ef7eb2e8f9f7 657 void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart);
<> 144:ef7eb2e8f9f7 658 void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart);
<> 144:ef7eb2e8f9f7 659 void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart);
<> 144:ef7eb2e8f9f7 660 void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart);
<> 144:ef7eb2e8f9f7 661 void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart);
<> 144:ef7eb2e8f9f7 662 /**
<> 144:ef7eb2e8f9f7 663 * @}
<> 144:ef7eb2e8f9f7 664 */
<> 144:ef7eb2e8f9f7 665
<> 144:ef7eb2e8f9f7 666 /** @addtogroup UART_Exported_Functions_Group3
<> 144:ef7eb2e8f9f7 667 * @{
<> 144:ef7eb2e8f9f7 668 */
<> 144:ef7eb2e8f9f7 669 /* Peripheral Control functions ************************************************/
<> 144:ef7eb2e8f9f7 670 HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart);
<> 144:ef7eb2e8f9f7 671 HAL_StatusTypeDef HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart);
<> 144:ef7eb2e8f9f7 672 HAL_StatusTypeDef HAL_MultiProcessor_ExitMuteMode(UART_HandleTypeDef *huart);
<> 144:ef7eb2e8f9f7 673 HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart);
<> 144:ef7eb2e8f9f7 674 HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart);
<> 144:ef7eb2e8f9f7 675 /**
<> 144:ef7eb2e8f9f7 676 * @}
<> 144:ef7eb2e8f9f7 677 */
<> 144:ef7eb2e8f9f7 678
<> 144:ef7eb2e8f9f7 679 /** @addtogroup UART_Exported_Functions_Group4
<> 144:ef7eb2e8f9f7 680 * @{
<> 144:ef7eb2e8f9f7 681 */
<> 144:ef7eb2e8f9f7 682 /* Peripheral State functions **************************************************/
<> 144:ef7eb2e8f9f7 683 HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart);
<> 144:ef7eb2e8f9f7 684 uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart);
<> 144:ef7eb2e8f9f7 685 /**
<> 144:ef7eb2e8f9f7 686 * @}
<> 144:ef7eb2e8f9f7 687 */
<> 144:ef7eb2e8f9f7 688
<> 144:ef7eb2e8f9f7 689 /**
<> 144:ef7eb2e8f9f7 690 * @}
<> 144:ef7eb2e8f9f7 691 */
<> 144:ef7eb2e8f9f7 692 /* Private types -------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 693 /* Private variables ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 694 /* Private constants ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 695 /** @defgroup UART_Private_Constants UART Private Constants
<> 144:ef7eb2e8f9f7 696 * @{
<> 144:ef7eb2e8f9f7 697 */
<> 144:ef7eb2e8f9f7 698 /** @brief UART interruptions flag mask
<> 144:ef7eb2e8f9f7 699 *
<> 144:ef7eb2e8f9f7 700 */
<> 144:ef7eb2e8f9f7 701 #define UART_CR1_REG_INDEX 1U
<> 144:ef7eb2e8f9f7 702 #define UART_CR2_REG_INDEX 2U
<> 144:ef7eb2e8f9f7 703 #define UART_CR3_REG_INDEX 3U
<> 144:ef7eb2e8f9f7 704 /**
<> 144:ef7eb2e8f9f7 705 * @}
<> 144:ef7eb2e8f9f7 706 */
<> 144:ef7eb2e8f9f7 707
<> 144:ef7eb2e8f9f7 708 /* Private macros ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 709 /** @defgroup UART_Private_Macros UART Private Macros
<> 144:ef7eb2e8f9f7 710 * @{
<> 144:ef7eb2e8f9f7 711 */
<> 144:ef7eb2e8f9f7 712 #define IS_UART_WORD_LENGTH(LENGTH) (((LENGTH) == UART_WORDLENGTH_8B) || \
<> 144:ef7eb2e8f9f7 713 ((LENGTH) == UART_WORDLENGTH_9B))
<> 144:ef7eb2e8f9f7 714 #define IS_UART_LIN_WORD_LENGTH(LENGTH) (((LENGTH) == UART_WORDLENGTH_8B))
<> 144:ef7eb2e8f9f7 715 #define IS_UART_STOPBITS(STOPBITS) (((STOPBITS) == UART_STOPBITS_1) || \
<> 144:ef7eb2e8f9f7 716 ((STOPBITS) == UART_STOPBITS_2))
<> 144:ef7eb2e8f9f7 717 #define IS_UART_PARITY(PARITY) (((PARITY) == UART_PARITY_NONE) || \
<> 144:ef7eb2e8f9f7 718 ((PARITY) == UART_PARITY_EVEN) || \
<> 144:ef7eb2e8f9f7 719 ((PARITY) == UART_PARITY_ODD))
<> 144:ef7eb2e8f9f7 720 #define IS_UART_HARDWARE_FLOW_CONTROL(CONTROL)\
<> 144:ef7eb2e8f9f7 721 (((CONTROL) == UART_HWCONTROL_NONE) || \
<> 144:ef7eb2e8f9f7 722 ((CONTROL) == UART_HWCONTROL_RTS) || \
<> 144:ef7eb2e8f9f7 723 ((CONTROL) == UART_HWCONTROL_CTS) || \
<> 144:ef7eb2e8f9f7 724 ((CONTROL) == UART_HWCONTROL_RTS_CTS))
<> 144:ef7eb2e8f9f7 725 #define IS_UART_MODE(MODE) ((((MODE) & (uint32_t)0x0000FFF3U) == 0x00U) && ((MODE) != (uint32_t)0x00U))
<> 144:ef7eb2e8f9f7 726 #define IS_UART_STATE(STATE) (((STATE) == UART_STATE_DISABLE) || \
<> 144:ef7eb2e8f9f7 727 ((STATE) == UART_STATE_ENABLE))
<> 144:ef7eb2e8f9f7 728 #define IS_UART_OVERSAMPLING(SAMPLING) (((SAMPLING) == UART_OVERSAMPLING_16) || \
<> 144:ef7eb2e8f9f7 729 ((SAMPLING) == UART_OVERSAMPLING_8))
<> 144:ef7eb2e8f9f7 730 #define IS_UART_LIN_OVERSAMPLING(SAMPLING) (((SAMPLING) == UART_OVERSAMPLING_16))
<> 144:ef7eb2e8f9f7 731 #define IS_UART_LIN_BREAK_DETECT_LENGTH(LENGTH) (((LENGTH) == UART_LINBREAKDETECTLENGTH_10B) || \
<> 144:ef7eb2e8f9f7 732 ((LENGTH) == UART_LINBREAKDETECTLENGTH_11B))
<> 144:ef7eb2e8f9f7 733 #define IS_UART_WAKEUPMETHOD(WAKEUP) (((WAKEUP) == UART_WAKEUPMETHOD_IDLELINE) || \
<> 144:ef7eb2e8f9f7 734 ((WAKEUP) == UART_WAKEUPMETHOD_ADDRESSMARK))
<> 144:ef7eb2e8f9f7 735 #define IS_UART_BAUDRATE(BAUDRATE) ((BAUDRATE) < 10500001U)
<> 144:ef7eb2e8f9f7 736 #define IS_UART_ADDRESS(ADDRESS) ((ADDRESS) <= 0x0FU)
<> 144:ef7eb2e8f9f7 737
<> 144:ef7eb2e8f9f7 738 #define UART_DIV_SAMPLING16(_PCLK_, _BAUD_) (((_PCLK_)*25U)/(4U*(_BAUD_)))
<> 144:ef7eb2e8f9f7 739 #define UART_DIVMANT_SAMPLING16(_PCLK_, _BAUD_) (UART_DIV_SAMPLING16((_PCLK_), (_BAUD_))/100U)
<> 144:ef7eb2e8f9f7 740 #define UART_DIVFRAQ_SAMPLING16(_PCLK_, _BAUD_) (((UART_DIV_SAMPLING16((_PCLK_), (_BAUD_)) - (UART_DIVMANT_SAMPLING16((_PCLK_), (_BAUD_)) * 100U)) * 16U + 50U) / 100U)
<> 144:ef7eb2e8f9f7 741 /* UART BRR = mantissa + overflow + fraction
<> 144:ef7eb2e8f9f7 742 = (UART DIVMANT << 4) + (UART DIVFRAQ & 0xF0) + (UART DIVFRAQ & 0x0FU) */
<> 144:ef7eb2e8f9f7 743 #define UART_BRR_SAMPLING16(_PCLK_, _BAUD_) (((UART_DIVMANT_SAMPLING16((_PCLK_), (_BAUD_)) << 4U) + \
<> 144:ef7eb2e8f9f7 744 (UART_DIVFRAQ_SAMPLING16((_PCLK_), (_BAUD_)) & 0xF0U)) + \
<> 144:ef7eb2e8f9f7 745 (UART_DIVFRAQ_SAMPLING16((_PCLK_), (_BAUD_)) & 0x0FU))
<> 144:ef7eb2e8f9f7 746
<> 144:ef7eb2e8f9f7 747 #define UART_DIV_SAMPLING8(_PCLK_, _BAUD_) (((_PCLK_)*25U)/(2U*(_BAUD_)))
<> 144:ef7eb2e8f9f7 748 #define UART_DIVMANT_SAMPLING8(_PCLK_, _BAUD_) (UART_DIV_SAMPLING8((_PCLK_), (_BAUD_))/100U)
<> 144:ef7eb2e8f9f7 749 #define UART_DIVFRAQ_SAMPLING8(_PCLK_, _BAUD_) (((UART_DIV_SAMPLING8((_PCLK_), (_BAUD_)) - (UART_DIVMANT_SAMPLING8((_PCLK_), (_BAUD_)) * 100U)) * 8U + 50U) / 100U)
<> 144:ef7eb2e8f9f7 750 /* UART BRR = mantissa + overflow + fraction
<> 144:ef7eb2e8f9f7 751 = (UART DIVMANT << 4) + ((UART DIVFRAQ & 0xF8) << 1) + (UART DIVFRAQ & 0x07U) */
<> 144:ef7eb2e8f9f7 752 #define UART_BRR_SAMPLING8(_PCLK_, _BAUD_) (((UART_DIVMANT_SAMPLING8((_PCLK_), (_BAUD_)) << 4U) + \
<> 144:ef7eb2e8f9f7 753 ((UART_DIVFRAQ_SAMPLING8((_PCLK_), (_BAUD_)) & 0xF8U) << 1U)) + \
<> 144:ef7eb2e8f9f7 754 (UART_DIVFRAQ_SAMPLING8((_PCLK_), (_BAUD_)) & 0x07U))
<> 144:ef7eb2e8f9f7 755
<> 144:ef7eb2e8f9f7 756 /**
<> 144:ef7eb2e8f9f7 757 * @}
<> 144:ef7eb2e8f9f7 758 */
<> 144:ef7eb2e8f9f7 759
<> 144:ef7eb2e8f9f7 760 /* Private functions ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 761 /** @defgroup UART_Private_Functions UART Private Functions
<> 144:ef7eb2e8f9f7 762 * @{
<> 144:ef7eb2e8f9f7 763 */
<> 144:ef7eb2e8f9f7 764
<> 144:ef7eb2e8f9f7 765 /**
<> 144:ef7eb2e8f9f7 766 * @}
<> 144:ef7eb2e8f9f7 767 */
<> 144:ef7eb2e8f9f7 768
<> 144:ef7eb2e8f9f7 769 /**
<> 144:ef7eb2e8f9f7 770 * @}
<> 144:ef7eb2e8f9f7 771 */
<> 144:ef7eb2e8f9f7 772
<> 144:ef7eb2e8f9f7 773 /**
<> 144:ef7eb2e8f9f7 774 * @}
<> 144:ef7eb2e8f9f7 775 */
<> 144:ef7eb2e8f9f7 776 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 777 }
<> 144:ef7eb2e8f9f7 778 #endif
<> 144:ef7eb2e8f9f7 779
<> 144:ef7eb2e8f9f7 780 #endif /* __STM32F2xx_HAL_UART_H */
<> 144:ef7eb2e8f9f7 781
<> 144:ef7eb2e8f9f7 782 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/