Johannes Stratmann / mbed-dev

added prescaler for 16 bit pwm in LPC1347 target

Fork of mbed-dev by mbed official

targets/cmsis/TARGET_Maxim/TARGET_MAX32610/pt_regs.h@147:ba84b7dc41a7, 2016-09-10 (annotated)

Committer:
JojoS
Date:
Sat Sep 10 15:32:04 2016 +0000
Revision:
147:ba84b7dc41a7
Parent:
144:ef7eb2e8f9f7 
added prescaler for 16 bit timers (solution as in LPC11xx), default prescaler 31 for max 28 ms period time

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /*******************************************************************************
<> 144:ef7eb2e8f9f7 2 * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
<> 144:ef7eb2e8f9f7 3 *
<> 144:ef7eb2e8f9f7 4 * Permission is hereby granted, free of charge, to any person obtaining a
<> 144:ef7eb2e8f9f7 5 * copy of this software and associated documentation files (the "Software"),
<> 144:ef7eb2e8f9f7 6 * to deal in the Software without restriction, including without limitation
<> 144:ef7eb2e8f9f7 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
<> 144:ef7eb2e8f9f7 8 * and/or sell copies of the Software, and to permit persons to whom the
<> 144:ef7eb2e8f9f7 9 * Software is furnished to do so, subject to the following conditions:
<> 144:ef7eb2e8f9f7 10 *
<> 144:ef7eb2e8f9f7 11 * The above copyright notice and this permission notice shall be included
<> 144:ef7eb2e8f9f7 12 * in all copies or substantial portions of the Software.
<> 144:ef7eb2e8f9f7 13 *
<> 144:ef7eb2e8f9f7 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
<> 144:ef7eb2e8f9f7 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
<> 144:ef7eb2e8f9f7 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
<> 144:ef7eb2e8f9f7 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
<> 144:ef7eb2e8f9f7 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
<> 144:ef7eb2e8f9f7 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
<> 144:ef7eb2e8f9f7 20 * OTHER DEALINGS IN THE SOFTWARE.
<> 144:ef7eb2e8f9f7 21 *
<> 144:ef7eb2e8f9f7 22 * Except as contained in this notice, the name of Maxim Integrated
<> 144:ef7eb2e8f9f7 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
<> 144:ef7eb2e8f9f7 24 * Products, Inc. Branding Policy.
<> 144:ef7eb2e8f9f7 25 *
<> 144:ef7eb2e8f9f7 26 * The mere transfer of this software does not imply any licenses
<> 144:ef7eb2e8f9f7 27 * of trade secrets, proprietary technology, copyrights, patents,
<> 144:ef7eb2e8f9f7 28 * trademarks, maskwork rights, or any other form of intellectual
<> 144:ef7eb2e8f9f7 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
<> 144:ef7eb2e8f9f7 30 * ownership rights.
<> 144:ef7eb2e8f9f7 31 *******************************************************************************
<> 144:ef7eb2e8f9f7 32 */
<> 144:ef7eb2e8f9f7 33
<> 144:ef7eb2e8f9f7 34 #ifndef _MXC_PT_REGS_H_
<> 144:ef7eb2e8f9f7 35 #define _MXC_PT_REGS_H_
<> 144:ef7eb2e8f9f7 36
<> 144:ef7eb2e8f9f7 37 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 38 extern "C" {
<> 144:ef7eb2e8f9f7 39 #endif
<> 144:ef7eb2e8f9f7 40
<> 144:ef7eb2e8f9f7 41 #include <stdint.h>
<> 144:ef7eb2e8f9f7 42
<> 144:ef7eb2e8f9f7 43 /**
<> 144:ef7eb2e8f9f7 44 * @file pt_regs.h
<> 144:ef7eb2e8f9f7 45 * @addtogroup pt PT
<> 144:ef7eb2e8f9f7 46 * @{
<> 144:ef7eb2e8f9f7 47 */
<> 144:ef7eb2e8f9f7 48
<> 144:ef7eb2e8f9f7 49 typedef struct {
<> 144:ef7eb2e8f9f7 50 __IO uint32_t ctrl;
<> 144:ef7eb2e8f9f7 51 __IO uint32_t resync;
<> 144:ef7eb2e8f9f7 52 } mxc_ptg_regs_t;
<> 144:ef7eb2e8f9f7 53
<> 144:ef7eb2e8f9f7 54 /* Offset Register Description
<> 144:ef7eb2e8f9f7 55 ====== ================================================== */
<> 144:ef7eb2e8f9f7 56 typedef struct {
<> 144:ef7eb2e8f9f7 57 __IO uint32_t rate_length; /* 0x0000 Pulse train Output length and rate */
<> 144:ef7eb2e8f9f7 58 __IO uint32_t train; /* 0x0004 Pulse Train Output Pattern */
<> 144:ef7eb2e8f9f7 59 } mxc_pt_regs_t;
<> 144:ef7eb2e8f9f7 60
<> 144:ef7eb2e8f9f7 61 /*
<> 144:ef7eb2e8f9f7 62 Register offsets for module PT.
<> 144:ef7eb2e8f9f7 63 */
<> 144:ef7eb2e8f9f7 64 #define MXC_R_PTG_OFFS_CTRL ((uint32_t)0x00000000UL)
<> 144:ef7eb2e8f9f7 65 #define MXC_R_PTG_OFFS_RESYNC ((uint32_t)0x00000004UL)
<> 144:ef7eb2e8f9f7 66 #define MXC_R_PT_OFFS_RATE_LENGTH ((uint32_t)0x00000000UL)
<> 144:ef7eb2e8f9f7 67 #define MXC_R_PT_OFFS_TRAIN ((uint32_t)0x00000004UL)
<> 144:ef7eb2e8f9f7 68
<> 144:ef7eb2e8f9f7 69
<> 144:ef7eb2e8f9f7 70 /*
<> 144:ef7eb2e8f9f7 71 Field positions and masks for module PT.
<> 144:ef7eb2e8f9f7 72 */
<> 144:ef7eb2e8f9f7 73 #define MXC_F_PT_CTRL_ENABLE_ALL_POS 1
<> 144:ef7eb2e8f9f7 74 #define MXC_F_PT_CTRL_ENABLE_ALL ((uint32_t)(0x00000001UL << MXC_F_PT_CTRL_ENABLE_ALL_POS))
<> 144:ef7eb2e8f9f7 75
<> 144:ef7eb2e8f9f7 76 #define MXC_F_PT_RESYNC_PT0_POS 0
<> 144:ef7eb2e8f9f7 77 #define MXC_F_PT_RESYNC_PT0 ((uint32_t)(0x00000001UL << MXC_F_PT_RESYNC_PT0_POS))
<> 144:ef7eb2e8f9f7 78 #define MXC_F_PT_RESYNC_PT1_POS 1
<> 144:ef7eb2e8f9f7 79 #define MXC_F_PT_RESYNC_PT1 ((uint32_t)(0x00000001UL << MXC_F_PT_RESYNC_PT1_POS))
<> 144:ef7eb2e8f9f7 80 #define MXC_F_PT_RESYNC_PT2_POS 2
<> 144:ef7eb2e8f9f7 81 #define MXC_F_PT_RESYNC_PT2 ((uint32_t)(0x00000001UL << MXC_F_PT_RESYNC_PT2_POS))
<> 144:ef7eb2e8f9f7 82 #define MXC_F_PT_RESYNC_PT3_POS 3
<> 144:ef7eb2e8f9f7 83 #define MXC_F_PT_RESYNC_PT3 ((uint32_t)(0x00000001UL << MXC_F_PT_RESYNC_PT3_POS))
<> 144:ef7eb2e8f9f7 84 #define MXC_F_PT_RESYNC_PT4_POS 4
<> 144:ef7eb2e8f9f7 85 #define MXC_F_PT_RESYNC_PT4 ((uint32_t)(0x00000001UL << MXC_F_PT_RESYNC_PT4_POS))
<> 144:ef7eb2e8f9f7 86 #define MXC_F_PT_RESYNC_PT5_POS 5
<> 144:ef7eb2e8f9f7 87 #define MXC_F_PT_RESYNC_PT5 ((uint32_t)(0x00000001UL << MXC_F_PT_RESYNC_PT5_POS))
<> 144:ef7eb2e8f9f7 88 #define MXC_F_PT_RESYNC_PT6_POS 6
<> 144:ef7eb2e8f9f7 89 #define MXC_F_PT_RESYNC_PT6 ((uint32_t)(0x00000001UL << MXC_F_PT_RESYNC_PT6_POS))
<> 144:ef7eb2e8f9f7 90 #define MXC_F_PT_RESYNC_PT7_POS 7
<> 144:ef7eb2e8f9f7 91 #define MXC_F_PT_RESYNC_PT7 ((uint32_t)(0x00000001UL << MXC_F_PT_RESYNC_PT7_POS))
<> 144:ef7eb2e8f9f7 92
<> 144:ef7eb2e8f9f7 93 #define MXC_F_PT_RATE_LENGTH_RATE_CONTROL_POS 0
<> 144:ef7eb2e8f9f7 94 #define MXC_F_PT_RATE_LENGTH_RATE_CONTROL ((uint32_t)(0x07FFFFFFUL << MXC_F_PT_RATE_LENGTH_RATE_CONTROL_POS))
<> 144:ef7eb2e8f9f7 95 #define MXC_F_PT_RATE_LENGTH_MODE_POS 27
<> 144:ef7eb2e8f9f7 96 #define MXC_F_PT_RATE_LENGTH_MODE ((uint32_t)(0x0000001FUL << MXC_F_PT_RATE_LENGTH_MODE_POS))
<> 144:ef7eb2e8f9f7 97
<> 144:ef7eb2e8f9f7 98 /*
<> 144:ef7eb2e8f9f7 99 Field values and shifted values for module PT.
<> 144:ef7eb2e8f9f7 100 */
<> 144:ef7eb2e8f9f7 101 #define MXC_V_PT_RATE_LENGTH_MODE_32_BIT_PATTERN ((uint32_t)(0x0x00000000UL))
<> 144:ef7eb2e8f9f7 102 #define MXC_V_PT_RATE_LENGTH_MODE_SQUARE_WAVE ((uint32_t)(0x0x00000001UL))
<> 144:ef7eb2e8f9f7 103 #define MXC_V_PT_RATE_LENGTH_MODE_2_BIT_PATTERN ((uint32_t)(0x0x00000002UL))
<> 144:ef7eb2e8f9f7 104 #define MXC_V_PT_RATE_LENGTH_MODE_3_BIT_PATTERN ((uint32_t)(0x0x00000003UL))
<> 144:ef7eb2e8f9f7 105 #define MXC_V_PT_RATE_LENGTH_MODE_4_BIT_PATTERN ((uint32_t)(0x0x00000004UL))
<> 144:ef7eb2e8f9f7 106 #define MXC_V_PT_RATE_LENGTH_MODE_5_BIT_PATTERN ((uint32_t)(0x0x00000005UL))
<> 144:ef7eb2e8f9f7 107 #define MXC_V_PT_RATE_LENGTH_MODE_6_BIT_PATTERN ((uint32_t)(0x0x00000006UL))
<> 144:ef7eb2e8f9f7 108 #define MXC_V_PT_RATE_LENGTH_MODE_7_BIT_PATTERN ((uint32_t)(0x0x00000007UL))
<> 144:ef7eb2e8f9f7 109 #define MXC_V_PT_RATE_LENGTH_MODE_8_BIT_PATTERN ((uint32_t)(0x0x00000008UL))
<> 144:ef7eb2e8f9f7 110 #define MXC_V_PT_RATE_LENGTH_MODE_9_BIT_PATTERN ((uint32_t)(0x0x00000009UL))
<> 144:ef7eb2e8f9f7 111 #define MXC_V_PT_RATE_LENGTH_MODE_10_BIT_PATTERN ((uint32_t)(0x0x00000010UL))
<> 144:ef7eb2e8f9f7 112 #define MXC_V_PT_RATE_LENGTH_MODE_11_BIT_PATTERN ((uint32_t)(0x0x00000011UL))
<> 144:ef7eb2e8f9f7 113 #define MXC_V_PT_RATE_LENGTH_MODE_12_BIT_PATTERN ((uint32_t)(0x0x00000012UL))
<> 144:ef7eb2e8f9f7 114 #define MXC_V_PT_RATE_LENGTH_MODE_13_BIT_PATTERN ((uint32_t)(0x0x00000013UL))
<> 144:ef7eb2e8f9f7 115 #define MXC_V_PT_RATE_LENGTH_MODE_14_BIT_PATTERN ((uint32_t)(0x0x00000014UL))
<> 144:ef7eb2e8f9f7 116 #define MXC_V_PT_RATE_LENGTH_MODE_15_BIT_PATTERN ((uint32_t)(0x0x00000015UL))
<> 144:ef7eb2e8f9f7 117 #define MXC_V_PT_RATE_LENGTH_MODE_16_BIT_PATTERN ((uint32_t)(0x0x00000016UL))
<> 144:ef7eb2e8f9f7 118 #define MXC_V_PT_RATE_LENGTH_MODE_17_BIT_PATTERN ((uint32_t)(0x0x00000017UL))
<> 144:ef7eb2e8f9f7 119 #define MXC_V_PT_RATE_LENGTH_MODE_18_BIT_PATTERN ((uint32_t)(0x0x00000018UL))
<> 144:ef7eb2e8f9f7 120 #define MXC_V_PT_RATE_LENGTH_MODE_19_BIT_PATTERN ((uint32_t)(0x0x00000019UL))
<> 144:ef7eb2e8f9f7 121 #define MXC_V_PT_RATE_LENGTH_MODE_20_BIT_PATTERN ((uint32_t)(0x0x00000020UL))
<> 144:ef7eb2e8f9f7 122 #define MXC_V_PT_RATE_LENGTH_MODE_21_BIT_PATTERN ((uint32_t)(0x0x00000021UL))
<> 144:ef7eb2e8f9f7 123 #define MXC_V_PT_RATE_LENGTH_MODE_22_BIT_PATTERN ((uint32_t)(0x0x00000022UL))
<> 144:ef7eb2e8f9f7 124 #define MXC_V_PT_RATE_LENGTH_MODE_23_BIT_PATTERN ((uint32_t)(0x0x00000023UL))
<> 144:ef7eb2e8f9f7 125 #define MXC_V_PT_RATE_LENGTH_MODE_24_BIT_PATTERN ((uint32_t)(0x0x00000024UL))
<> 144:ef7eb2e8f9f7 126 #define MXC_V_PT_RATE_LENGTH_MODE_25_BIT_PATTERN ((uint32_t)(0x0x00000025UL))
<> 144:ef7eb2e8f9f7 127 #define MXC_V_PT_RATE_LENGTH_MODE_26_BIT_PATTERN ((uint32_t)(0x0x00000026UL))
<> 144:ef7eb2e8f9f7 128 #define MXC_V_PT_RATE_LENGTH_MODE_27_BIT_PATTERN ((uint32_t)(0x0x00000027UL))
<> 144:ef7eb2e8f9f7 129 #define MXC_V_PT_RATE_LENGTH_MODE_28_BIT_PATTERN ((uint32_t)(0x0x00000028UL))
<> 144:ef7eb2e8f9f7 130 #define MXC_V_PT_RATE_LENGTH_MODE_29_BIT_PATTERN ((uint32_t)(0x0x00000029UL))
<> 144:ef7eb2e8f9f7 131 #define MXC_V_PT_RATE_LENGTH_MODE_30_BIT_PATTERN ((uint32_t)(0x0x00000030UL))
<> 144:ef7eb2e8f9f7 132 #define MXC_V_PT_RATE_LENGTH_MODE_31_BIT_PATTERN ((uint32_t)(0x0x00000031UL))
<> 144:ef7eb2e8f9f7 133
<> 144:ef7eb2e8f9f7 134 #define MXC_S_PT_RATE_LENGTH_MODE_32_BIT_PATTERN ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_32_BIT_PATTERN << MXC_F_PT_RATE_LENGTH_MODE_POS))
<> 144:ef7eb2e8f9f7 135 #define MXC_S_PT_RATE_LENGTH_MODE_SQUARE_WAVE ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_SQUARE_WAVE << MXC_F_PT_RATE_LENGTH_MODE_POS))
<> 144:ef7eb2e8f9f7 136 #define MXC_S_PT_RATE_LENGTH_MODE_2_BIT_PATTERN ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_2_BIT_PATTERN << MXC_F_PT_RATE_LENGTH_MODE_POS))
<> 144:ef7eb2e8f9f7 137 #define MXC_S_PT_RATE_LENGTH_MODE_3_BIT_PATTERN ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_3_BIT_PATTERN << MXC_F_PT_RATE_LENGTH_MODE_POS))
<> 144:ef7eb2e8f9f7 138 #define MXC_S_PT_RATE_LENGTH_MODE_4_BIT_PATTERN ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_4_BIT_PATTERN << MXC_F_PT_RATE_LENGTH_MODE_POS))
<> 144:ef7eb2e8f9f7 139 #define MXC_S_PT_RATE_LENGTH_MODE_5_BIT_PATTERN ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_5_BIT_PATTERN << MXC_F_PT_RATE_LENGTH_MODE_POS))
<> 144:ef7eb2e8f9f7 140 #define MXC_S_PT_RATE_LENGTH_MODE_6_BIT_PATTERN ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_6_BIT_PATTERN << MXC_F_PT_RATE_LENGTH_MODE_POS))
<> 144:ef7eb2e8f9f7 141 #define MXC_S_PT_RATE_LENGTH_MODE_7_BIT_PATTERN ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_7_BIT_PATTERN << MXC_F_PT_RATE_LENGTH_MODE_POS))
<> 144:ef7eb2e8f9f7 142 #define MXC_S_PT_RATE_LENGTH_MODE_8_BIT_PATTERN ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_8_BIT_PATTERN << MXC_F_PT_RATE_LENGTH_MODE_POS))
<> 144:ef7eb2e8f9f7 143 #define MXC_S_PT_RATE_LENGTH_MODE_9_BIT_PATTERN ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_9_BIT_PATTERN << MXC_F_PT_RATE_LENGTH_MODE_POS))
<> 144:ef7eb2e8f9f7 144 #define MXC_S_PT_RATE_LENGTH_MODE_10_BIT_PATTERN ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_10_BIT_PATTERN << MXC_F_PT_RATE_LENGTH_MODE_POS))
<> 144:ef7eb2e8f9f7 145 #define MXC_S_PT_RATE_LENGTH_MODE_11_BIT_PATTERN ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_11_BIT_PATTERN << MXC_F_PT_RATE_LENGTH_MODE_POS))
<> 144:ef7eb2e8f9f7 146 #define MXC_S_PT_RATE_LENGTH_MODE_12_BIT_PATTERN ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_12_BIT_PATTERN << MXC_F_PT_RATE_LENGTH_MODE_POS))
<> 144:ef7eb2e8f9f7 147 #define MXC_S_PT_RATE_LENGTH_MODE_13_BIT_PATTERN ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_13_BIT_PATTERN << MXC_F_PT_RATE_LENGTH_MODE_POS))
<> 144:ef7eb2e8f9f7 148 #define MXC_S_PT_RATE_LENGTH_MODE_14_BIT_PATTERN ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_14_BIT_PATTERN << MXC_F_PT_RATE_LENGTH_MODE_POS))
<> 144:ef7eb2e8f9f7 149 #define MXC_S_PT_RATE_LENGTH_MODE_15_BIT_PATTERN ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_15_BIT_PATTERN << MXC_F_PT_RATE_LENGTH_MODE_POS))
<> 144:ef7eb2e8f9f7 150 #define MXC_S_PT_RATE_LENGTH_MODE_16_BIT_PATTERN ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_16_BIT_PATTERN << MXC_F_PT_RATE_LENGTH_MODE_POS))
<> 144:ef7eb2e8f9f7 151 #define MXC_S_PT_RATE_LENGTH_MODE_17_BIT_PATTERN ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_17_BIT_PATTERN << MXC_F_PT_RATE_LENGTH_MODE_POS))
<> 144:ef7eb2e8f9f7 152 #define MXC_S_PT_RATE_LENGTH_MODE_18_BIT_PATTERN ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_18_BIT_PATTERN << MXC_F_PT_RATE_LENGTH_MODE_POS))
<> 144:ef7eb2e8f9f7 153 #define MXC_S_PT_RATE_LENGTH_MODE_19_BIT_PATTERN ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_19_BIT_PATTERN << MXC_F_PT_RATE_LENGTH_MODE_POS))
<> 144:ef7eb2e8f9f7 154 #define MXC_S_PT_RATE_LENGTH_MODE_20_BIT_PATTERN ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_20_BIT_PATTERN << MXC_F_PT_RATE_LENGTH_MODE_POS))
<> 144:ef7eb2e8f9f7 155 #define MXC_S_PT_RATE_LENGTH_MODE_21_BIT_PATTERN ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_21_BIT_PATTERN << MXC_F_PT_RATE_LENGTH_MODE_POS))
<> 144:ef7eb2e8f9f7 156 #define MXC_S_PT_RATE_LENGTH_MODE_22_BIT_PATTERN ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_22_BIT_PATTERN << MXC_F_PT_RATE_LENGTH_MODE_POS))
<> 144:ef7eb2e8f9f7 157 #define MXC_S_PT_RATE_LENGTH_MODE_23_BIT_PATTERN ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_23_BIT_PATTERN << MXC_F_PT_RATE_LENGTH_MODE_POS))
<> 144:ef7eb2e8f9f7 158 #define MXC_S_PT_RATE_LENGTH_MODE_24_BIT_PATTERN ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_24_BIT_PATTERN << MXC_F_PT_RATE_LENGTH_MODE_POS))
<> 144:ef7eb2e8f9f7 159 #define MXC_S_PT_RATE_LENGTH_MODE_25_BIT_PATTERN ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_25_BIT_PATTERN << MXC_F_PT_RATE_LENGTH_MODE_POS))
<> 144:ef7eb2e8f9f7 160 #define MXC_S_PT_RATE_LENGTH_MODE_26_BIT_PATTERN ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_26_BIT_PATTERN << MXC_F_PT_RATE_LENGTH_MODE_POS))
<> 144:ef7eb2e8f9f7 161 #define MXC_S_PT_RATE_LENGTH_MODE_27_BIT_PATTERN ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_27_BIT_PATTERN << MXC_F_PT_RATE_LENGTH_MODE_POS))
<> 144:ef7eb2e8f9f7 162 #define MXC_S_PT_RATE_LENGTH_MODE_28_BIT_PATTERN ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_28_BIT_PATTERN << MXC_F_PT_RATE_LENGTH_MODE_POS))
<> 144:ef7eb2e8f9f7 163 #define MXC_S_PT_RATE_LENGTH_MODE_29_BIT_PATTERN ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_29_BIT_PATTERN << MXC_F_PT_RATE_LENGTH_MODE_POS))
<> 144:ef7eb2e8f9f7 164 #define MXC_S_PT_RATE_LENGTH_MODE_30_BIT_PATTERN ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_30_BIT_PATTERN << MXC_F_PT_RATE_LENGTH_MODE_POS))
<> 144:ef7eb2e8f9f7 165 #define MXC_S_PT_RATE_LENGTH_MODE_31_BIT_PATTERN ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_31_BIT_PATTERN << MXC_F_PT_RATE_LENGTH_MODE_POS))
<> 144:ef7eb2e8f9f7 166
<> 144:ef7eb2e8f9f7 167 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 168 }
<> 144:ef7eb2e8f9f7 169 #endif
<> 144:ef7eb2e8f9f7 170
<> 144:ef7eb2e8f9f7 171 /**
<> 144:ef7eb2e8f9f7 172 * @}
<> 144:ef7eb2e8f9f7 173 */
<> 144:ef7eb2e8f9f7 174
<> 144:ef7eb2e8f9f7 175 #endif /* _MXC_PT_REGS_H_ */