Johannes Stratmann / mbed-dev

added prescaler for 16 bit pwm in LPC1347 target

Fork of mbed-dev by mbed official

targets/cmsis/TARGET_Maxim/TARGET_MAX32610/maa_regs.h@147:ba84b7dc41a7, 2016-09-10 (annotated)

Committer:
JojoS
Date:
Sat Sep 10 15:32:04 2016 +0000
Revision:
147:ba84b7dc41a7
Parent:
144:ef7eb2e8f9f7 
added prescaler for 16 bit timers (solution as in LPC11xx), default prescaler 31 for max 28 ms period time

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /*******************************************************************************
<> 144:ef7eb2e8f9f7 2 * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
<> 144:ef7eb2e8f9f7 3 *
<> 144:ef7eb2e8f9f7 4 * Permission is hereby granted, free of charge, to any person obtaining a
<> 144:ef7eb2e8f9f7 5 * copy of this software and associated documentation files (the "Software"),
<> 144:ef7eb2e8f9f7 6 * to deal in the Software without restriction, including without limitation
<> 144:ef7eb2e8f9f7 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
<> 144:ef7eb2e8f9f7 8 * and/or sell copies of the Software, and to permit persons to whom the
<> 144:ef7eb2e8f9f7 9 * Software is furnished to do so, subject to the following conditions:
<> 144:ef7eb2e8f9f7 10 *
<> 144:ef7eb2e8f9f7 11 * The above copyright notice and this permission notice shall be included
<> 144:ef7eb2e8f9f7 12 * in all copies or substantial portions of the Software.
<> 144:ef7eb2e8f9f7 13 *
<> 144:ef7eb2e8f9f7 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
<> 144:ef7eb2e8f9f7 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
<> 144:ef7eb2e8f9f7 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
<> 144:ef7eb2e8f9f7 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
<> 144:ef7eb2e8f9f7 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
<> 144:ef7eb2e8f9f7 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
<> 144:ef7eb2e8f9f7 20 * OTHER DEALINGS IN THE SOFTWARE.
<> 144:ef7eb2e8f9f7 21 *
<> 144:ef7eb2e8f9f7 22 * Except as contained in this notice, the name of Maxim Integrated
<> 144:ef7eb2e8f9f7 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
<> 144:ef7eb2e8f9f7 24 * Products, Inc. Branding Policy.
<> 144:ef7eb2e8f9f7 25 *
<> 144:ef7eb2e8f9f7 26 * The mere transfer of this software does not imply any licenses
<> 144:ef7eb2e8f9f7 27 * of trade secrets, proprietary technology, copyrights, patents,
<> 144:ef7eb2e8f9f7 28 * trademarks, maskwork rights, or any other form of intellectual
<> 144:ef7eb2e8f9f7 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
<> 144:ef7eb2e8f9f7 30 * ownership rights.
<> 144:ef7eb2e8f9f7 31 *******************************************************************************
<> 144:ef7eb2e8f9f7 32 */
<> 144:ef7eb2e8f9f7 33
<> 144:ef7eb2e8f9f7 34 #ifndef _MXC_MAA_REGS_H_
<> 144:ef7eb2e8f9f7 35 #define _MXC_MAA_REGS_H_
<> 144:ef7eb2e8f9f7 36
<> 144:ef7eb2e8f9f7 37 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 38 extern "C" {
<> 144:ef7eb2e8f9f7 39 #endif
<> 144:ef7eb2e8f9f7 40
<> 144:ef7eb2e8f9f7 41 #include <stdint.h>
<> 144:ef7eb2e8f9f7 42
<> 144:ef7eb2e8f9f7 43 /**
<> 144:ef7eb2e8f9f7 44 * @file maa_regs.h
<> 144:ef7eb2e8f9f7 45 * @addtogroup maa MAA
<> 144:ef7eb2e8f9f7 46 * @{
<> 144:ef7eb2e8f9f7 47 */
<> 144:ef7eb2e8f9f7 48
<> 144:ef7eb2e8f9f7 49 /* Offset Register Description
<> 144:ef7eb2e8f9f7 50 ====== ========================================================== */
<> 144:ef7eb2e8f9f7 51 typedef struct {
<> 144:ef7eb2e8f9f7 52 __IO uint32_t ctrl; /* 0x0000 MAA Control, Configuration and Status */
<> 144:ef7eb2e8f9f7 53 __IO uint32_t maws; /* 0x0004 MAA Word (Operand) Size, Big/Little Endian Mode Select */
<> 144:ef7eb2e8f9f7 54 } mxc_maa_regs_t;
<> 144:ef7eb2e8f9f7 55
<> 144:ef7eb2e8f9f7 56 /* Offset Register Description
<> 144:ef7eb2e8f9f7 57 ====== ========================================================== */
<> 144:ef7eb2e8f9f7 58 typedef struct {
<> 144:ef7eb2e8f9f7 59 __IO uint32_t seg0[16]; /* 0x0000 [64 bytes] MAA Memory Segment 0 */
<> 144:ef7eb2e8f9f7 60 __IO uint32_t seg1[16]; /* 0x0040 [64 bytes] MAA Memory Segment 1 */
<> 144:ef7eb2e8f9f7 61 __IO uint32_t seg2[16]; /* 0x0080 [64 bytes] MAA Memory Segment 2 */
<> 144:ef7eb2e8f9f7 62 __IO uint32_t seg3[16]; /* 0x00C0 [64 bytes] MAA Memory Segment 3 */
<> 144:ef7eb2e8f9f7 63 __IO uint32_t seg4[16]; /* 0x0100 [64 bytes] MAA Memory Segment 4 */
<> 144:ef7eb2e8f9f7 64 __IO uint32_t seg5[16]; /* 0x0140 [64 bytes] MAA Memory Segment 5 */
<> 144:ef7eb2e8f9f7 65 } mxc_maa_mem_regs_t;
<> 144:ef7eb2e8f9f7 66
<> 144:ef7eb2e8f9f7 67 /*
<> 144:ef7eb2e8f9f7 68 Register offsets for module MAA.
<> 144:ef7eb2e8f9f7 69 */
<> 144:ef7eb2e8f9f7 70 #define MXC_R_MAA_OFFS_CTRL ((uint32_t)0x00000000UL)
<> 144:ef7eb2e8f9f7 71 #define MXC_R_MAA_OFFS_MAWS ((uint32_t)0x00000004UL)
<> 144:ef7eb2e8f9f7 72 #define MXC_R_MAA_MEM_OFFS_SEG0 ((uint32_t)0x00000000UL)
<> 144:ef7eb2e8f9f7 73 #define MXC_R_MAA_MEM_OFFS_SEG1 ((uint32_t)0x00000040UL)
<> 144:ef7eb2e8f9f7 74 #define MXC_R_MAA_MEM_OFFS_SEG2 ((uint32_t)0x00000080UL)
<> 144:ef7eb2e8f9f7 75 #define MXC_R_MAA_MEM_OFFS_SEG3 ((uint32_t)0x000000C0UL)
<> 144:ef7eb2e8f9f7 76 #define MXC_R_MAA_MEM_OFFS_SEG4 ((uint32_t)0x00000100UL)
<> 144:ef7eb2e8f9f7 77 #define MXC_R_MAA_MEM_OFFS_SEG5 ((uint32_t)0x00000140UL)
<> 144:ef7eb2e8f9f7 78
<> 144:ef7eb2e8f9f7 79 /*
<> 144:ef7eb2e8f9f7 80 Field positions and masks for module MAA.
<> 144:ef7eb2e8f9f7 81 */
<> 144:ef7eb2e8f9f7 82 #define MXC_F_MAA_CTRL_START_POS 0
<> 144:ef7eb2e8f9f7 83 #define MXC_F_MAA_CTRL_START ((uint32_t)(0x00000001UL << MXC_F_MAA_CTRL_START_POS))
<> 144:ef7eb2e8f9f7 84 #define MXC_F_MAA_CTRL_OPSEL_POS 1
<> 144:ef7eb2e8f9f7 85 #define MXC_F_MAA_CTRL_OPSEL ((uint32_t)(0x00000007UL << MXC_F_MAA_CTRL_OPSEL_POS))
<> 144:ef7eb2e8f9f7 86 #define MXC_F_MAA_CTRL_OCALC_POS 4
<> 144:ef7eb2e8f9f7 87 #define MXC_F_MAA_CTRL_OCALC ((uint32_t)(0x00000001UL << MXC_F_MAA_CTRL_OCALC_POS))
<> 144:ef7eb2e8f9f7 88 #define MXC_F_MAA_CTRL_INTEN_POS 5
<> 144:ef7eb2e8f9f7 89 #define MXC_F_MAA_CTRL_INTEN ((uint32_t)(0x00000001UL << MXC_F_MAA_CTRL_INTEN_POS))
<> 144:ef7eb2e8f9f7 90 #define MXC_F_MAA_CTRL_IF_DONE_POS 6
<> 144:ef7eb2e8f9f7 91 #define MXC_F_MAA_CTRL_IF_DONE ((uint32_t)(0x00000001UL << MXC_F_MAA_CTRL_IF_DONE_POS))
<> 144:ef7eb2e8f9f7 92 #define MXC_F_MAA_CTRL_IF_ERROR_POS 7
<> 144:ef7eb2e8f9f7 93 #define MXC_F_MAA_CTRL_IF_ERROR ((uint32_t)(0x00000001UL << MXC_F_MAA_CTRL_IF_ERROR_POS))
<> 144:ef7eb2e8f9f7 94 #define MXC_F_MAA_CTRL_OFS_A_POS 8
<> 144:ef7eb2e8f9f7 95 #define MXC_F_MAA_CTRL_OFS_A ((uint32_t)(0x00000003UL << MXC_F_MAA_CTRL_OFS_A_POS))
<> 144:ef7eb2e8f9f7 96 #define MXC_F_MAA_CTRL_OFS_B_POS 10
<> 144:ef7eb2e8f9f7 97 #define MXC_F_MAA_CTRL_OFS_B ((uint32_t)(0x00000003UL << MXC_F_MAA_CTRL_OFS_B_POS))
<> 144:ef7eb2e8f9f7 98 #define MXC_F_MAA_CTRL_OFS_EXP_POS 12
<> 144:ef7eb2e8f9f7 99 #define MXC_F_MAA_CTRL_OFS_EXP ((uint32_t)(0x00000003UL << MXC_F_MAA_CTRL_OFS_EXP_POS))
<> 144:ef7eb2e8f9f7 100 #define MXC_F_MAA_CTRL_OFS_MOD_POS 14
<> 144:ef7eb2e8f9f7 101 #define MXC_F_MAA_CTRL_OFS_MOD ((uint32_t)(0x00000003UL << MXC_F_MAA_CTRL_OFS_MOD_POS))
<> 144:ef7eb2e8f9f7 102 #define MXC_F_MAA_CTRL_SEG_A_POS 16
<> 144:ef7eb2e8f9f7 103 #define MXC_F_MAA_CTRL_SEG_A ((uint32_t)(0x0000000FUL << MXC_F_MAA_CTRL_SEG_A_POS))
<> 144:ef7eb2e8f9f7 104 #define MXC_F_MAA_CTRL_SEG_B_POS 20
<> 144:ef7eb2e8f9f7 105 #define MXC_F_MAA_CTRL_SEG_B ((uint32_t)(0x0000000FUL << MXC_F_MAA_CTRL_SEG_B_POS))
<> 144:ef7eb2e8f9f7 106 #define MXC_F_MAA_CTRL_SEG_RES_POS 24
<> 144:ef7eb2e8f9f7 107 #define MXC_F_MAA_CTRL_SEG_RES ((uint32_t)(0x0000000FUL << MXC_F_MAA_CTRL_SEG_RES_POS))
<> 144:ef7eb2e8f9f7 108 #define MXC_F_MAA_CTRL_SEG_TMP_POS 28
<> 144:ef7eb2e8f9f7 109 #define MXC_F_MAA_CTRL_SEG_TMP ((uint32_t)(0x0000000FUL << MXC_F_MAA_CTRL_SEG_TMP_POS))
<> 144:ef7eb2e8f9f7 110
<> 144:ef7eb2e8f9f7 111 #define MXC_F_MAA_MAWS_MODLEN_POS 0
<> 144:ef7eb2e8f9f7 112 #define MXC_F_MAA_MAWS_MODLEN ((uint32_t)(0x000003FFUL << MXC_F_MAA_MAWS_MODLEN_POS))
<> 144:ef7eb2e8f9f7 113 #define MXC_F_MAA_MAWS_BYTESWAP_POS 16
<> 144:ef7eb2e8f9f7 114 #define MXC_F_MAA_MAWS_BYTESWAP ((uint32_t)(0x00000001UL << MXC_F_MAA_MAWS_BYTESWAP_POS))
<> 144:ef7eb2e8f9f7 115
<> 144:ef7eb2e8f9f7 116 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 117 }
<> 144:ef7eb2e8f9f7 118 #endif
<> 144:ef7eb2e8f9f7 119
<> 144:ef7eb2e8f9f7 120 /**
<> 144:ef7eb2e8f9f7 121 * @}
<> 144:ef7eb2e8f9f7 122 */
<> 144:ef7eb2e8f9f7 123
<> 144:ef7eb2e8f9f7 124 #endif /* _MXC_MAA_REGS_H_ */