Johannes Stratmann / mbed-dev

added prescaler for 16 bit pwm in LPC1347 target

Fork of mbed-dev by mbed official

targets/cmsis/TARGET_Maxim/TARGET_MAX32600/TOOLCHAIN_ARM_STD/startup_MAX32600.S@147:ba84b7dc41a7, 2016-09-10 (annotated)

Committer:
JojoS
Date:
Sat Sep 10 15:32:04 2016 +0000
Revision:
147:ba84b7dc41a7
Parent:
144:ef7eb2e8f9f7 
added prescaler for 16 bit timers (solution as in LPC11xx), default prescaler 31 for max 28 ms period time

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 ;*******************************************************************************
<> 144:ef7eb2e8f9f7 2 ; Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
<> 144:ef7eb2e8f9f7 3 ;
<> 144:ef7eb2e8f9f7 4 ; Permission is hereby granted, free of charge, to any person obtaining a
<> 144:ef7eb2e8f9f7 5 ; copy of this software and associated documentation files (the "Software"),
<> 144:ef7eb2e8f9f7 6 ; to deal in the Software without restriction, including without limitation
<> 144:ef7eb2e8f9f7 7 ; the rights to use, copy, modify, merge, publish, distribute, sublicense,
<> 144:ef7eb2e8f9f7 8 ; and/or sell copies of the Software, and to permit persons to whom the
<> 144:ef7eb2e8f9f7 9 ; Software is furnished to do so, subject to the following conditions:
<> 144:ef7eb2e8f9f7 10 ;
<> 144:ef7eb2e8f9f7 11 ; The above copyright notice and this permission notice shall be included
<> 144:ef7eb2e8f9f7 12 ; in all copies or substantial portions of the Software.
<> 144:ef7eb2e8f9f7 13 ;
<> 144:ef7eb2e8f9f7 14 ; THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
<> 144:ef7eb2e8f9f7 15 ; OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
<> 144:ef7eb2e8f9f7 16 ; MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
<> 144:ef7eb2e8f9f7 17 ; IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
<> 144:ef7eb2e8f9f7 18 ; OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
<> 144:ef7eb2e8f9f7 19 ; ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
<> 144:ef7eb2e8f9f7 20 ; OTHER DEALINGS IN THE SOFTWARE.
<> 144:ef7eb2e8f9f7 21 ;
<> 144:ef7eb2e8f9f7 22 ; Except as contained in this notice, the name of Maxim Integrated
<> 144:ef7eb2e8f9f7 23 ; Products, Inc. shall not be used except as stated in the Maxim Integrated
<> 144:ef7eb2e8f9f7 24 ; Products, Inc. Branding Policy.
<> 144:ef7eb2e8f9f7 25 ;
<> 144:ef7eb2e8f9f7 26 ; The mere transfer of this software does not imply any licenses
<> 144:ef7eb2e8f9f7 27 ; of trade secrets, proprietary technology, copyrights, patents,
<> 144:ef7eb2e8f9f7 28 ; trademarks, maskwork rights, or any other form of intellectual
<> 144:ef7eb2e8f9f7 29 ; property whatsoever. Maxim Integrated Products, Inc. retains all
<> 144:ef7eb2e8f9f7 30 ; ownership rights.
<> 144:ef7eb2e8f9f7 31 ;*******************************************************************************
<> 144:ef7eb2e8f9f7 32
<> 144:ef7eb2e8f9f7 33 __initial_sp EQU 0x20008000 ; Top of RAM
<> 144:ef7eb2e8f9f7 34
<> 144:ef7eb2e8f9f7 35 PRESERVE8
<> 144:ef7eb2e8f9f7 36 THUMB
<> 144:ef7eb2e8f9f7 37
<> 144:ef7eb2e8f9f7 38
<> 144:ef7eb2e8f9f7 39 ; Vector Table Mapped to Address 0 at Reset
<> 144:ef7eb2e8f9f7 40
<> 144:ef7eb2e8f9f7 41 AREA RESET, DATA, READONLY
<> 144:ef7eb2e8f9f7 42 EXPORT __Vectors
<> 144:ef7eb2e8f9f7 43 EXPORT __Vectors_End
<> 144:ef7eb2e8f9f7 44 EXPORT __Vectors_Size
<> 144:ef7eb2e8f9f7 45
<> 144:ef7eb2e8f9f7 46 __Vectors DCD __initial_sp ; Top of Stack
<> 144:ef7eb2e8f9f7 47 DCD Reset_Handler ; Reset Handler
<> 144:ef7eb2e8f9f7 48 DCD NMI_Handler ; NMI Handler
<> 144:ef7eb2e8f9f7 49 DCD HardFault_Handler ; Hard Fault Handler
<> 144:ef7eb2e8f9f7 50 DCD DefaultIRQ_Handler ; MPU Fault Handler
<> 144:ef7eb2e8f9f7 51 DCD DefaultIRQ_Handler ; Bus Fault Handler
<> 144:ef7eb2e8f9f7 52 DCD DefaultIRQ_Handler ; Usage Fault Handler
<> 144:ef7eb2e8f9f7 53 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 54 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 55 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 56 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 57 DCD DefaultIRQ_Handler ; SVCall Handler
<> 144:ef7eb2e8f9f7 58 DCD DebugMon_Handler ; Debug Monitor Handler
<> 144:ef7eb2e8f9f7 59 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 60 DCD DefaultIRQ_Handler ; PendSV Handler
<> 144:ef7eb2e8f9f7 61 DCD SysTick_IRQHandler ; SysTick Handler
<> 144:ef7eb2e8f9f7 62
<> 144:ef7eb2e8f9f7 63 ; Maxim 32600 Externals interrupts
<> 144:ef7eb2e8f9f7 64 DCD UART0_IRQHandler ; 16: 1 UART0
<> 144:ef7eb2e8f9f7 65 DCD UART1_IRQHandler ; 17: 2 UART1
<> 144:ef7eb2e8f9f7 66 DCD I2CM0_IRQHandler ; 18: 3 I2C Master 0
<> 144:ef7eb2e8f9f7 67 DCD I2CS_IRQHandler ; 19: 4 I2C Slave
<> 144:ef7eb2e8f9f7 68 DCD USB_IRQHandler ; 20: 5 USB
<> 144:ef7eb2e8f9f7 69 DCD PMU_IRQHandler ; 21: 6 DMA
<> 144:ef7eb2e8f9f7 70 DCD AFE_IRQHandler ; 22: 7 AFE
<> 144:ef7eb2e8f9f7 71 DCD MAA_IRQHandler ; 23: 8 MAA
<> 144:ef7eb2e8f9f7 72 DCD AES_IRQHandler ; 24: 9 AES
<> 144:ef7eb2e8f9f7 73 DCD SPI0_IRQHandler ; 25:10 SPI0
<> 144:ef7eb2e8f9f7 74 DCD SPI1_IRQHandler ; 26:11 SPI1
<> 144:ef7eb2e8f9f7 75 DCD SPI2_IRQHandler ; 27:12 SPI2
<> 144:ef7eb2e8f9f7 76 DCD TMR0_IRQHandler ; 28:13 Timer32-0
<> 144:ef7eb2e8f9f7 77 DCD TMR1_IRQHandler ; 29:14 Timer32-1
<> 144:ef7eb2e8f9f7 78 DCD TMR2_IRQHandler ; 30:15 Timer32-1
<> 144:ef7eb2e8f9f7 79 DCD TMR3_IRQHandler ; 31:16 Timer32-2
<> 144:ef7eb2e8f9f7 80 DCD RSVD0_IRQHandler ; 32:17 RSVD
<> 144:ef7eb2e8f9f7 81 DCD RSVD1_IRQHandler ; 33:18 RSVD
<> 144:ef7eb2e8f9f7 82 DCD DAC0_IRQHandler ; 34:19 DAC0 (12-bit DAC)
<> 144:ef7eb2e8f9f7 83 DCD DAC1_IRQHandler ; 35:20 DAC1 (12-bit DAC)
<> 144:ef7eb2e8f9f7 84 DCD DAC2_IRQHandler ; 36:21 DAC2 (8-bit DAC)
<> 144:ef7eb2e8f9f7 85 DCD DAC3_IRQHandler ; 37:22 DAC3 (8-bit DAC)
<> 144:ef7eb2e8f9f7 86 DCD ADC_IRQHandler ; 38:23 ADC
<> 144:ef7eb2e8f9f7 87 DCD FLC_IRQHandler ; 39:24 Flash Controller
<> 144:ef7eb2e8f9f7 88 DCD PWRMAN_IRQHandler ; 40:25 PWRMAN
<> 144:ef7eb2e8f9f7 89 DCD CLKMAN_IRQHandler ; 41:26 CLKMAN
<> 144:ef7eb2e8f9f7 90 DCD RTC0_IRQHandler ; 42:27 RTC INT0
<> 144:ef7eb2e8f9f7 91 DCD RTC1_IRQHandler ; 43:28 RTC INT1
<> 144:ef7eb2e8f9f7 92 DCD RTC2_IRQHandler ; 44:29 RTC INT2
<> 144:ef7eb2e8f9f7 93 DCD RTC3_IRQHandler ; 45:30 RTC INT3
<> 144:ef7eb2e8f9f7 94 DCD WDT0_IRQHandler ; 46:31 WATCHDOG0
<> 144:ef7eb2e8f9f7 95 DCD WDT0_P_IRQHandler ; 47:32 WATCHDOG0 PRE-WINDOW
<> 144:ef7eb2e8f9f7 96 DCD WDT1_IRQHandler ; 48:33 WATCHDOG1
<> 144:ef7eb2e8f9f7 97 DCD WDT1_P_IRQHandler ; 49:34 WATCHDOG1 PRE-WINDOW
<> 144:ef7eb2e8f9f7 98 DCD GPIO_P0_IRQHandler ; 50:35 GPIO Port 0
<> 144:ef7eb2e8f9f7 99 DCD GPIO_P1_IRQHandler ; 51:36 GPIO Port 1
<> 144:ef7eb2e8f9f7 100 DCD GPIO_P2_IRQHandler ; 52:37 GPIO Port 2
<> 144:ef7eb2e8f9f7 101 DCD GPIO_P3_IRQHandler ; 53:38 GPIO Port 3
<> 144:ef7eb2e8f9f7 102 DCD GPIO_P4_IRQHandler ; 54:39 GPIO Port 4
<> 144:ef7eb2e8f9f7 103 DCD GPIO_P5_IRQHandler ; 55:40 GPIO Port 5
<> 144:ef7eb2e8f9f7 104 DCD GPIO_P6_IRQHandler ; 56:41 GPIO Port 6
<> 144:ef7eb2e8f9f7 105 DCD GPIO_P7_IRQHandler ; 57:42 GPIO Port 7
<> 144:ef7eb2e8f9f7 106 DCD TMR16_0_IRQHandler ; 58:43 Timer16-s0
<> 144:ef7eb2e8f9f7 107 DCD TMR16_1_IRQHandler ; 59:44 Timer16-s1
<> 144:ef7eb2e8f9f7 108 DCD TMR16_2_IRQHandler ; 60:45 Timer16-s2
<> 144:ef7eb2e8f9f7 109 DCD TMR16_3_IRQHandler ; 61:46 Timer16-s3
<> 144:ef7eb2e8f9f7 110 DCD I2CM1_IRQHandler ; 62:47 I2C Master 1
<> 144:ef7eb2e8f9f7 111 __Vectors_End
<> 144:ef7eb2e8f9f7 112
<> 144:ef7eb2e8f9f7 113 __Vectors_Size EQU __Vectors_End - __Vectors
<> 144:ef7eb2e8f9f7 114
<> 144:ef7eb2e8f9f7 115 AREA |.text|, CODE, READONLY
<> 144:ef7eb2e8f9f7 116
<> 144:ef7eb2e8f9f7 117 Reset_Handler PROC
<> 144:ef7eb2e8f9f7 118 EXPORT Reset_Handler [WEAK]
<> 144:ef7eb2e8f9f7 119 IMPORT SystemInit
<> 144:ef7eb2e8f9f7 120 IMPORT __main
<> 144:ef7eb2e8f9f7 121 LDR R0, =SystemInit
<> 144:ef7eb2e8f9f7 122 BLX R0
<> 144:ef7eb2e8f9f7 123 LDR R0, =__main
<> 144:ef7eb2e8f9f7 124 BX R0
<> 144:ef7eb2e8f9f7 125 ENDP
<> 144:ef7eb2e8f9f7 126
<> 144:ef7eb2e8f9f7 127 ; Dummy Exception Handlers (infinite loops which can be modified)
<> 144:ef7eb2e8f9f7 128
<> 144:ef7eb2e8f9f7 129 NMI_Handler PROC
<> 144:ef7eb2e8f9f7 130 EXPORT NMI_Handler [WEAK]
<> 144:ef7eb2e8f9f7 131 B NMI_Handler
<> 144:ef7eb2e8f9f7 132 ENDP
<> 144:ef7eb2e8f9f7 133
<> 144:ef7eb2e8f9f7 134 HardFault_Handler PROC
<> 144:ef7eb2e8f9f7 135 EXPORT HardFault_Handler [WEAK]
<> 144:ef7eb2e8f9f7 136 B HardFault_Handler
<> 144:ef7eb2e8f9f7 137 ENDP
<> 144:ef7eb2e8f9f7 138
<> 144:ef7eb2e8f9f7 139 DefaultIRQ_Handler PROC
<> 144:ef7eb2e8f9f7 140 EXPORT DefaultIRQ_Handler [WEAK]
<> 144:ef7eb2e8f9f7 141 B DefaultIRQ_Handler
<> 144:ef7eb2e8f9f7 142 ENDP
<> 144:ef7eb2e8f9f7 143
<> 144:ef7eb2e8f9f7 144 DebugMon_Handler PROC
<> 144:ef7eb2e8f9f7 145 EXPORT DebugMon_Handler [WEAK]
<> 144:ef7eb2e8f9f7 146 B DebugMon_Handler
<> 144:ef7eb2e8f9f7 147 ENDP
<> 144:ef7eb2e8f9f7 148
<> 144:ef7eb2e8f9f7 149 SysTick_IRQHandler PROC
<> 144:ef7eb2e8f9f7 150 EXPORT SysTick_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 151 B SysTick_IRQHandler
<> 144:ef7eb2e8f9f7 152 ENDP
<> 144:ef7eb2e8f9f7 153
<> 144:ef7eb2e8f9f7 154 Default_Handler PROC
<> 144:ef7eb2e8f9f7 155
<> 144:ef7eb2e8f9f7 156 EXPORT UART0_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 157 EXPORT UART1_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 158 EXPORT I2CM0_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 159 EXPORT I2CS_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 160 EXPORT USB_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 161 EXPORT PMU_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 162 EXPORT AFE_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 163 EXPORT MAA_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 164 EXPORT AES_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 165 EXPORT SPI0_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 166 EXPORT SPI1_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 167 EXPORT SPI2_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 168 EXPORT TMR0_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 169 EXPORT TMR1_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 170 EXPORT TMR2_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 171 EXPORT TMR3_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 172 EXPORT RSVD0_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 173 EXPORT RSVD1_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 174 EXPORT DAC0_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 175 EXPORT DAC1_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 176 EXPORT DAC2_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 177 EXPORT DAC3_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 178 EXPORT ADC_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 179 EXPORT FLC_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 180 EXPORT PWRMAN_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 181 EXPORT CLKMAN_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 182 EXPORT RTC0_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 183 EXPORT RTC1_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 184 EXPORT RTC2_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 185 EXPORT RTC3_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 186 EXPORT WDT0_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 187 EXPORT WDT0_P_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 188 EXPORT WDT1_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 189 EXPORT WDT1_P_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 190 EXPORT GPIO_P0_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 191 EXPORT GPIO_P1_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 192 EXPORT GPIO_P2_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 193 EXPORT GPIO_P3_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 194 EXPORT GPIO_P4_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 195 EXPORT GPIO_P5_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 196 EXPORT GPIO_P6_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 197 EXPORT GPIO_P7_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 198 EXPORT TMR16_0_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 199 EXPORT TMR16_1_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 200 EXPORT TMR16_2_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 201 EXPORT TMR16_3_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 202 EXPORT I2CM1_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 203
<> 144:ef7eb2e8f9f7 204 UART0_IRQHandler
<> 144:ef7eb2e8f9f7 205 UART1_IRQHandler
<> 144:ef7eb2e8f9f7 206 I2CM0_IRQHandler
<> 144:ef7eb2e8f9f7 207 I2CS_IRQHandler
<> 144:ef7eb2e8f9f7 208 USB_IRQHandler
<> 144:ef7eb2e8f9f7 209 PMU_IRQHandler
<> 144:ef7eb2e8f9f7 210 AFE_IRQHandler
<> 144:ef7eb2e8f9f7 211 MAA_IRQHandler
<> 144:ef7eb2e8f9f7 212 AES_IRQHandler
<> 144:ef7eb2e8f9f7 213 SPI0_IRQHandler
<> 144:ef7eb2e8f9f7 214 SPI1_IRQHandler
<> 144:ef7eb2e8f9f7 215 SPI2_IRQHandler
<> 144:ef7eb2e8f9f7 216 TMR0_IRQHandler
<> 144:ef7eb2e8f9f7 217 TMR1_IRQHandler
<> 144:ef7eb2e8f9f7 218 TMR2_IRQHandler
<> 144:ef7eb2e8f9f7 219 TMR3_IRQHandler
<> 144:ef7eb2e8f9f7 220 RSVD0_IRQHandler
<> 144:ef7eb2e8f9f7 221 RSVD1_IRQHandler
<> 144:ef7eb2e8f9f7 222 DAC0_IRQHandler
<> 144:ef7eb2e8f9f7 223 DAC1_IRQHandler
<> 144:ef7eb2e8f9f7 224 DAC2_IRQHandler
<> 144:ef7eb2e8f9f7 225 DAC3_IRQHandler
<> 144:ef7eb2e8f9f7 226 ADC_IRQHandler
<> 144:ef7eb2e8f9f7 227 FLC_IRQHandler
<> 144:ef7eb2e8f9f7 228 PWRMAN_IRQHandler
<> 144:ef7eb2e8f9f7 229 CLKMAN_IRQHandler
<> 144:ef7eb2e8f9f7 230 RTC0_IRQHandler
<> 144:ef7eb2e8f9f7 231 RTC1_IRQHandler
<> 144:ef7eb2e8f9f7 232 RTC2_IRQHandler
<> 144:ef7eb2e8f9f7 233 RTC3_IRQHandler
<> 144:ef7eb2e8f9f7 234 WDT0_IRQHandler
<> 144:ef7eb2e8f9f7 235 WDT0_P_IRQHandler
<> 144:ef7eb2e8f9f7 236 WDT1_IRQHandler
<> 144:ef7eb2e8f9f7 237 WDT1_P_IRQHandler
<> 144:ef7eb2e8f9f7 238 GPIO_P0_IRQHandler
<> 144:ef7eb2e8f9f7 239 GPIO_P1_IRQHandler
<> 144:ef7eb2e8f9f7 240 GPIO_P2_IRQHandler
<> 144:ef7eb2e8f9f7 241 GPIO_P3_IRQHandler
<> 144:ef7eb2e8f9f7 242 GPIO_P4_IRQHandler
<> 144:ef7eb2e8f9f7 243 GPIO_P5_IRQHandler
<> 144:ef7eb2e8f9f7 244 GPIO_P6_IRQHandler
<> 144:ef7eb2e8f9f7 245 GPIO_P7_IRQHandler
<> 144:ef7eb2e8f9f7 246 TMR16_0_IRQHandler
<> 144:ef7eb2e8f9f7 247 TMR16_1_IRQHandler
<> 144:ef7eb2e8f9f7 248 TMR16_2_IRQHandler
<> 144:ef7eb2e8f9f7 249 TMR16_3_IRQHandler
<> 144:ef7eb2e8f9f7 250 I2CM1_IRQHandler
<> 144:ef7eb2e8f9f7 251
<> 144:ef7eb2e8f9f7 252 B .
<> 144:ef7eb2e8f9f7 253 ENDP
<> 144:ef7eb2e8f9f7 254 ALIGN
<> 144:ef7eb2e8f9f7 255 END