Johannes Stratmann / mbed-dev

added prescaler for 16 bit pwm in LPC1347 target

Fork of mbed-dev by mbed official

targets/cmsis/TARGET_STM/TARGET_STM32F7/stm32f7xx_hal_adc.c@83:a036322b8637, 2016-03-07 (annotated)

Committer:
mbed_official
Date:
Mon Mar 07 10:00:14 2016 +0000
Revision:
83:a036322b8637
Parent:
0:9b334a45a8ff
Child:
144:ef7eb2e8f9f7
Synchronized with git revision ee20d03969aa5c570152f88e8f3d8a4739eed40b



Full URL: https://github.com/mbedmicro/mbed/commit/ee20d03969aa5c570152f88e8f3d8a4739eed40b/



[STM32F7] Update STM32F7Cube_FW version

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /**
bogdanm 0:9b334a45a8ff 2 ******************************************************************************
bogdanm 0:9b334a45a8ff 3 * @file stm32f7xx_hal_adc.c
bogdanm 0:9b334a45a8ff 4 * @author MCD Application Team
mbed_official 83:a036322b8637 5 * @version V1.0.4
mbed_official 83:a036322b8637 6 * @date 09-December-2015
bogdanm 0:9b334a45a8ff 7 * @brief This file provides firmware functions to manage the following
bogdanm 0:9b334a45a8ff 8 * functionalities of the Analog to Digital Convertor (ADC) peripheral:
bogdanm 0:9b334a45a8ff 9 * + Initialization and de-initialization functions
bogdanm 0:9b334a45a8ff 10 * + IO operation functions
bogdanm 0:9b334a45a8ff 11 * + State and errors functions
bogdanm 0:9b334a45a8ff 12 *
bogdanm 0:9b334a45a8ff 13 @verbatim
bogdanm 0:9b334a45a8ff 14 ==============================================================================
bogdanm 0:9b334a45a8ff 15 ##### ADC Peripheral features #####
bogdanm 0:9b334a45a8ff 16 ==============================================================================
bogdanm 0:9b334a45a8ff 17 [..]
bogdanm 0:9b334a45a8ff 18 (#) 12-bit, 10-bit, 8-bit or 6-bit configurable resolution.
bogdanm 0:9b334a45a8ff 19 (#) Interrupt generation at the end of conversion, end of injected conversion,
bogdanm 0:9b334a45a8ff 20 and in case of analog watchdog or overrun events
bogdanm 0:9b334a45a8ff 21 (#) Single and continuous conversion modes.
bogdanm 0:9b334a45a8ff 22 (#) Scan mode for automatic conversion of channel 0 to channel x.
bogdanm 0:9b334a45a8ff 23 (#) Data alignment with in-built data coherency.
bogdanm 0:9b334a45a8ff 24 (#) Channel-wise programmable sampling time.
bogdanm 0:9b334a45a8ff 25 (#) External trigger option with configurable polarity for both regular and
bogdanm 0:9b334a45a8ff 26 injected conversion.
bogdanm 0:9b334a45a8ff 27 (#) Dual/Triple mode (on devices with 2 ADCs or more).
bogdanm 0:9b334a45a8ff 28 (#) Configurable DMA data storage in Dual/Triple ADC mode.
bogdanm 0:9b334a45a8ff 29 (#) Configurable delay between conversions in Dual/Triple interleaved mode.
bogdanm 0:9b334a45a8ff 30 (#) ADC conversion type (refer to the datasheets).
bogdanm 0:9b334a45a8ff 31 (#) ADC supply requirements: 2.4 V to 3.6 V at full speed and down to 1.8 V at
bogdanm 0:9b334a45a8ff 32 slower speed.
bogdanm 0:9b334a45a8ff 33 (#) ADC input range: VREF(minus) = VIN = VREF(plus).
bogdanm 0:9b334a45a8ff 34 (#) DMA request generation during regular channel conversion.
bogdanm 0:9b334a45a8ff 35
bogdanm 0:9b334a45a8ff 36
bogdanm 0:9b334a45a8ff 37 ##### How to use this driver #####
bogdanm 0:9b334a45a8ff 38 ==============================================================================
bogdanm 0:9b334a45a8ff 39 [..]
bogdanm 0:9b334a45a8ff 40 (#)Initialize the ADC low level resources by implementing the HAL_ADC_MspInit():
bogdanm 0:9b334a45a8ff 41 (##) Enable the ADC interface clock using __HAL_RCC_ADC_CLK_ENABLE()
bogdanm 0:9b334a45a8ff 42 (##) ADC pins configuration
bogdanm 0:9b334a45a8ff 43 (+++) Enable the clock for the ADC GPIOs using the following function:
bogdanm 0:9b334a45a8ff 44 __HAL_RCC_GPIOx_CLK_ENABLE()
bogdanm 0:9b334a45a8ff 45 (+++) Configure these ADC pins in analog mode using HAL_GPIO_Init()
bogdanm 0:9b334a45a8ff 46 (##) In case of using interrupts (e.g. HAL_ADC_Start_IT())
bogdanm 0:9b334a45a8ff 47 (+++) Configure the ADC interrupt priority using HAL_NVIC_SetPriority()
bogdanm 0:9b334a45a8ff 48 (+++) Enable the ADC IRQ handler using HAL_NVIC_EnableIRQ()
bogdanm 0:9b334a45a8ff 49 (+++) In ADC IRQ handler, call HAL_ADC_IRQHandler()
bogdanm 0:9b334a45a8ff 50 (##) In case of using DMA to control data transfer (e.g. HAL_ADC_Start_DMA())
bogdanm 0:9b334a45a8ff 51 (+++) Enable the DMAx interface clock using __HAL_RCC_DMAx_CLK_ENABLE()
bogdanm 0:9b334a45a8ff 52 (+++) Configure and enable two DMA streams stream for managing data
bogdanm 0:9b334a45a8ff 53 transfer from peripheral to memory (output stream)
bogdanm 0:9b334a45a8ff 54 (+++) Associate the initialized DMA handle to the CRYP DMA handle
bogdanm 0:9b334a45a8ff 55 using __HAL_LINKDMA()
bogdanm 0:9b334a45a8ff 56 (+++) Configure the priority and enable the NVIC for the transfer complete
bogdanm 0:9b334a45a8ff 57 interrupt on the two DMA Streams. The output stream should have higher
bogdanm 0:9b334a45a8ff 58 priority than the input stream.
bogdanm 0:9b334a45a8ff 59
bogdanm 0:9b334a45a8ff 60 *** Configuration of ADC, groups regular/injected, channels parameters ***
bogdanm 0:9b334a45a8ff 61 ==============================================================================
bogdanm 0:9b334a45a8ff 62 [..]
bogdanm 0:9b334a45a8ff 63 (#) Configure the ADC parameters (resolution, data alignment, ...)
bogdanm 0:9b334a45a8ff 64 and regular group parameters (conversion trigger, sequencer, ...)
bogdanm 0:9b334a45a8ff 65 using function HAL_ADC_Init().
bogdanm 0:9b334a45a8ff 66
bogdanm 0:9b334a45a8ff 67 (#) Configure the channels for regular group parameters (channel number,
bogdanm 0:9b334a45a8ff 68 channel rank into sequencer, ..., into regular group)
bogdanm 0:9b334a45a8ff 69 using function HAL_ADC_ConfigChannel().
bogdanm 0:9b334a45a8ff 70
bogdanm 0:9b334a45a8ff 71 (#) Optionally, configure the injected group parameters (conversion trigger,
bogdanm 0:9b334a45a8ff 72 sequencer, ..., of injected group)
bogdanm 0:9b334a45a8ff 73 and the channels for injected group parameters (channel number,
bogdanm 0:9b334a45a8ff 74 channel rank into sequencer, ..., into injected group)
bogdanm 0:9b334a45a8ff 75 using function HAL_ADCEx_InjectedConfigChannel().
bogdanm 0:9b334a45a8ff 76
bogdanm 0:9b334a45a8ff 77 (#) Optionally, configure the analog watchdog parameters (channels
bogdanm 0:9b334a45a8ff 78 monitored, thresholds, ...) using function HAL_ADC_AnalogWDGConfig().
bogdanm 0:9b334a45a8ff 79
bogdanm 0:9b334a45a8ff 80 (#) Optionally, for devices with several ADC instances: configure the
bogdanm 0:9b334a45a8ff 81 multimode parameters using function HAL_ADCEx_MultiModeConfigChannel().
bogdanm 0:9b334a45a8ff 82
bogdanm 0:9b334a45a8ff 83 *** Execution of ADC conversions ***
bogdanm 0:9b334a45a8ff 84 ==============================================================================
bogdanm 0:9b334a45a8ff 85 [..]
bogdanm 0:9b334a45a8ff 86 (#) ADC driver can be used among three modes: polling, interruption,
bogdanm 0:9b334a45a8ff 87 transfer by DMA.
bogdanm 0:9b334a45a8ff 88
bogdanm 0:9b334a45a8ff 89 *** Polling mode IO operation ***
bogdanm 0:9b334a45a8ff 90 =================================
bogdanm 0:9b334a45a8ff 91 [..]
bogdanm 0:9b334a45a8ff 92 (+) Start the ADC peripheral using HAL_ADC_Start()
bogdanm 0:9b334a45a8ff 93 (+) Wait for end of conversion using HAL_ADC_PollForConversion(), at this stage
bogdanm 0:9b334a45a8ff 94 user can specify the value of timeout according to his end application
bogdanm 0:9b334a45a8ff 95 (+) To read the ADC converted values, use the HAL_ADC_GetValue() function.
bogdanm 0:9b334a45a8ff 96 (+) Stop the ADC peripheral using HAL_ADC_Stop()
bogdanm 0:9b334a45a8ff 97
bogdanm 0:9b334a45a8ff 98 *** Interrupt mode IO operation ***
bogdanm 0:9b334a45a8ff 99 ===================================
bogdanm 0:9b334a45a8ff 100 [..]
bogdanm 0:9b334a45a8ff 101 (+) Start the ADC peripheral using HAL_ADC_Start_IT()
bogdanm 0:9b334a45a8ff 102 (+) Use HAL_ADC_IRQHandler() called under ADC_IRQHandler() Interrupt subroutine
bogdanm 0:9b334a45a8ff 103 (+) At ADC end of conversion HAL_ADC_ConvCpltCallback() function is executed and user can
bogdanm 0:9b334a45a8ff 104 add his own code by customization of function pointer HAL_ADC_ConvCpltCallback
bogdanm 0:9b334a45a8ff 105 (+) In case of ADC Error, HAL_ADC_ErrorCallback() function is executed and user can
bogdanm 0:9b334a45a8ff 106 add his own code by customization of function pointer HAL_ADC_ErrorCallback
bogdanm 0:9b334a45a8ff 107 (+) Stop the ADC peripheral using HAL_ADC_Stop_IT()
bogdanm 0:9b334a45a8ff 108
bogdanm 0:9b334a45a8ff 109 *** DMA mode IO operation ***
bogdanm 0:9b334a45a8ff 110 ==============================
bogdanm 0:9b334a45a8ff 111 [..]
bogdanm 0:9b334a45a8ff 112 (+) Start the ADC peripheral using HAL_ADC_Start_DMA(), at this stage the user specify the length
bogdanm 0:9b334a45a8ff 113 of data to be transferred at each end of conversion
bogdanm 0:9b334a45a8ff 114 (+) At The end of data transfer by HAL_ADC_ConvCpltCallback() function is executed and user can
bogdanm 0:9b334a45a8ff 115 add his own code by customization of function pointer HAL_ADC_ConvCpltCallback
bogdanm 0:9b334a45a8ff 116 (+) In case of transfer Error, HAL_ADC_ErrorCallback() function is executed and user can
bogdanm 0:9b334a45a8ff 117 add his own code by customization of function pointer HAL_ADC_ErrorCallback
bogdanm 0:9b334a45a8ff 118 (+) Stop the ADC peripheral using HAL_ADC_Stop_DMA()
bogdanm 0:9b334a45a8ff 119
bogdanm 0:9b334a45a8ff 120 *** ADC HAL driver macros list ***
bogdanm 0:9b334a45a8ff 121 =============================================
bogdanm 0:9b334a45a8ff 122 [..]
bogdanm 0:9b334a45a8ff 123 Below the list of most used macros in ADC HAL driver.
bogdanm 0:9b334a45a8ff 124
bogdanm 0:9b334a45a8ff 125 (+) __HAL_ADC_ENABLE : Enable the ADC peripheral
bogdanm 0:9b334a45a8ff 126 (+) __HAL_ADC_DISABLE : Disable the ADC peripheral
bogdanm 0:9b334a45a8ff 127 (+) __HAL_ADC_ENABLE_IT: Enable the ADC end of conversion interrupt
bogdanm 0:9b334a45a8ff 128 (+) __HAL_ADC_DISABLE_IT: Disable the ADC end of conversion interrupt
bogdanm 0:9b334a45a8ff 129 (+) __HAL_ADC_GET_IT_SOURCE: Check if the specified ADC interrupt source is enabled or disabled
bogdanm 0:9b334a45a8ff 130 (+) __HAL_ADC_CLEAR_FLAG: Clear the ADC's pending flags
bogdanm 0:9b334a45a8ff 131 (+) __HAL_ADC_GET_FLAG: Get the selected ADC's flag status
bogdanm 0:9b334a45a8ff 132 (+) ADC_GET_RESOLUTION: Return resolution bits in CR1 register
bogdanm 0:9b334a45a8ff 133
bogdanm 0:9b334a45a8ff 134 [..]
bogdanm 0:9b334a45a8ff 135 (@) You can refer to the ADC HAL driver header file for more useful macros
bogdanm 0:9b334a45a8ff 136
bogdanm 0:9b334a45a8ff 137 *** Deinitialization of ADC ***
bogdanm 0:9b334a45a8ff 138 ==============================================================================
bogdanm 0:9b334a45a8ff 139 [..]
bogdanm 0:9b334a45a8ff 140 (#) Disable the ADC interface
bogdanm 0:9b334a45a8ff 141 (++) ADC clock can be hard reset and disabled at RCC top level.
bogdanm 0:9b334a45a8ff 142 (++) Hard reset of ADC peripherals
bogdanm 0:9b334a45a8ff 143 using macro __HAL_RCC_ADC_FORCE_RESET(), __HAL_RCC_ADC_RELEASE_RESET().
bogdanm 0:9b334a45a8ff 144 (++) ADC clock disable using the equivalent macro/functions as configuration step.
bogdanm 0:9b334a45a8ff 145 (+++) Example:
bogdanm 0:9b334a45a8ff 146 Into HAL_ADC_MspDeInit() (recommended code location) or with
bogdanm 0:9b334a45a8ff 147 other device clock parameters configuration:
bogdanm 0:9b334a45a8ff 148 (+++) HAL_RCC_GetOscConfig(&RCC_OscInitStructure);
bogdanm 0:9b334a45a8ff 149 (+++) RCC_OscInitStructure.OscillatorType = RCC_OSCILLATORTYPE_HSI;
bogdanm 0:9b334a45a8ff 150 (+++) RCC_OscInitStructure.HSIState = RCC_HSI_OFF; (if not used for system clock)
bogdanm 0:9b334a45a8ff 151 (+++) HAL_RCC_OscConfig(&RCC_OscInitStructure);
bogdanm 0:9b334a45a8ff 152
bogdanm 0:9b334a45a8ff 153 (#) ADC pins configuration
bogdanm 0:9b334a45a8ff 154 (++) Disable the clock for the ADC GPIOs using macro __HAL_RCC_GPIOx_CLK_DISABLE()
bogdanm 0:9b334a45a8ff 155
bogdanm 0:9b334a45a8ff 156 (#) Optionally, in case of usage of ADC with interruptions:
bogdanm 0:9b334a45a8ff 157 (++) Disable the NVIC for ADC using function HAL_NVIC_DisableIRQ(ADCx_IRQn)
bogdanm 0:9b334a45a8ff 158
bogdanm 0:9b334a45a8ff 159 (#) Optionally, in case of usage of DMA:
bogdanm 0:9b334a45a8ff 160 (++) Deinitialize the DMA using function HAL_DMA_DeInit().
bogdanm 0:9b334a45a8ff 161 (++) Disable the NVIC for DMA using function HAL_NVIC_DisableIRQ(DMAx_Channelx_IRQn)
bogdanm 0:9b334a45a8ff 162
bogdanm 0:9b334a45a8ff 163 @endverbatim
bogdanm 0:9b334a45a8ff 164 ******************************************************************************
bogdanm 0:9b334a45a8ff 165 * @attention
bogdanm 0:9b334a45a8ff 166 *
bogdanm 0:9b334a45a8ff 167 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
bogdanm 0:9b334a45a8ff 168 *
bogdanm 0:9b334a45a8ff 169 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 0:9b334a45a8ff 170 * are permitted provided that the following conditions are met:
bogdanm 0:9b334a45a8ff 171 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 0:9b334a45a8ff 172 * this list of conditions and the following disclaimer.
bogdanm 0:9b334a45a8ff 173 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 0:9b334a45a8ff 174 * this list of conditions and the following disclaimer in the documentation
bogdanm 0:9b334a45a8ff 175 * and/or other materials provided with the distribution.
bogdanm 0:9b334a45a8ff 176 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 0:9b334a45a8ff 177 * may be used to endorse or promote products derived from this software
bogdanm 0:9b334a45a8ff 178 * without specific prior written permission.
bogdanm 0:9b334a45a8ff 179 *
bogdanm 0:9b334a45a8ff 180 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 0:9b334a45a8ff 181 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 0:9b334a45a8ff 182 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 0:9b334a45a8ff 183 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 0:9b334a45a8ff 184 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 0:9b334a45a8ff 185 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 0:9b334a45a8ff 186 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 0:9b334a45a8ff 187 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 0:9b334a45a8ff 188 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 0:9b334a45a8ff 189 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 0:9b334a45a8ff 190 *
bogdanm 0:9b334a45a8ff 191 ******************************************************************************
bogdanm 0:9b334a45a8ff 192 */
bogdanm 0:9b334a45a8ff 193
bogdanm 0:9b334a45a8ff 194 /* Includes ------------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 195 #include "stm32f7xx_hal.h"
bogdanm 0:9b334a45a8ff 196
bogdanm 0:9b334a45a8ff 197 /** @addtogroup STM32F7xx_HAL_Driver
bogdanm 0:9b334a45a8ff 198 * @{
bogdanm 0:9b334a45a8ff 199 */
bogdanm 0:9b334a45a8ff 200
bogdanm 0:9b334a45a8ff 201 /** @defgroup ADC ADC
bogdanm 0:9b334a45a8ff 202 * @brief ADC driver modules
bogdanm 0:9b334a45a8ff 203 * @{
bogdanm 0:9b334a45a8ff 204 */
bogdanm 0:9b334a45a8ff 205
bogdanm 0:9b334a45a8ff 206 #ifdef HAL_ADC_MODULE_ENABLED
bogdanm 0:9b334a45a8ff 207
bogdanm 0:9b334a45a8ff 208 /* Private typedef -----------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 209 /* Private define ------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 210 /* Private macro -------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 211 /* Private variables ---------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 212 /** @addtogroup ADC_Private_Functions
bogdanm 0:9b334a45a8ff 213 * @{
bogdanm 0:9b334a45a8ff 214 */
bogdanm 0:9b334a45a8ff 215 /* Private function prototypes -----------------------------------------------*/
bogdanm 0:9b334a45a8ff 216 static void ADC_Init(ADC_HandleTypeDef* hadc);
bogdanm 0:9b334a45a8ff 217 static void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma);
bogdanm 0:9b334a45a8ff 218 static void ADC_DMAError(DMA_HandleTypeDef *hdma);
bogdanm 0:9b334a45a8ff 219 static void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma);
bogdanm 0:9b334a45a8ff 220 /**
bogdanm 0:9b334a45a8ff 221 * @}
bogdanm 0:9b334a45a8ff 222 */
bogdanm 0:9b334a45a8ff 223
bogdanm 0:9b334a45a8ff 224 /* Exported functions --------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 225 /** @defgroup ADC_Exported_Functions ADC Exported Functions
bogdanm 0:9b334a45a8ff 226 * @{
bogdanm 0:9b334a45a8ff 227 */
bogdanm 0:9b334a45a8ff 228
bogdanm 0:9b334a45a8ff 229 /** @defgroup ADC_Exported_Functions_Group1 Initialization and de-initialization functions
bogdanm 0:9b334a45a8ff 230 * @brief Initialization and Configuration functions
bogdanm 0:9b334a45a8ff 231 *
bogdanm 0:9b334a45a8ff 232 @verbatim
bogdanm 0:9b334a45a8ff 233 ===============================================================================
bogdanm 0:9b334a45a8ff 234 ##### Initialization and de-initialization functions #####
bogdanm 0:9b334a45a8ff 235 ===============================================================================
bogdanm 0:9b334a45a8ff 236 [..] This section provides functions allowing to:
bogdanm 0:9b334a45a8ff 237 (+) Initialize and configure the ADC.
bogdanm 0:9b334a45a8ff 238 (+) De-initialize the ADC.
bogdanm 0:9b334a45a8ff 239
bogdanm 0:9b334a45a8ff 240 @endverbatim
bogdanm 0:9b334a45a8ff 241 * @{
bogdanm 0:9b334a45a8ff 242 */
bogdanm 0:9b334a45a8ff 243
bogdanm 0:9b334a45a8ff 244 /**
bogdanm 0:9b334a45a8ff 245 * @brief Initializes the ADCx peripheral according to the specified parameters
bogdanm 0:9b334a45a8ff 246 * in the ADC_InitStruct and initializes the ADC MSP.
bogdanm 0:9b334a45a8ff 247 *
bogdanm 0:9b334a45a8ff 248 * @note This function is used to configure the global features of the ADC (
bogdanm 0:9b334a45a8ff 249 * ClockPrescaler, Resolution, Data Alignment and number of conversion), however,
bogdanm 0:9b334a45a8ff 250 * the rest of the configuration parameters are specific to the regular
bogdanm 0:9b334a45a8ff 251 * channels group (scan mode activation, continuous mode activation,
bogdanm 0:9b334a45a8ff 252 * External trigger source and edge, DMA continuous request after the
bogdanm 0:9b334a45a8ff 253 * last transfer and End of conversion selection).
bogdanm 0:9b334a45a8ff 254 *
bogdanm 0:9b334a45a8ff 255 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 256 * the configuration information for the specified ADC.
bogdanm 0:9b334a45a8ff 257 * @retval HAL status
bogdanm 0:9b334a45a8ff 258 */
bogdanm 0:9b334a45a8ff 259 HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc)
bogdanm 0:9b334a45a8ff 260 {
mbed_official 83:a036322b8637 261 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
mbed_official 83:a036322b8637 262
bogdanm 0:9b334a45a8ff 263 /* Check ADC handle */
bogdanm 0:9b334a45a8ff 264 if(hadc == NULL)
bogdanm 0:9b334a45a8ff 265 {
mbed_official 83:a036322b8637 266 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 267 }
bogdanm 0:9b334a45a8ff 268
bogdanm 0:9b334a45a8ff 269 /* Check the parameters */
bogdanm 0:9b334a45a8ff 270 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
bogdanm 0:9b334a45a8ff 271 assert_param(IS_ADC_CLOCKPRESCALER(hadc->Init.ClockPrescaler));
bogdanm 0:9b334a45a8ff 272 assert_param(IS_ADC_RESOLUTION(hadc->Init.Resolution));
bogdanm 0:9b334a45a8ff 273 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ScanConvMode));
bogdanm 0:9b334a45a8ff 274 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
bogdanm 0:9b334a45a8ff 275 assert_param(IS_ADC_EXT_TRIG(hadc->Init.ExternalTrigConv));
bogdanm 0:9b334a45a8ff 276 assert_param(IS_ADC_DATA_ALIGN(hadc->Init.DataAlign));
bogdanm 0:9b334a45a8ff 277 assert_param(IS_ADC_REGULAR_LENGTH(hadc->Init.NbrOfConversion));
bogdanm 0:9b334a45a8ff 278 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DMAContinuousRequests));
bogdanm 0:9b334a45a8ff 279 assert_param(IS_ADC_EOCSelection(hadc->Init.EOCSelection));
bogdanm 0:9b334a45a8ff 280 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DiscontinuousConvMode));
bogdanm 0:9b334a45a8ff 281
bogdanm 0:9b334a45a8ff 282 if(hadc->Init.ExternalTrigConv != ADC_SOFTWARE_START)
bogdanm 0:9b334a45a8ff 283 {
bogdanm 0:9b334a45a8ff 284 assert_param(IS_ADC_EXT_TRIG_EDGE(hadc->Init.ExternalTrigConvEdge));
bogdanm 0:9b334a45a8ff 285 }
bogdanm 0:9b334a45a8ff 286
bogdanm 0:9b334a45a8ff 287 if(hadc->State == HAL_ADC_STATE_RESET)
bogdanm 0:9b334a45a8ff 288 {
mbed_official 83:a036322b8637 289 /* Initialize ADC error code */
mbed_official 83:a036322b8637 290 ADC_CLEAR_ERRORCODE(hadc);
mbed_official 83:a036322b8637 291
bogdanm 0:9b334a45a8ff 292 /* Allocate lock resource and initialize it */
bogdanm 0:9b334a45a8ff 293 hadc->Lock = HAL_UNLOCKED;
bogdanm 0:9b334a45a8ff 294 /* Init the low level hardware */
bogdanm 0:9b334a45a8ff 295 HAL_ADC_MspInit(hadc);
bogdanm 0:9b334a45a8ff 296 }
bogdanm 0:9b334a45a8ff 297
mbed_official 83:a036322b8637 298 /* Configuration of ADC parameters if previous preliminary actions are */
mbed_official 83:a036322b8637 299 /* correctly completed. */
mbed_official 83:a036322b8637 300 if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL))
mbed_official 83:a036322b8637 301 {
mbed_official 83:a036322b8637 302 /* Set ADC state */
mbed_official 83:a036322b8637 303 ADC_STATE_CLR_SET(hadc->State,
mbed_official 83:a036322b8637 304 HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
mbed_official 83:a036322b8637 305 HAL_ADC_STATE_BUSY_INTERNAL);
mbed_official 83:a036322b8637 306
mbed_official 83:a036322b8637 307 /* Set ADC parameters */
mbed_official 83:a036322b8637 308 ADC_Init(hadc);
mbed_official 83:a036322b8637 309
mbed_official 83:a036322b8637 310 /* Set ADC error code to none */
mbed_official 83:a036322b8637 311 ADC_CLEAR_ERRORCODE(hadc);
mbed_official 83:a036322b8637 312
mbed_official 83:a036322b8637 313 /* Set the ADC state */
mbed_official 83:a036322b8637 314 ADC_STATE_CLR_SET(hadc->State,
mbed_official 83:a036322b8637 315 HAL_ADC_STATE_BUSY_INTERNAL,
mbed_official 83:a036322b8637 316 HAL_ADC_STATE_READY);
mbed_official 83:a036322b8637 317 }
mbed_official 83:a036322b8637 318 else
mbed_official 83:a036322b8637 319 {
mbed_official 83:a036322b8637 320 tmp_hal_status = HAL_ERROR;
mbed_official 83:a036322b8637 321 }
bogdanm 0:9b334a45a8ff 322
bogdanm 0:9b334a45a8ff 323 /* Release Lock */
bogdanm 0:9b334a45a8ff 324 __HAL_UNLOCK(hadc);
bogdanm 0:9b334a45a8ff 325
bogdanm 0:9b334a45a8ff 326 /* Return function status */
mbed_official 83:a036322b8637 327 return tmp_hal_status;
bogdanm 0:9b334a45a8ff 328 }
bogdanm 0:9b334a45a8ff 329
bogdanm 0:9b334a45a8ff 330 /**
bogdanm 0:9b334a45a8ff 331 * @brief Deinitializes the ADCx peripheral registers to their default reset values.
bogdanm 0:9b334a45a8ff 332 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 333 * the configuration information for the specified ADC.
bogdanm 0:9b334a45a8ff 334 * @retval HAL status
bogdanm 0:9b334a45a8ff 335 */
bogdanm 0:9b334a45a8ff 336 HAL_StatusTypeDef HAL_ADC_DeInit(ADC_HandleTypeDef* hadc)
bogdanm 0:9b334a45a8ff 337 {
mbed_official 83:a036322b8637 338 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
mbed_official 83:a036322b8637 339
bogdanm 0:9b334a45a8ff 340 /* Check ADC handle */
bogdanm 0:9b334a45a8ff 341 if(hadc == NULL)
bogdanm 0:9b334a45a8ff 342 {
mbed_official 83:a036322b8637 343 return HAL_ERROR;
mbed_official 83:a036322b8637 344 }
bogdanm 0:9b334a45a8ff 345
bogdanm 0:9b334a45a8ff 346 /* Check the parameters */
bogdanm 0:9b334a45a8ff 347 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
bogdanm 0:9b334a45a8ff 348
mbed_official 83:a036322b8637 349 /* Set ADC state */
mbed_official 83:a036322b8637 350 SET_BIT(hadc->State, HAL_ADC_STATE_BUSY_INTERNAL);
bogdanm 0:9b334a45a8ff 351
mbed_official 83:a036322b8637 352 /* Stop potential conversion on going, on regular and injected groups */
mbed_official 83:a036322b8637 353 /* Disable ADC peripheral */
mbed_official 83:a036322b8637 354 __HAL_ADC_DISABLE(hadc);
bogdanm 0:9b334a45a8ff 355
mbed_official 83:a036322b8637 356 /* Configuration of ADC parameters if previous preliminary actions are */
mbed_official 83:a036322b8637 357 /* correctly completed. */
mbed_official 83:a036322b8637 358 if(HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_ADON))
mbed_official 83:a036322b8637 359 {
mbed_official 83:a036322b8637 360 /* DeInit the low level hardware */
mbed_official 83:a036322b8637 361 HAL_ADC_MspDeInit(hadc);
mbed_official 83:a036322b8637 362
mbed_official 83:a036322b8637 363 /* Set ADC error code to none */
mbed_official 83:a036322b8637 364 ADC_CLEAR_ERRORCODE(hadc);
mbed_official 83:a036322b8637 365
mbed_official 83:a036322b8637 366 /* Set ADC state */
mbed_official 83:a036322b8637 367 hadc->State = HAL_ADC_STATE_RESET;
mbed_official 83:a036322b8637 368 }
bogdanm 0:9b334a45a8ff 369
mbed_official 83:a036322b8637 370 /* Process unlocked */
mbed_official 83:a036322b8637 371 __HAL_UNLOCK(hadc);
bogdanm 0:9b334a45a8ff 372
bogdanm 0:9b334a45a8ff 373 /* Return function status */
mbed_official 83:a036322b8637 374 return tmp_hal_status;
bogdanm 0:9b334a45a8ff 375 }
bogdanm 0:9b334a45a8ff 376
bogdanm 0:9b334a45a8ff 377 /**
bogdanm 0:9b334a45a8ff 378 * @brief Initializes the ADC MSP.
bogdanm 0:9b334a45a8ff 379 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 380 * the configuration information for the specified ADC.
bogdanm 0:9b334a45a8ff 381 * @retval None
bogdanm 0:9b334a45a8ff 382 */
bogdanm 0:9b334a45a8ff 383 __weak void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
bogdanm 0:9b334a45a8ff 384 {
mbed_official 83:a036322b8637 385 /* Prevent unused argument(s) compilation warning */
mbed_official 83:a036322b8637 386 UNUSED(hadc);
bogdanm 0:9b334a45a8ff 387 /* NOTE : This function Should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 388 the HAL_ADC_MspInit could be implemented in the user file
bogdanm 0:9b334a45a8ff 389 */
bogdanm 0:9b334a45a8ff 390 }
bogdanm 0:9b334a45a8ff 391
bogdanm 0:9b334a45a8ff 392 /**
bogdanm 0:9b334a45a8ff 393 * @brief DeInitializes the ADC MSP.
bogdanm 0:9b334a45a8ff 394 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 395 * the configuration information for the specified ADC.
bogdanm 0:9b334a45a8ff 396 * @retval None
bogdanm 0:9b334a45a8ff 397 */
bogdanm 0:9b334a45a8ff 398 __weak void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc)
bogdanm 0:9b334a45a8ff 399 {
mbed_official 83:a036322b8637 400 /* Prevent unused argument(s) compilation warning */
mbed_official 83:a036322b8637 401 UNUSED(hadc);
bogdanm 0:9b334a45a8ff 402 /* NOTE : This function Should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 403 the HAL_ADC_MspDeInit could be implemented in the user file
bogdanm 0:9b334a45a8ff 404 */
bogdanm 0:9b334a45a8ff 405 }
bogdanm 0:9b334a45a8ff 406
bogdanm 0:9b334a45a8ff 407 /**
bogdanm 0:9b334a45a8ff 408 * @}
bogdanm 0:9b334a45a8ff 409 */
bogdanm 0:9b334a45a8ff 410
bogdanm 0:9b334a45a8ff 411 /** @defgroup ADC_Exported_Functions_Group2 IO operation functions
bogdanm 0:9b334a45a8ff 412 * @brief IO operation functions
bogdanm 0:9b334a45a8ff 413 *
bogdanm 0:9b334a45a8ff 414 @verbatim
bogdanm 0:9b334a45a8ff 415 ===============================================================================
bogdanm 0:9b334a45a8ff 416 ##### IO operation functions #####
bogdanm 0:9b334a45a8ff 417 ===============================================================================
bogdanm 0:9b334a45a8ff 418 [..] This section provides functions allowing to:
bogdanm 0:9b334a45a8ff 419 (+) Start conversion of regular channel.
bogdanm 0:9b334a45a8ff 420 (+) Stop conversion of regular channel.
bogdanm 0:9b334a45a8ff 421 (+) Start conversion of regular channel and enable interrupt.
bogdanm 0:9b334a45a8ff 422 (+) Stop conversion of regular channel and disable interrupt.
bogdanm 0:9b334a45a8ff 423 (+) Start conversion of regular channel and enable DMA transfer.
bogdanm 0:9b334a45a8ff 424 (+) Stop conversion of regular channel and disable DMA transfer.
bogdanm 0:9b334a45a8ff 425 (+) Handle ADC interrupt request.
bogdanm 0:9b334a45a8ff 426
bogdanm 0:9b334a45a8ff 427 @endverbatim
bogdanm 0:9b334a45a8ff 428 * @{
bogdanm 0:9b334a45a8ff 429 */
bogdanm 0:9b334a45a8ff 430
bogdanm 0:9b334a45a8ff 431 /**
bogdanm 0:9b334a45a8ff 432 * @brief Enables ADC and starts conversion of the regular channels.
bogdanm 0:9b334a45a8ff 433 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 434 * the configuration information for the specified ADC.
bogdanm 0:9b334a45a8ff 435 * @retval HAL status
bogdanm 0:9b334a45a8ff 436 */
bogdanm 0:9b334a45a8ff 437 HAL_StatusTypeDef HAL_ADC_Start(ADC_HandleTypeDef* hadc)
bogdanm 0:9b334a45a8ff 438 {
bogdanm 0:9b334a45a8ff 439 __IO uint32_t counter = 0;
bogdanm 0:9b334a45a8ff 440
bogdanm 0:9b334a45a8ff 441 /* Check the parameters */
bogdanm 0:9b334a45a8ff 442 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
bogdanm 0:9b334a45a8ff 443 assert_param(IS_ADC_EXT_TRIG_EDGE(hadc->Init.ExternalTrigConvEdge));
bogdanm 0:9b334a45a8ff 444
bogdanm 0:9b334a45a8ff 445 /* Process locked */
bogdanm 0:9b334a45a8ff 446 __HAL_LOCK(hadc);
bogdanm 0:9b334a45a8ff 447
mbed_official 83:a036322b8637 448 /* Enable the ADC peripheral */
bogdanm 0:9b334a45a8ff 449 /* Check if ADC peripheral is disabled in order to enable it and wait during
bogdanm 0:9b334a45a8ff 450 Tstab time the ADC's stabilization */
bogdanm 0:9b334a45a8ff 451 if((hadc->Instance->CR2 & ADC_CR2_ADON) != ADC_CR2_ADON)
bogdanm 0:9b334a45a8ff 452 {
bogdanm 0:9b334a45a8ff 453 /* Enable the Peripheral */
bogdanm 0:9b334a45a8ff 454 __HAL_ADC_ENABLE(hadc);
bogdanm 0:9b334a45a8ff 455
bogdanm 0:9b334a45a8ff 456 /* Delay for ADC stabilization time */
bogdanm 0:9b334a45a8ff 457 /* Compute number of CPU cycles to wait for */
bogdanm 0:9b334a45a8ff 458 counter = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000));
bogdanm 0:9b334a45a8ff 459 while(counter != 0)
bogdanm 0:9b334a45a8ff 460 {
bogdanm 0:9b334a45a8ff 461 counter--;
bogdanm 0:9b334a45a8ff 462 }
bogdanm 0:9b334a45a8ff 463 }
mbed_official 83:a036322b8637 464
mbed_official 83:a036322b8637 465 /* Start conversion if ADC is effectively enabled */
mbed_official 83:a036322b8637 466 if(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_ADON))
bogdanm 0:9b334a45a8ff 467 {
mbed_official 83:a036322b8637 468 /* Set ADC state */
mbed_official 83:a036322b8637 469 /* - Clear state bitfield related to regular group conversion results */
mbed_official 83:a036322b8637 470 /* - Set state bitfield related to regular group operation */
mbed_official 83:a036322b8637 471 ADC_STATE_CLR_SET(hadc->State,
mbed_official 83:a036322b8637 472 HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR,
mbed_official 83:a036322b8637 473 HAL_ADC_STATE_REG_BUSY);
mbed_official 83:a036322b8637 474
mbed_official 83:a036322b8637 475 /* If conversions on group regular are also triggering group injected, */
mbed_official 83:a036322b8637 476 /* update ADC state. */
mbed_official 83:a036322b8637 477 if (READ_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO) != RESET)
mbed_official 83:a036322b8637 478 {
mbed_official 83:a036322b8637 479 ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY);
mbed_official 83:a036322b8637 480 }
mbed_official 83:a036322b8637 481
mbed_official 83:a036322b8637 482 /* State machine update: Check if an injected conversion is ongoing */
mbed_official 83:a036322b8637 483 if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY))
mbed_official 83:a036322b8637 484 {
mbed_official 83:a036322b8637 485 /* Reset ADC error code fields related to conversions on group regular */
mbed_official 83:a036322b8637 486 CLEAR_BIT(hadc->ErrorCode, (HAL_ADC_ERROR_OVR | HAL_ADC_ERROR_DMA));
mbed_official 83:a036322b8637 487 }
mbed_official 83:a036322b8637 488 else
bogdanm 0:9b334a45a8ff 489 {
mbed_official 83:a036322b8637 490 /* Reset ADC all error code fields */
mbed_official 83:a036322b8637 491 ADC_CLEAR_ERRORCODE(hadc);
bogdanm 0:9b334a45a8ff 492 }
mbed_official 83:a036322b8637 493
mbed_official 83:a036322b8637 494 /* Process unlocked */
mbed_official 83:a036322b8637 495 /* Unlock before starting ADC conversions: in case of potential */
mbed_official 83:a036322b8637 496 /* interruption, to let the process to ADC IRQ Handler. */
mbed_official 83:a036322b8637 497 __HAL_UNLOCK(hadc);
mbed_official 83:a036322b8637 498
mbed_official 83:a036322b8637 499 /* Clear regular group conversion flag and overrun flag */
mbed_official 83:a036322b8637 500 /* (To ensure of no unknown state from potential previous ADC operations) */
mbed_official 83:a036322b8637 501 __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOC);
mbed_official 83:a036322b8637 502
mbed_official 83:a036322b8637 503 /* Check if Multimode enabled */
mbed_official 83:a036322b8637 504 if(HAL_IS_BIT_CLR(ADC->CCR, ADC_CCR_MULTI))
bogdanm 0:9b334a45a8ff 505 {
mbed_official 83:a036322b8637 506 /* if no external trigger present enable software conversion of regular channels */
mbed_official 83:a036322b8637 507 if((hadc->Instance->CR2 & ADC_CR2_EXTEN) == RESET)
mbed_official 83:a036322b8637 508 {
mbed_official 83:a036322b8637 509 /* Enable the selected ADC software conversion for regular group */
bogdanm 0:9b334a45a8ff 510 hadc->Instance->CR2 |= (uint32_t)ADC_CR2_SWSTART;
mbed_official 83:a036322b8637 511 }
mbed_official 83:a036322b8637 512 }
mbed_official 83:a036322b8637 513 else
mbed_official 83:a036322b8637 514 {
mbed_official 83:a036322b8637 515 /* if instance of handle correspond to ADC1 and no external trigger present enable software conversion of regular channels */
mbed_official 83:a036322b8637 516 if((hadc->Instance == ADC1) && ((hadc->Instance->CR2 & ADC_CR2_EXTEN) == RESET))
mbed_official 83:a036322b8637 517 {
mbed_official 83:a036322b8637 518 /* Enable the selected ADC software conversion for regular group */
mbed_official 83:a036322b8637 519 hadc->Instance->CR2 |= (uint32_t)ADC_CR2_SWSTART;
mbed_official 83:a036322b8637 520 }
bogdanm 0:9b334a45a8ff 521 }
bogdanm 0:9b334a45a8ff 522 }
bogdanm 0:9b334a45a8ff 523
bogdanm 0:9b334a45a8ff 524 /* Return function status */
bogdanm 0:9b334a45a8ff 525 return HAL_OK;
bogdanm 0:9b334a45a8ff 526 }
bogdanm 0:9b334a45a8ff 527
bogdanm 0:9b334a45a8ff 528 /**
bogdanm 0:9b334a45a8ff 529 * @brief Disables ADC and stop conversion of regular channels.
bogdanm 0:9b334a45a8ff 530 *
bogdanm 0:9b334a45a8ff 531 * @note Caution: This function will stop also injected channels.
bogdanm 0:9b334a45a8ff 532 *
bogdanm 0:9b334a45a8ff 533 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 534 * the configuration information for the specified ADC.
bogdanm 0:9b334a45a8ff 535 *
bogdanm 0:9b334a45a8ff 536 * @retval HAL status.
bogdanm 0:9b334a45a8ff 537 */
bogdanm 0:9b334a45a8ff 538 HAL_StatusTypeDef HAL_ADC_Stop(ADC_HandleTypeDef* hadc)
bogdanm 0:9b334a45a8ff 539 {
mbed_official 83:a036322b8637 540 /* Check the parameters */
mbed_official 83:a036322b8637 541 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official 83:a036322b8637 542
mbed_official 83:a036322b8637 543 /* Process locked */
mbed_official 83:a036322b8637 544 __HAL_LOCK(hadc);
mbed_official 83:a036322b8637 545
mbed_official 83:a036322b8637 546 /* Stop potential conversion on going, on regular and injected groups */
mbed_official 83:a036322b8637 547 /* Disable ADC peripheral */
bogdanm 0:9b334a45a8ff 548 __HAL_ADC_DISABLE(hadc);
bogdanm 0:9b334a45a8ff 549
mbed_official 83:a036322b8637 550 /* Check if ADC is effectively disabled */
mbed_official 83:a036322b8637 551 if(HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_ADON))
mbed_official 83:a036322b8637 552 {
mbed_official 83:a036322b8637 553 /* Set ADC state */
mbed_official 83:a036322b8637 554 ADC_STATE_CLR_SET(hadc->State,
mbed_official 83:a036322b8637 555 HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
mbed_official 83:a036322b8637 556 HAL_ADC_STATE_READY);
mbed_official 83:a036322b8637 557 }
mbed_official 83:a036322b8637 558
mbed_official 83:a036322b8637 559 /* Process unlocked */
mbed_official 83:a036322b8637 560 __HAL_UNLOCK(hadc);
bogdanm 0:9b334a45a8ff 561
bogdanm 0:9b334a45a8ff 562 /* Return function status */
bogdanm 0:9b334a45a8ff 563 return HAL_OK;
bogdanm 0:9b334a45a8ff 564 }
bogdanm 0:9b334a45a8ff 565
bogdanm 0:9b334a45a8ff 566 /**
bogdanm 0:9b334a45a8ff 567 * @brief Poll for regular conversion complete
mbed_official 83:a036322b8637 568 * @note ADC conversion flags EOS (end of sequence) and EOC (end of
mbed_official 83:a036322b8637 569 * conversion) are cleared by this function.
mbed_official 83:a036322b8637 570 * @note This function cannot be used in a particular setup: ADC configured
mbed_official 83:a036322b8637 571 * in DMA mode and polling for end of each conversion (ADC init
mbed_official 83:a036322b8637 572 * parameter "EOCSelection" set to ADC_EOC_SINGLE_CONV).
mbed_official 83:a036322b8637 573 * In this case, DMA resets the flag EOC and polling cannot be
mbed_official 83:a036322b8637 574 * performed on each conversion. Nevertheless, polling can still
mbed_official 83:a036322b8637 575 * be performed on the complete sequence.
bogdanm 0:9b334a45a8ff 576 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 577 * the configuration information for the specified ADC.
bogdanm 0:9b334a45a8ff 578 * @param Timeout: Timeout value in millisecond.
bogdanm 0:9b334a45a8ff 579 * @retval HAL status
bogdanm 0:9b334a45a8ff 580 */
bogdanm 0:9b334a45a8ff 581 HAL_StatusTypeDef HAL_ADC_PollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout)
bogdanm 0:9b334a45a8ff 582 {
bogdanm 0:9b334a45a8ff 583 uint32_t tickstart = 0;
bogdanm 0:9b334a45a8ff 584
bogdanm 0:9b334a45a8ff 585 /* Verification that ADC configuration is compliant with polling for */
bogdanm 0:9b334a45a8ff 586 /* each conversion: */
bogdanm 0:9b334a45a8ff 587 /* Particular case is ADC configured in DMA mode and ADC sequencer with */
bogdanm 0:9b334a45a8ff 588 /* several ranks and polling for end of each conversion. */
bogdanm 0:9b334a45a8ff 589 /* For code simplicity sake, this particular case is generalized to */
bogdanm 0:9b334a45a8ff 590 /* ADC configured in DMA mode and polling for end of each conversion. */
bogdanm 0:9b334a45a8ff 591 if (HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_EOCS) &&
bogdanm 0:9b334a45a8ff 592 HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_DMA) )
bogdanm 0:9b334a45a8ff 593 {
bogdanm 0:9b334a45a8ff 594 /* Update ADC state machine to error */
mbed_official 83:a036322b8637 595 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
bogdanm 0:9b334a45a8ff 596
bogdanm 0:9b334a45a8ff 597 /* Process unlocked */
bogdanm 0:9b334a45a8ff 598 __HAL_UNLOCK(hadc);
bogdanm 0:9b334a45a8ff 599
bogdanm 0:9b334a45a8ff 600 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 601 }
bogdanm 0:9b334a45a8ff 602
bogdanm 0:9b334a45a8ff 603 /* Get tick */
bogdanm 0:9b334a45a8ff 604 tickstart = HAL_GetTick();
bogdanm 0:9b334a45a8ff 605
bogdanm 0:9b334a45a8ff 606 /* Check End of conversion flag */
bogdanm 0:9b334a45a8ff 607 while(!(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOC)))
bogdanm 0:9b334a45a8ff 608 {
mbed_official 83:a036322b8637 609 /* Check if timeout is disabled (set to infinite wait) */
bogdanm 0:9b334a45a8ff 610 if(Timeout != HAL_MAX_DELAY)
bogdanm 0:9b334a45a8ff 611 {
mbed_official 83:a036322b8637 612 if((Timeout == 0) || ((HAL_GetTick() - tickstart ) > Timeout))
bogdanm 0:9b334a45a8ff 613 {
mbed_official 83:a036322b8637 614 /* Update ADC state machine to timeout */
mbed_official 83:a036322b8637 615 SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT);
mbed_official 83:a036322b8637 616
bogdanm 0:9b334a45a8ff 617 /* Process unlocked */
bogdanm 0:9b334a45a8ff 618 __HAL_UNLOCK(hadc);
mbed_official 83:a036322b8637 619
bogdanm 0:9b334a45a8ff 620 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 621 }
bogdanm 0:9b334a45a8ff 622 }
bogdanm 0:9b334a45a8ff 623 }
bogdanm 0:9b334a45a8ff 624
mbed_official 83:a036322b8637 625 /* Clear regular group conversion flag */
mbed_official 83:a036322b8637 626 __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_STRT | ADC_FLAG_EOC);
mbed_official 83:a036322b8637 627
mbed_official 83:a036322b8637 628 /* Update ADC state machine */
mbed_official 83:a036322b8637 629 SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC);
mbed_official 83:a036322b8637 630
mbed_official 83:a036322b8637 631 /* Determine whether any further conversion upcoming on group regular */
mbed_official 83:a036322b8637 632 /* by external trigger, continuous mode or scan sequence on going. */
mbed_official 83:a036322b8637 633 /* Note: On STM32F7, there is no independent flag of end of sequence. */
mbed_official 83:a036322b8637 634 /* The test of scan sequence on going is done either with scan */
mbed_official 83:a036322b8637 635 /* sequence disabled or with end of conversion flag set to */
mbed_official 83:a036322b8637 636 /* of end of sequence. */
mbed_official 83:a036322b8637 637 if(ADC_IS_SOFTWARE_START_REGULAR(hadc) &&
mbed_official 83:a036322b8637 638 (hadc->Init.ContinuousConvMode == DISABLE) &&
mbed_official 83:a036322b8637 639 (HAL_IS_BIT_CLR(hadc->Instance->SQR1, ADC_SQR1_L) ||
mbed_official 83:a036322b8637 640 HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_EOCS) ) )
bogdanm 0:9b334a45a8ff 641 {
mbed_official 83:a036322b8637 642 /* Set ADC state */
mbed_official 83:a036322b8637 643 CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY);
mbed_official 83:a036322b8637 644
mbed_official 83:a036322b8637 645 if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_INJ_BUSY))
mbed_official 83:a036322b8637 646 {
mbed_official 83:a036322b8637 647 SET_BIT(hadc->State, HAL_ADC_STATE_READY);
mbed_official 83:a036322b8637 648 }
bogdanm 0:9b334a45a8ff 649 }
bogdanm 0:9b334a45a8ff 650
bogdanm 0:9b334a45a8ff 651 /* Return ADC state */
bogdanm 0:9b334a45a8ff 652 return HAL_OK;
bogdanm 0:9b334a45a8ff 653 }
bogdanm 0:9b334a45a8ff 654
bogdanm 0:9b334a45a8ff 655 /**
bogdanm 0:9b334a45a8ff 656 * @brief Poll for conversion event
bogdanm 0:9b334a45a8ff 657 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 658 * the configuration information for the specified ADC.
bogdanm 0:9b334a45a8ff 659 * @param EventType: the ADC event type.
bogdanm 0:9b334a45a8ff 660 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 661 * @arg ADC_AWD_EVENT: ADC Analog watch Dog event.
bogdanm 0:9b334a45a8ff 662 * @arg ADC_OVR_EVENT: ADC Overrun event.
bogdanm 0:9b334a45a8ff 663 * @param Timeout: Timeout value in millisecond.
bogdanm 0:9b334a45a8ff 664 * @retval HAL status
bogdanm 0:9b334a45a8ff 665 */
bogdanm 0:9b334a45a8ff 666 HAL_StatusTypeDef HAL_ADC_PollForEvent(ADC_HandleTypeDef* hadc, uint32_t EventType, uint32_t Timeout)
bogdanm 0:9b334a45a8ff 667 {
bogdanm 0:9b334a45a8ff 668 uint32_t tickstart = 0;
bogdanm 0:9b334a45a8ff 669
bogdanm 0:9b334a45a8ff 670 /* Check the parameters */
mbed_official 83:a036322b8637 671 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
bogdanm 0:9b334a45a8ff 672 assert_param(IS_ADC_EVENT_TYPE(EventType));
bogdanm 0:9b334a45a8ff 673
bogdanm 0:9b334a45a8ff 674 /* Get tick */
bogdanm 0:9b334a45a8ff 675 tickstart = HAL_GetTick();
bogdanm 0:9b334a45a8ff 676
bogdanm 0:9b334a45a8ff 677 /* Check selected event flag */
bogdanm 0:9b334a45a8ff 678 while(!(__HAL_ADC_GET_FLAG(hadc,EventType)))
bogdanm 0:9b334a45a8ff 679 {
bogdanm 0:9b334a45a8ff 680 /* Check for the Timeout */
bogdanm 0:9b334a45a8ff 681 if(Timeout != HAL_MAX_DELAY)
bogdanm 0:9b334a45a8ff 682 {
mbed_official 83:a036322b8637 683 if((Timeout == 0) || ((HAL_GetTick() - tickstart ) > Timeout))
bogdanm 0:9b334a45a8ff 684 {
mbed_official 83:a036322b8637 685 /* Update ADC state machine to timeout */
mbed_official 83:a036322b8637 686 SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT);
mbed_official 83:a036322b8637 687
bogdanm 0:9b334a45a8ff 688 /* Process unlocked */
bogdanm 0:9b334a45a8ff 689 __HAL_UNLOCK(hadc);
mbed_official 83:a036322b8637 690
bogdanm 0:9b334a45a8ff 691 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 692 }
bogdanm 0:9b334a45a8ff 693 }
bogdanm 0:9b334a45a8ff 694 }
bogdanm 0:9b334a45a8ff 695
mbed_official 83:a036322b8637 696 /* Analog watchdog (level out of window) event */
bogdanm 0:9b334a45a8ff 697 if(EventType == ADC_AWD_EVENT)
bogdanm 0:9b334a45a8ff 698 {
mbed_official 83:a036322b8637 699 /* Set ADC state */
mbed_official 83:a036322b8637 700 SET_BIT(hadc->State, HAL_ADC_STATE_AWD1);
bogdanm 0:9b334a45a8ff 701
mbed_official 83:a036322b8637 702 /* Clear ADC analog watchdog flag */
mbed_official 83:a036322b8637 703 __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD);
bogdanm 0:9b334a45a8ff 704 }
mbed_official 83:a036322b8637 705 /* Overrun event */
bogdanm 0:9b334a45a8ff 706 else
bogdanm 0:9b334a45a8ff 707 {
mbed_official 83:a036322b8637 708 /* Set ADC state */
mbed_official 83:a036322b8637 709 SET_BIT(hadc->State, HAL_ADC_STATE_REG_OVR);
mbed_official 83:a036322b8637 710 /* Set ADC error code to overrun */
mbed_official 83:a036322b8637 711 SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_OVR);
mbed_official 83:a036322b8637 712
mbed_official 83:a036322b8637 713 /* Clear ADC overrun flag */
mbed_official 83:a036322b8637 714 __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR);
bogdanm 0:9b334a45a8ff 715 }
bogdanm 0:9b334a45a8ff 716
bogdanm 0:9b334a45a8ff 717 /* Return ADC state */
bogdanm 0:9b334a45a8ff 718 return HAL_OK;
bogdanm 0:9b334a45a8ff 719 }
bogdanm 0:9b334a45a8ff 720
bogdanm 0:9b334a45a8ff 721
bogdanm 0:9b334a45a8ff 722 /**
bogdanm 0:9b334a45a8ff 723 * @brief Enables the interrupt and starts ADC conversion of regular channels.
bogdanm 0:9b334a45a8ff 724 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 725 * the configuration information for the specified ADC.
bogdanm 0:9b334a45a8ff 726 * @retval HAL status.
bogdanm 0:9b334a45a8ff 727 */
bogdanm 0:9b334a45a8ff 728 HAL_StatusTypeDef HAL_ADC_Start_IT(ADC_HandleTypeDef* hadc)
bogdanm 0:9b334a45a8ff 729 {
bogdanm 0:9b334a45a8ff 730 __IO uint32_t counter = 0;
bogdanm 0:9b334a45a8ff 731
bogdanm 0:9b334a45a8ff 732 /* Check the parameters */
bogdanm 0:9b334a45a8ff 733 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
mbed_official 83:a036322b8637 734 assert_param(IS_ADC_EXT_TRIG_EDGE(hadc->Init.ExternalTrigConvEdge));
bogdanm 0:9b334a45a8ff 735
bogdanm 0:9b334a45a8ff 736 /* Process locked */
bogdanm 0:9b334a45a8ff 737 __HAL_LOCK(hadc);
bogdanm 0:9b334a45a8ff 738
mbed_official 83:a036322b8637 739 /* Enable the ADC peripheral */
bogdanm 0:9b334a45a8ff 740 /* Check if ADC peripheral is disabled in order to enable it and wait during
bogdanm 0:9b334a45a8ff 741 Tstab time the ADC's stabilization */
bogdanm 0:9b334a45a8ff 742 if((hadc->Instance->CR2 & ADC_CR2_ADON) != ADC_CR2_ADON)
bogdanm 0:9b334a45a8ff 743 {
bogdanm 0:9b334a45a8ff 744 /* Enable the Peripheral */
bogdanm 0:9b334a45a8ff 745 __HAL_ADC_ENABLE(hadc);
bogdanm 0:9b334a45a8ff 746
bogdanm 0:9b334a45a8ff 747 /* Delay for ADC stabilization time */
bogdanm 0:9b334a45a8ff 748 /* Compute number of CPU cycles to wait for */
bogdanm 0:9b334a45a8ff 749 counter = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000));
bogdanm 0:9b334a45a8ff 750 while(counter != 0)
bogdanm 0:9b334a45a8ff 751 {
bogdanm 0:9b334a45a8ff 752 counter--;
bogdanm 0:9b334a45a8ff 753 }
bogdanm 0:9b334a45a8ff 754 }
bogdanm 0:9b334a45a8ff 755
mbed_official 83:a036322b8637 756 /* Start conversion if ADC is effectively enabled */
mbed_official 83:a036322b8637 757 if(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_ADON))
bogdanm 0:9b334a45a8ff 758 {
mbed_official 83:a036322b8637 759 /* Set ADC state */
mbed_official 83:a036322b8637 760 /* - Clear state bitfield related to regular group conversion results */
mbed_official 83:a036322b8637 761 /* - Set state bitfield related to regular group operation */
mbed_official 83:a036322b8637 762 ADC_STATE_CLR_SET(hadc->State,
mbed_official 83:a036322b8637 763 HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR,
mbed_official 83:a036322b8637 764 HAL_ADC_STATE_REG_BUSY);
mbed_official 83:a036322b8637 765
mbed_official 83:a036322b8637 766 /* If conversions on group regular are also triggering group injected, */
mbed_official 83:a036322b8637 767 /* update ADC state. */
mbed_official 83:a036322b8637 768 if (READ_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO) != RESET)
bogdanm 0:9b334a45a8ff 769 {
mbed_official 83:a036322b8637 770 ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY);
mbed_official 83:a036322b8637 771 }
mbed_official 83:a036322b8637 772
mbed_official 83:a036322b8637 773 /* State machine update: Check if an injected conversion is ongoing */
mbed_official 83:a036322b8637 774 if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY))
mbed_official 83:a036322b8637 775 {
mbed_official 83:a036322b8637 776 /* Reset ADC error code fields related to conversions on group regular */
mbed_official 83:a036322b8637 777 CLEAR_BIT(hadc->ErrorCode, (HAL_ADC_ERROR_OVR | HAL_ADC_ERROR_DMA));
mbed_official 83:a036322b8637 778 }
mbed_official 83:a036322b8637 779 else
mbed_official 83:a036322b8637 780 {
mbed_official 83:a036322b8637 781 /* Reset ADC all error code fields */
mbed_official 83:a036322b8637 782 ADC_CLEAR_ERRORCODE(hadc);
bogdanm 0:9b334a45a8ff 783 }
mbed_official 83:a036322b8637 784
mbed_official 83:a036322b8637 785 /* Process unlocked */
mbed_official 83:a036322b8637 786 /* Unlock before starting ADC conversions: in case of potential */
mbed_official 83:a036322b8637 787 /* interruption, to let the process to ADC IRQ Handler. */
mbed_official 83:a036322b8637 788 __HAL_UNLOCK(hadc);
mbed_official 83:a036322b8637 789
mbed_official 83:a036322b8637 790 /* Clear regular group conversion flag and overrun flag */
mbed_official 83:a036322b8637 791 /* (To ensure of no unknown state from potential previous ADC operations) */
mbed_official 83:a036322b8637 792 __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOC);
mbed_official 83:a036322b8637 793
mbed_official 83:a036322b8637 794 /* Enable end of conversion interrupt for regular group */
mbed_official 83:a036322b8637 795 __HAL_ADC_ENABLE_IT(hadc, (ADC_IT_EOC | ADC_IT_OVR));
mbed_official 83:a036322b8637 796
mbed_official 83:a036322b8637 797 /* Check if Multimode enabled */
mbed_official 83:a036322b8637 798 if(HAL_IS_BIT_CLR(ADC->CCR, ADC_CCR_MULTI))
bogdanm 0:9b334a45a8ff 799 {
mbed_official 83:a036322b8637 800 /* if no external trigger present enable software conversion of regular channels */
mbed_official 83:a036322b8637 801 if((hadc->Instance->CR2 & ADC_CR2_EXTEN) == RESET)
mbed_official 83:a036322b8637 802 {
mbed_official 83:a036322b8637 803 /* Enable the selected ADC software conversion for regular group */
bogdanm 0:9b334a45a8ff 804 hadc->Instance->CR2 |= (uint32_t)ADC_CR2_SWSTART;
mbed_official 83:a036322b8637 805 }
mbed_official 83:a036322b8637 806 }
mbed_official 83:a036322b8637 807 else
mbed_official 83:a036322b8637 808 {
mbed_official 83:a036322b8637 809 /* if instance of handle correspond to ADC1 and no external trigger present enable software conversion of regular channels */
mbed_official 83:a036322b8637 810 if((hadc->Instance == ADC1) && ((hadc->Instance->CR2 & ADC_CR2_EXTEN) == RESET))
mbed_official 83:a036322b8637 811 {
mbed_official 83:a036322b8637 812 /* Enable the selected ADC software conversion for regular group */
mbed_official 83:a036322b8637 813 hadc->Instance->CR2 |= (uint32_t)ADC_CR2_SWSTART;
mbed_official 83:a036322b8637 814 }
bogdanm 0:9b334a45a8ff 815 }
bogdanm 0:9b334a45a8ff 816 }
bogdanm 0:9b334a45a8ff 817
bogdanm 0:9b334a45a8ff 818 /* Return function status */
bogdanm 0:9b334a45a8ff 819 return HAL_OK;
bogdanm 0:9b334a45a8ff 820 }
bogdanm 0:9b334a45a8ff 821
bogdanm 0:9b334a45a8ff 822 /**
bogdanm 0:9b334a45a8ff 823 * @brief Disables the interrupt and stop ADC conversion of regular channels.
bogdanm 0:9b334a45a8ff 824 *
bogdanm 0:9b334a45a8ff 825 * @note Caution: This function will stop also injected channels.
bogdanm 0:9b334a45a8ff 826 *
bogdanm 0:9b334a45a8ff 827 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 828 * the configuration information for the specified ADC.
bogdanm 0:9b334a45a8ff 829 * @retval HAL status.
bogdanm 0:9b334a45a8ff 830 */
bogdanm 0:9b334a45a8ff 831 HAL_StatusTypeDef HAL_ADC_Stop_IT(ADC_HandleTypeDef* hadc)
bogdanm 0:9b334a45a8ff 832 {
mbed_official 83:a036322b8637 833 /* Check the parameters */
mbed_official 83:a036322b8637 834 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
bogdanm 0:9b334a45a8ff 835
mbed_official 83:a036322b8637 836 /* Process locked */
mbed_official 83:a036322b8637 837 __HAL_LOCK(hadc);
bogdanm 0:9b334a45a8ff 838
mbed_official 83:a036322b8637 839 /* Stop potential conversion on going, on regular and injected groups */
mbed_official 83:a036322b8637 840 /* Disable ADC peripheral */
bogdanm 0:9b334a45a8ff 841 __HAL_ADC_DISABLE(hadc);
bogdanm 0:9b334a45a8ff 842
mbed_official 83:a036322b8637 843 /* Check if ADC is effectively disabled */
mbed_official 83:a036322b8637 844 if(HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_ADON))
mbed_official 83:a036322b8637 845 {
mbed_official 83:a036322b8637 846 /* Set ADC state */
mbed_official 83:a036322b8637 847 ADC_STATE_CLR_SET(hadc->State,
mbed_official 83:a036322b8637 848 HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
mbed_official 83:a036322b8637 849 HAL_ADC_STATE_READY);
mbed_official 83:a036322b8637 850 }
mbed_official 83:a036322b8637 851
mbed_official 83:a036322b8637 852 /* Process unlocked */
mbed_official 83:a036322b8637 853 __HAL_UNLOCK(hadc);
bogdanm 0:9b334a45a8ff 854
bogdanm 0:9b334a45a8ff 855 /* Return function status */
bogdanm 0:9b334a45a8ff 856 return HAL_OK;
bogdanm 0:9b334a45a8ff 857 }
bogdanm 0:9b334a45a8ff 858
bogdanm 0:9b334a45a8ff 859 /**
bogdanm 0:9b334a45a8ff 860 * @brief Handles ADC interrupt request
bogdanm 0:9b334a45a8ff 861 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 862 * the configuration information for the specified ADC.
bogdanm 0:9b334a45a8ff 863 * @retval None
bogdanm 0:9b334a45a8ff 864 */
bogdanm 0:9b334a45a8ff 865 void HAL_ADC_IRQHandler(ADC_HandleTypeDef* hadc)
bogdanm 0:9b334a45a8ff 866 {
bogdanm 0:9b334a45a8ff 867 uint32_t tmp1 = 0, tmp2 = 0;
bogdanm 0:9b334a45a8ff 868
bogdanm 0:9b334a45a8ff 869 /* Check the parameters */
bogdanm 0:9b334a45a8ff 870 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
bogdanm 0:9b334a45a8ff 871 assert_param(IS_ADC_REGULAR_LENGTH(hadc->Init.NbrOfConversion));
bogdanm 0:9b334a45a8ff 872 assert_param(IS_ADC_EOCSelection(hadc->Init.EOCSelection));
bogdanm 0:9b334a45a8ff 873
bogdanm 0:9b334a45a8ff 874 tmp1 = __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOC);
bogdanm 0:9b334a45a8ff 875 tmp2 = __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_EOC);
bogdanm 0:9b334a45a8ff 876 /* Check End of conversion flag for regular channels */
bogdanm 0:9b334a45a8ff 877 if(tmp1 && tmp2)
bogdanm 0:9b334a45a8ff 878 {
mbed_official 83:a036322b8637 879 /* Update state machine on conversion status if not in error state */
mbed_official 83:a036322b8637 880 if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL))
bogdanm 0:9b334a45a8ff 881 {
mbed_official 83:a036322b8637 882 /* Set ADC state */
mbed_official 83:a036322b8637 883 SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC);
mbed_official 83:a036322b8637 884 }
mbed_official 83:a036322b8637 885
mbed_official 83:a036322b8637 886 /* Determine whether any further conversion upcoming on group regular */
mbed_official 83:a036322b8637 887 /* by external trigger, continuous mode or scan sequence on going. */
mbed_official 83:a036322b8637 888 /* Note: On STM32F7, there is no independent flag of end of sequence. */
mbed_official 83:a036322b8637 889 /* The test of scan sequence on going is done either with scan */
mbed_official 83:a036322b8637 890 /* sequence disabled or with end of conversion flag set to */
mbed_official 83:a036322b8637 891 /* of end of sequence. */
mbed_official 83:a036322b8637 892 if(ADC_IS_SOFTWARE_START_REGULAR(hadc) &&
mbed_official 83:a036322b8637 893 (hadc->Init.ContinuousConvMode == DISABLE) &&
mbed_official 83:a036322b8637 894 (HAL_IS_BIT_CLR(hadc->Instance->SQR1, ADC_SQR1_L) ||
mbed_official 83:a036322b8637 895 HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_EOCS) ) )
mbed_official 83:a036322b8637 896 {
mbed_official 83:a036322b8637 897 /* Disable ADC end of single conversion interrupt on group regular */
mbed_official 83:a036322b8637 898 /* Note: Overrun interrupt was enabled with EOC interrupt in */
mbed_official 83:a036322b8637 899 /* HAL_ADC_Start_IT(), but is not disabled here because can be used */
mbed_official 83:a036322b8637 900 /* by overrun IRQ process below. */
mbed_official 83:a036322b8637 901 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC);
mbed_official 83:a036322b8637 902
mbed_official 83:a036322b8637 903 /* Set ADC state */
mbed_official 83:a036322b8637 904 CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY);
mbed_official 83:a036322b8637 905
mbed_official 83:a036322b8637 906 if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_INJ_BUSY))
bogdanm 0:9b334a45a8ff 907 {
mbed_official 83:a036322b8637 908 SET_BIT(hadc->State, HAL_ADC_STATE_READY);
bogdanm 0:9b334a45a8ff 909 }
bogdanm 0:9b334a45a8ff 910 }
bogdanm 0:9b334a45a8ff 911
bogdanm 0:9b334a45a8ff 912 /* Conversion complete callback */
bogdanm 0:9b334a45a8ff 913 HAL_ADC_ConvCpltCallback(hadc);
bogdanm 0:9b334a45a8ff 914
mbed_official 83:a036322b8637 915 /* Clear regular group conversion flag */
mbed_official 83:a036322b8637 916 __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_STRT | ADC_FLAG_EOC);
bogdanm 0:9b334a45a8ff 917 }
bogdanm 0:9b334a45a8ff 918
bogdanm 0:9b334a45a8ff 919 tmp1 = __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_JEOC);
bogdanm 0:9b334a45a8ff 920 tmp2 = __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_JEOC);
bogdanm 0:9b334a45a8ff 921 /* Check End of conversion flag for injected channels */
bogdanm 0:9b334a45a8ff 922 if(tmp1 && tmp2)
bogdanm 0:9b334a45a8ff 923 {
mbed_official 83:a036322b8637 924 /* Update state machine on conversion status if not in error state */
mbed_official 83:a036322b8637 925 if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL))
bogdanm 0:9b334a45a8ff 926 {
mbed_official 83:a036322b8637 927 /* Set ADC state */
mbed_official 83:a036322b8637 928 SET_BIT(hadc->State, HAL_ADC_STATE_INJ_EOC);
bogdanm 0:9b334a45a8ff 929 }
mbed_official 83:a036322b8637 930
mbed_official 83:a036322b8637 931 /* Determine whether any further conversion upcoming on group injected */
mbed_official 83:a036322b8637 932 /* by external trigger, scan sequence on going or by automatic injected */
mbed_official 83:a036322b8637 933 /* conversion from group regular (same conditions as group regular */
mbed_official 83:a036322b8637 934 /* interruption disabling above). */
mbed_official 83:a036322b8637 935 if(ADC_IS_SOFTWARE_START_INJECTED(hadc) &&
mbed_official 83:a036322b8637 936 (HAL_IS_BIT_CLR(hadc->Instance->JSQR, ADC_JSQR_JL) ||
mbed_official 83:a036322b8637 937 HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_EOCS)) &&
mbed_official 83:a036322b8637 938 (HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO) &&
mbed_official 83:a036322b8637 939 (ADC_IS_SOFTWARE_START_REGULAR(hadc) &&
mbed_official 83:a036322b8637 940 (hadc->Init.ContinuousConvMode == DISABLE))))
bogdanm 0:9b334a45a8ff 941 {
mbed_official 83:a036322b8637 942 /* Disable ADC end of single conversion interrupt on group injected */
bogdanm 0:9b334a45a8ff 943 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOC);
mbed_official 83:a036322b8637 944
mbed_official 83:a036322b8637 945 /* Set ADC state */
mbed_official 83:a036322b8637 946 CLEAR_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY);
mbed_official 83:a036322b8637 947
mbed_official 83:a036322b8637 948 if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_REG_BUSY))
mbed_official 83:a036322b8637 949 {
mbed_official 83:a036322b8637 950 SET_BIT(hadc->State, HAL_ADC_STATE_READY);
mbed_official 83:a036322b8637 951 }
bogdanm 0:9b334a45a8ff 952 }
mbed_official 83:a036322b8637 953
bogdanm 0:9b334a45a8ff 954 /* Conversion complete callback */
bogdanm 0:9b334a45a8ff 955 HAL_ADCEx_InjectedConvCpltCallback(hadc);
bogdanm 0:9b334a45a8ff 956
mbed_official 83:a036322b8637 957 /* Clear injected group conversion flag */
mbed_official 83:a036322b8637 958 __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_JSTRT | ADC_FLAG_JEOC));
bogdanm 0:9b334a45a8ff 959 }
bogdanm 0:9b334a45a8ff 960
bogdanm 0:9b334a45a8ff 961 tmp1 = __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_AWD);
bogdanm 0:9b334a45a8ff 962 tmp2 = __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_AWD);
bogdanm 0:9b334a45a8ff 963 /* Check Analog watchdog flag */
bogdanm 0:9b334a45a8ff 964 if(tmp1 && tmp2)
bogdanm 0:9b334a45a8ff 965 {
mbed_official 83:a036322b8637 966 if(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_AWD))
mbed_official 83:a036322b8637 967 {
mbed_official 83:a036322b8637 968 /* Set ADC state */
mbed_official 83:a036322b8637 969 SET_BIT(hadc->State, HAL_ADC_STATE_AWD1);
bogdanm 0:9b334a45a8ff 970
mbed_official 83:a036322b8637 971 /* Level out of window callback */
mbed_official 83:a036322b8637 972 HAL_ADC_LevelOutOfWindowCallback(hadc);
mbed_official 83:a036322b8637 973
mbed_official 83:a036322b8637 974 /* Clear the ADC analog watchdog flag */
mbed_official 83:a036322b8637 975 __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD);
mbed_official 83:a036322b8637 976 }
bogdanm 0:9b334a45a8ff 977 }
bogdanm 0:9b334a45a8ff 978
bogdanm 0:9b334a45a8ff 979 tmp1 = __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_OVR);
bogdanm 0:9b334a45a8ff 980 tmp2 = __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_OVR);
bogdanm 0:9b334a45a8ff 981 /* Check Overrun flag */
bogdanm 0:9b334a45a8ff 982 if(tmp1 && tmp2)
bogdanm 0:9b334a45a8ff 983 {
mbed_official 83:a036322b8637 984 /* Note: On STM32F7, ADC overrun can be set through other parameters */
mbed_official 83:a036322b8637 985 /* refer to description of parameter "EOCSelection" for more */
mbed_official 83:a036322b8637 986 /* details. */
bogdanm 0:9b334a45a8ff 987
bogdanm 0:9b334a45a8ff 988 /* Set ADC error code to overrun */
mbed_official 83:a036322b8637 989 SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_OVR);
bogdanm 0:9b334a45a8ff 990
mbed_official 83:a036322b8637 991 /* Clear ADC overrun flag */
mbed_official 83:a036322b8637 992 __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR);
bogdanm 0:9b334a45a8ff 993
bogdanm 0:9b334a45a8ff 994 /* Error callback */
bogdanm 0:9b334a45a8ff 995 HAL_ADC_ErrorCallback(hadc);
mbed_official 83:a036322b8637 996
mbed_official 83:a036322b8637 997 /* Clear the Overrun flag */
mbed_official 83:a036322b8637 998 __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR);
bogdanm 0:9b334a45a8ff 999 }
bogdanm 0:9b334a45a8ff 1000 }
bogdanm 0:9b334a45a8ff 1001
bogdanm 0:9b334a45a8ff 1002 /**
bogdanm 0:9b334a45a8ff 1003 * @brief Enables ADC DMA request after last transfer (Single-ADC mode) and enables ADC peripheral
bogdanm 0:9b334a45a8ff 1004 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1005 * the configuration information for the specified ADC.
bogdanm 0:9b334a45a8ff 1006 * @param pData: The destination Buffer address.
bogdanm 0:9b334a45a8ff 1007 * @param Length: The length of data to be transferred from ADC peripheral to memory.
bogdanm 0:9b334a45a8ff 1008 * @retval HAL status
bogdanm 0:9b334a45a8ff 1009 */
bogdanm 0:9b334a45a8ff 1010 HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length)
bogdanm 0:9b334a45a8ff 1011 {
bogdanm 0:9b334a45a8ff 1012 __IO uint32_t counter = 0;
bogdanm 0:9b334a45a8ff 1013
bogdanm 0:9b334a45a8ff 1014 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1015 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
mbed_official 83:a036322b8637 1016 assert_param(IS_ADC_EXT_TRIG_EDGE(hadc->Init.ExternalTrigConvEdge));
bogdanm 0:9b334a45a8ff 1017
bogdanm 0:9b334a45a8ff 1018 /* Process locked */
bogdanm 0:9b334a45a8ff 1019 __HAL_LOCK(hadc);
bogdanm 0:9b334a45a8ff 1020
mbed_official 83:a036322b8637 1021 /* Enable the ADC peripheral */
bogdanm 0:9b334a45a8ff 1022 /* Check if ADC peripheral is disabled in order to enable it and wait during
bogdanm 0:9b334a45a8ff 1023 Tstab time the ADC's stabilization */
bogdanm 0:9b334a45a8ff 1024 if((hadc->Instance->CR2 & ADC_CR2_ADON) != ADC_CR2_ADON)
bogdanm 0:9b334a45a8ff 1025 {
bogdanm 0:9b334a45a8ff 1026 /* Enable the Peripheral */
bogdanm 0:9b334a45a8ff 1027 __HAL_ADC_ENABLE(hadc);
bogdanm 0:9b334a45a8ff 1028
bogdanm 0:9b334a45a8ff 1029 /* Delay for ADC stabilization time */
bogdanm 0:9b334a45a8ff 1030 /* Compute number of CPU cycles to wait for */
bogdanm 0:9b334a45a8ff 1031 counter = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000));
bogdanm 0:9b334a45a8ff 1032 while(counter != 0)
bogdanm 0:9b334a45a8ff 1033 {
bogdanm 0:9b334a45a8ff 1034 counter--;
bogdanm 0:9b334a45a8ff 1035 }
bogdanm 0:9b334a45a8ff 1036 }
bogdanm 0:9b334a45a8ff 1037
mbed_official 83:a036322b8637 1038 /* Start conversion if ADC is effectively enabled */
mbed_official 83:a036322b8637 1039 if(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_ADON))
bogdanm 0:9b334a45a8ff 1040 {
mbed_official 83:a036322b8637 1041 /* Set ADC state */
mbed_official 83:a036322b8637 1042 /* - Clear state bitfield related to regular group conversion results */
mbed_official 83:a036322b8637 1043 /* - Set state bitfield related to regular group operation */
mbed_official 83:a036322b8637 1044 ADC_STATE_CLR_SET(hadc->State,
mbed_official 83:a036322b8637 1045 HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR,
mbed_official 83:a036322b8637 1046 HAL_ADC_STATE_REG_BUSY);
mbed_official 83:a036322b8637 1047
mbed_official 83:a036322b8637 1048 /* If conversions on group regular are also triggering group injected, */
mbed_official 83:a036322b8637 1049 /* update ADC state. */
mbed_official 83:a036322b8637 1050 if (READ_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO) != RESET)
mbed_official 83:a036322b8637 1051 {
mbed_official 83:a036322b8637 1052 ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY);
mbed_official 83:a036322b8637 1053 }
mbed_official 83:a036322b8637 1054
mbed_official 83:a036322b8637 1055 /* State machine update: Check if an injected conversion is ongoing */
mbed_official 83:a036322b8637 1056 if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY))
mbed_official 83:a036322b8637 1057 {
mbed_official 83:a036322b8637 1058 /* Reset ADC error code fields related to conversions on group regular */
mbed_official 83:a036322b8637 1059 CLEAR_BIT(hadc->ErrorCode, (HAL_ADC_ERROR_OVR | HAL_ADC_ERROR_DMA));
mbed_official 83:a036322b8637 1060 }
mbed_official 83:a036322b8637 1061 else
mbed_official 83:a036322b8637 1062 {
mbed_official 83:a036322b8637 1063 /* Reset ADC all error code fields */
mbed_official 83:a036322b8637 1064 ADC_CLEAR_ERRORCODE(hadc);
mbed_official 83:a036322b8637 1065 }
mbed_official 83:a036322b8637 1066
mbed_official 83:a036322b8637 1067 /* Process unlocked */
mbed_official 83:a036322b8637 1068 /* Unlock before starting ADC conversions: in case of potential */
mbed_official 83:a036322b8637 1069 /* interruption, to let the process to ADC IRQ Handler. */
mbed_official 83:a036322b8637 1070 __HAL_UNLOCK(hadc);
mbed_official 83:a036322b8637 1071
mbed_official 83:a036322b8637 1072 /* Set the DMA transfer complete callback */
mbed_official 83:a036322b8637 1073 hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt;
mbed_official 83:a036322b8637 1074
mbed_official 83:a036322b8637 1075 /* Set the DMA half transfer complete callback */
mbed_official 83:a036322b8637 1076 hadc->DMA_Handle->XferHalfCpltCallback = ADC_DMAHalfConvCplt;
mbed_official 83:a036322b8637 1077
mbed_official 83:a036322b8637 1078 /* Set the DMA error callback */
mbed_official 83:a036322b8637 1079 hadc->DMA_Handle->XferErrorCallback = ADC_DMAError;
mbed_official 83:a036322b8637 1080
mbed_official 83:a036322b8637 1081
mbed_official 83:a036322b8637 1082 /* Manage ADC and DMA start: ADC overrun interruption, DMA start, ADC */
mbed_official 83:a036322b8637 1083 /* start (in case of SW start): */
mbed_official 83:a036322b8637 1084
mbed_official 83:a036322b8637 1085 /* Clear regular group conversion flag and overrun flag */
mbed_official 83:a036322b8637 1086 /* (To ensure of no unknown state from potential previous ADC operations) */
mbed_official 83:a036322b8637 1087 __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOC);
mbed_official 83:a036322b8637 1088
mbed_official 83:a036322b8637 1089 /* Enable ADC overrun interrupt */
mbed_official 83:a036322b8637 1090 __HAL_ADC_ENABLE_IT(hadc, ADC_IT_OVR);
mbed_official 83:a036322b8637 1091
mbed_official 83:a036322b8637 1092 /* Enable ADC DMA mode */
mbed_official 83:a036322b8637 1093 hadc->Instance->CR2 |= ADC_CR2_DMA;
mbed_official 83:a036322b8637 1094
mbed_official 83:a036322b8637 1095 /* Start the DMA channel */
mbed_official 83:a036322b8637 1096 HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_t)pData, Length);
mbed_official 83:a036322b8637 1097
mbed_official 83:a036322b8637 1098 /* Check if Multimode enabled */
mbed_official 83:a036322b8637 1099 if(HAL_IS_BIT_CLR(ADC->CCR, ADC_CCR_MULTI))
mbed_official 83:a036322b8637 1100 {
mbed_official 83:a036322b8637 1101 /* if no external trigger present enable software conversion of regular channels */
mbed_official 83:a036322b8637 1102 if((hadc->Instance->CR2 & ADC_CR2_EXTEN) == RESET)
mbed_official 83:a036322b8637 1103 {
mbed_official 83:a036322b8637 1104 /* Enable the selected ADC software conversion for regular group */
mbed_official 83:a036322b8637 1105 hadc->Instance->CR2 |= (uint32_t)ADC_CR2_SWSTART;
mbed_official 83:a036322b8637 1106 }
mbed_official 83:a036322b8637 1107 }
mbed_official 83:a036322b8637 1108 else
mbed_official 83:a036322b8637 1109 {
mbed_official 83:a036322b8637 1110 /* if instance of handle correspond to ADC1 and no external trigger present enable software conversion of regular channels */
mbed_official 83:a036322b8637 1111 if((hadc->Instance == ADC1) && ((hadc->Instance->CR2 & ADC_CR2_EXTEN) == RESET))
mbed_official 83:a036322b8637 1112 {
mbed_official 83:a036322b8637 1113 /* Enable the selected ADC software conversion for regular group */
mbed_official 83:a036322b8637 1114 hadc->Instance->CR2 |= (uint32_t)ADC_CR2_SWSTART;
mbed_official 83:a036322b8637 1115 }
mbed_official 83:a036322b8637 1116 }
bogdanm 0:9b334a45a8ff 1117 }
bogdanm 0:9b334a45a8ff 1118
bogdanm 0:9b334a45a8ff 1119 /* Return function status */
bogdanm 0:9b334a45a8ff 1120 return HAL_OK;
bogdanm 0:9b334a45a8ff 1121 }
bogdanm 0:9b334a45a8ff 1122
bogdanm 0:9b334a45a8ff 1123 /**
bogdanm 0:9b334a45a8ff 1124 * @brief Disables ADC DMA (Single-ADC mode) and disables ADC peripheral
bogdanm 0:9b334a45a8ff 1125 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1126 * the configuration information for the specified ADC.
bogdanm 0:9b334a45a8ff 1127 * @retval HAL status
bogdanm 0:9b334a45a8ff 1128 */
bogdanm 0:9b334a45a8ff 1129 HAL_StatusTypeDef HAL_ADC_Stop_DMA(ADC_HandleTypeDef* hadc)
bogdanm 0:9b334a45a8ff 1130 {
mbed_official 83:a036322b8637 1131 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
mbed_official 83:a036322b8637 1132
mbed_official 83:a036322b8637 1133 /* Check the parameters */
mbed_official 83:a036322b8637 1134 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official 83:a036322b8637 1135
mbed_official 83:a036322b8637 1136 /* Process locked */
mbed_official 83:a036322b8637 1137 __HAL_LOCK(hadc);
mbed_official 83:a036322b8637 1138
mbed_official 83:a036322b8637 1139 /* Stop potential conversion on going, on regular and injected groups */
mbed_official 83:a036322b8637 1140 /* Disable ADC peripheral */
bogdanm 0:9b334a45a8ff 1141 __HAL_ADC_DISABLE(hadc);
bogdanm 0:9b334a45a8ff 1142
mbed_official 83:a036322b8637 1143 /* Check if ADC is effectively disabled */
mbed_official 83:a036322b8637 1144 if(HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_ADON))
mbed_official 83:a036322b8637 1145 {
mbed_official 83:a036322b8637 1146 /* Disable the selected ADC DMA mode */
mbed_official 83:a036322b8637 1147 hadc->Instance->CR2 &= ~ADC_CR2_DMA;
mbed_official 83:a036322b8637 1148
mbed_official 83:a036322b8637 1149 /* Disable the DMA channel (in case of DMA in circular mode or stop while */
mbed_official 83:a036322b8637 1150 /* DMA transfer is on going) */
mbed_official 83:a036322b8637 1151 tmp_hal_status = HAL_DMA_Abort(hadc->DMA_Handle);
mbed_official 83:a036322b8637 1152
mbed_official 83:a036322b8637 1153 /* Disable ADC overrun interrupt */
mbed_official 83:a036322b8637 1154 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR);
mbed_official 83:a036322b8637 1155
mbed_official 83:a036322b8637 1156 /* Set ADC state */
mbed_official 83:a036322b8637 1157 ADC_STATE_CLR_SET(hadc->State,
mbed_official 83:a036322b8637 1158 HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
mbed_official 83:a036322b8637 1159 HAL_ADC_STATE_READY);
mbed_official 83:a036322b8637 1160 }
bogdanm 0:9b334a45a8ff 1161
mbed_official 83:a036322b8637 1162 /* Process unlocked */
mbed_official 83:a036322b8637 1163 __HAL_UNLOCK(hadc);
bogdanm 0:9b334a45a8ff 1164
bogdanm 0:9b334a45a8ff 1165 /* Return function status */
mbed_official 83:a036322b8637 1166 return tmp_hal_status;
bogdanm 0:9b334a45a8ff 1167 }
bogdanm 0:9b334a45a8ff 1168
bogdanm 0:9b334a45a8ff 1169 /**
bogdanm 0:9b334a45a8ff 1170 * @brief Gets the converted value from data register of regular channel.
bogdanm 0:9b334a45a8ff 1171 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1172 * the configuration information for the specified ADC.
bogdanm 0:9b334a45a8ff 1173 * @retval Converted value
bogdanm 0:9b334a45a8ff 1174 */
bogdanm 0:9b334a45a8ff 1175 uint32_t HAL_ADC_GetValue(ADC_HandleTypeDef* hadc)
bogdanm 0:9b334a45a8ff 1176 {
bogdanm 0:9b334a45a8ff 1177 /* Return the selected ADC converted value */
bogdanm 0:9b334a45a8ff 1178 return hadc->Instance->DR;
bogdanm 0:9b334a45a8ff 1179 }
bogdanm 0:9b334a45a8ff 1180
bogdanm 0:9b334a45a8ff 1181 /**
bogdanm 0:9b334a45a8ff 1182 * @brief Regular conversion complete callback in non blocking mode
bogdanm 0:9b334a45a8ff 1183 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1184 * the configuration information for the specified ADC.
bogdanm 0:9b334a45a8ff 1185 * @retval None
bogdanm 0:9b334a45a8ff 1186 */
bogdanm 0:9b334a45a8ff 1187 __weak void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc)
bogdanm 0:9b334a45a8ff 1188 {
mbed_official 83:a036322b8637 1189 /* Prevent unused argument(s) compilation warning */
mbed_official 83:a036322b8637 1190 UNUSED(hadc);
bogdanm 0:9b334a45a8ff 1191 /* NOTE : This function Should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 1192 the HAL_ADC_ConvCpltCallback could be implemented in the user file
bogdanm 0:9b334a45a8ff 1193 */
bogdanm 0:9b334a45a8ff 1194 }
bogdanm 0:9b334a45a8ff 1195
bogdanm 0:9b334a45a8ff 1196 /**
bogdanm 0:9b334a45a8ff 1197 * @brief Regular conversion half DMA transfer callback in non blocking mode
bogdanm 0:9b334a45a8ff 1198 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1199 * the configuration information for the specified ADC.
bogdanm 0:9b334a45a8ff 1200 * @retval None
bogdanm 0:9b334a45a8ff 1201 */
bogdanm 0:9b334a45a8ff 1202 __weak void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef* hadc)
bogdanm 0:9b334a45a8ff 1203 {
mbed_official 83:a036322b8637 1204 /* Prevent unused argument(s) compilation warning */
mbed_official 83:a036322b8637 1205 UNUSED(hadc);
bogdanm 0:9b334a45a8ff 1206 /* NOTE : This function Should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 1207 the HAL_ADC_ConvHalfCpltCallback could be implemented in the user file
bogdanm 0:9b334a45a8ff 1208 */
bogdanm 0:9b334a45a8ff 1209 }
bogdanm 0:9b334a45a8ff 1210
bogdanm 0:9b334a45a8ff 1211 /**
bogdanm 0:9b334a45a8ff 1212 * @brief Analog watchdog callback in non blocking mode
bogdanm 0:9b334a45a8ff 1213 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1214 * the configuration information for the specified ADC.
bogdanm 0:9b334a45a8ff 1215 * @retval None
bogdanm 0:9b334a45a8ff 1216 */
bogdanm 0:9b334a45a8ff 1217 __weak void HAL_ADC_LevelOutOfWindowCallback(ADC_HandleTypeDef* hadc)
bogdanm 0:9b334a45a8ff 1218 {
mbed_official 83:a036322b8637 1219 /* Prevent unused argument(s) compilation warning */
mbed_official 83:a036322b8637 1220 UNUSED(hadc);
bogdanm 0:9b334a45a8ff 1221 /* NOTE : This function Should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 1222 the HAL_ADC_LevelOoutOfWindowCallback could be implemented in the user file
bogdanm 0:9b334a45a8ff 1223 */
bogdanm 0:9b334a45a8ff 1224 }
bogdanm 0:9b334a45a8ff 1225
bogdanm 0:9b334a45a8ff 1226 /**
bogdanm 0:9b334a45a8ff 1227 * @brief Error ADC callback.
bogdanm 0:9b334a45a8ff 1228 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1229 * the configuration information for the specified ADC.
bogdanm 0:9b334a45a8ff 1230 * @retval None
bogdanm 0:9b334a45a8ff 1231 */
bogdanm 0:9b334a45a8ff 1232 __weak void HAL_ADC_ErrorCallback(ADC_HandleTypeDef *hadc)
bogdanm 0:9b334a45a8ff 1233 {
mbed_official 83:a036322b8637 1234 /* Prevent unused argument(s) compilation warning */
mbed_official 83:a036322b8637 1235 UNUSED(hadc);
bogdanm 0:9b334a45a8ff 1236 /* NOTE : This function Should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 1237 the HAL_ADC_ErrorCallback could be implemented in the user file
bogdanm 0:9b334a45a8ff 1238 */
bogdanm 0:9b334a45a8ff 1239 }
bogdanm 0:9b334a45a8ff 1240
bogdanm 0:9b334a45a8ff 1241 /**
bogdanm 0:9b334a45a8ff 1242 * @}
bogdanm 0:9b334a45a8ff 1243 */
bogdanm 0:9b334a45a8ff 1244
bogdanm 0:9b334a45a8ff 1245 /** @defgroup ADC_Exported_Functions_Group3 Peripheral Control functions
bogdanm 0:9b334a45a8ff 1246 * @brief Peripheral Control functions
bogdanm 0:9b334a45a8ff 1247 *
bogdanm 0:9b334a45a8ff 1248 @verbatim
bogdanm 0:9b334a45a8ff 1249 ===============================================================================
bogdanm 0:9b334a45a8ff 1250 ##### Peripheral Control functions #####
bogdanm 0:9b334a45a8ff 1251 ===============================================================================
bogdanm 0:9b334a45a8ff 1252 [..] This section provides functions allowing to:
bogdanm 0:9b334a45a8ff 1253 (+) Configure regular channels.
bogdanm 0:9b334a45a8ff 1254 (+) Configure injected channels.
bogdanm 0:9b334a45a8ff 1255 (+) Configure multimode.
bogdanm 0:9b334a45a8ff 1256 (+) Configure the analog watch dog.
bogdanm 0:9b334a45a8ff 1257
bogdanm 0:9b334a45a8ff 1258 @endverbatim
bogdanm 0:9b334a45a8ff 1259 * @{
bogdanm 0:9b334a45a8ff 1260 */
bogdanm 0:9b334a45a8ff 1261
bogdanm 0:9b334a45a8ff 1262 /**
bogdanm 0:9b334a45a8ff 1263 * @brief Configures for the selected ADC regular channel its corresponding
bogdanm 0:9b334a45a8ff 1264 * rank in the sequencer and its sample time.
bogdanm 0:9b334a45a8ff 1265 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1266 * the configuration information for the specified ADC.
bogdanm 0:9b334a45a8ff 1267 * @param sConfig: ADC configuration structure.
bogdanm 0:9b334a45a8ff 1268 * @retval HAL status
bogdanm 0:9b334a45a8ff 1269 */
bogdanm 0:9b334a45a8ff 1270 HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig)
bogdanm 0:9b334a45a8ff 1271 {
bogdanm 0:9b334a45a8ff 1272 __IO uint32_t counter = 0;
bogdanm 0:9b334a45a8ff 1273
bogdanm 0:9b334a45a8ff 1274 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1275 assert_param(IS_ADC_CHANNEL(sConfig->Channel));
bogdanm 0:9b334a45a8ff 1276 assert_param(IS_ADC_REGULAR_RANK(sConfig->Rank));
bogdanm 0:9b334a45a8ff 1277 assert_param(IS_ADC_SAMPLE_TIME(sConfig->SamplingTime));
bogdanm 0:9b334a45a8ff 1278
bogdanm 0:9b334a45a8ff 1279 /* Process locked */
bogdanm 0:9b334a45a8ff 1280 __HAL_LOCK(hadc);
mbed_official 83:a036322b8637 1281
mbed_official 83:a036322b8637 1282 /* if ADC_Channel_10 ... ADC_Channel_18 is selected */
mbed_official 83:a036322b8637 1283 if (sConfig->Channel > ADC_CHANNEL_9)
mbed_official 83:a036322b8637 1284 {
mbed_official 83:a036322b8637 1285 /* Clear the old sample time */
mbed_official 83:a036322b8637 1286 hadc->Instance->SMPR1 &= ~ADC_SMPR1(ADC_SMPR1_SMP10, sConfig->Channel);
mbed_official 83:a036322b8637 1287
mbed_official 83:a036322b8637 1288 if (sConfig->Channel == ADC_CHANNEL_TEMPSENSOR)
mbed_official 83:a036322b8637 1289 {
mbed_official 83:a036322b8637 1290 /* Set the new sample time */
mbed_official 83:a036322b8637 1291 hadc->Instance->SMPR1 |= ADC_SMPR1(sConfig->SamplingTime, ADC_CHANNEL_18);
mbed_official 83:a036322b8637 1292 }
mbed_official 83:a036322b8637 1293 else
mbed_official 83:a036322b8637 1294 {
mbed_official 83:a036322b8637 1295 /* Set the new sample time */
mbed_official 83:a036322b8637 1296 hadc->Instance->SMPR1 |= ADC_SMPR1(sConfig->SamplingTime, sConfig->Channel);
mbed_official 83:a036322b8637 1297 }
bogdanm 0:9b334a45a8ff 1298 }
bogdanm 0:9b334a45a8ff 1299 else /* ADC_Channel include in ADC_Channel_[0..9] */
bogdanm 0:9b334a45a8ff 1300 {
bogdanm 0:9b334a45a8ff 1301 /* Clear the old sample time */
bogdanm 0:9b334a45a8ff 1302 hadc->Instance->SMPR2 &= ~ADC_SMPR2(ADC_SMPR2_SMP0, sConfig->Channel);
bogdanm 0:9b334a45a8ff 1303
bogdanm 0:9b334a45a8ff 1304 /* Set the new sample time */
bogdanm 0:9b334a45a8ff 1305 hadc->Instance->SMPR2 |= ADC_SMPR2(sConfig->SamplingTime, sConfig->Channel);
bogdanm 0:9b334a45a8ff 1306 }
bogdanm 0:9b334a45a8ff 1307
bogdanm 0:9b334a45a8ff 1308 /* For Rank 1 to 6 */
bogdanm 0:9b334a45a8ff 1309 if (sConfig->Rank < 7)
bogdanm 0:9b334a45a8ff 1310 {
bogdanm 0:9b334a45a8ff 1311 /* Clear the old SQx bits for the selected rank */
bogdanm 0:9b334a45a8ff 1312 hadc->Instance->SQR3 &= ~ADC_SQR3_RK(ADC_SQR3_SQ1, sConfig->Rank);
bogdanm 0:9b334a45a8ff 1313
bogdanm 0:9b334a45a8ff 1314 /* Set the SQx bits for the selected rank */
bogdanm 0:9b334a45a8ff 1315 hadc->Instance->SQR3 |= ADC_SQR3_RK(sConfig->Channel, sConfig->Rank);
bogdanm 0:9b334a45a8ff 1316 }
bogdanm 0:9b334a45a8ff 1317 /* For Rank 7 to 12 */
bogdanm 0:9b334a45a8ff 1318 else if (sConfig->Rank < 13)
bogdanm 0:9b334a45a8ff 1319 {
bogdanm 0:9b334a45a8ff 1320 /* Clear the old SQx bits for the selected rank */
bogdanm 0:9b334a45a8ff 1321 hadc->Instance->SQR2 &= ~ADC_SQR2_RK(ADC_SQR2_SQ7, sConfig->Rank);
bogdanm 0:9b334a45a8ff 1322
bogdanm 0:9b334a45a8ff 1323 /* Set the SQx bits for the selected rank */
bogdanm 0:9b334a45a8ff 1324 hadc->Instance->SQR2 |= ADC_SQR2_RK(sConfig->Channel, sConfig->Rank);
bogdanm 0:9b334a45a8ff 1325 }
bogdanm 0:9b334a45a8ff 1326 /* For Rank 13 to 16 */
bogdanm 0:9b334a45a8ff 1327 else
bogdanm 0:9b334a45a8ff 1328 {
bogdanm 0:9b334a45a8ff 1329 /* Clear the old SQx bits for the selected rank */
bogdanm 0:9b334a45a8ff 1330 hadc->Instance->SQR1 &= ~ADC_SQR1_RK(ADC_SQR1_SQ13, sConfig->Rank);
bogdanm 0:9b334a45a8ff 1331
bogdanm 0:9b334a45a8ff 1332 /* Set the SQx bits for the selected rank */
bogdanm 0:9b334a45a8ff 1333 hadc->Instance->SQR1 |= ADC_SQR1_RK(sConfig->Channel, sConfig->Rank);
bogdanm 0:9b334a45a8ff 1334 }
bogdanm 0:9b334a45a8ff 1335
bogdanm 0:9b334a45a8ff 1336 /* if ADC1 Channel_18 is selected enable VBAT Channel */
bogdanm 0:9b334a45a8ff 1337 if ((hadc->Instance == ADC1) && (sConfig->Channel == ADC_CHANNEL_VBAT))
bogdanm 0:9b334a45a8ff 1338 {
bogdanm 0:9b334a45a8ff 1339 /* Enable the VBAT channel*/
bogdanm 0:9b334a45a8ff 1340 ADC->CCR |= ADC_CCR_VBATE;
bogdanm 0:9b334a45a8ff 1341 }
bogdanm 0:9b334a45a8ff 1342
mbed_official 83:a036322b8637 1343 /* if ADC1 Channel_18 or Channel_17 is selected enable TSVREFE Channel(Temperature sensor and VREFINT) */
bogdanm 0:9b334a45a8ff 1344 if ((hadc->Instance == ADC1) && ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) || (sConfig->Channel == ADC_CHANNEL_VREFINT)))
bogdanm 0:9b334a45a8ff 1345 {
bogdanm 0:9b334a45a8ff 1346 /* Enable the TSVREFE channel*/
bogdanm 0:9b334a45a8ff 1347 ADC->CCR |= ADC_CCR_TSVREFE;
bogdanm 0:9b334a45a8ff 1348
mbed_official 83:a036322b8637 1349 if(sConfig->Channel == ADC_CHANNEL_TEMPSENSOR)
bogdanm 0:9b334a45a8ff 1350 {
bogdanm 0:9b334a45a8ff 1351 /* Delay for temperature sensor stabilization time */
bogdanm 0:9b334a45a8ff 1352 /* Compute number of CPU cycles to wait for */
bogdanm 0:9b334a45a8ff 1353 counter = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000));
bogdanm 0:9b334a45a8ff 1354 while(counter != 0)
bogdanm 0:9b334a45a8ff 1355 {
bogdanm 0:9b334a45a8ff 1356 counter--;
bogdanm 0:9b334a45a8ff 1357 }
bogdanm 0:9b334a45a8ff 1358 }
bogdanm 0:9b334a45a8ff 1359 }
bogdanm 0:9b334a45a8ff 1360
bogdanm 0:9b334a45a8ff 1361 /* Process unlocked */
bogdanm 0:9b334a45a8ff 1362 __HAL_UNLOCK(hadc);
bogdanm 0:9b334a45a8ff 1363
bogdanm 0:9b334a45a8ff 1364 /* Return function status */
bogdanm 0:9b334a45a8ff 1365 return HAL_OK;
bogdanm 0:9b334a45a8ff 1366 }
bogdanm 0:9b334a45a8ff 1367
bogdanm 0:9b334a45a8ff 1368 /**
bogdanm 0:9b334a45a8ff 1369 * @brief Configures the analog watchdog.
mbed_official 83:a036322b8637 1370 * @note Analog watchdog thresholds can be modified while ADC conversion
mbed_official 83:a036322b8637 1371 * is on going.
mbed_official 83:a036322b8637 1372 * In this case, some constraints must be taken into account:
mbed_official 83:a036322b8637 1373 * the programmed threshold values are effective from the next
mbed_official 83:a036322b8637 1374 * ADC EOC (end of unitary conversion).
mbed_official 83:a036322b8637 1375 * Considering that registers write delay may happen due to
mbed_official 83:a036322b8637 1376 * bus activity, this might cause an uncertainty on the
mbed_official 83:a036322b8637 1377 * effective timing of the new programmed threshold values.
bogdanm 0:9b334a45a8ff 1378 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1379 * the configuration information for the specified ADC.
bogdanm 0:9b334a45a8ff 1380 * @param AnalogWDGConfig : pointer to an ADC_AnalogWDGConfTypeDef structure
bogdanm 0:9b334a45a8ff 1381 * that contains the configuration information of ADC analog watchdog.
bogdanm 0:9b334a45a8ff 1382 * @retval HAL status
bogdanm 0:9b334a45a8ff 1383 */
bogdanm 0:9b334a45a8ff 1384 HAL_StatusTypeDef HAL_ADC_AnalogWDGConfig(ADC_HandleTypeDef* hadc, ADC_AnalogWDGConfTypeDef* AnalogWDGConfig)
bogdanm 0:9b334a45a8ff 1385 {
bogdanm 0:9b334a45a8ff 1386 #ifdef USE_FULL_ASSERT
bogdanm 0:9b334a45a8ff 1387 uint32_t tmp = 0;
bogdanm 0:9b334a45a8ff 1388 #endif /* USE_FULL_ASSERT */
bogdanm 0:9b334a45a8ff 1389
bogdanm 0:9b334a45a8ff 1390 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1391 assert_param(IS_ADC_ANALOG_WATCHDOG(AnalogWDGConfig->WatchdogMode));
bogdanm 0:9b334a45a8ff 1392 assert_param(IS_ADC_CHANNEL(AnalogWDGConfig->Channel));
bogdanm 0:9b334a45a8ff 1393 assert_param(IS_FUNCTIONAL_STATE(AnalogWDGConfig->ITMode));
bogdanm 0:9b334a45a8ff 1394
bogdanm 0:9b334a45a8ff 1395 #ifdef USE_FULL_ASSERT
bogdanm 0:9b334a45a8ff 1396 tmp = ADC_GET_RESOLUTION(hadc);
bogdanm 0:9b334a45a8ff 1397 assert_param(IS_ADC_RANGE(tmp, AnalogWDGConfig->HighThreshold));
bogdanm 0:9b334a45a8ff 1398 assert_param(IS_ADC_RANGE(tmp, AnalogWDGConfig->LowThreshold));
bogdanm 0:9b334a45a8ff 1399 #endif /* USE_FULL_ASSERT */
bogdanm 0:9b334a45a8ff 1400
bogdanm 0:9b334a45a8ff 1401 /* Process locked */
bogdanm 0:9b334a45a8ff 1402 __HAL_LOCK(hadc);
bogdanm 0:9b334a45a8ff 1403
bogdanm 0:9b334a45a8ff 1404 if(AnalogWDGConfig->ITMode == ENABLE)
bogdanm 0:9b334a45a8ff 1405 {
bogdanm 0:9b334a45a8ff 1406 /* Enable the ADC Analog watchdog interrupt */
bogdanm 0:9b334a45a8ff 1407 __HAL_ADC_ENABLE_IT(hadc, ADC_IT_AWD);
bogdanm 0:9b334a45a8ff 1408 }
bogdanm 0:9b334a45a8ff 1409 else
bogdanm 0:9b334a45a8ff 1410 {
bogdanm 0:9b334a45a8ff 1411 /* Disable the ADC Analog watchdog interrupt */
bogdanm 0:9b334a45a8ff 1412 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_AWD);
bogdanm 0:9b334a45a8ff 1413 }
bogdanm 0:9b334a45a8ff 1414
bogdanm 0:9b334a45a8ff 1415 /* Clear AWDEN, JAWDEN and AWDSGL bits */
bogdanm 0:9b334a45a8ff 1416 hadc->Instance->CR1 &= ~(ADC_CR1_AWDSGL | ADC_CR1_JAWDEN | ADC_CR1_AWDEN);
bogdanm 0:9b334a45a8ff 1417
bogdanm 0:9b334a45a8ff 1418 /* Set the analog watchdog enable mode */
bogdanm 0:9b334a45a8ff 1419 hadc->Instance->CR1 |= AnalogWDGConfig->WatchdogMode;
bogdanm 0:9b334a45a8ff 1420
bogdanm 0:9b334a45a8ff 1421 /* Set the high threshold */
bogdanm 0:9b334a45a8ff 1422 hadc->Instance->HTR = AnalogWDGConfig->HighThreshold;
bogdanm 0:9b334a45a8ff 1423
bogdanm 0:9b334a45a8ff 1424 /* Set the low threshold */
bogdanm 0:9b334a45a8ff 1425 hadc->Instance->LTR = AnalogWDGConfig->LowThreshold;
bogdanm 0:9b334a45a8ff 1426
bogdanm 0:9b334a45a8ff 1427 /* Clear the Analog watchdog channel select bits */
bogdanm 0:9b334a45a8ff 1428 hadc->Instance->CR1 &= ~ADC_CR1_AWDCH;
bogdanm 0:9b334a45a8ff 1429
bogdanm 0:9b334a45a8ff 1430 /* Set the Analog watchdog channel */
bogdanm 0:9b334a45a8ff 1431 hadc->Instance->CR1 |= (uint32_t)((uint16_t)(AnalogWDGConfig->Channel));
bogdanm 0:9b334a45a8ff 1432
bogdanm 0:9b334a45a8ff 1433 /* Process unlocked */
bogdanm 0:9b334a45a8ff 1434 __HAL_UNLOCK(hadc);
bogdanm 0:9b334a45a8ff 1435
bogdanm 0:9b334a45a8ff 1436 /* Return function status */
bogdanm 0:9b334a45a8ff 1437 return HAL_OK;
bogdanm 0:9b334a45a8ff 1438 }
bogdanm 0:9b334a45a8ff 1439
bogdanm 0:9b334a45a8ff 1440 /**
bogdanm 0:9b334a45a8ff 1441 * @}
bogdanm 0:9b334a45a8ff 1442 */
bogdanm 0:9b334a45a8ff 1443
bogdanm 0:9b334a45a8ff 1444 /** @defgroup ADC_Exported_Functions_Group4 ADC Peripheral State functions
bogdanm 0:9b334a45a8ff 1445 * @brief ADC Peripheral State functions
bogdanm 0:9b334a45a8ff 1446 *
bogdanm 0:9b334a45a8ff 1447 @verbatim
bogdanm 0:9b334a45a8ff 1448 ===============================================================================
bogdanm 0:9b334a45a8ff 1449 ##### Peripheral State and errors functions #####
bogdanm 0:9b334a45a8ff 1450 ===============================================================================
bogdanm 0:9b334a45a8ff 1451 [..]
bogdanm 0:9b334a45a8ff 1452 This subsection provides functions allowing to
bogdanm 0:9b334a45a8ff 1453 (+) Check the ADC state
bogdanm 0:9b334a45a8ff 1454 (+) Check the ADC Error
bogdanm 0:9b334a45a8ff 1455
bogdanm 0:9b334a45a8ff 1456 @endverbatim
bogdanm 0:9b334a45a8ff 1457 * @{
bogdanm 0:9b334a45a8ff 1458 */
bogdanm 0:9b334a45a8ff 1459
bogdanm 0:9b334a45a8ff 1460 /**
bogdanm 0:9b334a45a8ff 1461 * @brief return the ADC state
bogdanm 0:9b334a45a8ff 1462 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1463 * the configuration information for the specified ADC.
bogdanm 0:9b334a45a8ff 1464 * @retval HAL state
bogdanm 0:9b334a45a8ff 1465 */
mbed_official 83:a036322b8637 1466 uint32_t HAL_ADC_GetState(ADC_HandleTypeDef* hadc)
bogdanm 0:9b334a45a8ff 1467 {
bogdanm 0:9b334a45a8ff 1468 /* Return ADC state */
bogdanm 0:9b334a45a8ff 1469 return hadc->State;
bogdanm 0:9b334a45a8ff 1470 }
bogdanm 0:9b334a45a8ff 1471
bogdanm 0:9b334a45a8ff 1472 /**
bogdanm 0:9b334a45a8ff 1473 * @brief Return the ADC error code
bogdanm 0:9b334a45a8ff 1474 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1475 * the configuration information for the specified ADC.
bogdanm 0:9b334a45a8ff 1476 * @retval ADC Error Code
bogdanm 0:9b334a45a8ff 1477 */
bogdanm 0:9b334a45a8ff 1478 uint32_t HAL_ADC_GetError(ADC_HandleTypeDef *hadc)
bogdanm 0:9b334a45a8ff 1479 {
bogdanm 0:9b334a45a8ff 1480 return hadc->ErrorCode;
bogdanm 0:9b334a45a8ff 1481 }
bogdanm 0:9b334a45a8ff 1482
bogdanm 0:9b334a45a8ff 1483 /**
bogdanm 0:9b334a45a8ff 1484 * @}
bogdanm 0:9b334a45a8ff 1485 */
bogdanm 0:9b334a45a8ff 1486
bogdanm 0:9b334a45a8ff 1487 /**
bogdanm 0:9b334a45a8ff 1488 * @}
bogdanm 0:9b334a45a8ff 1489 */
bogdanm 0:9b334a45a8ff 1490
bogdanm 0:9b334a45a8ff 1491 /* Private functions ---------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 1492
bogdanm 0:9b334a45a8ff 1493 /** @defgroup ADC_Private_Functions ADC Private Functions
bogdanm 0:9b334a45a8ff 1494 * @{
bogdanm 0:9b334a45a8ff 1495 */
bogdanm 0:9b334a45a8ff 1496
bogdanm 0:9b334a45a8ff 1497 /**
bogdanm 0:9b334a45a8ff 1498 * @brief Initializes the ADCx peripheral according to the specified parameters
bogdanm 0:9b334a45a8ff 1499 * in the ADC_InitStruct without initializing the ADC MSP.
bogdanm 0:9b334a45a8ff 1500 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1501 * the configuration information for the specified ADC.
bogdanm 0:9b334a45a8ff 1502 * @retval None
bogdanm 0:9b334a45a8ff 1503 */
bogdanm 0:9b334a45a8ff 1504 static void ADC_Init(ADC_HandleTypeDef* hadc)
bogdanm 0:9b334a45a8ff 1505 {
bogdanm 0:9b334a45a8ff 1506 /* Set ADC parameters */
bogdanm 0:9b334a45a8ff 1507 /* Set the ADC clock prescaler */
bogdanm 0:9b334a45a8ff 1508 ADC->CCR &= ~(ADC_CCR_ADCPRE);
bogdanm 0:9b334a45a8ff 1509 ADC->CCR |= hadc->Init.ClockPrescaler;
bogdanm 0:9b334a45a8ff 1510
bogdanm 0:9b334a45a8ff 1511 /* Set ADC scan mode */
bogdanm 0:9b334a45a8ff 1512 hadc->Instance->CR1 &= ~(ADC_CR1_SCAN);
bogdanm 0:9b334a45a8ff 1513 hadc->Instance->CR1 |= ADC_CR1_SCANCONV(hadc->Init.ScanConvMode);
bogdanm 0:9b334a45a8ff 1514
bogdanm 0:9b334a45a8ff 1515 /* Set ADC resolution */
bogdanm 0:9b334a45a8ff 1516 hadc->Instance->CR1 &= ~(ADC_CR1_RES);
bogdanm 0:9b334a45a8ff 1517 hadc->Instance->CR1 |= hadc->Init.Resolution;
bogdanm 0:9b334a45a8ff 1518
bogdanm 0:9b334a45a8ff 1519 /* Set ADC data alignment */
bogdanm 0:9b334a45a8ff 1520 hadc->Instance->CR2 &= ~(ADC_CR2_ALIGN);
bogdanm 0:9b334a45a8ff 1521 hadc->Instance->CR2 |= hadc->Init.DataAlign;
bogdanm 0:9b334a45a8ff 1522
bogdanm 0:9b334a45a8ff 1523 /* Enable external trigger if trigger selection is different of software */
bogdanm 0:9b334a45a8ff 1524 /* start. */
bogdanm 0:9b334a45a8ff 1525 /* Note: This configuration keeps the hardware feature of parameter */
bogdanm 0:9b334a45a8ff 1526 /* ExternalTrigConvEdge "trigger edge none" equivalent to */
bogdanm 0:9b334a45a8ff 1527 /* software start. */
bogdanm 0:9b334a45a8ff 1528 if(hadc->Init.ExternalTrigConv != ADC_SOFTWARE_START)
bogdanm 0:9b334a45a8ff 1529 {
bogdanm 0:9b334a45a8ff 1530 /* Select external trigger to start conversion */
bogdanm 0:9b334a45a8ff 1531 hadc->Instance->CR2 &= ~(ADC_CR2_EXTSEL);
bogdanm 0:9b334a45a8ff 1532 hadc->Instance->CR2 |= hadc->Init.ExternalTrigConv;
bogdanm 0:9b334a45a8ff 1533
bogdanm 0:9b334a45a8ff 1534 /* Select external trigger polarity */
bogdanm 0:9b334a45a8ff 1535 hadc->Instance->CR2 &= ~(ADC_CR2_EXTEN);
bogdanm 0:9b334a45a8ff 1536 hadc->Instance->CR2 |= hadc->Init.ExternalTrigConvEdge;
bogdanm 0:9b334a45a8ff 1537 }
bogdanm 0:9b334a45a8ff 1538 else
bogdanm 0:9b334a45a8ff 1539 {
bogdanm 0:9b334a45a8ff 1540 /* Reset the external trigger */
bogdanm 0:9b334a45a8ff 1541 hadc->Instance->CR2 &= ~(ADC_CR2_EXTSEL);
bogdanm 0:9b334a45a8ff 1542 hadc->Instance->CR2 &= ~(ADC_CR2_EXTEN);
bogdanm 0:9b334a45a8ff 1543 }
bogdanm 0:9b334a45a8ff 1544
bogdanm 0:9b334a45a8ff 1545 /* Enable or disable ADC continuous conversion mode */
bogdanm 0:9b334a45a8ff 1546 hadc->Instance->CR2 &= ~(ADC_CR2_CONT);
bogdanm 0:9b334a45a8ff 1547 hadc->Instance->CR2 |= ADC_CR2_CONTINUOUS(hadc->Init.ContinuousConvMode);
bogdanm 0:9b334a45a8ff 1548
bogdanm 0:9b334a45a8ff 1549 if(hadc->Init.DiscontinuousConvMode != DISABLE)
bogdanm 0:9b334a45a8ff 1550 {
bogdanm 0:9b334a45a8ff 1551 assert_param(IS_ADC_REGULAR_DISC_NUMBER(hadc->Init.NbrOfDiscConversion));
bogdanm 0:9b334a45a8ff 1552
bogdanm 0:9b334a45a8ff 1553 /* Enable the selected ADC regular discontinuous mode */
bogdanm 0:9b334a45a8ff 1554 hadc->Instance->CR1 |= (uint32_t)ADC_CR1_DISCEN;
bogdanm 0:9b334a45a8ff 1555
bogdanm 0:9b334a45a8ff 1556 /* Set the number of channels to be converted in discontinuous mode */
bogdanm 0:9b334a45a8ff 1557 hadc->Instance->CR1 &= ~(ADC_CR1_DISCNUM);
bogdanm 0:9b334a45a8ff 1558 hadc->Instance->CR1 |= ADC_CR1_DISCONTINUOUS(hadc->Init.NbrOfDiscConversion);
bogdanm 0:9b334a45a8ff 1559 }
bogdanm 0:9b334a45a8ff 1560 else
bogdanm 0:9b334a45a8ff 1561 {
bogdanm 0:9b334a45a8ff 1562 /* Disable the selected ADC regular discontinuous mode */
bogdanm 0:9b334a45a8ff 1563 hadc->Instance->CR1 &= ~(ADC_CR1_DISCEN);
bogdanm 0:9b334a45a8ff 1564 }
bogdanm 0:9b334a45a8ff 1565
bogdanm 0:9b334a45a8ff 1566 /* Set ADC number of conversion */
bogdanm 0:9b334a45a8ff 1567 hadc->Instance->SQR1 &= ~(ADC_SQR1_L);
bogdanm 0:9b334a45a8ff 1568 hadc->Instance->SQR1 |= ADC_SQR1(hadc->Init.NbrOfConversion);
bogdanm 0:9b334a45a8ff 1569
bogdanm 0:9b334a45a8ff 1570 /* Enable or disable ADC DMA continuous request */
bogdanm 0:9b334a45a8ff 1571 hadc->Instance->CR2 &= ~(ADC_CR2_DDS);
bogdanm 0:9b334a45a8ff 1572 hadc->Instance->CR2 |= ADC_CR2_DMAContReq(hadc->Init.DMAContinuousRequests);
bogdanm 0:9b334a45a8ff 1573
bogdanm 0:9b334a45a8ff 1574 /* Enable or disable ADC end of conversion selection */
bogdanm 0:9b334a45a8ff 1575 hadc->Instance->CR2 &= ~(ADC_CR2_EOCS);
bogdanm 0:9b334a45a8ff 1576 hadc->Instance->CR2 |= ADC_CR2_EOCSelection(hadc->Init.EOCSelection);
bogdanm 0:9b334a45a8ff 1577 }
bogdanm 0:9b334a45a8ff 1578
bogdanm 0:9b334a45a8ff 1579 /**
bogdanm 0:9b334a45a8ff 1580 * @brief DMA transfer complete callback.
bogdanm 0:9b334a45a8ff 1581 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1582 * the configuration information for the specified DMA module.
bogdanm 0:9b334a45a8ff 1583 * @retval None
bogdanm 0:9b334a45a8ff 1584 */
bogdanm 0:9b334a45a8ff 1585 static void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma)
bogdanm 0:9b334a45a8ff 1586 {
mbed_official 83:a036322b8637 1587 /* Retrieve ADC handle corresponding to current DMA handle */
bogdanm 0:9b334a45a8ff 1588 ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official 83:a036322b8637 1589
mbed_official 83:a036322b8637 1590 /* Update state machine on conversion status if not in error state */
mbed_official 83:a036322b8637 1591 if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL | HAL_ADC_STATE_ERROR_DMA))
mbed_official 83:a036322b8637 1592 {
mbed_official 83:a036322b8637 1593 /* Update ADC state machine */
mbed_official 83:a036322b8637 1594 SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC);
bogdanm 0:9b334a45a8ff 1595
mbed_official 83:a036322b8637 1596 /* Determine whether any further conversion upcoming on group regular */
mbed_official 83:a036322b8637 1597 /* by external trigger, continuous mode or scan sequence on going. */
mbed_official 83:a036322b8637 1598 /* Note: On STM32F7, there is no independent flag of end of sequence. */
mbed_official 83:a036322b8637 1599 /* The test of scan sequence on going is done either with scan */
mbed_official 83:a036322b8637 1600 /* sequence disabled or with end of conversion flag set to */
mbed_official 83:a036322b8637 1601 /* of end of sequence. */
mbed_official 83:a036322b8637 1602 if(ADC_IS_SOFTWARE_START_REGULAR(hadc) &&
mbed_official 83:a036322b8637 1603 (hadc->Init.ContinuousConvMode == DISABLE) &&
mbed_official 83:a036322b8637 1604 (HAL_IS_BIT_CLR(hadc->Instance->SQR1, ADC_SQR1_L) ||
mbed_official 83:a036322b8637 1605 HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_EOCS) ) )
mbed_official 83:a036322b8637 1606 {
mbed_official 83:a036322b8637 1607 /* Disable ADC end of single conversion interrupt on group regular */
mbed_official 83:a036322b8637 1608 /* Note: Overrun interrupt was enabled with EOC interrupt in */
mbed_official 83:a036322b8637 1609 /* HAL_ADC_Start_IT(), but is not disabled here because can be used */
mbed_official 83:a036322b8637 1610 /* by overrun IRQ process below. */
mbed_official 83:a036322b8637 1611 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC);
mbed_official 83:a036322b8637 1612
mbed_official 83:a036322b8637 1613 /* Set ADC state */
mbed_official 83:a036322b8637 1614 CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY);
mbed_official 83:a036322b8637 1615
mbed_official 83:a036322b8637 1616 if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_INJ_BUSY))
mbed_official 83:a036322b8637 1617 {
mbed_official 83:a036322b8637 1618 SET_BIT(hadc->State, HAL_ADC_STATE_READY);
mbed_official 83:a036322b8637 1619 }
mbed_official 83:a036322b8637 1620 }
mbed_official 83:a036322b8637 1621
mbed_official 83:a036322b8637 1622 /* Conversion complete callback */
mbed_official 83:a036322b8637 1623 HAL_ADC_ConvCpltCallback(hadc);
bogdanm 0:9b334a45a8ff 1624 }
bogdanm 0:9b334a45a8ff 1625 else
bogdanm 0:9b334a45a8ff 1626 {
mbed_official 83:a036322b8637 1627 /* Call DMA error callback */
mbed_official 83:a036322b8637 1628 hadc->DMA_Handle->XferErrorCallback(hdma);
bogdanm 0:9b334a45a8ff 1629 }
bogdanm 0:9b334a45a8ff 1630 }
bogdanm 0:9b334a45a8ff 1631
bogdanm 0:9b334a45a8ff 1632 /**
bogdanm 0:9b334a45a8ff 1633 * @brief DMA half transfer complete callback.
bogdanm 0:9b334a45a8ff 1634 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1635 * the configuration information for the specified DMA module.
bogdanm 0:9b334a45a8ff 1636 * @retval None
bogdanm 0:9b334a45a8ff 1637 */
bogdanm 0:9b334a45a8ff 1638 static void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma)
bogdanm 0:9b334a45a8ff 1639 {
bogdanm 0:9b334a45a8ff 1640 ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
bogdanm 0:9b334a45a8ff 1641 /* Conversion complete callback */
bogdanm 0:9b334a45a8ff 1642 HAL_ADC_ConvHalfCpltCallback(hadc);
bogdanm 0:9b334a45a8ff 1643 }
bogdanm 0:9b334a45a8ff 1644
bogdanm 0:9b334a45a8ff 1645 /**
bogdanm 0:9b334a45a8ff 1646 * @brief DMA error callback
bogdanm 0:9b334a45a8ff 1647 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1648 * the configuration information for the specified DMA module.
bogdanm 0:9b334a45a8ff 1649 * @retval None
bogdanm 0:9b334a45a8ff 1650 */
bogdanm 0:9b334a45a8ff 1651 static void ADC_DMAError(DMA_HandleTypeDef *hdma)
bogdanm 0:9b334a45a8ff 1652 {
bogdanm 0:9b334a45a8ff 1653 ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official 83:a036322b8637 1654 hadc->State= HAL_ADC_STATE_ERROR_DMA;
bogdanm 0:9b334a45a8ff 1655 /* Set ADC error code to DMA error */
bogdanm 0:9b334a45a8ff 1656 hadc->ErrorCode |= HAL_ADC_ERROR_DMA;
bogdanm 0:9b334a45a8ff 1657 HAL_ADC_ErrorCallback(hadc);
bogdanm 0:9b334a45a8ff 1658 }
bogdanm 0:9b334a45a8ff 1659
mbed_official 83:a036322b8637 1660 /**
mbed_official 83:a036322b8637 1661 * @}
mbed_official 83:a036322b8637 1662 */
bogdanm 0:9b334a45a8ff 1663
bogdanm 0:9b334a45a8ff 1664 /**
bogdanm 0:9b334a45a8ff 1665 * @}
bogdanm 0:9b334a45a8ff 1666 */
bogdanm 0:9b334a45a8ff 1667
bogdanm 0:9b334a45a8ff 1668 #endif /* HAL_ADC_MODULE_ENABLED */
bogdanm 0:9b334a45a8ff 1669 /**
bogdanm 0:9b334a45a8ff 1670 * @}
bogdanm 0:9b334a45a8ff 1671 */
bogdanm 0:9b334a45a8ff 1672
bogdanm 0:9b334a45a8ff 1673 /**
bogdanm 0:9b334a45a8ff 1674 * @}
bogdanm 0:9b334a45a8ff 1675 */
bogdanm 0:9b334a45a8ff 1676
bogdanm 0:9b334a45a8ff 1677 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/