Johannes Stratmann / mbed-dev

added prescaler for 16 bit pwm in LPC1347 target

Fork of mbed-dev by mbed official

targets/cmsis/TARGET_STM/TARGET_STM32F7/stm32f7xx_hal_lptim.c@0:9b334a45a8ff, 2015-10-01 (annotated)

Committer:
bogdanm
Date:
Thu Oct 01 15:25:22 2015 +0300
Revision:
0:9b334a45a8ff
Child:
83:a036322b8637
Initial commit on mbed-dev



Replaces mbed-src (now inactive)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /**
bogdanm 0:9b334a45a8ff 2 ******************************************************************************
bogdanm 0:9b334a45a8ff 3 * @file stm32f7xx_hal_lptim.c
bogdanm 0:9b334a45a8ff 4 * @author MCD Application Team
bogdanm 0:9b334a45a8ff 5 * @version V1.0.1
bogdanm 0:9b334a45a8ff 6 * @date 25-June-2015
bogdanm 0:9b334a45a8ff 7 * @brief LPTIM HAL module driver.
bogdanm 0:9b334a45a8ff 8 * This file provides firmware functions to manage the following
bogdanm 0:9b334a45a8ff 9 * functionalities of the Low Power Timer (LPTIM) peripheral:
bogdanm 0:9b334a45a8ff 10 * + Initialization and de-initialization functions.
bogdanm 0:9b334a45a8ff 11 * + Start/Stop operation functions in polling mode.
bogdanm 0:9b334a45a8ff 12 * + Start/Stop operation functions in interrupt mode.
bogdanm 0:9b334a45a8ff 13 * + Reading operation functions.
bogdanm 0:9b334a45a8ff 14 * + Peripheral State functions.
bogdanm 0:9b334a45a8ff 15 *
bogdanm 0:9b334a45a8ff 16 @verbatim
bogdanm 0:9b334a45a8ff 17 ==============================================================================
bogdanm 0:9b334a45a8ff 18 ##### How to use this driver #####
bogdanm 0:9b334a45a8ff 19 ==============================================================================
bogdanm 0:9b334a45a8ff 20 [..]
bogdanm 0:9b334a45a8ff 21 The LPTIM HAL driver can be used as follows:
bogdanm 0:9b334a45a8ff 22
bogdanm 0:9b334a45a8ff 23 (#)Initialize the LPTIM low level resources by implementing the
bogdanm 0:9b334a45a8ff 24 HAL_LPTIM_MspInit():
bogdanm 0:9b334a45a8ff 25 (##) Enable the LPTIM interface clock using __LPTIMx_CLK_ENABLE().
bogdanm 0:9b334a45a8ff 26 (##) In case of using interrupts (e.g. HAL_LPTIM_PWM_Start_IT()):
bogdanm 0:9b334a45a8ff 27 (+) Configure the LPTIM interrupt priority using HAL_NVIC_SetPriority().
bogdanm 0:9b334a45a8ff 28 (+) Enable the LPTIM IRQ handler using HAL_NVIC_EnableIRQ().
bogdanm 0:9b334a45a8ff 29 (+) In LPTIM IRQ handler, call HAL_LPTIM_IRQHandler().
bogdanm 0:9b334a45a8ff 30
bogdanm 0:9b334a45a8ff 31 (#)Initialize the LPTIM HAL using HAL_LPTIM_Init(). This function
bogdanm 0:9b334a45a8ff 32 configures mainly:
bogdanm 0:9b334a45a8ff 33 (##) The instance: LPTIM1.
bogdanm 0:9b334a45a8ff 34 (##) Clock: the counter clock.
bogdanm 0:9b334a45a8ff 35 - Source : it can be either the ULPTIM input (IN1) or one of
bogdanm 0:9b334a45a8ff 36 the internal clock; (APB, LSE, LSI or MSI).
bogdanm 0:9b334a45a8ff 37 - Prescaler: select the clock divider.
bogdanm 0:9b334a45a8ff 38 (##) UltraLowPowerClock : To be used only if the ULPTIM is selected
bogdanm 0:9b334a45a8ff 39 as counter clock source.
bogdanm 0:9b334a45a8ff 40 - Polarity: polarity of the active edge for the counter unit
bogdanm 0:9b334a45a8ff 41 if the ULPTIM input is selected.
bogdanm 0:9b334a45a8ff 42 - SampleTime: clock sampling time to configure the clock glitch
bogdanm 0:9b334a45a8ff 43 filter.
bogdanm 0:9b334a45a8ff 44 (##) Trigger: How the counter start.
bogdanm 0:9b334a45a8ff 45 - Source: trigger can be software or one of the hardware triggers.
bogdanm 0:9b334a45a8ff 46 - ActiveEdge : only for hardware trigger.
bogdanm 0:9b334a45a8ff 47 - SampleTime : trigger sampling time to configure the trigger
bogdanm 0:9b334a45a8ff 48 glitch filter.
bogdanm 0:9b334a45a8ff 49 (##) OutputPolarity : 2 opposite polarities are possibles.
bogdanm 0:9b334a45a8ff 50 (##) UpdateMode: specifies whether the update of the autoreload and
bogdanm 0:9b334a45a8ff 51 the compare values is done immediately or after the end of current
bogdanm 0:9b334a45a8ff 52 period.
bogdanm 0:9b334a45a8ff 53
bogdanm 0:9b334a45a8ff 54 (#)Six modes are available:
bogdanm 0:9b334a45a8ff 55
bogdanm 0:9b334a45a8ff 56 (##) PWM Mode: To generate a PWM signal with specified period and pulse,
bogdanm 0:9b334a45a8ff 57 call HAL_LPTIM_PWM_Start() or HAL_LPTIM_PWM_Start_IT() for interruption
bogdanm 0:9b334a45a8ff 58 mode.
bogdanm 0:9b334a45a8ff 59
bogdanm 0:9b334a45a8ff 60 (##) One Pulse Mode: To generate pulse with specified width in response
bogdanm 0:9b334a45a8ff 61 to a stimulus, call HAL_LPTIM_OnePulse_Start() or
bogdanm 0:9b334a45a8ff 62 HAL_LPTIM_OnePulse_Start_IT() for interruption mode.
bogdanm 0:9b334a45a8ff 63
bogdanm 0:9b334a45a8ff 64 (##) Set once Mode: In this mode, the output changes the level (from
bogdanm 0:9b334a45a8ff 65 low level to high level if the output polarity is configured high, else
bogdanm 0:9b334a45a8ff 66 the opposite) when a compare match occurs. To start this mode, call
bogdanm 0:9b334a45a8ff 67 HAL_LPTIM_SetOnce_Start() or HAL_LPTIM_SetOnce_Start_IT() for
bogdanm 0:9b334a45a8ff 68 interruption mode.
bogdanm 0:9b334a45a8ff 69
bogdanm 0:9b334a45a8ff 70 (##) Encoder Mode: To use the encoder interface call
bogdanm 0:9b334a45a8ff 71 HAL_LPTIM_Encoder_Start() or HAL_LPTIM_Encoder_Start_IT() for
bogdanm 0:9b334a45a8ff 72 interruption mode.
bogdanm 0:9b334a45a8ff 73
bogdanm 0:9b334a45a8ff 74 (##) Time out Mode: an active edge on one selected trigger input rests
bogdanm 0:9b334a45a8ff 75 the counter. The first trigger event will start the timer, any
bogdanm 0:9b334a45a8ff 76 successive trigger event will reset the counter and the timer will
bogdanm 0:9b334a45a8ff 77 restart. To start this mode call HAL_LPTIM_TimeOut_Start_IT() or
bogdanm 0:9b334a45a8ff 78 HAL_LPTIM_TimeOut_Start_IT() for interruption mode.
bogdanm 0:9b334a45a8ff 79
bogdanm 0:9b334a45a8ff 80 (##) Counter Mode: counter can be used to count external events on
bogdanm 0:9b334a45a8ff 81 the LPTIM Input1 or it can be used to count internal clock cycles.
bogdanm 0:9b334a45a8ff 82 To start this mode, call HAL_LPTIM_Counter_Start() or
bogdanm 0:9b334a45a8ff 83 HAL_LPTIM_Counter_Start_IT() for interruption mode.
bogdanm 0:9b334a45a8ff 84
bogdanm 0:9b334a45a8ff 85
bogdanm 0:9b334a45a8ff 86 (#) User can stop any process by calling the corresponding API:
bogdanm 0:9b334a45a8ff 87 HAL_LPTIM_Xxx_Stop() or HAL_LPTIM_Xxx_Stop_IT() if the process is
bogdanm 0:9b334a45a8ff 88 already started in interruption mode.
bogdanm 0:9b334a45a8ff 89
bogdanm 0:9b334a45a8ff 90 (#)Call HAL_LPTIM_DeInit() to deinitialize the LPTIM peripheral.
bogdanm 0:9b334a45a8ff 91
bogdanm 0:9b334a45a8ff 92 @endverbatim
bogdanm 0:9b334a45a8ff 93 ******************************************************************************
bogdanm 0:9b334a45a8ff 94 * @attention
bogdanm 0:9b334a45a8ff 95 *
bogdanm 0:9b334a45a8ff 96 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
bogdanm 0:9b334a45a8ff 97 *
bogdanm 0:9b334a45a8ff 98 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 0:9b334a45a8ff 99 * are permitted provided that the following conditions are met:
bogdanm 0:9b334a45a8ff 100 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 0:9b334a45a8ff 101 * this list of conditions and the following disclaimer.
bogdanm 0:9b334a45a8ff 102 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 0:9b334a45a8ff 103 * this list of conditions and the following disclaimer in the documentation
bogdanm 0:9b334a45a8ff 104 * and/or other materials provided with the distribution.
bogdanm 0:9b334a45a8ff 105 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 0:9b334a45a8ff 106 * may be used to endorse or promote products derived from this software
bogdanm 0:9b334a45a8ff 107 * without specific prior written permission.
bogdanm 0:9b334a45a8ff 108 *
bogdanm 0:9b334a45a8ff 109 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 0:9b334a45a8ff 110 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 0:9b334a45a8ff 111 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 0:9b334a45a8ff 112 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 0:9b334a45a8ff 113 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 0:9b334a45a8ff 114 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 0:9b334a45a8ff 115 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 0:9b334a45a8ff 116 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 0:9b334a45a8ff 117 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 0:9b334a45a8ff 118 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 0:9b334a45a8ff 119 *
bogdanm 0:9b334a45a8ff 120 ******************************************************************************
bogdanm 0:9b334a45a8ff 121 */
bogdanm 0:9b334a45a8ff 122
bogdanm 0:9b334a45a8ff 123 /* Includes ------------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 124 #include "stm32f7xx_hal.h"
bogdanm 0:9b334a45a8ff 125
bogdanm 0:9b334a45a8ff 126 /** @addtogroup STM32F7xx_HAL_Driver
bogdanm 0:9b334a45a8ff 127 * @{
bogdanm 0:9b334a45a8ff 128 */
bogdanm 0:9b334a45a8ff 129
bogdanm 0:9b334a45a8ff 130 /** @defgroup LPTIM LPTIM
bogdanm 0:9b334a45a8ff 131 * @brief LPTIM HAL module driver.
bogdanm 0:9b334a45a8ff 132 * @{
bogdanm 0:9b334a45a8ff 133 */
bogdanm 0:9b334a45a8ff 134
bogdanm 0:9b334a45a8ff 135 #ifdef HAL_LPTIM_MODULE_ENABLED
bogdanm 0:9b334a45a8ff 136 /* Private types -------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 137 /** @defgroup LPTIM_Private_Types LPTIM Private Types
bogdanm 0:9b334a45a8ff 138 * @{
bogdanm 0:9b334a45a8ff 139 */
bogdanm 0:9b334a45a8ff 140
bogdanm 0:9b334a45a8ff 141 /**
bogdanm 0:9b334a45a8ff 142 * @}
bogdanm 0:9b334a45a8ff 143 */
bogdanm 0:9b334a45a8ff 144
bogdanm 0:9b334a45a8ff 145 /* Private defines -----------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 146 /** @defgroup LPTIM_Private_Defines LPTIM Private Defines
bogdanm 0:9b334a45a8ff 147 * @{
bogdanm 0:9b334a45a8ff 148 */
bogdanm 0:9b334a45a8ff 149
bogdanm 0:9b334a45a8ff 150 /**
bogdanm 0:9b334a45a8ff 151 * @}
bogdanm 0:9b334a45a8ff 152 */
bogdanm 0:9b334a45a8ff 153
bogdanm 0:9b334a45a8ff 154 /* Private variables ---------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 155 /** @addtogroup LPTIM_Private_Variables LPTIM Private Variables
bogdanm 0:9b334a45a8ff 156 * @{
bogdanm 0:9b334a45a8ff 157 */
bogdanm 0:9b334a45a8ff 158
bogdanm 0:9b334a45a8ff 159 /**
bogdanm 0:9b334a45a8ff 160 * @}
bogdanm 0:9b334a45a8ff 161 */
bogdanm 0:9b334a45a8ff 162
bogdanm 0:9b334a45a8ff 163 /* Private constants ---------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 164 /** @addtogroup LPTIM_Private_Constants LPTIM Private Constants
bogdanm 0:9b334a45a8ff 165 * @{
bogdanm 0:9b334a45a8ff 166 */
bogdanm 0:9b334a45a8ff 167
bogdanm 0:9b334a45a8ff 168 /**
bogdanm 0:9b334a45a8ff 169 * @}
bogdanm 0:9b334a45a8ff 170 */
bogdanm 0:9b334a45a8ff 171
bogdanm 0:9b334a45a8ff 172 /* Private macros ------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 173 /** @addtogroup LPTIM_Private_Macros LPTIM Private Macros
bogdanm 0:9b334a45a8ff 174 * @{
bogdanm 0:9b334a45a8ff 175 */
bogdanm 0:9b334a45a8ff 176
bogdanm 0:9b334a45a8ff 177 /**
bogdanm 0:9b334a45a8ff 178 * @}
bogdanm 0:9b334a45a8ff 179 */
bogdanm 0:9b334a45a8ff 180
bogdanm 0:9b334a45a8ff 181 /* Private function prototypes -----------------------------------------------*/
bogdanm 0:9b334a45a8ff 182 /** @addtogroup LPTIM_Private_Functions_Prototypes LPTIM Private Functions Prototypes
bogdanm 0:9b334a45a8ff 183 * @{
bogdanm 0:9b334a45a8ff 184 */
bogdanm 0:9b334a45a8ff 185
bogdanm 0:9b334a45a8ff 186 /**
bogdanm 0:9b334a45a8ff 187 * @}
bogdanm 0:9b334a45a8ff 188 */
bogdanm 0:9b334a45a8ff 189
bogdanm 0:9b334a45a8ff 190 /* Private functions ---------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 191 /** @addtogroup LPTIM_Private_Functions LPTIM Private Functions
bogdanm 0:9b334a45a8ff 192 * @{
bogdanm 0:9b334a45a8ff 193 */
bogdanm 0:9b334a45a8ff 194
bogdanm 0:9b334a45a8ff 195 /**
bogdanm 0:9b334a45a8ff 196 * @}
bogdanm 0:9b334a45a8ff 197 */
bogdanm 0:9b334a45a8ff 198
bogdanm 0:9b334a45a8ff 199 /* Exported functions ---------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 200 /** @defgroup LPTIM_Exported_Functions LPTIM Exported Functions
bogdanm 0:9b334a45a8ff 201 * @{
bogdanm 0:9b334a45a8ff 202 */
bogdanm 0:9b334a45a8ff 203
bogdanm 0:9b334a45a8ff 204 /** @defgroup LPTIM_Group1 Initialization/de-initialization functions
bogdanm 0:9b334a45a8ff 205 * @brief Initialization and Configuration functions.
bogdanm 0:9b334a45a8ff 206 *
bogdanm 0:9b334a45a8ff 207 @verbatim
bogdanm 0:9b334a45a8ff 208 ==============================================================================
bogdanm 0:9b334a45a8ff 209 ##### Initialization and de-initialization functions #####
bogdanm 0:9b334a45a8ff 210 ==============================================================================
bogdanm 0:9b334a45a8ff 211 [..] This section provides functions allowing to:
bogdanm 0:9b334a45a8ff 212 (+) Initialize the LPTIM according to the specified parameters in the
bogdanm 0:9b334a45a8ff 213 LPTIM_InitTypeDef and creates the associated handle.
bogdanm 0:9b334a45a8ff 214 (+) DeInitialize the LPTIM peripheral.
bogdanm 0:9b334a45a8ff 215 (+) Initialize the LPTIM MSP.
bogdanm 0:9b334a45a8ff 216 (+) DeInitialize LPTIM MSP.
bogdanm 0:9b334a45a8ff 217
bogdanm 0:9b334a45a8ff 218 @endverbatim
bogdanm 0:9b334a45a8ff 219 * @{
bogdanm 0:9b334a45a8ff 220 */
bogdanm 0:9b334a45a8ff 221
bogdanm 0:9b334a45a8ff 222 /**
bogdanm 0:9b334a45a8ff 223 * @brief Initializes the LPTIM according to the specified parameters in the
bogdanm 0:9b334a45a8ff 224 * LPTIM_InitTypeDef and creates the associated handle.
bogdanm 0:9b334a45a8ff 225 * @param hlptim: LPTIM handle
bogdanm 0:9b334a45a8ff 226 * @retval HAL status
bogdanm 0:9b334a45a8ff 227 */
bogdanm 0:9b334a45a8ff 228 HAL_StatusTypeDef HAL_LPTIM_Init(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 229 {
bogdanm 0:9b334a45a8ff 230 uint32_t tmpcfgr = 0;
bogdanm 0:9b334a45a8ff 231
bogdanm 0:9b334a45a8ff 232 /* Check the LPTIM handle allocation */
bogdanm 0:9b334a45a8ff 233 if(hlptim == NULL)
bogdanm 0:9b334a45a8ff 234 {
bogdanm 0:9b334a45a8ff 235 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 236 }
bogdanm 0:9b334a45a8ff 237
bogdanm 0:9b334a45a8ff 238 /* Check the parameters */
bogdanm 0:9b334a45a8ff 239 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 240
bogdanm 0:9b334a45a8ff 241 assert_param(IS_LPTIM_CLOCK_SOURCE(hlptim->Init.Clock.Source));
bogdanm 0:9b334a45a8ff 242 assert_param(IS_LPTIM_CLOCK_PRESCALER(hlptim->Init.Clock.Prescaler));
bogdanm 0:9b334a45a8ff 243 if ((hlptim->Init.Clock.Source) == LPTIM_CLOCKSOURCE_ULPTIM)
bogdanm 0:9b334a45a8ff 244 {
bogdanm 0:9b334a45a8ff 245 assert_param(IS_LPTIM_CLOCK_POLARITY(hlptim->Init.UltraLowPowerClock.Polarity));
bogdanm 0:9b334a45a8ff 246 assert_param(IS_LPTIM_CLOCK_SAMPLE_TIME(hlptim->Init.UltraLowPowerClock.SampleTime));
bogdanm 0:9b334a45a8ff 247 }
bogdanm 0:9b334a45a8ff 248 assert_param(IS_LPTIM_TRG_SOURCE(hlptim->Init.Trigger.Source));
bogdanm 0:9b334a45a8ff 249 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
bogdanm 0:9b334a45a8ff 250 {
bogdanm 0:9b334a45a8ff 251 assert_param(IS_LPTIM_TRIG_SAMPLE_TIME(hlptim->Init.Trigger.SampleTime));
bogdanm 0:9b334a45a8ff 252 assert_param(IS_LPTIM_EXT_TRG_POLARITY(hlptim->Init.Trigger.ActiveEdge));
bogdanm 0:9b334a45a8ff 253 }
bogdanm 0:9b334a45a8ff 254 assert_param(IS_LPTIM_OUTPUT_POLARITY(hlptim->Init.OutputPolarity));
bogdanm 0:9b334a45a8ff 255 assert_param(IS_LPTIM_UPDATE_MODE(hlptim->Init.UpdateMode));
bogdanm 0:9b334a45a8ff 256 assert_param(IS_LPTIM_COUNTER_SOURCE(hlptim->Init.CounterSource));
bogdanm 0:9b334a45a8ff 257
bogdanm 0:9b334a45a8ff 258 if(hlptim->State == HAL_LPTIM_STATE_RESET)
bogdanm 0:9b334a45a8ff 259 {
bogdanm 0:9b334a45a8ff 260 /* Allocate lock resource and initialize it */
bogdanm 0:9b334a45a8ff 261 hlptim->Lock = HAL_UNLOCKED;
bogdanm 0:9b334a45a8ff 262 /* Init the low level hardware */
bogdanm 0:9b334a45a8ff 263 HAL_LPTIM_MspInit(hlptim);
bogdanm 0:9b334a45a8ff 264 }
bogdanm 0:9b334a45a8ff 265
bogdanm 0:9b334a45a8ff 266 /* Change the LPTIM state */
bogdanm 0:9b334a45a8ff 267 hlptim->State = HAL_LPTIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 268
bogdanm 0:9b334a45a8ff 269 /* Get the LPTIMx CFGR value */
bogdanm 0:9b334a45a8ff 270 tmpcfgr = hlptim->Instance->CFGR;
bogdanm 0:9b334a45a8ff 271
bogdanm 0:9b334a45a8ff 272 if ((hlptim->Init.Clock.Source) == LPTIM_CLOCKSOURCE_ULPTIM)
bogdanm 0:9b334a45a8ff 273 {
bogdanm 0:9b334a45a8ff 274 tmpcfgr &= (uint32_t)(~(LPTIM_CFGR_CKPOL | LPTIM_CFGR_CKFLT));
bogdanm 0:9b334a45a8ff 275 }
bogdanm 0:9b334a45a8ff 276 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
bogdanm 0:9b334a45a8ff 277 {
bogdanm 0:9b334a45a8ff 278 tmpcfgr &= (uint32_t)(~ (LPTIM_CFGR_TRGFLT | LPTIM_CFGR_TRIGSEL));
bogdanm 0:9b334a45a8ff 279 }
bogdanm 0:9b334a45a8ff 280
bogdanm 0:9b334a45a8ff 281 /* Clear CKSEL, PRESC, TRIGEN, TRGFLT, WAVPOL, PRELOAD & COUNTMODE bits */
bogdanm 0:9b334a45a8ff 282 tmpcfgr &= (uint32_t)(~(LPTIM_CFGR_CKSEL | LPTIM_CFGR_TRIGEN | LPTIM_CFGR_PRELOAD |
bogdanm 0:9b334a45a8ff 283 LPTIM_CFGR_WAVPOL | LPTIM_CFGR_PRESC | LPTIM_CFGR_COUNTMODE ));
bogdanm 0:9b334a45a8ff 284
bogdanm 0:9b334a45a8ff 285 /* Set initialization parameters */
bogdanm 0:9b334a45a8ff 286 tmpcfgr |= (hlptim->Init.Clock.Source |
bogdanm 0:9b334a45a8ff 287 hlptim->Init.Clock.Prescaler |
bogdanm 0:9b334a45a8ff 288 hlptim->Init.OutputPolarity |
bogdanm 0:9b334a45a8ff 289 hlptim->Init.UpdateMode |
bogdanm 0:9b334a45a8ff 290 hlptim->Init.CounterSource);
bogdanm 0:9b334a45a8ff 291
bogdanm 0:9b334a45a8ff 292 if ((hlptim->Init.Clock.Source) == LPTIM_CLOCKSOURCE_ULPTIM)
bogdanm 0:9b334a45a8ff 293 {
bogdanm 0:9b334a45a8ff 294 tmpcfgr |= (hlptim->Init.UltraLowPowerClock.Polarity |
bogdanm 0:9b334a45a8ff 295 hlptim->Init.UltraLowPowerClock.SampleTime);
bogdanm 0:9b334a45a8ff 296 }
bogdanm 0:9b334a45a8ff 297
bogdanm 0:9b334a45a8ff 298 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
bogdanm 0:9b334a45a8ff 299 {
bogdanm 0:9b334a45a8ff 300 /* Enable External trigger and set the trigger source */
bogdanm 0:9b334a45a8ff 301 tmpcfgr |= (hlptim->Init.Trigger.Source |
bogdanm 0:9b334a45a8ff 302 hlptim->Init.Trigger.ActiveEdge |
bogdanm 0:9b334a45a8ff 303 hlptim->Init.Trigger.SampleTime);
bogdanm 0:9b334a45a8ff 304 }
bogdanm 0:9b334a45a8ff 305
bogdanm 0:9b334a45a8ff 306 /* Write to LPTIMx CFGR */
bogdanm 0:9b334a45a8ff 307 hlptim->Instance->CFGR = tmpcfgr;
bogdanm 0:9b334a45a8ff 308
bogdanm 0:9b334a45a8ff 309 /* Change the LPTIM state */
bogdanm 0:9b334a45a8ff 310 hlptim->State = HAL_LPTIM_STATE_READY;
bogdanm 0:9b334a45a8ff 311
bogdanm 0:9b334a45a8ff 312 /* Return function status */
bogdanm 0:9b334a45a8ff 313 return HAL_OK;
bogdanm 0:9b334a45a8ff 314 }
bogdanm 0:9b334a45a8ff 315
bogdanm 0:9b334a45a8ff 316 /**
bogdanm 0:9b334a45a8ff 317 * @brief DeInitializes the LPTIM peripheral.
bogdanm 0:9b334a45a8ff 318 * @param hlptim: LPTIM handle
bogdanm 0:9b334a45a8ff 319 * @retval HAL status
bogdanm 0:9b334a45a8ff 320 */
bogdanm 0:9b334a45a8ff 321 HAL_StatusTypeDef HAL_LPTIM_DeInit(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 322 {
bogdanm 0:9b334a45a8ff 323 /* Check the LPTIM handle allocation */
bogdanm 0:9b334a45a8ff 324 if(hlptim == NULL)
bogdanm 0:9b334a45a8ff 325 {
bogdanm 0:9b334a45a8ff 326 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 327 }
bogdanm 0:9b334a45a8ff 328
bogdanm 0:9b334a45a8ff 329 /* Change the LPTIM state */
bogdanm 0:9b334a45a8ff 330 hlptim->State = HAL_LPTIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 331
bogdanm 0:9b334a45a8ff 332 /* Disable the LPTIM Peripheral Clock */
bogdanm 0:9b334a45a8ff 333 __HAL_LPTIM_DISABLE(hlptim);
bogdanm 0:9b334a45a8ff 334
bogdanm 0:9b334a45a8ff 335 /* DeInit the low level hardware: CLOCK, NVIC.*/
bogdanm 0:9b334a45a8ff 336 HAL_LPTIM_MspDeInit(hlptim);
bogdanm 0:9b334a45a8ff 337
bogdanm 0:9b334a45a8ff 338 /* Change the LPTIM state */
bogdanm 0:9b334a45a8ff 339 hlptim->State = HAL_LPTIM_STATE_RESET;
bogdanm 0:9b334a45a8ff 340
bogdanm 0:9b334a45a8ff 341 /* Release Lock */
bogdanm 0:9b334a45a8ff 342 __HAL_UNLOCK(hlptim);
bogdanm 0:9b334a45a8ff 343
bogdanm 0:9b334a45a8ff 344 /* Return function status */
bogdanm 0:9b334a45a8ff 345 return HAL_OK;
bogdanm 0:9b334a45a8ff 346 }
bogdanm 0:9b334a45a8ff 347
bogdanm 0:9b334a45a8ff 348 /**
bogdanm 0:9b334a45a8ff 349 * @brief Initializes the LPTIM MSP.
bogdanm 0:9b334a45a8ff 350 * @param hlptim: LPTIM handle
bogdanm 0:9b334a45a8ff 351 * @retval None
bogdanm 0:9b334a45a8ff 352 */
bogdanm 0:9b334a45a8ff 353 __weak void HAL_LPTIM_MspInit(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 354 {
bogdanm 0:9b334a45a8ff 355 /* NOTE : This function Should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 356 the HAL_LPTIM_MspInit could be implemented in the user file
bogdanm 0:9b334a45a8ff 357 */
bogdanm 0:9b334a45a8ff 358 }
bogdanm 0:9b334a45a8ff 359
bogdanm 0:9b334a45a8ff 360 /**
bogdanm 0:9b334a45a8ff 361 * @brief DeInitializes LPTIM MSP.
bogdanm 0:9b334a45a8ff 362 * @param hlptim: LPTIM handle
bogdanm 0:9b334a45a8ff 363 * @retval None
bogdanm 0:9b334a45a8ff 364 */
bogdanm 0:9b334a45a8ff 365 __weak void HAL_LPTIM_MspDeInit(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 366 {
bogdanm 0:9b334a45a8ff 367 /* NOTE : This function Should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 368 the HAL_LPTIM_MspDeInit could be implemented in the user file
bogdanm 0:9b334a45a8ff 369 */
bogdanm 0:9b334a45a8ff 370 }
bogdanm 0:9b334a45a8ff 371
bogdanm 0:9b334a45a8ff 372 /**
bogdanm 0:9b334a45a8ff 373 * @}
bogdanm 0:9b334a45a8ff 374 */
bogdanm 0:9b334a45a8ff 375
bogdanm 0:9b334a45a8ff 376 /** @defgroup LPTIM_Group2 LPTIM Start-Stop operation functions
bogdanm 0:9b334a45a8ff 377 * @brief Start-Stop operation functions.
bogdanm 0:9b334a45a8ff 378 *
bogdanm 0:9b334a45a8ff 379 @verbatim
bogdanm 0:9b334a45a8ff 380 ==============================================================================
bogdanm 0:9b334a45a8ff 381 ##### LPTIM Start Stop operation functions #####
bogdanm 0:9b334a45a8ff 382 ==============================================================================
bogdanm 0:9b334a45a8ff 383 [..] This section provides functions allowing to:
bogdanm 0:9b334a45a8ff 384 (+) Start the PWM mode.
bogdanm 0:9b334a45a8ff 385 (+) Stop the PWM mode.
bogdanm 0:9b334a45a8ff 386 (+) Start the One pulse mode.
bogdanm 0:9b334a45a8ff 387 (+) Stop the One pulse mode.
bogdanm 0:9b334a45a8ff 388 (+) Start the Set once mode.
bogdanm 0:9b334a45a8ff 389 (+) Stop the Set once mode.
bogdanm 0:9b334a45a8ff 390 (+) Start the Encoder mode.
bogdanm 0:9b334a45a8ff 391 (+) Stop the Encoder mode.
bogdanm 0:9b334a45a8ff 392 (+) Start the Timeout mode.
bogdanm 0:9b334a45a8ff 393 (+) Stop the Timeout mode.
bogdanm 0:9b334a45a8ff 394 (+) Start the Counter mode.
bogdanm 0:9b334a45a8ff 395 (+) Stop the Counter mode.
bogdanm 0:9b334a45a8ff 396
bogdanm 0:9b334a45a8ff 397
bogdanm 0:9b334a45a8ff 398 @endverbatim
bogdanm 0:9b334a45a8ff 399 * @{
bogdanm 0:9b334a45a8ff 400 */
bogdanm 0:9b334a45a8ff 401
bogdanm 0:9b334a45a8ff 402 /**
bogdanm 0:9b334a45a8ff 403 * @brief Starts the LPTIM PWM generation.
bogdanm 0:9b334a45a8ff 404 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 405 * @param Period : Specifies the Autoreload value.
bogdanm 0:9b334a45a8ff 406 * This parameter must be a value between 0x0000 and 0xFFFF.
bogdanm 0:9b334a45a8ff 407 * @param Pulse : Specifies the compare value.
bogdanm 0:9b334a45a8ff 408 * This parameter must be a value between 0x0000 and 0xFFFF.
bogdanm 0:9b334a45a8ff 409 * @retval HAL status
bogdanm 0:9b334a45a8ff 410 */
bogdanm 0:9b334a45a8ff 411 HAL_StatusTypeDef HAL_LPTIM_PWM_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
bogdanm 0:9b334a45a8ff 412 {
bogdanm 0:9b334a45a8ff 413 /* Check the parameters */
bogdanm 0:9b334a45a8ff 414 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 415 assert_param(IS_LPTIM_PERIOD(Period));
bogdanm 0:9b334a45a8ff 416 assert_param(IS_LPTIM_PULSE(Pulse));
bogdanm 0:9b334a45a8ff 417
bogdanm 0:9b334a45a8ff 418 /* Set the LPTIM state */
bogdanm 0:9b334a45a8ff 419 hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 420
bogdanm 0:9b334a45a8ff 421 /* Reset WAVE bit to set PWM mode */
bogdanm 0:9b334a45a8ff 422 hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
bogdanm 0:9b334a45a8ff 423
bogdanm 0:9b334a45a8ff 424 /* Enable the Peripheral */
bogdanm 0:9b334a45a8ff 425 __HAL_LPTIM_ENABLE(hlptim);
bogdanm 0:9b334a45a8ff 426
bogdanm 0:9b334a45a8ff 427 /* Load the period value in the autoreload register */
bogdanm 0:9b334a45a8ff 428 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
bogdanm 0:9b334a45a8ff 429
bogdanm 0:9b334a45a8ff 430 /* Load the pulse value in the compare register */
bogdanm 0:9b334a45a8ff 431 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
bogdanm 0:9b334a45a8ff 432
bogdanm 0:9b334a45a8ff 433 /* Start timer in continuous mode */
bogdanm 0:9b334a45a8ff 434 __HAL_LPTIM_START_CONTINUOUS(hlptim);
bogdanm 0:9b334a45a8ff 435
bogdanm 0:9b334a45a8ff 436 /* Change the TIM state*/
bogdanm 0:9b334a45a8ff 437 hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm 0:9b334a45a8ff 438
bogdanm 0:9b334a45a8ff 439 /* Return function status */
bogdanm 0:9b334a45a8ff 440 return HAL_OK;
bogdanm 0:9b334a45a8ff 441 }
bogdanm 0:9b334a45a8ff 442
bogdanm 0:9b334a45a8ff 443 /**
bogdanm 0:9b334a45a8ff 444 * @brief Stops the LPTIM PWM generation.
bogdanm 0:9b334a45a8ff 445 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 446 * @retval HAL status
bogdanm 0:9b334a45a8ff 447 */
bogdanm 0:9b334a45a8ff 448 HAL_StatusTypeDef HAL_LPTIM_PWM_Stop(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 449 {
bogdanm 0:9b334a45a8ff 450 /* Check the parameters */
bogdanm 0:9b334a45a8ff 451 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 452
bogdanm 0:9b334a45a8ff 453 /* Set the LPTIM state */
bogdanm 0:9b334a45a8ff 454 hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 455
bogdanm 0:9b334a45a8ff 456 /* Disable the Peripheral */
bogdanm 0:9b334a45a8ff 457 __HAL_LPTIM_DISABLE(hlptim);
bogdanm 0:9b334a45a8ff 458
bogdanm 0:9b334a45a8ff 459 /* Change the TIM state*/
bogdanm 0:9b334a45a8ff 460 hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm 0:9b334a45a8ff 461
bogdanm 0:9b334a45a8ff 462 /* Return function status */
bogdanm 0:9b334a45a8ff 463 return HAL_OK;
bogdanm 0:9b334a45a8ff 464 }
bogdanm 0:9b334a45a8ff 465
bogdanm 0:9b334a45a8ff 466 /**
bogdanm 0:9b334a45a8ff 467 * @brief Starts the LPTIM PWM generation in interrupt mode.
bogdanm 0:9b334a45a8ff 468 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 469 * @param Period : Specifies the Autoreload value.
bogdanm 0:9b334a45a8ff 470 * This parameter must be a value between 0x0000 and 0xFFFF
bogdanm 0:9b334a45a8ff 471 * @param Pulse : Specifies the compare value.
bogdanm 0:9b334a45a8ff 472 * This parameter must be a value between 0x0000 and 0xFFFF
bogdanm 0:9b334a45a8ff 473 * @retval HAL status
bogdanm 0:9b334a45a8ff 474 */
bogdanm 0:9b334a45a8ff 475 HAL_StatusTypeDef HAL_LPTIM_PWM_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
bogdanm 0:9b334a45a8ff 476 {
bogdanm 0:9b334a45a8ff 477 /* Check the parameters */
bogdanm 0:9b334a45a8ff 478 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 479 assert_param(IS_LPTIM_PERIOD(Period));
bogdanm 0:9b334a45a8ff 480 assert_param(IS_LPTIM_PULSE(Pulse));
bogdanm 0:9b334a45a8ff 481
bogdanm 0:9b334a45a8ff 482 /* Set the LPTIM state */
bogdanm 0:9b334a45a8ff 483 hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 484
bogdanm 0:9b334a45a8ff 485 /* Reset WAVE bit to set PWM mode */
bogdanm 0:9b334a45a8ff 486 hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
bogdanm 0:9b334a45a8ff 487
bogdanm 0:9b334a45a8ff 488 /* Enable Autoreload write complete interrupt */
bogdanm 0:9b334a45a8ff 489 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
bogdanm 0:9b334a45a8ff 490
bogdanm 0:9b334a45a8ff 491 /* Enable Compare write complete interrupt */
bogdanm 0:9b334a45a8ff 492 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPOK);
bogdanm 0:9b334a45a8ff 493
bogdanm 0:9b334a45a8ff 494 /* Enable Autoreload match interrupt */
bogdanm 0:9b334a45a8ff 495 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
bogdanm 0:9b334a45a8ff 496
bogdanm 0:9b334a45a8ff 497 /* Enable Compare match interrupt */
bogdanm 0:9b334a45a8ff 498 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
bogdanm 0:9b334a45a8ff 499
bogdanm 0:9b334a45a8ff 500 /* If external trigger source is used, then enable external trigger interrupt */
bogdanm 0:9b334a45a8ff 501 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
bogdanm 0:9b334a45a8ff 502 {
bogdanm 0:9b334a45a8ff 503 /* Enable external trigger interrupt */
bogdanm 0:9b334a45a8ff 504 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
bogdanm 0:9b334a45a8ff 505 }
bogdanm 0:9b334a45a8ff 506
bogdanm 0:9b334a45a8ff 507 /* Enable the Peripheral */
bogdanm 0:9b334a45a8ff 508 __HAL_LPTIM_ENABLE(hlptim);
bogdanm 0:9b334a45a8ff 509
bogdanm 0:9b334a45a8ff 510 /* Load the period value in the autoreload register */
bogdanm 0:9b334a45a8ff 511 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
bogdanm 0:9b334a45a8ff 512
bogdanm 0:9b334a45a8ff 513 /* Load the pulse value in the compare register */
bogdanm 0:9b334a45a8ff 514 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
bogdanm 0:9b334a45a8ff 515
bogdanm 0:9b334a45a8ff 516 /* Start timer in continuous mode */
bogdanm 0:9b334a45a8ff 517 __HAL_LPTIM_START_CONTINUOUS(hlptim);
bogdanm 0:9b334a45a8ff 518
bogdanm 0:9b334a45a8ff 519 /* Change the TIM state*/
bogdanm 0:9b334a45a8ff 520 hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm 0:9b334a45a8ff 521
bogdanm 0:9b334a45a8ff 522 /* Return function status */
bogdanm 0:9b334a45a8ff 523 return HAL_OK;
bogdanm 0:9b334a45a8ff 524 }
bogdanm 0:9b334a45a8ff 525
bogdanm 0:9b334a45a8ff 526 /**
bogdanm 0:9b334a45a8ff 527 * @brief Stops the LPTIM PWM generation in interrupt mode.
bogdanm 0:9b334a45a8ff 528 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 529 * @retval HAL status
bogdanm 0:9b334a45a8ff 530 */
bogdanm 0:9b334a45a8ff 531 HAL_StatusTypeDef HAL_LPTIM_PWM_Stop_IT(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 532 {
bogdanm 0:9b334a45a8ff 533 /* Check the parameters */
bogdanm 0:9b334a45a8ff 534 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 535
bogdanm 0:9b334a45a8ff 536 /* Set the LPTIM state */
bogdanm 0:9b334a45a8ff 537 hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 538
bogdanm 0:9b334a45a8ff 539 /* Disable the Peripheral */
bogdanm 0:9b334a45a8ff 540 __HAL_LPTIM_DISABLE(hlptim);
bogdanm 0:9b334a45a8ff 541
bogdanm 0:9b334a45a8ff 542 /* Disable Autoreload write complete interrupt */
bogdanm 0:9b334a45a8ff 543 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
bogdanm 0:9b334a45a8ff 544
bogdanm 0:9b334a45a8ff 545 /* Disable Compare write complete interrupt */
bogdanm 0:9b334a45a8ff 546 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPOK);
bogdanm 0:9b334a45a8ff 547
bogdanm 0:9b334a45a8ff 548 /* Disable Autoreload match interrupt */
bogdanm 0:9b334a45a8ff 549 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
bogdanm 0:9b334a45a8ff 550
bogdanm 0:9b334a45a8ff 551 /* Disable Compare match interrupt */
bogdanm 0:9b334a45a8ff 552 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
bogdanm 0:9b334a45a8ff 553
bogdanm 0:9b334a45a8ff 554 /* If external trigger source is used, then disable external trigger interrupt */
bogdanm 0:9b334a45a8ff 555 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
bogdanm 0:9b334a45a8ff 556 {
bogdanm 0:9b334a45a8ff 557 /* Disable external trigger interrupt */
bogdanm 0:9b334a45a8ff 558 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
bogdanm 0:9b334a45a8ff 559 }
bogdanm 0:9b334a45a8ff 560
bogdanm 0:9b334a45a8ff 561 /* Change the TIM state*/
bogdanm 0:9b334a45a8ff 562 hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm 0:9b334a45a8ff 563
bogdanm 0:9b334a45a8ff 564 /* Return function status */
bogdanm 0:9b334a45a8ff 565 return HAL_OK;
bogdanm 0:9b334a45a8ff 566 }
bogdanm 0:9b334a45a8ff 567
bogdanm 0:9b334a45a8ff 568 /**
bogdanm 0:9b334a45a8ff 569 * @brief Starts the LPTIM One pulse generation.
bogdanm 0:9b334a45a8ff 570 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 571 * @param Period : Specifies the Autoreload value.
bogdanm 0:9b334a45a8ff 572 * This parameter must be a value between 0x0000 and 0xFFFF.
bogdanm 0:9b334a45a8ff 573 * @param Pulse : Specifies the compare value.
bogdanm 0:9b334a45a8ff 574 * This parameter must be a value between 0x0000 and 0xFFFF.
bogdanm 0:9b334a45a8ff 575 * @retval HAL status
bogdanm 0:9b334a45a8ff 576 */
bogdanm 0:9b334a45a8ff 577 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
bogdanm 0:9b334a45a8ff 578 {
bogdanm 0:9b334a45a8ff 579 /* Check the parameters */
bogdanm 0:9b334a45a8ff 580 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 581 assert_param(IS_LPTIM_PERIOD(Period));
bogdanm 0:9b334a45a8ff 582 assert_param(IS_LPTIM_PULSE(Pulse));
bogdanm 0:9b334a45a8ff 583
bogdanm 0:9b334a45a8ff 584 /* Set the LPTIM state */
bogdanm 0:9b334a45a8ff 585 hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 586
bogdanm 0:9b334a45a8ff 587 /* Reset WAVE bit to set one pulse mode */
bogdanm 0:9b334a45a8ff 588 hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
bogdanm 0:9b334a45a8ff 589
bogdanm 0:9b334a45a8ff 590 /* Enable the Peripheral */
bogdanm 0:9b334a45a8ff 591 __HAL_LPTIM_ENABLE(hlptim);
bogdanm 0:9b334a45a8ff 592
bogdanm 0:9b334a45a8ff 593 /* Load the period value in the autoreload register */
bogdanm 0:9b334a45a8ff 594 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
bogdanm 0:9b334a45a8ff 595
bogdanm 0:9b334a45a8ff 596 /* Load the pulse value in the compare register */
bogdanm 0:9b334a45a8ff 597 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
bogdanm 0:9b334a45a8ff 598
bogdanm 0:9b334a45a8ff 599 /* Start timer in continuous mode */
bogdanm 0:9b334a45a8ff 600 __HAL_LPTIM_START_SINGLE(hlptim);
bogdanm 0:9b334a45a8ff 601
bogdanm 0:9b334a45a8ff 602 /* Change the TIM state*/
bogdanm 0:9b334a45a8ff 603 hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm 0:9b334a45a8ff 604
bogdanm 0:9b334a45a8ff 605 /* Return function status */
bogdanm 0:9b334a45a8ff 606 return HAL_OK;
bogdanm 0:9b334a45a8ff 607 }
bogdanm 0:9b334a45a8ff 608
bogdanm 0:9b334a45a8ff 609 /**
bogdanm 0:9b334a45a8ff 610 * @brief Stops the LPTIM One pulse generation.
bogdanm 0:9b334a45a8ff 611 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 612 * @retval HAL status
bogdanm 0:9b334a45a8ff 613 */
bogdanm 0:9b334a45a8ff 614 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 615 {
bogdanm 0:9b334a45a8ff 616 /* Check the parameters */
bogdanm 0:9b334a45a8ff 617 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 618
bogdanm 0:9b334a45a8ff 619 /* Set the LPTIM state */
bogdanm 0:9b334a45a8ff 620 hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 621
bogdanm 0:9b334a45a8ff 622 /* Disable the Peripheral */
bogdanm 0:9b334a45a8ff 623 __HAL_LPTIM_DISABLE(hlptim);
bogdanm 0:9b334a45a8ff 624
bogdanm 0:9b334a45a8ff 625 /* Change the TIM state*/
bogdanm 0:9b334a45a8ff 626 hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm 0:9b334a45a8ff 627
bogdanm 0:9b334a45a8ff 628 /* Return function status */
bogdanm 0:9b334a45a8ff 629 return HAL_OK;
bogdanm 0:9b334a45a8ff 630 }
bogdanm 0:9b334a45a8ff 631
bogdanm 0:9b334a45a8ff 632 /**
bogdanm 0:9b334a45a8ff 633 * @brief Starts the LPTIM One pulse generation in interrupt mode.
bogdanm 0:9b334a45a8ff 634 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 635 * @param Period : Specifies the Autoreload value.
bogdanm 0:9b334a45a8ff 636 * This parameter must be a value between 0x0000 and 0xFFFF.
bogdanm 0:9b334a45a8ff 637 * @param Pulse : Specifies the compare value.
bogdanm 0:9b334a45a8ff 638 * This parameter must be a value between 0x0000 and 0xFFFF.
bogdanm 0:9b334a45a8ff 639 * @retval HAL status
bogdanm 0:9b334a45a8ff 640 */
bogdanm 0:9b334a45a8ff 641 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
bogdanm 0:9b334a45a8ff 642 {
bogdanm 0:9b334a45a8ff 643 /* Check the parameters */
bogdanm 0:9b334a45a8ff 644 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 645 assert_param(IS_LPTIM_PERIOD(Period));
bogdanm 0:9b334a45a8ff 646 assert_param(IS_LPTIM_PULSE(Pulse));
bogdanm 0:9b334a45a8ff 647
bogdanm 0:9b334a45a8ff 648 /* Set the LPTIM state */
bogdanm 0:9b334a45a8ff 649 hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 650
bogdanm 0:9b334a45a8ff 651 /* Reset WAVE bit to set one pulse mode */
bogdanm 0:9b334a45a8ff 652 hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
bogdanm 0:9b334a45a8ff 653
bogdanm 0:9b334a45a8ff 654 /* Enable Autoreload write complete interrupt */
bogdanm 0:9b334a45a8ff 655 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
bogdanm 0:9b334a45a8ff 656
bogdanm 0:9b334a45a8ff 657 /* Enable Compare write complete interrupt */
bogdanm 0:9b334a45a8ff 658 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPOK);
bogdanm 0:9b334a45a8ff 659
bogdanm 0:9b334a45a8ff 660 /* Enable Autoreload match interrupt */
bogdanm 0:9b334a45a8ff 661 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
bogdanm 0:9b334a45a8ff 662
bogdanm 0:9b334a45a8ff 663 /* Enable Compare match interrupt */
bogdanm 0:9b334a45a8ff 664 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
bogdanm 0:9b334a45a8ff 665
bogdanm 0:9b334a45a8ff 666 /* If external trigger source is used, then enable external trigger interrupt */
bogdanm 0:9b334a45a8ff 667 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
bogdanm 0:9b334a45a8ff 668 {
bogdanm 0:9b334a45a8ff 669 /* Enable external trigger interrupt */
bogdanm 0:9b334a45a8ff 670 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
bogdanm 0:9b334a45a8ff 671 }
bogdanm 0:9b334a45a8ff 672
bogdanm 0:9b334a45a8ff 673 /* Enable the Peripheral */
bogdanm 0:9b334a45a8ff 674 __HAL_LPTIM_ENABLE(hlptim);
bogdanm 0:9b334a45a8ff 675
bogdanm 0:9b334a45a8ff 676 /* Load the period value in the autoreload register */
bogdanm 0:9b334a45a8ff 677 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
bogdanm 0:9b334a45a8ff 678
bogdanm 0:9b334a45a8ff 679 /* Load the pulse value in the compare register */
bogdanm 0:9b334a45a8ff 680 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
bogdanm 0:9b334a45a8ff 681
bogdanm 0:9b334a45a8ff 682 /* Start timer in continuous mode */
bogdanm 0:9b334a45a8ff 683 __HAL_LPTIM_START_SINGLE(hlptim);
bogdanm 0:9b334a45a8ff 684
bogdanm 0:9b334a45a8ff 685 /* Change the TIM state*/
bogdanm 0:9b334a45a8ff 686 hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm 0:9b334a45a8ff 687
bogdanm 0:9b334a45a8ff 688 /* Return function status */
bogdanm 0:9b334a45a8ff 689 return HAL_OK;
bogdanm 0:9b334a45a8ff 690 }
bogdanm 0:9b334a45a8ff 691
bogdanm 0:9b334a45a8ff 692 /**
bogdanm 0:9b334a45a8ff 693 * @brief Stops the LPTIM One pulse generation in interrupt mode.
bogdanm 0:9b334a45a8ff 694 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 695 * @retval HAL status
bogdanm 0:9b334a45a8ff 696 */
bogdanm 0:9b334a45a8ff 697 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop_IT(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 698 {
bogdanm 0:9b334a45a8ff 699 /* Check the parameters */
bogdanm 0:9b334a45a8ff 700 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 701
bogdanm 0:9b334a45a8ff 702 /* Set the LPTIM state */
bogdanm 0:9b334a45a8ff 703 hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 704
bogdanm 0:9b334a45a8ff 705 /* Disable the Peripheral */
bogdanm 0:9b334a45a8ff 706 __HAL_LPTIM_DISABLE(hlptim);
bogdanm 0:9b334a45a8ff 707
bogdanm 0:9b334a45a8ff 708 /* Disable Autoreload write complete interrupt */
bogdanm 0:9b334a45a8ff 709 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
bogdanm 0:9b334a45a8ff 710
bogdanm 0:9b334a45a8ff 711 /* Disable Compare write complete interrupt */
bogdanm 0:9b334a45a8ff 712 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPOK);
bogdanm 0:9b334a45a8ff 713
bogdanm 0:9b334a45a8ff 714 /* Disable Autoreload match interrupt */
bogdanm 0:9b334a45a8ff 715 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
bogdanm 0:9b334a45a8ff 716
bogdanm 0:9b334a45a8ff 717 /* Disable Compare match interrupt */
bogdanm 0:9b334a45a8ff 718 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
bogdanm 0:9b334a45a8ff 719
bogdanm 0:9b334a45a8ff 720 /* If external trigger source is used, then disable external trigger interrupt */
bogdanm 0:9b334a45a8ff 721 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
bogdanm 0:9b334a45a8ff 722 {
bogdanm 0:9b334a45a8ff 723 /* Disable external trigger interrupt */
bogdanm 0:9b334a45a8ff 724 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
bogdanm 0:9b334a45a8ff 725 }
bogdanm 0:9b334a45a8ff 726
bogdanm 0:9b334a45a8ff 727 /* Change the TIM state*/
bogdanm 0:9b334a45a8ff 728 hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm 0:9b334a45a8ff 729
bogdanm 0:9b334a45a8ff 730 /* Return function status */
bogdanm 0:9b334a45a8ff 731 return HAL_OK;
bogdanm 0:9b334a45a8ff 732 }
bogdanm 0:9b334a45a8ff 733
bogdanm 0:9b334a45a8ff 734 /**
bogdanm 0:9b334a45a8ff 735 * @brief Starts the LPTIM in Set once mode.
bogdanm 0:9b334a45a8ff 736 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 737 * @param Period : Specifies the Autoreload value.
bogdanm 0:9b334a45a8ff 738 * This parameter must be a value between 0x0000 and 0xFFFF.
bogdanm 0:9b334a45a8ff 739 * @param Pulse : Specifies the compare value.
bogdanm 0:9b334a45a8ff 740 * This parameter must be a value between 0x0000 and 0xFFFF.
bogdanm 0:9b334a45a8ff 741 * @retval HAL status
bogdanm 0:9b334a45a8ff 742 */
bogdanm 0:9b334a45a8ff 743 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
bogdanm 0:9b334a45a8ff 744 {
bogdanm 0:9b334a45a8ff 745 /* Check the parameters */
bogdanm 0:9b334a45a8ff 746 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 747 assert_param(IS_LPTIM_PERIOD(Period));
bogdanm 0:9b334a45a8ff 748 assert_param(IS_LPTIM_PULSE(Pulse));
bogdanm 0:9b334a45a8ff 749
bogdanm 0:9b334a45a8ff 750 /* Set the LPTIM state */
bogdanm 0:9b334a45a8ff 751 hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 752
bogdanm 0:9b334a45a8ff 753 /* Set WAVE bit to enable the set once mode */
bogdanm 0:9b334a45a8ff 754 hlptim->Instance->CFGR |= LPTIM_CFGR_WAVE;
bogdanm 0:9b334a45a8ff 755
bogdanm 0:9b334a45a8ff 756 /* Enable the Peripheral */
bogdanm 0:9b334a45a8ff 757 __HAL_LPTIM_ENABLE(hlptim);
bogdanm 0:9b334a45a8ff 758
bogdanm 0:9b334a45a8ff 759 /* Load the period value in the autoreload register */
bogdanm 0:9b334a45a8ff 760 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
bogdanm 0:9b334a45a8ff 761
bogdanm 0:9b334a45a8ff 762 /* Load the pulse value in the compare register */
bogdanm 0:9b334a45a8ff 763 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
bogdanm 0:9b334a45a8ff 764
bogdanm 0:9b334a45a8ff 765 /* Start timer in continuous mode */
bogdanm 0:9b334a45a8ff 766 __HAL_LPTIM_START_SINGLE(hlptim);
bogdanm 0:9b334a45a8ff 767
bogdanm 0:9b334a45a8ff 768 /* Change the TIM state*/
bogdanm 0:9b334a45a8ff 769 hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm 0:9b334a45a8ff 770
bogdanm 0:9b334a45a8ff 771 /* Return function status */
bogdanm 0:9b334a45a8ff 772 return HAL_OK;
bogdanm 0:9b334a45a8ff 773 }
bogdanm 0:9b334a45a8ff 774
bogdanm 0:9b334a45a8ff 775 /**
bogdanm 0:9b334a45a8ff 776 * @brief Stops the LPTIM Set once mode.
bogdanm 0:9b334a45a8ff 777 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 778 * @retval HAL status
bogdanm 0:9b334a45a8ff 779 */
bogdanm 0:9b334a45a8ff 780 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 781 {
bogdanm 0:9b334a45a8ff 782 /* Check the parameters */
bogdanm 0:9b334a45a8ff 783 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 784
bogdanm 0:9b334a45a8ff 785 /* Set the LPTIM state */
bogdanm 0:9b334a45a8ff 786 hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 787
bogdanm 0:9b334a45a8ff 788 /* Disable the Peripheral */
bogdanm 0:9b334a45a8ff 789 __HAL_LPTIM_DISABLE(hlptim);
bogdanm 0:9b334a45a8ff 790
bogdanm 0:9b334a45a8ff 791 /* Change the TIM state*/
bogdanm 0:9b334a45a8ff 792 hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm 0:9b334a45a8ff 793
bogdanm 0:9b334a45a8ff 794 /* Return function status */
bogdanm 0:9b334a45a8ff 795 return HAL_OK;
bogdanm 0:9b334a45a8ff 796 }
bogdanm 0:9b334a45a8ff 797
bogdanm 0:9b334a45a8ff 798 /**
bogdanm 0:9b334a45a8ff 799 * @brief Starts the LPTIM Set once mode in interrupt mode.
bogdanm 0:9b334a45a8ff 800 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 801 * @param Period : Specifies the Autoreload value.
bogdanm 0:9b334a45a8ff 802 * This parameter must be a value between 0x0000 and 0xFFFF.
bogdanm 0:9b334a45a8ff 803 * @param Pulse : Specifies the compare value.
bogdanm 0:9b334a45a8ff 804 * This parameter must be a value between 0x0000 and 0xFFFF.
bogdanm 0:9b334a45a8ff 805 * @retval HAL status
bogdanm 0:9b334a45a8ff 806 */
bogdanm 0:9b334a45a8ff 807 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
bogdanm 0:9b334a45a8ff 808 {
bogdanm 0:9b334a45a8ff 809 /* Check the parameters */
bogdanm 0:9b334a45a8ff 810 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 811 assert_param(IS_LPTIM_PERIOD(Period));
bogdanm 0:9b334a45a8ff 812 assert_param(IS_LPTIM_PULSE(Pulse));
bogdanm 0:9b334a45a8ff 813
bogdanm 0:9b334a45a8ff 814 /* Set the LPTIM state */
bogdanm 0:9b334a45a8ff 815 hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 816
bogdanm 0:9b334a45a8ff 817 /* Set WAVE bit to enable the set once mode */
bogdanm 0:9b334a45a8ff 818 hlptim->Instance->CFGR |= LPTIM_CFGR_WAVE;
bogdanm 0:9b334a45a8ff 819
bogdanm 0:9b334a45a8ff 820 /* Enable Autoreload write complete interrupt */
bogdanm 0:9b334a45a8ff 821 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
bogdanm 0:9b334a45a8ff 822
bogdanm 0:9b334a45a8ff 823 /* Enable Compare write complete interrupt */
bogdanm 0:9b334a45a8ff 824 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPOK);
bogdanm 0:9b334a45a8ff 825
bogdanm 0:9b334a45a8ff 826 /* Enable Autoreload match interrupt */
bogdanm 0:9b334a45a8ff 827 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
bogdanm 0:9b334a45a8ff 828
bogdanm 0:9b334a45a8ff 829 /* Enable Compare match interrupt */
bogdanm 0:9b334a45a8ff 830 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
bogdanm 0:9b334a45a8ff 831
bogdanm 0:9b334a45a8ff 832 /* If external trigger source is used, then enable external trigger interrupt */
bogdanm 0:9b334a45a8ff 833 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
bogdanm 0:9b334a45a8ff 834 {
bogdanm 0:9b334a45a8ff 835 /* Enable external trigger interrupt */
bogdanm 0:9b334a45a8ff 836 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
bogdanm 0:9b334a45a8ff 837 }
bogdanm 0:9b334a45a8ff 838
bogdanm 0:9b334a45a8ff 839 /* Enable the Peripheral */
bogdanm 0:9b334a45a8ff 840 __HAL_LPTIM_ENABLE(hlptim);
bogdanm 0:9b334a45a8ff 841
bogdanm 0:9b334a45a8ff 842 /* Load the period value in the autoreload register */
bogdanm 0:9b334a45a8ff 843 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
bogdanm 0:9b334a45a8ff 844
bogdanm 0:9b334a45a8ff 845 /* Load the pulse value in the compare register */
bogdanm 0:9b334a45a8ff 846 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
bogdanm 0:9b334a45a8ff 847
bogdanm 0:9b334a45a8ff 848 /* Start timer in continuous mode */
bogdanm 0:9b334a45a8ff 849 __HAL_LPTIM_START_SINGLE(hlptim);
bogdanm 0:9b334a45a8ff 850
bogdanm 0:9b334a45a8ff 851 /* Change the TIM state*/
bogdanm 0:9b334a45a8ff 852 hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm 0:9b334a45a8ff 853
bogdanm 0:9b334a45a8ff 854 /* Return function status */
bogdanm 0:9b334a45a8ff 855 return HAL_OK;
bogdanm 0:9b334a45a8ff 856 }
bogdanm 0:9b334a45a8ff 857
bogdanm 0:9b334a45a8ff 858 /**
bogdanm 0:9b334a45a8ff 859 * @brief Stops the LPTIM Set once mode in interrupt mode.
bogdanm 0:9b334a45a8ff 860 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 861 * @retval HAL status
bogdanm 0:9b334a45a8ff 862 */
bogdanm 0:9b334a45a8ff 863 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop_IT(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 864 {
bogdanm 0:9b334a45a8ff 865 /* Check the parameters */
bogdanm 0:9b334a45a8ff 866 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 867
bogdanm 0:9b334a45a8ff 868 /* Set the LPTIM state */
bogdanm 0:9b334a45a8ff 869 hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 870
bogdanm 0:9b334a45a8ff 871 /* Disable the Peripheral */
bogdanm 0:9b334a45a8ff 872 __HAL_LPTIM_DISABLE(hlptim);
bogdanm 0:9b334a45a8ff 873
bogdanm 0:9b334a45a8ff 874 /* Disable Autoreload write complete interrupt */
bogdanm 0:9b334a45a8ff 875 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
bogdanm 0:9b334a45a8ff 876
bogdanm 0:9b334a45a8ff 877 /* Disable Compare write complete interrupt */
bogdanm 0:9b334a45a8ff 878 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPOK);
bogdanm 0:9b334a45a8ff 879
bogdanm 0:9b334a45a8ff 880 /* Disable Autoreload match interrupt */
bogdanm 0:9b334a45a8ff 881 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
bogdanm 0:9b334a45a8ff 882
bogdanm 0:9b334a45a8ff 883 /* Disable Compare match interrupt */
bogdanm 0:9b334a45a8ff 884 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
bogdanm 0:9b334a45a8ff 885
bogdanm 0:9b334a45a8ff 886 /* If external trigger source is used, then disable external trigger interrupt */
bogdanm 0:9b334a45a8ff 887 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
bogdanm 0:9b334a45a8ff 888 {
bogdanm 0:9b334a45a8ff 889 /* Disable external trigger interrupt */
bogdanm 0:9b334a45a8ff 890 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
bogdanm 0:9b334a45a8ff 891 }
bogdanm 0:9b334a45a8ff 892
bogdanm 0:9b334a45a8ff 893 /* Change the TIM state*/
bogdanm 0:9b334a45a8ff 894 hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm 0:9b334a45a8ff 895
bogdanm 0:9b334a45a8ff 896 /* Return function status */
bogdanm 0:9b334a45a8ff 897 return HAL_OK;
bogdanm 0:9b334a45a8ff 898 }
bogdanm 0:9b334a45a8ff 899
bogdanm 0:9b334a45a8ff 900 /**
bogdanm 0:9b334a45a8ff 901 * @brief Starts the Encoder interface.
bogdanm 0:9b334a45a8ff 902 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 903 * @param Period : Specifies the Autoreload value.
bogdanm 0:9b334a45a8ff 904 * This parameter must be a value between 0x0000 and 0xFFFF.
bogdanm 0:9b334a45a8ff 905 * @retval HAL status
bogdanm 0:9b334a45a8ff 906 */
bogdanm 0:9b334a45a8ff 907 HAL_StatusTypeDef HAL_LPTIM_Encoder_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
bogdanm 0:9b334a45a8ff 908 {
bogdanm 0:9b334a45a8ff 909 uint32_t tmpcfgr = 0;
bogdanm 0:9b334a45a8ff 910
bogdanm 0:9b334a45a8ff 911 /* Check the parameters */
bogdanm 0:9b334a45a8ff 912 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 913 assert_param(IS_LPTIM_PERIOD(Period));
bogdanm 0:9b334a45a8ff 914 assert_param(hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC);
bogdanm 0:9b334a45a8ff 915 assert_param(hlptim->Init.Clock.Prescaler == LPTIM_PRESCALER_DIV1);
bogdanm 0:9b334a45a8ff 916 assert_param(IS_LPTIM_CLOCK_POLARITY(hlptim->Init.UltraLowPowerClock.Polarity));
bogdanm 0:9b334a45a8ff 917
bogdanm 0:9b334a45a8ff 918 /* Set the LPTIM state */
bogdanm 0:9b334a45a8ff 919 hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 920
bogdanm 0:9b334a45a8ff 921 /* Get the LPTIMx CFGR value */
bogdanm 0:9b334a45a8ff 922 tmpcfgr = hlptim->Instance->CFGR;
bogdanm 0:9b334a45a8ff 923
bogdanm 0:9b334a45a8ff 924 /* Clear CKPOL bits */
bogdanm 0:9b334a45a8ff 925 tmpcfgr &= (uint32_t)(~LPTIM_CFGR_CKPOL);
bogdanm 0:9b334a45a8ff 926
bogdanm 0:9b334a45a8ff 927 /* Set Input polarity */
bogdanm 0:9b334a45a8ff 928 tmpcfgr |= hlptim->Init.UltraLowPowerClock.Polarity;
bogdanm 0:9b334a45a8ff 929
bogdanm 0:9b334a45a8ff 930 /* Write to LPTIMx CFGR */
bogdanm 0:9b334a45a8ff 931 hlptim->Instance->CFGR = tmpcfgr;
bogdanm 0:9b334a45a8ff 932
bogdanm 0:9b334a45a8ff 933 /* Set ENC bit to enable the encoder interface */
bogdanm 0:9b334a45a8ff 934 hlptim->Instance->CFGR |= LPTIM_CFGR_ENC;
bogdanm 0:9b334a45a8ff 935
bogdanm 0:9b334a45a8ff 936 /* Enable the Peripheral */
bogdanm 0:9b334a45a8ff 937 __HAL_LPTIM_ENABLE(hlptim);
bogdanm 0:9b334a45a8ff 938
bogdanm 0:9b334a45a8ff 939 /* Load the period value in the autoreload register */
bogdanm 0:9b334a45a8ff 940 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
bogdanm 0:9b334a45a8ff 941
bogdanm 0:9b334a45a8ff 942 /* Start timer in continuous mode */
bogdanm 0:9b334a45a8ff 943 __HAL_LPTIM_START_CONTINUOUS(hlptim);
bogdanm 0:9b334a45a8ff 944
bogdanm 0:9b334a45a8ff 945 /* Change the TIM state*/
bogdanm 0:9b334a45a8ff 946 hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm 0:9b334a45a8ff 947
bogdanm 0:9b334a45a8ff 948 /* Return function status */
bogdanm 0:9b334a45a8ff 949 return HAL_OK;
bogdanm 0:9b334a45a8ff 950 }
bogdanm 0:9b334a45a8ff 951
bogdanm 0:9b334a45a8ff 952 /**
bogdanm 0:9b334a45a8ff 953 * @brief Stops the Encoder interface.
bogdanm 0:9b334a45a8ff 954 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 955 * @retval HAL status
bogdanm 0:9b334a45a8ff 956 */
bogdanm 0:9b334a45a8ff 957 HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 958 {
bogdanm 0:9b334a45a8ff 959 /* Check the parameters */
bogdanm 0:9b334a45a8ff 960 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 961
bogdanm 0:9b334a45a8ff 962 /* Set the LPTIM state */
bogdanm 0:9b334a45a8ff 963 hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 964
bogdanm 0:9b334a45a8ff 965 /* Disable the Peripheral */
bogdanm 0:9b334a45a8ff 966 __HAL_LPTIM_DISABLE(hlptim);
bogdanm 0:9b334a45a8ff 967
bogdanm 0:9b334a45a8ff 968 /* Reset ENC bit to disable the encoder interface */
bogdanm 0:9b334a45a8ff 969 hlptim->Instance->CFGR &= ~LPTIM_CFGR_ENC;
bogdanm 0:9b334a45a8ff 970
bogdanm 0:9b334a45a8ff 971 /* Change the TIM state*/
bogdanm 0:9b334a45a8ff 972 hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm 0:9b334a45a8ff 973
bogdanm 0:9b334a45a8ff 974 /* Return function status */
bogdanm 0:9b334a45a8ff 975 return HAL_OK;
bogdanm 0:9b334a45a8ff 976 }
bogdanm 0:9b334a45a8ff 977
bogdanm 0:9b334a45a8ff 978 /**
bogdanm 0:9b334a45a8ff 979 * @brief Starts the Encoder interface in interrupt mode.
bogdanm 0:9b334a45a8ff 980 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 981 * @param Period : Specifies the Autoreload value.
bogdanm 0:9b334a45a8ff 982 * This parameter must be a value between 0x0000 and 0xFFFF.
bogdanm 0:9b334a45a8ff 983 * @retval HAL status
bogdanm 0:9b334a45a8ff 984 */
bogdanm 0:9b334a45a8ff 985 HAL_StatusTypeDef HAL_LPTIM_Encoder_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
bogdanm 0:9b334a45a8ff 986 {
bogdanm 0:9b334a45a8ff 987 uint32_t tmpcfgr = 0;
bogdanm 0:9b334a45a8ff 988
bogdanm 0:9b334a45a8ff 989 /* Check the parameters */
bogdanm 0:9b334a45a8ff 990 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 991 assert_param(IS_LPTIM_PERIOD(Period));
bogdanm 0:9b334a45a8ff 992 assert_param(hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC);
bogdanm 0:9b334a45a8ff 993 assert_param(hlptim->Init.Clock.Prescaler == LPTIM_PRESCALER_DIV1);
bogdanm 0:9b334a45a8ff 994 assert_param(IS_LPTIM_CLOCK_POLARITY(hlptim->Init.UltraLowPowerClock.Polarity));
bogdanm 0:9b334a45a8ff 995
bogdanm 0:9b334a45a8ff 996 /* Set the LPTIM state */
bogdanm 0:9b334a45a8ff 997 hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 998
bogdanm 0:9b334a45a8ff 999 /* Configure edge sensitivity for encoder mode */
bogdanm 0:9b334a45a8ff 1000 /* Get the LPTIMx CFGR value */
bogdanm 0:9b334a45a8ff 1001 tmpcfgr = hlptim->Instance->CFGR;
bogdanm 0:9b334a45a8ff 1002
bogdanm 0:9b334a45a8ff 1003 /* Clear CKPOL bits */
bogdanm 0:9b334a45a8ff 1004 tmpcfgr &= (uint32_t)(~LPTIM_CFGR_CKPOL);
bogdanm 0:9b334a45a8ff 1005
bogdanm 0:9b334a45a8ff 1006 /* Set Input polarity */
bogdanm 0:9b334a45a8ff 1007 tmpcfgr |= hlptim->Init.UltraLowPowerClock.Polarity;
bogdanm 0:9b334a45a8ff 1008
bogdanm 0:9b334a45a8ff 1009 /* Write to LPTIMx CFGR */
bogdanm 0:9b334a45a8ff 1010 hlptim->Instance->CFGR = tmpcfgr;
bogdanm 0:9b334a45a8ff 1011
bogdanm 0:9b334a45a8ff 1012 /* Set ENC bit to enable the encoder interface */
bogdanm 0:9b334a45a8ff 1013 hlptim->Instance->CFGR |= LPTIM_CFGR_ENC;
bogdanm 0:9b334a45a8ff 1014
bogdanm 0:9b334a45a8ff 1015 /* Enable "switch to down direction" interrupt */
bogdanm 0:9b334a45a8ff 1016 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_DOWN);
bogdanm 0:9b334a45a8ff 1017
bogdanm 0:9b334a45a8ff 1018 /* Enable "switch to up direction" interrupt */
bogdanm 0:9b334a45a8ff 1019 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_UP);
bogdanm 0:9b334a45a8ff 1020
bogdanm 0:9b334a45a8ff 1021 /* Enable the Peripheral */
bogdanm 0:9b334a45a8ff 1022 __HAL_LPTIM_ENABLE(hlptim);
bogdanm 0:9b334a45a8ff 1023
bogdanm 0:9b334a45a8ff 1024 /* Load the period value in the autoreload register */
bogdanm 0:9b334a45a8ff 1025 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
bogdanm 0:9b334a45a8ff 1026
bogdanm 0:9b334a45a8ff 1027 /* Start timer in continuous mode */
bogdanm 0:9b334a45a8ff 1028 __HAL_LPTIM_START_CONTINUOUS(hlptim);
bogdanm 0:9b334a45a8ff 1029
bogdanm 0:9b334a45a8ff 1030 /* Change the TIM state*/
bogdanm 0:9b334a45a8ff 1031 hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm 0:9b334a45a8ff 1032
bogdanm 0:9b334a45a8ff 1033 /* Return function status */
bogdanm 0:9b334a45a8ff 1034 return HAL_OK;
bogdanm 0:9b334a45a8ff 1035 }
bogdanm 0:9b334a45a8ff 1036
bogdanm 0:9b334a45a8ff 1037 /**
bogdanm 0:9b334a45a8ff 1038 * @brief Stops the Encoder interface in interrupt mode.
bogdanm 0:9b334a45a8ff 1039 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 1040 * @retval HAL status
bogdanm 0:9b334a45a8ff 1041 */
bogdanm 0:9b334a45a8ff 1042 HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop_IT(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 1043 {
bogdanm 0:9b334a45a8ff 1044 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1045 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 1046
bogdanm 0:9b334a45a8ff 1047 /* Set the LPTIM state */
bogdanm 0:9b334a45a8ff 1048 hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 1049
bogdanm 0:9b334a45a8ff 1050 /* Disable the Peripheral */
bogdanm 0:9b334a45a8ff 1051 __HAL_LPTIM_DISABLE(hlptim);
bogdanm 0:9b334a45a8ff 1052
bogdanm 0:9b334a45a8ff 1053 /* Reset ENC bit to disable the encoder interface */
bogdanm 0:9b334a45a8ff 1054 hlptim->Instance->CFGR &= ~LPTIM_CFGR_ENC;
bogdanm 0:9b334a45a8ff 1055
bogdanm 0:9b334a45a8ff 1056 /* Disable "switch to down direction" interrupt */
bogdanm 0:9b334a45a8ff 1057 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_DOWN);
bogdanm 0:9b334a45a8ff 1058
bogdanm 0:9b334a45a8ff 1059 /* Disable "switch to up direction" interrupt */
bogdanm 0:9b334a45a8ff 1060 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_UP);
bogdanm 0:9b334a45a8ff 1061
bogdanm 0:9b334a45a8ff 1062 /* Change the TIM state*/
bogdanm 0:9b334a45a8ff 1063 hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm 0:9b334a45a8ff 1064
bogdanm 0:9b334a45a8ff 1065 /* Return function status */
bogdanm 0:9b334a45a8ff 1066 return HAL_OK;
bogdanm 0:9b334a45a8ff 1067 }
bogdanm 0:9b334a45a8ff 1068
bogdanm 0:9b334a45a8ff 1069 /**
bogdanm 0:9b334a45a8ff 1070 * @brief Starts the Timeout function. The first trigger event will start the
bogdanm 0:9b334a45a8ff 1071 * timer, any successive trigger event will reset the counter and
bogdanm 0:9b334a45a8ff 1072 * the timer restarts.
bogdanm 0:9b334a45a8ff 1073 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 1074 * @param Period : Specifies the Autoreload value.
bogdanm 0:9b334a45a8ff 1075 * This parameter must be a value between 0x0000 and 0xFFFF.
bogdanm 0:9b334a45a8ff 1076 * @param Timeout : Specifies the TimeOut value to rest the counter.
bogdanm 0:9b334a45a8ff 1077 * This parameter must be a value between 0x0000 and 0xFFFF.
bogdanm 0:9b334a45a8ff 1078 * @retval HAL status
bogdanm 0:9b334a45a8ff 1079 */
bogdanm 0:9b334a45a8ff 1080 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout)
bogdanm 0:9b334a45a8ff 1081 {
bogdanm 0:9b334a45a8ff 1082 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1083 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 1084 assert_param(IS_LPTIM_PERIOD(Period));
bogdanm 0:9b334a45a8ff 1085 assert_param(IS_LPTIM_PULSE(Timeout));
bogdanm 0:9b334a45a8ff 1086
bogdanm 0:9b334a45a8ff 1087 /* Set the LPTIM state */
bogdanm 0:9b334a45a8ff 1088 hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 1089
bogdanm 0:9b334a45a8ff 1090 /* Set TIMOUT bit to enable the timeout function */
bogdanm 0:9b334a45a8ff 1091 hlptim->Instance->CFGR |= LPTIM_CFGR_TIMOUT;
bogdanm 0:9b334a45a8ff 1092
bogdanm 0:9b334a45a8ff 1093 /* Enable the Peripheral */
bogdanm 0:9b334a45a8ff 1094 __HAL_LPTIM_ENABLE(hlptim);
bogdanm 0:9b334a45a8ff 1095
bogdanm 0:9b334a45a8ff 1096 /* Load the period value in the autoreload register */
bogdanm 0:9b334a45a8ff 1097 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
bogdanm 0:9b334a45a8ff 1098
bogdanm 0:9b334a45a8ff 1099 /* Load the Timeout value in the compare register */
bogdanm 0:9b334a45a8ff 1100 __HAL_LPTIM_COMPARE_SET(hlptim, Timeout);
bogdanm 0:9b334a45a8ff 1101
bogdanm 0:9b334a45a8ff 1102 /* Start timer in continuous mode */
bogdanm 0:9b334a45a8ff 1103 __HAL_LPTIM_START_CONTINUOUS(hlptim);
bogdanm 0:9b334a45a8ff 1104
bogdanm 0:9b334a45a8ff 1105 /* Change the TIM state*/
bogdanm 0:9b334a45a8ff 1106 hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm 0:9b334a45a8ff 1107
bogdanm 0:9b334a45a8ff 1108 /* Return function status */
bogdanm 0:9b334a45a8ff 1109 return HAL_OK;
bogdanm 0:9b334a45a8ff 1110 }
bogdanm 0:9b334a45a8ff 1111
bogdanm 0:9b334a45a8ff 1112 /**
bogdanm 0:9b334a45a8ff 1113 * @brief Stops the Timeout function.
bogdanm 0:9b334a45a8ff 1114 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 1115 * @retval HAL status
bogdanm 0:9b334a45a8ff 1116 */
bogdanm 0:9b334a45a8ff 1117 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 1118 {
bogdanm 0:9b334a45a8ff 1119 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1120 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 1121
bogdanm 0:9b334a45a8ff 1122 /* Set the LPTIM state */
bogdanm 0:9b334a45a8ff 1123 hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 1124
bogdanm 0:9b334a45a8ff 1125 /* Disable the Peripheral */
bogdanm 0:9b334a45a8ff 1126 __HAL_LPTIM_DISABLE(hlptim);
bogdanm 0:9b334a45a8ff 1127
bogdanm 0:9b334a45a8ff 1128 /* Reset TIMOUT bit to enable the timeout function */
bogdanm 0:9b334a45a8ff 1129 hlptim->Instance->CFGR &= ~LPTIM_CFGR_TIMOUT;
bogdanm 0:9b334a45a8ff 1130
bogdanm 0:9b334a45a8ff 1131 /* Change the TIM state*/
bogdanm 0:9b334a45a8ff 1132 hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm 0:9b334a45a8ff 1133
bogdanm 0:9b334a45a8ff 1134 /* Return function status */
bogdanm 0:9b334a45a8ff 1135 return HAL_OK;
bogdanm 0:9b334a45a8ff 1136 }
bogdanm 0:9b334a45a8ff 1137
bogdanm 0:9b334a45a8ff 1138 /**
bogdanm 0:9b334a45a8ff 1139 * @brief Starts the Timeout function in interrupt mode. The first trigger
bogdanm 0:9b334a45a8ff 1140 * event will start the timer, any successive trigger event will reset
bogdanm 0:9b334a45a8ff 1141 * the counter and the timer restarts.
bogdanm 0:9b334a45a8ff 1142 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 1143 * @param Period : Specifies the Autoreload value.
bogdanm 0:9b334a45a8ff 1144 * This parameter must be a value between 0x0000 and 0xFFFF.
bogdanm 0:9b334a45a8ff 1145 * @param Timeout : Specifies the TimeOut value to rest the counter.
bogdanm 0:9b334a45a8ff 1146 * This parameter must be a value between 0x0000 and 0xFFFF.
bogdanm 0:9b334a45a8ff 1147 * @retval HAL status
bogdanm 0:9b334a45a8ff 1148 */
bogdanm 0:9b334a45a8ff 1149 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout)
bogdanm 0:9b334a45a8ff 1150 {
bogdanm 0:9b334a45a8ff 1151 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1152 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 1153 assert_param(IS_LPTIM_PERIOD(Period));
bogdanm 0:9b334a45a8ff 1154 assert_param(IS_LPTIM_PULSE(Timeout));
bogdanm 0:9b334a45a8ff 1155
bogdanm 0:9b334a45a8ff 1156 /* Set the LPTIM state */
bogdanm 0:9b334a45a8ff 1157 hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 1158
bogdanm 0:9b334a45a8ff 1159 /* Set TIMOUT bit to enable the timeout function */
bogdanm 0:9b334a45a8ff 1160 hlptim->Instance->CFGR |= LPTIM_CFGR_TIMOUT;
bogdanm 0:9b334a45a8ff 1161
bogdanm 0:9b334a45a8ff 1162 /* Enable Compare match interrupt */
bogdanm 0:9b334a45a8ff 1163 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
bogdanm 0:9b334a45a8ff 1164
bogdanm 0:9b334a45a8ff 1165 /* Enable the Peripheral */
bogdanm 0:9b334a45a8ff 1166 __HAL_LPTIM_ENABLE(hlptim);
bogdanm 0:9b334a45a8ff 1167
bogdanm 0:9b334a45a8ff 1168 /* Load the period value in the autoreload register */
bogdanm 0:9b334a45a8ff 1169 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
bogdanm 0:9b334a45a8ff 1170
bogdanm 0:9b334a45a8ff 1171 /* Load the Timeout value in the compare register */
bogdanm 0:9b334a45a8ff 1172 __HAL_LPTIM_COMPARE_SET(hlptim, Timeout);
bogdanm 0:9b334a45a8ff 1173
bogdanm 0:9b334a45a8ff 1174 /* Start timer in continuous mode */
bogdanm 0:9b334a45a8ff 1175 __HAL_LPTIM_START_CONTINUOUS(hlptim);
bogdanm 0:9b334a45a8ff 1176
bogdanm 0:9b334a45a8ff 1177 /* Change the TIM state*/
bogdanm 0:9b334a45a8ff 1178 hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm 0:9b334a45a8ff 1179
bogdanm 0:9b334a45a8ff 1180 /* Return function status */
bogdanm 0:9b334a45a8ff 1181 return HAL_OK;
bogdanm 0:9b334a45a8ff 1182 }
bogdanm 0:9b334a45a8ff 1183
bogdanm 0:9b334a45a8ff 1184 /**
bogdanm 0:9b334a45a8ff 1185 * @brief Stops the Timeout function in interrupt mode.
bogdanm 0:9b334a45a8ff 1186 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 1187 * @retval HAL status
bogdanm 0:9b334a45a8ff 1188 */
bogdanm 0:9b334a45a8ff 1189 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop_IT(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 1190 {
bogdanm 0:9b334a45a8ff 1191 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1192 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 1193
bogdanm 0:9b334a45a8ff 1194 /* Set the LPTIM state */
bogdanm 0:9b334a45a8ff 1195 hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 1196
bogdanm 0:9b334a45a8ff 1197 /* Disable the Peripheral */
bogdanm 0:9b334a45a8ff 1198 __HAL_LPTIM_DISABLE(hlptim);
bogdanm 0:9b334a45a8ff 1199
bogdanm 0:9b334a45a8ff 1200 /* Reset TIMOUT bit to enable the timeout function */
bogdanm 0:9b334a45a8ff 1201 hlptim->Instance->CFGR &= ~LPTIM_CFGR_TIMOUT;
bogdanm 0:9b334a45a8ff 1202
bogdanm 0:9b334a45a8ff 1203 /* Disable Compare match interrupt */
bogdanm 0:9b334a45a8ff 1204 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
bogdanm 0:9b334a45a8ff 1205
bogdanm 0:9b334a45a8ff 1206 /* Change the TIM state*/
bogdanm 0:9b334a45a8ff 1207 hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm 0:9b334a45a8ff 1208
bogdanm 0:9b334a45a8ff 1209 /* Return function status */
bogdanm 0:9b334a45a8ff 1210 return HAL_OK;
bogdanm 0:9b334a45a8ff 1211 }
bogdanm 0:9b334a45a8ff 1212
bogdanm 0:9b334a45a8ff 1213 /**
bogdanm 0:9b334a45a8ff 1214 * @brief Starts the Counter mode.
bogdanm 0:9b334a45a8ff 1215 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 1216 * @param Period : Specifies the Autoreload value.
bogdanm 0:9b334a45a8ff 1217 * This parameter must be a value between 0x0000 and 0xFFFF.
bogdanm 0:9b334a45a8ff 1218 * @retval HAL status
bogdanm 0:9b334a45a8ff 1219 */
bogdanm 0:9b334a45a8ff 1220 HAL_StatusTypeDef HAL_LPTIM_Counter_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
bogdanm 0:9b334a45a8ff 1221 {
bogdanm 0:9b334a45a8ff 1222 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1223 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 1224 assert_param(IS_LPTIM_PERIOD(Period));
bogdanm 0:9b334a45a8ff 1225
bogdanm 0:9b334a45a8ff 1226 /* Set the LPTIM state */
bogdanm 0:9b334a45a8ff 1227 hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 1228
bogdanm 0:9b334a45a8ff 1229 /* If clock source is not ULPTIM clock and counter source is external, then it must not be prescaled */
bogdanm 0:9b334a45a8ff 1230 if((hlptim->Init.Clock.Source != LPTIM_CLOCKSOURCE_ULPTIM) && (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
bogdanm 0:9b334a45a8ff 1231 {
bogdanm 0:9b334a45a8ff 1232 /* Check if clock is prescaled */
bogdanm 0:9b334a45a8ff 1233 assert_param(IS_LPTIM_CLOCK_PRESCALERDIV1(hlptim->Init.Clock.Prescaler));
bogdanm 0:9b334a45a8ff 1234 /* Set clock prescaler to 0 */
bogdanm 0:9b334a45a8ff 1235 hlptim->Instance->CFGR &= ~LPTIM_CFGR_PRESC;
bogdanm 0:9b334a45a8ff 1236 }
bogdanm 0:9b334a45a8ff 1237
bogdanm 0:9b334a45a8ff 1238 /* Enable the Peripheral */
bogdanm 0:9b334a45a8ff 1239 __HAL_LPTIM_ENABLE(hlptim);
bogdanm 0:9b334a45a8ff 1240
bogdanm 0:9b334a45a8ff 1241 /* Load the period value in the autoreload register */
bogdanm 0:9b334a45a8ff 1242 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
bogdanm 0:9b334a45a8ff 1243
bogdanm 0:9b334a45a8ff 1244 /* Start timer in continuous mode */
bogdanm 0:9b334a45a8ff 1245 __HAL_LPTIM_START_CONTINUOUS(hlptim);
bogdanm 0:9b334a45a8ff 1246
bogdanm 0:9b334a45a8ff 1247 /* Change the TIM state*/
bogdanm 0:9b334a45a8ff 1248 hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm 0:9b334a45a8ff 1249
bogdanm 0:9b334a45a8ff 1250 /* Return function status */
bogdanm 0:9b334a45a8ff 1251 return HAL_OK;
bogdanm 0:9b334a45a8ff 1252 }
bogdanm 0:9b334a45a8ff 1253
bogdanm 0:9b334a45a8ff 1254 /**
bogdanm 0:9b334a45a8ff 1255 * @brief Stops the Counter mode.
bogdanm 0:9b334a45a8ff 1256 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 1257 * @retval HAL status
bogdanm 0:9b334a45a8ff 1258 */
bogdanm 0:9b334a45a8ff 1259 HAL_StatusTypeDef HAL_LPTIM_Counter_Stop(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 1260 {
bogdanm 0:9b334a45a8ff 1261 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1262 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 1263
bogdanm 0:9b334a45a8ff 1264 /* Set the LPTIM state */
bogdanm 0:9b334a45a8ff 1265 hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 1266
bogdanm 0:9b334a45a8ff 1267 /* Disable the Peripheral */
bogdanm 0:9b334a45a8ff 1268 __HAL_LPTIM_DISABLE(hlptim);
bogdanm 0:9b334a45a8ff 1269
bogdanm 0:9b334a45a8ff 1270 /* Change the TIM state*/
bogdanm 0:9b334a45a8ff 1271 hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm 0:9b334a45a8ff 1272
bogdanm 0:9b334a45a8ff 1273 /* Return function status */
bogdanm 0:9b334a45a8ff 1274 return HAL_OK;
bogdanm 0:9b334a45a8ff 1275 }
bogdanm 0:9b334a45a8ff 1276
bogdanm 0:9b334a45a8ff 1277 /**
bogdanm 0:9b334a45a8ff 1278 * @brief Starts the Counter mode in interrupt mode.
bogdanm 0:9b334a45a8ff 1279 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 1280 * @param Period : Specifies the Autoreload value.
bogdanm 0:9b334a45a8ff 1281 * This parameter must be a value between 0x0000 and 0xFFFF.
bogdanm 0:9b334a45a8ff 1282 * @retval HAL status
bogdanm 0:9b334a45a8ff 1283 */
bogdanm 0:9b334a45a8ff 1284 HAL_StatusTypeDef HAL_LPTIM_Counter_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
bogdanm 0:9b334a45a8ff 1285 {
bogdanm 0:9b334a45a8ff 1286 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1287 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 1288 assert_param(IS_LPTIM_PERIOD(Period));
bogdanm 0:9b334a45a8ff 1289
bogdanm 0:9b334a45a8ff 1290 /* Set the LPTIM state */
bogdanm 0:9b334a45a8ff 1291 hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 1292
bogdanm 0:9b334a45a8ff 1293 /* If clock source is not ULPTIM clock and counter source is external, then it must not be prescaled */
bogdanm 0:9b334a45a8ff 1294 if((hlptim->Init.Clock.Source != LPTIM_CLOCKSOURCE_ULPTIM) && (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
bogdanm 0:9b334a45a8ff 1295 {
bogdanm 0:9b334a45a8ff 1296 /* Check if clock is prescaled */
bogdanm 0:9b334a45a8ff 1297 assert_param(IS_LPTIM_CLOCK_PRESCALERDIV1(hlptim->Init.Clock.Prescaler));
bogdanm 0:9b334a45a8ff 1298 /* Set clock prescaler to 0 */
bogdanm 0:9b334a45a8ff 1299 hlptim->Instance->CFGR &= ~LPTIM_CFGR_PRESC;
bogdanm 0:9b334a45a8ff 1300 }
bogdanm 0:9b334a45a8ff 1301
bogdanm 0:9b334a45a8ff 1302 /* Enable Autoreload write complete interrupt */
bogdanm 0:9b334a45a8ff 1303 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
bogdanm 0:9b334a45a8ff 1304
bogdanm 0:9b334a45a8ff 1305 /* Enable Autoreload match interrupt */
bogdanm 0:9b334a45a8ff 1306 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
bogdanm 0:9b334a45a8ff 1307
bogdanm 0:9b334a45a8ff 1308 /* Enable the Peripheral */
bogdanm 0:9b334a45a8ff 1309 __HAL_LPTIM_ENABLE(hlptim);
bogdanm 0:9b334a45a8ff 1310
bogdanm 0:9b334a45a8ff 1311 /* Load the period value in the autoreload register */
bogdanm 0:9b334a45a8ff 1312 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
bogdanm 0:9b334a45a8ff 1313
bogdanm 0:9b334a45a8ff 1314 /* Start timer in continuous mode */
bogdanm 0:9b334a45a8ff 1315 __HAL_LPTIM_START_CONTINUOUS(hlptim);
bogdanm 0:9b334a45a8ff 1316
bogdanm 0:9b334a45a8ff 1317 /* Change the TIM state*/
bogdanm 0:9b334a45a8ff 1318 hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm 0:9b334a45a8ff 1319
bogdanm 0:9b334a45a8ff 1320 /* Return function status */
bogdanm 0:9b334a45a8ff 1321 return HAL_OK;
bogdanm 0:9b334a45a8ff 1322 }
bogdanm 0:9b334a45a8ff 1323
bogdanm 0:9b334a45a8ff 1324 /**
bogdanm 0:9b334a45a8ff 1325 * @brief Stops the Counter mode in interrupt mode.
bogdanm 0:9b334a45a8ff 1326 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 1327 * @retval HAL status
bogdanm 0:9b334a45a8ff 1328 */
bogdanm 0:9b334a45a8ff 1329 HAL_StatusTypeDef HAL_LPTIM_Counter_Stop_IT(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 1330 {
bogdanm 0:9b334a45a8ff 1331 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1332 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 1333
bogdanm 0:9b334a45a8ff 1334 /* Set the LPTIM state */
bogdanm 0:9b334a45a8ff 1335 hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 1336
bogdanm 0:9b334a45a8ff 1337 /* Disable the Peripheral */
bogdanm 0:9b334a45a8ff 1338 __HAL_LPTIM_DISABLE(hlptim);
bogdanm 0:9b334a45a8ff 1339
bogdanm 0:9b334a45a8ff 1340 /* Disable Autoreload write complete interrupt */
bogdanm 0:9b334a45a8ff 1341 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
bogdanm 0:9b334a45a8ff 1342
bogdanm 0:9b334a45a8ff 1343 /* Disable Autoreload match interrupt */
bogdanm 0:9b334a45a8ff 1344 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
bogdanm 0:9b334a45a8ff 1345
bogdanm 0:9b334a45a8ff 1346 /* Change the TIM state*/
bogdanm 0:9b334a45a8ff 1347 hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm 0:9b334a45a8ff 1348
bogdanm 0:9b334a45a8ff 1349 /* Return function status */
bogdanm 0:9b334a45a8ff 1350 return HAL_OK;
bogdanm 0:9b334a45a8ff 1351 }
bogdanm 0:9b334a45a8ff 1352
bogdanm 0:9b334a45a8ff 1353 /**
bogdanm 0:9b334a45a8ff 1354 * @}
bogdanm 0:9b334a45a8ff 1355 */
bogdanm 0:9b334a45a8ff 1356
bogdanm 0:9b334a45a8ff 1357 /** @defgroup LPTIM_Group3 LPTIM Read operation functions
bogdanm 0:9b334a45a8ff 1358 * @brief Read operation functions.
bogdanm 0:9b334a45a8ff 1359 *
bogdanm 0:9b334a45a8ff 1360 @verbatim
bogdanm 0:9b334a45a8ff 1361 ==============================================================================
bogdanm 0:9b334a45a8ff 1362 ##### LPTIM Read operation functions #####
bogdanm 0:9b334a45a8ff 1363 ==============================================================================
bogdanm 0:9b334a45a8ff 1364 [..] This section provides LPTIM Reading functions.
bogdanm 0:9b334a45a8ff 1365 (+) Read the counter value.
bogdanm 0:9b334a45a8ff 1366 (+) Read the period (Auto-reload) value.
bogdanm 0:9b334a45a8ff 1367 (+) Read the pulse (Compare)value.
bogdanm 0:9b334a45a8ff 1368 @endverbatim
bogdanm 0:9b334a45a8ff 1369 * @{
bogdanm 0:9b334a45a8ff 1370 */
bogdanm 0:9b334a45a8ff 1371
bogdanm 0:9b334a45a8ff 1372 /**
bogdanm 0:9b334a45a8ff 1373 * @brief This function returns the current counter value.
bogdanm 0:9b334a45a8ff 1374 * @param hlptim: LPTIM handle
bogdanm 0:9b334a45a8ff 1375 * @retval Counter value.
bogdanm 0:9b334a45a8ff 1376 */
bogdanm 0:9b334a45a8ff 1377 uint32_t HAL_LPTIM_ReadCounter(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 1378 {
bogdanm 0:9b334a45a8ff 1379 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1380 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 1381
bogdanm 0:9b334a45a8ff 1382 return (hlptim->Instance->CNT);
bogdanm 0:9b334a45a8ff 1383 }
bogdanm 0:9b334a45a8ff 1384
bogdanm 0:9b334a45a8ff 1385 /**
bogdanm 0:9b334a45a8ff 1386 * @brief This function return the current Autoreload (Period) value.
bogdanm 0:9b334a45a8ff 1387 * @param hlptim: LPTIM handle
bogdanm 0:9b334a45a8ff 1388 * @retval Autoreload value.
bogdanm 0:9b334a45a8ff 1389 */
bogdanm 0:9b334a45a8ff 1390 uint32_t HAL_LPTIM_ReadAutoReload(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 1391 {
bogdanm 0:9b334a45a8ff 1392 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1393 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 1394
bogdanm 0:9b334a45a8ff 1395 return (hlptim->Instance->ARR);
bogdanm 0:9b334a45a8ff 1396 }
bogdanm 0:9b334a45a8ff 1397
bogdanm 0:9b334a45a8ff 1398 /**
bogdanm 0:9b334a45a8ff 1399 * @brief This function return the current Compare (Pulse) value.
bogdanm 0:9b334a45a8ff 1400 * @param hlptim: LPTIM handle
bogdanm 0:9b334a45a8ff 1401 * @retval Compare value.
bogdanm 0:9b334a45a8ff 1402 */
bogdanm 0:9b334a45a8ff 1403 uint32_t HAL_LPTIM_ReadCompare(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 1404 {
bogdanm 0:9b334a45a8ff 1405 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1406 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 1407
bogdanm 0:9b334a45a8ff 1408 return (hlptim->Instance->CMP);
bogdanm 0:9b334a45a8ff 1409 }
bogdanm 0:9b334a45a8ff 1410
bogdanm 0:9b334a45a8ff 1411 /**
bogdanm 0:9b334a45a8ff 1412 * @}
bogdanm 0:9b334a45a8ff 1413 */
bogdanm 0:9b334a45a8ff 1414
bogdanm 0:9b334a45a8ff 1415
bogdanm 0:9b334a45a8ff 1416
bogdanm 0:9b334a45a8ff 1417 /** @defgroup LPTIM_Group4 LPTIM IRQ handler
bogdanm 0:9b334a45a8ff 1418 * @brief LPTIM IRQ handler.
bogdanm 0:9b334a45a8ff 1419 *
bogdanm 0:9b334a45a8ff 1420 @verbatim
bogdanm 0:9b334a45a8ff 1421 ==============================================================================
bogdanm 0:9b334a45a8ff 1422 ##### LPTIM IRQ handler #####
bogdanm 0:9b334a45a8ff 1423 ==============================================================================
bogdanm 0:9b334a45a8ff 1424 [..] This section provides LPTIM IRQ handler function.
bogdanm 0:9b334a45a8ff 1425
bogdanm 0:9b334a45a8ff 1426 @endverbatim
bogdanm 0:9b334a45a8ff 1427 * @{
bogdanm 0:9b334a45a8ff 1428 */
bogdanm 0:9b334a45a8ff 1429
bogdanm 0:9b334a45a8ff 1430 /**
bogdanm 0:9b334a45a8ff 1431 * @brief This function handles LPTIM interrupt request.
bogdanm 0:9b334a45a8ff 1432 * @param hlptim: LPTIM handle
bogdanm 0:9b334a45a8ff 1433 * @retval None
bogdanm 0:9b334a45a8ff 1434 */
bogdanm 0:9b334a45a8ff 1435 void HAL_LPTIM_IRQHandler(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 1436 {
bogdanm 0:9b334a45a8ff 1437 /* Compare match interrupt */
bogdanm 0:9b334a45a8ff 1438 if(__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_CMPM) != RESET)
bogdanm 0:9b334a45a8ff 1439 {
bogdanm 0:9b334a45a8ff 1440 if(__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_CMPM) !=RESET)
bogdanm 0:9b334a45a8ff 1441 {
bogdanm 0:9b334a45a8ff 1442 /* Clear Compare match flag */
bogdanm 0:9b334a45a8ff 1443 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPM);
bogdanm 0:9b334a45a8ff 1444 /* Compare match Callback */
bogdanm 0:9b334a45a8ff 1445 HAL_LPTIM_CompareMatchCallback(hlptim);
bogdanm 0:9b334a45a8ff 1446 }
bogdanm 0:9b334a45a8ff 1447 }
bogdanm 0:9b334a45a8ff 1448
bogdanm 0:9b334a45a8ff 1449 /* Autoreload match interrupt */
bogdanm 0:9b334a45a8ff 1450 if(__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_ARRM) != RESET)
bogdanm 0:9b334a45a8ff 1451 {
bogdanm 0:9b334a45a8ff 1452 if(__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_ARRM) !=RESET)
bogdanm 0:9b334a45a8ff 1453 {
bogdanm 0:9b334a45a8ff 1454 /* Clear Autoreload match flag */
bogdanm 0:9b334a45a8ff 1455 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARRM);
bogdanm 0:9b334a45a8ff 1456 /* Autoreload match Callback */
bogdanm 0:9b334a45a8ff 1457 HAL_LPTIM_AutoReloadMatchCallback(hlptim);
bogdanm 0:9b334a45a8ff 1458 }
bogdanm 0:9b334a45a8ff 1459 }
bogdanm 0:9b334a45a8ff 1460
bogdanm 0:9b334a45a8ff 1461 /* Trigger detected interrupt */
bogdanm 0:9b334a45a8ff 1462 if(__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_EXTTRIG) != RESET)
bogdanm 0:9b334a45a8ff 1463 {
bogdanm 0:9b334a45a8ff 1464 if(__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_EXTTRIG) !=RESET)
bogdanm 0:9b334a45a8ff 1465 {
bogdanm 0:9b334a45a8ff 1466 /* Clear Trigger detected flag */
bogdanm 0:9b334a45a8ff 1467 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_EXTTRIG);
bogdanm 0:9b334a45a8ff 1468 /* Trigger detected callback */
bogdanm 0:9b334a45a8ff 1469 HAL_LPTIM_TriggerCallback(hlptim);
bogdanm 0:9b334a45a8ff 1470 }
bogdanm 0:9b334a45a8ff 1471 }
bogdanm 0:9b334a45a8ff 1472
bogdanm 0:9b334a45a8ff 1473 /* Compare write interrupt */
bogdanm 0:9b334a45a8ff 1474 if(__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_CMPOK) != RESET)
bogdanm 0:9b334a45a8ff 1475 {
bogdanm 0:9b334a45a8ff 1476 if(__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_FLAG_CMPM) !=RESET)
bogdanm 0:9b334a45a8ff 1477 {
bogdanm 0:9b334a45a8ff 1478 /* Clear Compare write flag */
bogdanm 0:9b334a45a8ff 1479 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
bogdanm 0:9b334a45a8ff 1480 /* Compare write Callback */
bogdanm 0:9b334a45a8ff 1481 HAL_LPTIM_CompareWriteCallback(hlptim);
bogdanm 0:9b334a45a8ff 1482 }
bogdanm 0:9b334a45a8ff 1483 }
bogdanm 0:9b334a45a8ff 1484
bogdanm 0:9b334a45a8ff 1485 /* Autoreload write interrupt */
bogdanm 0:9b334a45a8ff 1486 if(__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_ARROK) != RESET)
bogdanm 0:9b334a45a8ff 1487 {
bogdanm 0:9b334a45a8ff 1488 if(__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_ARROK) !=RESET)
bogdanm 0:9b334a45a8ff 1489 {
bogdanm 0:9b334a45a8ff 1490 /* Clear Autoreload write flag */
bogdanm 0:9b334a45a8ff 1491 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
bogdanm 0:9b334a45a8ff 1492 /* Autoreload write Callback */
bogdanm 0:9b334a45a8ff 1493 HAL_LPTIM_AutoReloadWriteCallback(hlptim);
bogdanm 0:9b334a45a8ff 1494 }
bogdanm 0:9b334a45a8ff 1495 }
bogdanm 0:9b334a45a8ff 1496
bogdanm 0:9b334a45a8ff 1497 /* Direction counter changed from Down to Up interrupt */
bogdanm 0:9b334a45a8ff 1498 if(__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_UP) != RESET)
bogdanm 0:9b334a45a8ff 1499 {
bogdanm 0:9b334a45a8ff 1500 if(__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_UP) !=RESET)
bogdanm 0:9b334a45a8ff 1501 {
bogdanm 0:9b334a45a8ff 1502 /* Clear Direction counter changed from Down to Up flag */
bogdanm 0:9b334a45a8ff 1503 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_UP);
bogdanm 0:9b334a45a8ff 1504 /* Direction counter changed from Down to Up Callback */
bogdanm 0:9b334a45a8ff 1505 HAL_LPTIM_DirectionUpCallback(hlptim);
bogdanm 0:9b334a45a8ff 1506 }
bogdanm 0:9b334a45a8ff 1507 }
bogdanm 0:9b334a45a8ff 1508
bogdanm 0:9b334a45a8ff 1509 /* Direction counter changed from Up to Down interrupt */
bogdanm 0:9b334a45a8ff 1510 if(__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_DOWN) != RESET)
bogdanm 0:9b334a45a8ff 1511 {
bogdanm 0:9b334a45a8ff 1512 if(__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_DOWN) !=RESET)
bogdanm 0:9b334a45a8ff 1513 {
bogdanm 0:9b334a45a8ff 1514 /* Clear Direction counter changed from Up to Down flag */
bogdanm 0:9b334a45a8ff 1515 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_DOWN);
bogdanm 0:9b334a45a8ff 1516 /* Direction counter changed from Up to Down Callback */
bogdanm 0:9b334a45a8ff 1517 HAL_LPTIM_DirectionDownCallback(hlptim);
bogdanm 0:9b334a45a8ff 1518 }
bogdanm 0:9b334a45a8ff 1519 }
bogdanm 0:9b334a45a8ff 1520 }
bogdanm 0:9b334a45a8ff 1521
bogdanm 0:9b334a45a8ff 1522 /**
bogdanm 0:9b334a45a8ff 1523 * @brief Compare match callback in non blocking mode
bogdanm 0:9b334a45a8ff 1524 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 1525 * @retval None
bogdanm 0:9b334a45a8ff 1526 */
bogdanm 0:9b334a45a8ff 1527 __weak void HAL_LPTIM_CompareMatchCallback(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 1528 {
bogdanm 0:9b334a45a8ff 1529 /* NOTE : This function Should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 1530 the HAL_LPTIM_CompareMatchCallback could be implemented in the user file
bogdanm 0:9b334a45a8ff 1531 */
bogdanm 0:9b334a45a8ff 1532 }
bogdanm 0:9b334a45a8ff 1533
bogdanm 0:9b334a45a8ff 1534 /**
bogdanm 0:9b334a45a8ff 1535 * @brief Autoreload match callback in non blocking mode
bogdanm 0:9b334a45a8ff 1536 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 1537 * @retval None
bogdanm 0:9b334a45a8ff 1538 */
bogdanm 0:9b334a45a8ff 1539 __weak void HAL_LPTIM_AutoReloadMatchCallback(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 1540 {
bogdanm 0:9b334a45a8ff 1541 /* NOTE : This function Should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 1542 the HAL_LPTIM_AutoReloadMatchCallback could be implemented in the user file
bogdanm 0:9b334a45a8ff 1543 */
bogdanm 0:9b334a45a8ff 1544 }
bogdanm 0:9b334a45a8ff 1545
bogdanm 0:9b334a45a8ff 1546 /**
bogdanm 0:9b334a45a8ff 1547 * @brief Trigger detected callback in non blocking mode
bogdanm 0:9b334a45a8ff 1548 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 1549 * @retval None
bogdanm 0:9b334a45a8ff 1550 */
bogdanm 0:9b334a45a8ff 1551 __weak void HAL_LPTIM_TriggerCallback(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 1552 {
bogdanm 0:9b334a45a8ff 1553 /* NOTE : This function Should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 1554 the HAL_LPTIM_TriggerCallback could be implemented in the user file
bogdanm 0:9b334a45a8ff 1555 */
bogdanm 0:9b334a45a8ff 1556 }
bogdanm 0:9b334a45a8ff 1557
bogdanm 0:9b334a45a8ff 1558 /**
bogdanm 0:9b334a45a8ff 1559 * @brief Compare write callback in non blocking mode
bogdanm 0:9b334a45a8ff 1560 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 1561 * @retval None
bogdanm 0:9b334a45a8ff 1562 */
bogdanm 0:9b334a45a8ff 1563 __weak void HAL_LPTIM_CompareWriteCallback(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 1564 {
bogdanm 0:9b334a45a8ff 1565 /* NOTE : This function Should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 1566 the HAL_LPTIM_CompareWriteCallback could be implemented in the user file
bogdanm 0:9b334a45a8ff 1567 */
bogdanm 0:9b334a45a8ff 1568 }
bogdanm 0:9b334a45a8ff 1569
bogdanm 0:9b334a45a8ff 1570 /**
bogdanm 0:9b334a45a8ff 1571 * @brief Autoreload write callback in non blocking mode
bogdanm 0:9b334a45a8ff 1572 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 1573 * @retval None
bogdanm 0:9b334a45a8ff 1574 */
bogdanm 0:9b334a45a8ff 1575 __weak void HAL_LPTIM_AutoReloadWriteCallback(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 1576 {
bogdanm 0:9b334a45a8ff 1577 /* NOTE : This function Should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 1578 the HAL_LPTIM_AutoReloadWriteCallback could be implemented in the user file
bogdanm 0:9b334a45a8ff 1579 */
bogdanm 0:9b334a45a8ff 1580 }
bogdanm 0:9b334a45a8ff 1581
bogdanm 0:9b334a45a8ff 1582 /**
bogdanm 0:9b334a45a8ff 1583 * @brief Direction counter changed from Down to Up callback in non blocking mode
bogdanm 0:9b334a45a8ff 1584 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 1585 * @retval None
bogdanm 0:9b334a45a8ff 1586 */
bogdanm 0:9b334a45a8ff 1587 __weak void HAL_LPTIM_DirectionUpCallback(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 1588 {
bogdanm 0:9b334a45a8ff 1589 /* NOTE : This function Should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 1590 the HAL_LPTIM_DirectionUpCallback could be implemented in the user file
bogdanm 0:9b334a45a8ff 1591 */
bogdanm 0:9b334a45a8ff 1592 }
bogdanm 0:9b334a45a8ff 1593
bogdanm 0:9b334a45a8ff 1594 /**
bogdanm 0:9b334a45a8ff 1595 * @brief Direction counter changed from Up to Down callback in non blocking mode
bogdanm 0:9b334a45a8ff 1596 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 1597 * @retval None
bogdanm 0:9b334a45a8ff 1598 */
bogdanm 0:9b334a45a8ff 1599 __weak void HAL_LPTIM_DirectionDownCallback(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 1600 {
bogdanm 0:9b334a45a8ff 1601 /* NOTE : This function Should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 1602 the HAL_LPTIM_DirectionDownCallback could be implemented in the user file
bogdanm 0:9b334a45a8ff 1603 */
bogdanm 0:9b334a45a8ff 1604 }
bogdanm 0:9b334a45a8ff 1605
bogdanm 0:9b334a45a8ff 1606 /**
bogdanm 0:9b334a45a8ff 1607 * @}
bogdanm 0:9b334a45a8ff 1608 */
bogdanm 0:9b334a45a8ff 1609
bogdanm 0:9b334a45a8ff 1610 /** @defgroup LPTIM_Group5 Peripheral State functions
bogdanm 0:9b334a45a8ff 1611 * @brief Peripheral State functions.
bogdanm 0:9b334a45a8ff 1612 *
bogdanm 0:9b334a45a8ff 1613 @verbatim
bogdanm 0:9b334a45a8ff 1614 ==============================================================================
bogdanm 0:9b334a45a8ff 1615 ##### Peripheral State functions #####
bogdanm 0:9b334a45a8ff 1616 ==============================================================================
bogdanm 0:9b334a45a8ff 1617 [..]
bogdanm 0:9b334a45a8ff 1618 This subsection permits to get in run-time the status of the peripheral.
bogdanm 0:9b334a45a8ff 1619
bogdanm 0:9b334a45a8ff 1620 @endverbatim
bogdanm 0:9b334a45a8ff 1621 * @{
bogdanm 0:9b334a45a8ff 1622 */
bogdanm 0:9b334a45a8ff 1623
bogdanm 0:9b334a45a8ff 1624 /**
bogdanm 0:9b334a45a8ff 1625 * @brief Returns the LPTIM state.
bogdanm 0:9b334a45a8ff 1626 * @param hlptim: LPTIM handle
bogdanm 0:9b334a45a8ff 1627 * @retval HAL state
bogdanm 0:9b334a45a8ff 1628 */
bogdanm 0:9b334a45a8ff 1629 HAL_LPTIM_StateTypeDef HAL_LPTIM_GetState(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 1630 {
bogdanm 0:9b334a45a8ff 1631 return hlptim->State;
bogdanm 0:9b334a45a8ff 1632 }
bogdanm 0:9b334a45a8ff 1633
bogdanm 0:9b334a45a8ff 1634 /**
bogdanm 0:9b334a45a8ff 1635 * @}
bogdanm 0:9b334a45a8ff 1636 */
bogdanm 0:9b334a45a8ff 1637
bogdanm 0:9b334a45a8ff 1638
bogdanm 0:9b334a45a8ff 1639 /**
bogdanm 0:9b334a45a8ff 1640 * @}
bogdanm 0:9b334a45a8ff 1641 */
bogdanm 0:9b334a45a8ff 1642
bogdanm 0:9b334a45a8ff 1643 #endif /* HAL_LPTIM_MODULE_ENABLED */
bogdanm 0:9b334a45a8ff 1644 /**
bogdanm 0:9b334a45a8ff 1645 * @}
bogdanm 0:9b334a45a8ff 1646 */
bogdanm 0:9b334a45a8ff 1647
bogdanm 0:9b334a45a8ff 1648 /**
bogdanm 0:9b334a45a8ff 1649 * @}
bogdanm 0:9b334a45a8ff 1650 */
bogdanm 0:9b334a45a8ff 1651
bogdanm 0:9b334a45a8ff 1652 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/