added prescaler for 16 bit pwm in LPC1347 target

Fork of mbed-dev by mbed official

Committer:
bogdanm
Date:
Thu Oct 01 15:25:22 2015 +0300
Revision:
0:9b334a45a8ff
Child:
144:ef7eb2e8f9f7
Initial commit on mbed-dev

Replaces mbed-src (now inactive)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /*******************************************************************************
bogdanm 0:9b334a45a8ff 2 * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
bogdanm 0:9b334a45a8ff 3 *
bogdanm 0:9b334a45a8ff 4 * Permission is hereby granted, free of charge, to any person obtaining a
bogdanm 0:9b334a45a8ff 5 * copy of this software and associated documentation files (the "Software"),
bogdanm 0:9b334a45a8ff 6 * to deal in the Software without restriction, including without limitation
bogdanm 0:9b334a45a8ff 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
bogdanm 0:9b334a45a8ff 8 * and/or sell copies of the Software, and to permit persons to whom the
bogdanm 0:9b334a45a8ff 9 * Software is furnished to do so, subject to the following conditions:
bogdanm 0:9b334a45a8ff 10 *
bogdanm 0:9b334a45a8ff 11 * The above copyright notice and this permission notice shall be included
bogdanm 0:9b334a45a8ff 12 * in all copies or substantial portions of the Software.
bogdanm 0:9b334a45a8ff 13 *
bogdanm 0:9b334a45a8ff 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
bogdanm 0:9b334a45a8ff 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
bogdanm 0:9b334a45a8ff 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
bogdanm 0:9b334a45a8ff 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
bogdanm 0:9b334a45a8ff 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
bogdanm 0:9b334a45a8ff 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
bogdanm 0:9b334a45a8ff 20 * OTHER DEALINGS IN THE SOFTWARE.
bogdanm 0:9b334a45a8ff 21 *
bogdanm 0:9b334a45a8ff 22 * Except as contained in this notice, the name of Maxim Integrated
bogdanm 0:9b334a45a8ff 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
bogdanm 0:9b334a45a8ff 24 * Products, Inc. Branding Policy.
bogdanm 0:9b334a45a8ff 25 *
bogdanm 0:9b334a45a8ff 26 * The mere transfer of this software does not imply any licenses
bogdanm 0:9b334a45a8ff 27 * of trade secrets, proprietary technology, copyrights, patents,
bogdanm 0:9b334a45a8ff 28 * trademarks, maskwork rights, or any other form of intellectual
bogdanm 0:9b334a45a8ff 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
bogdanm 0:9b334a45a8ff 30 * ownership rights.
bogdanm 0:9b334a45a8ff 31 *******************************************************************************
bogdanm 0:9b334a45a8ff 32 */
bogdanm 0:9b334a45a8ff 33
bogdanm 0:9b334a45a8ff 34 #ifndef _MXC_WDT_REGS_H_
bogdanm 0:9b334a45a8ff 35 #define _MXC_WDT_REGS_H_
bogdanm 0:9b334a45a8ff 36
bogdanm 0:9b334a45a8ff 37 #ifdef __cplusplus
bogdanm 0:9b334a45a8ff 38 extern "C" {
bogdanm 0:9b334a45a8ff 39 #endif
bogdanm 0:9b334a45a8ff 40
bogdanm 0:9b334a45a8ff 41 #include <stdint.h>
bogdanm 0:9b334a45a8ff 42
bogdanm 0:9b334a45a8ff 43 /**
bogdanm 0:9b334a45a8ff 44 * @file wdt_regs.h
bogdanm 0:9b334a45a8ff 45 * @addtogroup wdt WDT
bogdanm 0:9b334a45a8ff 46 * @{
bogdanm 0:9b334a45a8ff 47 */
bogdanm 0:9b334a45a8ff 48
bogdanm 0:9b334a45a8ff 49 /**
bogdanm 0:9b334a45a8ff 50 * @brief Defines watchdog timer periods
bogdanm 0:9b334a45a8ff 51 */
bogdanm 0:9b334a45a8ff 52 typedef enum {
bogdanm 0:9b334a45a8ff 53 /** 2^31 cycle period */
bogdanm 0:9b334a45a8ff 54 MXC_E_WDT_PERIOD_2_31_CLKS = 0,
bogdanm 0:9b334a45a8ff 55 /** 2^30 cycle period */
bogdanm 0:9b334a45a8ff 56 MXC_E_WDT_PERIOD_2_30_CLKS,
bogdanm 0:9b334a45a8ff 57 /** 2^29 cycle period */
bogdanm 0:9b334a45a8ff 58 MXC_E_WDT_PERIOD_2_29_CLKS,
bogdanm 0:9b334a45a8ff 59 /** 2^28 cycle period */
bogdanm 0:9b334a45a8ff 60 MXC_E_WDT_PERIOD_2_28_CLKS,
bogdanm 0:9b334a45a8ff 61 /** 2^27 cycle period */
bogdanm 0:9b334a45a8ff 62 MXC_E_WDT_PERIOD_2_27_CLKS,
bogdanm 0:9b334a45a8ff 63 /** 2^26 cycle period */
bogdanm 0:9b334a45a8ff 64 MXC_E_WDT_PERIOD_2_26_CLKS,
bogdanm 0:9b334a45a8ff 65 /** 2^25 cycle period */
bogdanm 0:9b334a45a8ff 66 MXC_E_WDT_PERIOD_2_25_CLKS,
bogdanm 0:9b334a45a8ff 67 /** 2^24 cycle period */
bogdanm 0:9b334a45a8ff 68 MXC_E_WDT_PERIOD_2_24_CLKS,
bogdanm 0:9b334a45a8ff 69 /** 2^23 cycle period */
bogdanm 0:9b334a45a8ff 70 MXC_E_WDT_PERIOD_2_23_CLKS,
bogdanm 0:9b334a45a8ff 71 /** 2^22 cycle period */
bogdanm 0:9b334a45a8ff 72 MXC_E_WDT_PERIOD_2_22_CLKS,
bogdanm 0:9b334a45a8ff 73 /** 2^21 cycle period */
bogdanm 0:9b334a45a8ff 74 MXC_E_WDT_PERIOD_2_21_CLKS,
bogdanm 0:9b334a45a8ff 75 /** 2^20 cycle period */
bogdanm 0:9b334a45a8ff 76 MXC_E_WDT_PERIOD_2_20_CLKS,
bogdanm 0:9b334a45a8ff 77 /** 2^19 cycle period */
bogdanm 0:9b334a45a8ff 78 MXC_E_WDT_PERIOD_2_19_CLKS,
bogdanm 0:9b334a45a8ff 79 /** 2^18 cycle period */
bogdanm 0:9b334a45a8ff 80 MXC_E_WDT_PERIOD_2_18_CLKS,
bogdanm 0:9b334a45a8ff 81 /** 2^17 cycle period */
bogdanm 0:9b334a45a8ff 82 MXC_E_WDT_PERIOD_2_17_CLKS,
bogdanm 0:9b334a45a8ff 83 /** 2^16 cycle period */
bogdanm 0:9b334a45a8ff 84 MXC_E_WDT_PERIOD_2_16_CLKS,
bogdanm 0:9b334a45a8ff 85 } mxc_wdt_period_t;
bogdanm 0:9b334a45a8ff 86
bogdanm 0:9b334a45a8ff 87 /* Offset Register Description
bogdanm 0:9b334a45a8ff 88 ====== ================================================ */
bogdanm 0:9b334a45a8ff 89 typedef struct {
bogdanm 0:9b334a45a8ff 90 __IO uint32_t ctrl; /* 0x0000 Watchdog Timer Control Register */
bogdanm 0:9b334a45a8ff 91 __IO uint32_t clear; /* 0x0004 Watchdog Clear Register (Feed Dog) */
bogdanm 0:9b334a45a8ff 92 __IO uint32_t int_rst_fl; /* 0x0008 Watchdog Interrupt/Reset Flags */
bogdanm 0:9b334a45a8ff 93 __IO uint32_t int_rst_en; /* 0x000C Interrupt/Reset Enable/Disable Controls */
bogdanm 0:9b334a45a8ff 94 __I uint32_t rsv0010; /* 0x0010 */
bogdanm 0:9b334a45a8ff 95 __IO uint32_t lock_ctrl; /* 0x0014 Lock Register Setting for WDT CTRL */
bogdanm 0:9b334a45a8ff 96 } mxc_wdt_regs_t;
bogdanm 0:9b334a45a8ff 97
bogdanm 0:9b334a45a8ff 98 /*
bogdanm 0:9b334a45a8ff 99 Register offsets for module WDT.
bogdanm 0:9b334a45a8ff 100 */
bogdanm 0:9b334a45a8ff 101 #define MXC_R_WDT_OFFS_CTRL ((uint32_t)0x00000000UL)
bogdanm 0:9b334a45a8ff 102 #define MXC_R_WDT_OFFS_CLEAR ((uint32_t)0x00000004UL)
bogdanm 0:9b334a45a8ff 103 #define MXC_R_WDT_OFFS_INT_RST_FL ((uint32_t)0x00000008UL)
bogdanm 0:9b334a45a8ff 104 #define MXC_R_WDT_OFFS_INT_RST_EN ((uint32_t)0x0000000CUL)
bogdanm 0:9b334a45a8ff 105 #define MXC_R_WDT_OFFS_LOCK_CTRL ((uint32_t)0x00000014UL)
bogdanm 0:9b334a45a8ff 106
bogdanm 0:9b334a45a8ff 107 #define MXC_V_WDT_WDLOCK_LOCK_KEY ((uint8_t)0x24)
bogdanm 0:9b334a45a8ff 108 #define MXC_V_WDT_WDLOCK_UNLOCK_KEY ((uint8_t)0x42)
bogdanm 0:9b334a45a8ff 109
bogdanm 0:9b334a45a8ff 110
bogdanm 0:9b334a45a8ff 111 /*
bogdanm 0:9b334a45a8ff 112 Field positions and masks for module WDT.
bogdanm 0:9b334a45a8ff 113 */
bogdanm 0:9b334a45a8ff 114 #define MXC_F_WDT_CTRL_INT_PERIOD_POS 0
bogdanm 0:9b334a45a8ff 115 #define MXC_F_WDT_CTRL_INT_PERIOD ((uint32_t)(0x0000000FUL << MXC_F_WDT_CTRL_INT_PERIOD_POS))
bogdanm 0:9b334a45a8ff 116 #define MXC_F_WDT_CTRL_RST_PERIOD_POS 4
bogdanm 0:9b334a45a8ff 117 #define MXC_F_WDT_CTRL_RST_PERIOD ((uint32_t)(0x0000000FUL << MXC_F_WDT_CTRL_RST_PERIOD_POS))
bogdanm 0:9b334a45a8ff 118 #define MXC_F_WDT_CTRL_EN_TIMER_POS 8
bogdanm 0:9b334a45a8ff 119 #define MXC_F_WDT_CTRL_EN_TIMER ((uint32_t)(0x00000001UL << MXC_F_WDT_CTRL_EN_TIMER_POS))
bogdanm 0:9b334a45a8ff 120 #define MXC_F_WDT_CTRL_EN_CLOCK_POS 9
bogdanm 0:9b334a45a8ff 121 #define MXC_F_WDT_CTRL_EN_CLOCK ((uint32_t)(0x00000001UL << MXC_F_WDT_CTRL_EN_CLOCK_POS))
bogdanm 0:9b334a45a8ff 122 #define MXC_F_WDT_CTRL_WAIT_PERIOD_POS 12
bogdanm 0:9b334a45a8ff 123 #define MXC_F_WDT_CTRL_WAIT_PERIOD ((uint32_t)(0x0000000FUL << MXC_F_WDT_CTRL_WAIT_PERIOD_POS))
bogdanm 0:9b334a45a8ff 124
bogdanm 0:9b334a45a8ff 125 #define MXC_F_WDT_FLAGS_TIMEOUT_POS 0
bogdanm 0:9b334a45a8ff 126 #define MXC_F_WDT_FLAGS_TIMEOUT ((uint32_t)(0x00000001UL << MXC_F_WDT_FLAGS_TIMEOUT_POS))
bogdanm 0:9b334a45a8ff 127 #define MXC_F_WDT_FLAGS_PRE_WIN_POS 1
bogdanm 0:9b334a45a8ff 128 #define MXC_F_WDT_FLAGS_PRE_WIN ((uint32_t)(0x00000001UL << MXC_F_WDT_FLAGS_PRE_WIN_POS))
bogdanm 0:9b334a45a8ff 129 #define MXC_F_WDT_FLAGS_RESET_OUT_POS 2
bogdanm 0:9b334a45a8ff 130 #define MXC_F_WDT_FLAGS_RESET_OUT ((uint32_t)(0x00000001UL << MXC_F_WDT_FLAGS_RESET_OUT_POS))
bogdanm 0:9b334a45a8ff 131
bogdanm 0:9b334a45a8ff 132 #define MXC_F_WDT_ENABLE_TIMEOUT_POS 0
bogdanm 0:9b334a45a8ff 133 #define MXC_F_WDT_ENABLE_TIMEOUT ((uint32_t)(0x00000001UL << MXC_F_WDT_ENABLE_TIMEOUT_POS))
bogdanm 0:9b334a45a8ff 134 #define MXC_F_WDT_ENABLE_PRE_WIN_POS 1
bogdanm 0:9b334a45a8ff 135 #define MXC_F_WDT_ENABLE_PRE_WIN ((uint32_t)(0x00000001UL << MXC_F_WDT_ENABLE_PRE_WIN_POS))
bogdanm 0:9b334a45a8ff 136 #define MXC_F_WDT_ENABLE_RESET_OUT_POS 2
bogdanm 0:9b334a45a8ff 137 #define MXC_F_WDT_ENABLE_RESET_OUT ((uint32_t)(0x00000001UL << MXC_F_WDT_ENABLE_RESET_OUT_POS))
bogdanm 0:9b334a45a8ff 138
bogdanm 0:9b334a45a8ff 139 #define MXC_F_WDT_LOCK_CTRL_WDLOCK_POS 0
bogdanm 0:9b334a45a8ff 140 #define MXC_F_WDT_LOCK_CTRL_WDLOCK ((uint32_t)(0x000000FFUL << MXC_F_WDT_LOCK_CTRL_WDLOCK_POS))
bogdanm 0:9b334a45a8ff 141
bogdanm 0:9b334a45a8ff 142 #ifdef __cplusplus
bogdanm 0:9b334a45a8ff 143 }
bogdanm 0:9b334a45a8ff 144 #endif
bogdanm 0:9b334a45a8ff 145
bogdanm 0:9b334a45a8ff 146 /**
bogdanm 0:9b334a45a8ff 147 * @}
bogdanm 0:9b334a45a8ff 148 */
bogdanm 0:9b334a45a8ff 149
bogdanm 0:9b334a45a8ff 150 #endif /* _MXC_WDT_REGS_H_ */