added prescaler for 16 bit pwm in LPC1347 target

Fork of mbed-dev by mbed official

Committer:
bogdanm
Date:
Thu Oct 01 15:25:22 2015 +0300
Revision:
0:9b334a45a8ff
Child:
144:ef7eb2e8f9f7
Initial commit on mbed-dev

Replaces mbed-src (now inactive)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /*******************************************************************************
bogdanm 0:9b334a45a8ff 2 * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
bogdanm 0:9b334a45a8ff 3 *
bogdanm 0:9b334a45a8ff 4 * Permission is hereby granted, free of charge, to any person obtaining a
bogdanm 0:9b334a45a8ff 5 * copy of this software and associated documentation files (the "Software"),
bogdanm 0:9b334a45a8ff 6 * to deal in the Software without restriction, including without limitation
bogdanm 0:9b334a45a8ff 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
bogdanm 0:9b334a45a8ff 8 * and/or sell copies of the Software, and to permit persons to whom the
bogdanm 0:9b334a45a8ff 9 * Software is furnished to do so, subject to the following conditions:
bogdanm 0:9b334a45a8ff 10 *
bogdanm 0:9b334a45a8ff 11 * The above copyright notice and this permission notice shall be included
bogdanm 0:9b334a45a8ff 12 * in all copies or substantial portions of the Software.
bogdanm 0:9b334a45a8ff 13 *
bogdanm 0:9b334a45a8ff 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
bogdanm 0:9b334a45a8ff 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
bogdanm 0:9b334a45a8ff 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
bogdanm 0:9b334a45a8ff 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
bogdanm 0:9b334a45a8ff 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
bogdanm 0:9b334a45a8ff 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
bogdanm 0:9b334a45a8ff 20 * OTHER DEALINGS IN THE SOFTWARE.
bogdanm 0:9b334a45a8ff 21 *
bogdanm 0:9b334a45a8ff 22 * Except as contained in this notice, the name of Maxim Integrated
bogdanm 0:9b334a45a8ff 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
bogdanm 0:9b334a45a8ff 24 * Products, Inc. Branding Policy.
bogdanm 0:9b334a45a8ff 25 *
bogdanm 0:9b334a45a8ff 26 * The mere transfer of this software does not imply any licenses
bogdanm 0:9b334a45a8ff 27 * of trade secrets, proprietary technology, copyrights, patents,
bogdanm 0:9b334a45a8ff 28 * trademarks, maskwork rights, or any other form of intellectual
bogdanm 0:9b334a45a8ff 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
bogdanm 0:9b334a45a8ff 30 * ownership rights.
bogdanm 0:9b334a45a8ff 31 *******************************************************************************
bogdanm 0:9b334a45a8ff 32 */
bogdanm 0:9b334a45a8ff 33
bogdanm 0:9b334a45a8ff 34 #ifndef _MXC_TMR_REGS_H
bogdanm 0:9b334a45a8ff 35 #define _MXC_TMR_REGS_H
bogdanm 0:9b334a45a8ff 36
bogdanm 0:9b334a45a8ff 37 #ifdef __cplusplus
bogdanm 0:9b334a45a8ff 38 extern "C" {
bogdanm 0:9b334a45a8ff 39 #endif
bogdanm 0:9b334a45a8ff 40
bogdanm 0:9b334a45a8ff 41 #include <stdint.h>
bogdanm 0:9b334a45a8ff 42
bogdanm 0:9b334a45a8ff 43 /**
bogdanm 0:9b334a45a8ff 44 * @file tmr_regs.h
bogdanm 0:9b334a45a8ff 45 * @addtogroup tmr TMR
bogdanm 0:9b334a45a8ff 46 * @{
bogdanm 0:9b334a45a8ff 47 */
bogdanm 0:9b334a45a8ff 48
bogdanm 0:9b334a45a8ff 49 /**
bogdanm 0:9b334a45a8ff 50 * @brief Defines timer modes for 16 and 32-bit timers
bogdanm 0:9b334a45a8ff 51 */
bogdanm 0:9b334a45a8ff 52 typedef enum {
bogdanm 0:9b334a45a8ff 53 /** 32-bit or 16-bit timer one-shot mode */
bogdanm 0:9b334a45a8ff 54 MXC_E_TMR_MODE_ONE_SHOT = 0,
bogdanm 0:9b334a45a8ff 55 /** 32-bit or 16-bit timer one-shot mode */
bogdanm 0:9b334a45a8ff 56 MXC_E_TMR_MODE_CONTINUOUS,
bogdanm 0:9b334a45a8ff 57 /** 32-bit timer counter mode */
bogdanm 0:9b334a45a8ff 58 MXC_E_TMR_MODE_COUNTER,
bogdanm 0:9b334a45a8ff 59 /** 32-bit timer pulse width modulation mode */
bogdanm 0:9b334a45a8ff 60 MXC_E_TMR_MODE_PWM,
bogdanm 0:9b334a45a8ff 61 /** 32-bit timer capture mode */
bogdanm 0:9b334a45a8ff 62 MXC_E_TMR_MODE_CAPTURE,
bogdanm 0:9b334a45a8ff 63 /** 32-bit timer compare mode */
bogdanm 0:9b334a45a8ff 64 MXC_E_TMR_MODE_COMPARE,
bogdanm 0:9b334a45a8ff 65 /** 32-bit timer gated mode */
bogdanm 0:9b334a45a8ff 66 MXC_E_TMR_MODE_GATED,
bogdanm 0:9b334a45a8ff 67 /** 32-bit timer measure mode */
bogdanm 0:9b334a45a8ff 68 MXC_E_TMR_MODE_MEASURE
bogdanm 0:9b334a45a8ff 69 } mxc_tmr_mode_t;
bogdanm 0:9b334a45a8ff 70
bogdanm 0:9b334a45a8ff 71 /* Offset Register Description
bogdanm 0:9b334a45a8ff 72 ====== ============================================== */
bogdanm 0:9b334a45a8ff 73 typedef struct {
bogdanm 0:9b334a45a8ff 74 __IO uint32_t ctrl; /* 0x0000 Timer Control Register */
bogdanm 0:9b334a45a8ff 75 __IO uint32_t count32; /* 0x0004 [32 bit] Current Count Value */
bogdanm 0:9b334a45a8ff 76 __IO uint32_t term_cnt32; /* 0x0008 [32 bit] Terminal Count Setting */
bogdanm 0:9b334a45a8ff 77 __IO uint32_t pwm_cap32; /* 0x000C [32 bit] PWM Compare Setting or Capture/Measure Value */
bogdanm 0:9b334a45a8ff 78 __IO uint32_t count16_0; /* 0x0010 [16 bit] Current Count Value, 16-bit Timer0 */
bogdanm 0:9b334a45a8ff 79 __IO uint32_t term_cnt16_0; /* 0x0014 [16 bit] Terminal Count Setting, 16-bit Timer0 */
bogdanm 0:9b334a45a8ff 80 __IO uint32_t count16_1; /* 0x0018 [16 bit] Current Count Value, 16-bit Timer1 */
bogdanm 0:9b334a45a8ff 81 __IO uint32_t term_cnt16_1; /* 0x001C [16 bit] Terminal Count Setting, 16-bit Timer1 */
bogdanm 0:9b334a45a8ff 82 __IO uint32_t intfl; /* 0x0020 Timer Module Interrupt Flags */
bogdanm 0:9b334a45a8ff 83 __IO uint32_t inten; /* 0x0024 Timer Module Interrupt Enable/Disable Settings */
bogdanm 0:9b334a45a8ff 84 } mxc_tmr_regs_t;
bogdanm 0:9b334a45a8ff 85
bogdanm 0:9b334a45a8ff 86 /*
bogdanm 0:9b334a45a8ff 87 Register offsets for module TMR.
bogdanm 0:9b334a45a8ff 88 */
bogdanm 0:9b334a45a8ff 89 #define MXC_R_TMR_OFFS_CTRL ((uint32_t)0x00000000UL)
bogdanm 0:9b334a45a8ff 90 #define MXC_R_TMR_OFFS_COUNT32 ((uint32_t)0x00000004UL)
bogdanm 0:9b334a45a8ff 91 #define MXC_R_TMR_OFFS_TERM_CNT32 ((uint32_t)0x00000008UL)
bogdanm 0:9b334a45a8ff 92 #define MXC_R_TMR_OFFS_PWM_CAP32 ((uint32_t)0x0000000CUL)
bogdanm 0:9b334a45a8ff 93 #define MXC_R_TMR_OFFS_COUNT16_0 ((uint32_t)0x00000010UL)
bogdanm 0:9b334a45a8ff 94 #define MXC_R_TMR_OFFS_TERM_CNT16_0 ((uint32_t)0x00000014UL)
bogdanm 0:9b334a45a8ff 95 #define MXC_R_TMR_OFFS_COUNT16_1 ((uint32_t)0x00000018UL)
bogdanm 0:9b334a45a8ff 96 #define MXC_R_TMR_OFFS_TERM_CNT16_1 ((uint32_t)0x0000001CUL)
bogdanm 0:9b334a45a8ff 97 #define MXC_R_TMR_OFFS_INTFL ((uint32_t)0x00000020UL)
bogdanm 0:9b334a45a8ff 98 #define MXC_R_TMR_OFFS_INTEN ((uint32_t)0x00000024UL)
bogdanm 0:9b334a45a8ff 99
bogdanm 0:9b334a45a8ff 100 /*
bogdanm 0:9b334a45a8ff 101 Field positions and masks for module TMR.
bogdanm 0:9b334a45a8ff 102 */
bogdanm 0:9b334a45a8ff 103 #define MXC_F_TMR_CTRL_MODE_POS 0
bogdanm 0:9b334a45a8ff 104 #define MXC_F_TMR_CTRL_MODE ((uint32_t)(0x00000007UL << MXC_F_TMR_CTRL_MODE_POS))
bogdanm 0:9b334a45a8ff 105 #define MXC_F_TMR_CTRL_TMR2X16_POS 3
bogdanm 0:9b334a45a8ff 106 #define MXC_F_TMR_CTRL_TMR2X16 ((uint32_t)(0x00000001UL << MXC_F_TMR_CTRL_TMR2X16_POS))
bogdanm 0:9b334a45a8ff 107 #define MXC_F_TMR_CTRL_PRESCALE_POS 4
bogdanm 0:9b334a45a8ff 108 #define MXC_F_TMR_CTRL_PRESCALE ((uint32_t)(0x0000000FUL << MXC_F_TMR_CTRL_PRESCALE_POS))
bogdanm 0:9b334a45a8ff 109 #define MXC_F_TMR_CTRL_POLARITY_POS 8
bogdanm 0:9b334a45a8ff 110 #define MXC_F_TMR_CTRL_POLARITY ((uint32_t)(0x00000001UL << MXC_F_TMR_CTRL_POLARITY_POS))
bogdanm 0:9b334a45a8ff 111 #define MXC_F_TMR_CTRL_ENABLE0_POS 12
bogdanm 0:9b334a45a8ff 112 #define MXC_F_TMR_CTRL_ENABLE0 ((uint32_t)(0x00000001UL << MXC_F_TMR_CTRL_ENABLE0_POS))
bogdanm 0:9b334a45a8ff 113 #define MXC_F_TMR_CTRL_ENABLE1_POS 13
bogdanm 0:9b334a45a8ff 114 #define MXC_F_TMR_CTRL_ENABLE1 ((uint32_t)(0x00000001UL << MXC_F_TMR_CTRL_ENABLE1_POS))
bogdanm 0:9b334a45a8ff 115
bogdanm 0:9b334a45a8ff 116 #define MXC_F_TMR_COUNT16_0_VALUE_POS 0
bogdanm 0:9b334a45a8ff 117 #define MXC_F_TMR_COUNT16_0_VALUE ((uint32_t)(0x0000FFFFUL << MXC_F_TMR_COUNT16_0_VALUE_POS))
bogdanm 0:9b334a45a8ff 118
bogdanm 0:9b334a45a8ff 119 #define MXC_F_TMR_TERM_CNT16_0_TERM_COUNT_POS 0
bogdanm 0:9b334a45a8ff 120 #define MXC_F_TMR_TERM_CNT16_0_TERM_COUNT ((uint32_t)(0x0000FFFFUL << MXC_F_TMR_TERM_CNT16_0_TERM_COUNT_POS))
bogdanm 0:9b334a45a8ff 121
bogdanm 0:9b334a45a8ff 122 #define MXC_F_TMR_COUNT16_1_VALUE_POS 0
bogdanm 0:9b334a45a8ff 123 #define MXC_F_TMR_COUNT16_1_VALUE ((uint32_t)(0x0000FFFFUL << MXC_F_TMR_COUNT16_1_VALUE_POS))
bogdanm 0:9b334a45a8ff 124
bogdanm 0:9b334a45a8ff 125 #define MXC_F_TMR_TERM_CNT16_1_TERM_COUNT_POS 0
bogdanm 0:9b334a45a8ff 126 #define MXC_F_TMR_TERM_CNT16_1_TERM_COUNT ((uint32_t)(0x0000FFFFUL << MXC_F_TMR_TERM_CNT16_1_TERM_COUNT_POS))
bogdanm 0:9b334a45a8ff 127
bogdanm 0:9b334a45a8ff 128 #define MXC_F_TMR_INTFL_TIMER0_POS 0
bogdanm 0:9b334a45a8ff 129 #define MXC_F_TMR_INTFL_TIMER0 ((uint32_t)(0x00000001UL << MXC_F_TMR_INTFL_TIMER0_POS))
bogdanm 0:9b334a45a8ff 130 #define MXC_F_TMR_INTFL_TIMER1_POS 1
bogdanm 0:9b334a45a8ff 131 #define MXC_F_TMR_INTFL_TIMER1 ((uint32_t)(0x00000001UL << MXC_F_TMR_INTFL_TIMER1_POS))
bogdanm 0:9b334a45a8ff 132
bogdanm 0:9b334a45a8ff 133 #define MXC_F_TMR_INTEN_TIMER0_POS 0
bogdanm 0:9b334a45a8ff 134 #define MXC_F_TMR_INTEN_TIMER0 ((uint32_t)(0x00000001UL << MXC_F_TMR_INTEN_TIMER0_POS))
bogdanm 0:9b334a45a8ff 135 #define MXC_F_TMR_INTEN_TIMER1_POS 1
bogdanm 0:9b334a45a8ff 136 #define MXC_F_TMR_INTEN_TIMER1 ((uint32_t)(0x00000001UL << MXC_F_TMR_INTEN_TIMER1_POS))
bogdanm 0:9b334a45a8ff 137
bogdanm 0:9b334a45a8ff 138 #ifdef __cplusplus
bogdanm 0:9b334a45a8ff 139 }
bogdanm 0:9b334a45a8ff 140 #endif
bogdanm 0:9b334a45a8ff 141
bogdanm 0:9b334a45a8ff 142 /**
bogdanm 0:9b334a45a8ff 143 * @}
bogdanm 0:9b334a45a8ff 144 */
bogdanm 0:9b334a45a8ff 145
bogdanm 0:9b334a45a8ff 146 #endif /* _MXC_TMR_REGS_H */