Johannes Stratmann / mbed-dev

added prescaler for 16 bit pwm in LPC1347 target

Fork of mbed-dev by mbed official

targets/cmsis/TARGET_Maxim/TARGET_MAX32610/i2cm_regs.h@0:9b334a45a8ff, 2015-10-01 (annotated)

Committer:
bogdanm
Date:
Thu Oct 01 15:25:22 2015 +0300
Revision:
0:9b334a45a8ff
Child:
144:ef7eb2e8f9f7
Initial commit on mbed-dev



Replaces mbed-src (now inactive)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /*******************************************************************************
bogdanm 0:9b334a45a8ff 2 * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
bogdanm 0:9b334a45a8ff 3 *
bogdanm 0:9b334a45a8ff 4 * Permission is hereby granted, free of charge, to any person obtaining a
bogdanm 0:9b334a45a8ff 5 * copy of this software and associated documentation files (the "Software"),
bogdanm 0:9b334a45a8ff 6 * to deal in the Software without restriction, including without limitation
bogdanm 0:9b334a45a8ff 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
bogdanm 0:9b334a45a8ff 8 * and/or sell copies of the Software, and to permit persons to whom the
bogdanm 0:9b334a45a8ff 9 * Software is furnished to do so, subject to the following conditions:
bogdanm 0:9b334a45a8ff 10 *
bogdanm 0:9b334a45a8ff 11 * The above copyright notice and this permission notice shall be included
bogdanm 0:9b334a45a8ff 12 * in all copies or substantial portions of the Software.
bogdanm 0:9b334a45a8ff 13 *
bogdanm 0:9b334a45a8ff 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
bogdanm 0:9b334a45a8ff 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
bogdanm 0:9b334a45a8ff 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
bogdanm 0:9b334a45a8ff 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
bogdanm 0:9b334a45a8ff 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
bogdanm 0:9b334a45a8ff 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
bogdanm 0:9b334a45a8ff 20 * OTHER DEALINGS IN THE SOFTWARE.
bogdanm 0:9b334a45a8ff 21 *
bogdanm 0:9b334a45a8ff 22 * Except as contained in this notice, the name of Maxim Integrated
bogdanm 0:9b334a45a8ff 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
bogdanm 0:9b334a45a8ff 24 * Products, Inc. Branding Policy.
bogdanm 0:9b334a45a8ff 25 *
bogdanm 0:9b334a45a8ff 26 * The mere transfer of this software does not imply any licenses
bogdanm 0:9b334a45a8ff 27 * of trade secrets, proprietary technology, copyrights, patents,
bogdanm 0:9b334a45a8ff 28 * trademarks, maskwork rights, or any other form of intellectual
bogdanm 0:9b334a45a8ff 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
bogdanm 0:9b334a45a8ff 30 * ownership rights.
bogdanm 0:9b334a45a8ff 31 *******************************************************************************
bogdanm 0:9b334a45a8ff 32 */
bogdanm 0:9b334a45a8ff 33
bogdanm 0:9b334a45a8ff 34 #ifndef _MXC_I2CM_REGS_H_
bogdanm 0:9b334a45a8ff 35 #define _MXC_I2CM_REGS_H_
bogdanm 0:9b334a45a8ff 36
bogdanm 0:9b334a45a8ff 37 #ifdef __cplusplus
bogdanm 0:9b334a45a8ff 38 extern "C" {
bogdanm 0:9b334a45a8ff 39 #endif
bogdanm 0:9b334a45a8ff 40
bogdanm 0:9b334a45a8ff 41 #include <stdint.h>
bogdanm 0:9b334a45a8ff 42
bogdanm 0:9b334a45a8ff 43 /**
bogdanm 0:9b334a45a8ff 44 * @file i2cm_regs.h
bogdanm 0:9b334a45a8ff 45 * @addtogroup i2cm I2CM
bogdanm 0:9b334a45a8ff 46 * @{
bogdanm 0:9b334a45a8ff 47 */
bogdanm 0:9b334a45a8ff 48
bogdanm 0:9b334a45a8ff 49 /* Offset Register Description
bogdanm 0:9b334a45a8ff 50 ====== ================================================ */
bogdanm 0:9b334a45a8ff 51 typedef struct {
bogdanm 0:9b334a45a8ff 52 __IO uint32_t fs_clk_div; /* 0x0000 Full Speed SCL Clock Settings */
bogdanm 0:9b334a45a8ff 53 __IO uint32_t hs_clk_div; /* 0x0004 High Speed SCL Clock Settings */
bogdanm 0:9b334a45a8ff 54 __I uint32_t rsv0008; /* 0x0008 */
bogdanm 0:9b334a45a8ff 55 __IO uint32_t timeout; /* 0x000C [TO_CNTL] Timeout and Auto-Stop Settings */
bogdanm 0:9b334a45a8ff 56 __IO uint32_t ctrl; /* 0x0010 [EN_CNTL] I2C Master Control Register */
bogdanm 0:9b334a45a8ff 57 __IO uint32_t trans; /* 0x0014 [MSTR_CNTL] I2C Master Tx Start and Status Flags */
bogdanm 0:9b334a45a8ff 58 __IO uint32_t intfl; /* 0x0018 Interrupt Flags */
bogdanm 0:9b334a45a8ff 59 __IO uint32_t inten; /* 0x001C Interrupt Enable/Disable Controls */
bogdanm 0:9b334a45a8ff 60 __I uint32_t rsv0020[2]; /* 0x0020 */
bogdanm 0:9b334a45a8ff 61 __IO uint32_t bb; /* 0x0028 Bit-Bang Control Register */
bogdanm 0:9b334a45a8ff 62 } mxc_i2cm_regs_t;
bogdanm 0:9b334a45a8ff 63
bogdanm 0:9b334a45a8ff 64 /* Offset Register Description
bogdanm 0:9b334a45a8ff 65 ====== ================================================ */
bogdanm 0:9b334a45a8ff 66 typedef struct {
bogdanm 0:9b334a45a8ff 67 __IO uint32_t trans[512]; /* 0x0000 I2C Master Transaction FIFO */
bogdanm 0:9b334a45a8ff 68 __IO uint32_t rslts[512]; /* 0x0800 I2C Master Results FIFO */
bogdanm 0:9b334a45a8ff 69 } mxc_i2cm_fifo_regs_t;
bogdanm 0:9b334a45a8ff 70
bogdanm 0:9b334a45a8ff 71 /*
bogdanm 0:9b334a45a8ff 72 Register offsets for module I2CM.
bogdanm 0:9b334a45a8ff 73 */
bogdanm 0:9b334a45a8ff 74 #define MXC_R_I2CM_OFFS_FS_CLK_DIV ((uint32_t)0x00000000UL)
bogdanm 0:9b334a45a8ff 75 #define MXC_R_I2CM_OFFS_HS_CLK_DIV ((uint32_t)0x00000004UL)
bogdanm 0:9b334a45a8ff 76 #define MXC_R_I2CM_OFFS_TIMEOUT ((uint32_t)0x0000000CUL)
bogdanm 0:9b334a45a8ff 77 #define MXC_R_I2CM_OFFS_CTRL ((uint32_t)0x00000010UL)
bogdanm 0:9b334a45a8ff 78 #define MXC_R_I2CM_OFFS_TRANS ((uint32_t)0x00000014UL)
bogdanm 0:9b334a45a8ff 79 #define MXC_R_I2CM_OFFS_INTFL ((uint32_t)0x00000018UL)
bogdanm 0:9b334a45a8ff 80 #define MXC_R_I2CM_OFFS_INTEN ((uint32_t)0x0000001CUL)
bogdanm 0:9b334a45a8ff 81 #define MXC_R_I2CM_OFFS_BB ((uint32_t)0x00000028UL)
bogdanm 0:9b334a45a8ff 82 #define MXC_R_I2CM_OFFS_AHB_RETRY ((uint32_t)0x00000030UL)
bogdanm 0:9b334a45a8ff 83
bogdanm 0:9b334a45a8ff 84 #define MXC_R_I2CM_FIFO_OFFS_TRANS ((uint32_t)0x00000000UL)
bogdanm 0:9b334a45a8ff 85 #define MXC_R_I2CM_FIFO_OFFS_RSLTS ((uint32_t)0x00000800UL)
bogdanm 0:9b334a45a8ff 86
bogdanm 0:9b334a45a8ff 87 /*
bogdanm 0:9b334a45a8ff 88 Field positions and masks for module I2CM.
bogdanm 0:9b334a45a8ff 89 */
bogdanm 0:9b334a45a8ff 90 #define MXC_S_I2CM_TRANS_TAG_START 0x000
bogdanm 0:9b334a45a8ff 91 #define MXC_S_I2CM_TRANS_TAG_TXDATA_ACK 0x100
bogdanm 0:9b334a45a8ff 92 #define MXC_S_I2CM_TRANS_TAG_TXDATA_NACK 0x200
bogdanm 0:9b334a45a8ff 93 #define MXC_S_I2CM_TRANS_TAG_RXDATA_COUNT 0x400
bogdanm 0:9b334a45a8ff 94 #define MXC_S_I2CM_TRANS_TAG_RXDATA_NACK 0x500
bogdanm 0:9b334a45a8ff 95 #define MXC_S_I2CM_TRANS_TAG_STOP 0x700
bogdanm 0:9b334a45a8ff 96 #define MXC_S_I2CM_RSTLS_TAG_DATA 0x100
bogdanm 0:9b334a45a8ff 97 #define MXC_S_I2CM_RSTLS_TAG_EMPTY 0x200
bogdanm 0:9b334a45a8ff 98
bogdanm 0:9b334a45a8ff 99 #define MXC_F_I2CM_CLK_DIV_FILTER_CLK_DIV_POS 0
bogdanm 0:9b334a45a8ff 100 #define MXC_F_I2CM_CLK_DIV_FILTER_CLK_DIV ((uint32_t)(0x000000FFUL << MXC_F_I2CM_CLK_DIV_FILTER_CLK_DIV_POS))
bogdanm 0:9b334a45a8ff 101 #define MXC_F_I2CM_CLK_DIV_SCL_LO_CNT_POS 8
bogdanm 0:9b334a45a8ff 102 #define MXC_F_I2CM_CLK_DIV_SCL_LO_CNT ((uint32_t)(0x00000FFFUL << MXC_F_I2CM_CLK_DIV_SCL_LO_CNT_POS))
bogdanm 0:9b334a45a8ff 103 #define MXC_F_I2CM_CLK_DIV_SCL_HI_CNT_POS 20
bogdanm 0:9b334a45a8ff 104 #define MXC_F_I2CM_CLK_DIV_SCL_HI_CNT ((uint32_t)(0x00000FFFUL << MXC_F_I2CM_CLK_DIV_SCL_HI_CNT_POS))
bogdanm 0:9b334a45a8ff 105
bogdanm 0:9b334a45a8ff 106 #define MXC_F_I2CM_TIMEOUT_TX_TIMEOUT_POS 16
bogdanm 0:9b334a45a8ff 107 #define MXC_F_I2CM_TIMEOUT_TX_TIMEOUT ((uint32_t)(0x000000FFUL << MXC_F_I2CM_TIMEOUT_TX_TIMEOUT_POS))
bogdanm 0:9b334a45a8ff 108 #define MXC_F_I2CM_TIMEOUT_AUTO_STOP_EN_POS 24
bogdanm 0:9b334a45a8ff 109 #define MXC_F_I2CM_TIMEOUT_AUTO_STOP_EN ((uint32_t)(0x00000001UL << MXC_F_I2CM_TIMEOUT_AUTO_STOP_EN_POS))
bogdanm 0:9b334a45a8ff 110
bogdanm 0:9b334a45a8ff 111 #define MXC_F_I2CM_CTRL_TX_FIFO_EN_POS 2
bogdanm 0:9b334a45a8ff 112 #define MXC_F_I2CM_CTRL_TX_FIFO_EN ((uint32_t)(0x00000001UL << MXC_F_I2CM_CTRL_TX_FIFO_EN_POS))
bogdanm 0:9b334a45a8ff 113 #define MXC_F_I2CM_CTRL_RX_FIFO_EN_POS 3
bogdanm 0:9b334a45a8ff 114 #define MXC_F_I2CM_CTRL_RX_FIFO_EN ((uint32_t)(0x00000001UL << MXC_F_I2CM_CTRL_RX_FIFO_EN_POS))
bogdanm 0:9b334a45a8ff 115 #define MXC_F_I2CM_CTRL_MSTR_RESET_EN_POS 7
bogdanm 0:9b334a45a8ff 116 #define MXC_F_I2CM_CTRL_MSTR_RESET_EN ((uint32_t)(0x00000001UL << MXC_F_I2CM_CTRL_MSTR_RESET_EN_POS))
bogdanm 0:9b334a45a8ff 117
bogdanm 0:9b334a45a8ff 118 #define MXC_F_I2CM_TRANS_TX_START_POS 0
bogdanm 0:9b334a45a8ff 119 #define MXC_F_I2CM_TRANS_TX_START ((uint32_t)(0x00000001UL << MXC_F_I2CM_TRANS_TX_START_POS))
bogdanm 0:9b334a45a8ff 120 #define MXC_F_I2CM_TRANS_TX_IN_PROGRESS_POS 1
bogdanm 0:9b334a45a8ff 121 #define MXC_F_I2CM_TRANS_TX_IN_PROGRESS ((uint32_t)(0x00000001UL << MXC_F_I2CM_TRANS_TX_IN_PROGRESS_POS))
bogdanm 0:9b334a45a8ff 122 #define MXC_F_I2CM_TRANS_TX_DONE_POS 2
bogdanm 0:9b334a45a8ff 123 #define MXC_F_I2CM_TRANS_TX_DONE ((uint32_t)(0x00000001UL << MXC_F_I2CM_TRANS_TX_DONE_POS))
bogdanm 0:9b334a45a8ff 124 #define MXC_F_I2CM_TRANS_TX_NACKED_POS 3
bogdanm 0:9b334a45a8ff 125 #define MXC_F_I2CM_TRANS_TX_NACKED ((uint32_t)(0x00000001UL << MXC_F_I2CM_TRANS_TX_NACKED_POS))
bogdanm 0:9b334a45a8ff 126 #define MXC_F_I2CM_TRANS_TX_LOST_ARBITR_POS 4
bogdanm 0:9b334a45a8ff 127 #define MXC_F_I2CM_TRANS_TX_LOST_ARBITR ((uint32_t)(0x00000001UL << MXC_F_I2CM_TRANS_TX_LOST_ARBITR_POS))
bogdanm 0:9b334a45a8ff 128 #define MXC_F_I2CM_TRANS_TX_TIMEOUT_POS 5
bogdanm 0:9b334a45a8ff 129 #define MXC_F_I2CM_TRANS_TX_TIMEOUT ((uint32_t)(0x00000001UL << MXC_F_I2CM_TRANS_TX_TIMEOUT_POS))
bogdanm 0:9b334a45a8ff 130
bogdanm 0:9b334a45a8ff 131 #define MXC_F_I2CM_INTFL_TX_DONE_POS 0
bogdanm 0:9b334a45a8ff 132 #define MXC_F_I2CM_INTFL_TX_DONE ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTFL_TX_DONE_POS))
bogdanm 0:9b334a45a8ff 133 #define MXC_F_I2CM_INTFL_TX_NACKED_POS 1
bogdanm 0:9b334a45a8ff 134 #define MXC_F_I2CM_INTFL_TX_NACKED ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTFL_TX_NACKED_POS))
bogdanm 0:9b334a45a8ff 135 #define MXC_F_I2CM_INTFL_TX_LOST_ARBITR_POS 2
bogdanm 0:9b334a45a8ff 136 #define MXC_F_I2CM_INTFL_TX_LOST_ARBITR ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTFL_TX_LOST_ARBITR_POS))
bogdanm 0:9b334a45a8ff 137 #define MXC_F_I2CM_INTFL_TX_TIMEOUT_POS 3
bogdanm 0:9b334a45a8ff 138 #define MXC_F_I2CM_INTFL_TX_TIMEOUT ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTFL_TX_TIMEOUT_POS))
bogdanm 0:9b334a45a8ff 139 #define MXC_F_I2CM_INTFL_TX_FIFO_EMPTY_POS 4
bogdanm 0:9b334a45a8ff 140 #define MXC_F_I2CM_INTFL_TX_FIFO_EMPTY ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTFL_TX_FIFO_EMPTY_POS))
bogdanm 0:9b334a45a8ff 141 #define MXC_F_I2CM_INTFL_TX_FIFO_3Q_EMPTY_POS 5
bogdanm 0:9b334a45a8ff 142 #define MXC_F_I2CM_INTFL_TX_FIFO_3Q_EMPTY ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTFL_TX_FIFO_3Q_EMPTY_POS))
bogdanm 0:9b334a45a8ff 143 #define MXC_F_I2CM_INTFL_RX_FIFO_NOT_EMPTY_POS 6
bogdanm 0:9b334a45a8ff 144 #define MXC_F_I2CM_INTFL_RX_FIFO_NOT_EMPTY ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTFL_RX_FIFO_NOT_EMPTY_POS))
bogdanm 0:9b334a45a8ff 145 #define MXC_F_I2CM_INTFL_RX_FIFO_2Q_FULL_POS 7
bogdanm 0:9b334a45a8ff 146 #define MXC_F_I2CM_INTFL_RX_FIFO_2Q_FULL ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTFL_RX_FIFO_2Q_FULL_POS))
bogdanm 0:9b334a45a8ff 147 #define MXC_F_I2CM_INTFL_RX_FIFO_3Q_FULL_POS 8
bogdanm 0:9b334a45a8ff 148 #define MXC_F_I2CM_INTFL_RX_FIFO_3Q_FULL ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTFL_RX_FIFO_3Q_FULL_POS))
bogdanm 0:9b334a45a8ff 149 #define MXC_F_I2CM_INTFL_RX_FIFO_FULL_POS 9
bogdanm 0:9b334a45a8ff 150 #define MXC_F_I2CM_INTFL_RX_FIFO_FULL ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTFL_RX_FIFO_FULL_POS))
bogdanm 0:9b334a45a8ff 151
bogdanm 0:9b334a45a8ff 152 #define MXC_F_I2CM_INTEN_TX_DONE_POS 0
bogdanm 0:9b334a45a8ff 153 #define MXC_F_I2CM_INTEN_TX_DONE ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTEN_TX_DONE_POS))
bogdanm 0:9b334a45a8ff 154 #define MXC_F_I2CM_INTEN_TX_NACKED_POS 1
bogdanm 0:9b334a45a8ff 155 #define MXC_F_I2CM_INTEN_TX_NACKED ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTEN_TX_NACKED_POS))
bogdanm 0:9b334a45a8ff 156 #define MXC_F_I2CM_INTEN_TX_LOST_ARBITR_POS 2
bogdanm 0:9b334a45a8ff 157 #define MXC_F_I2CM_INTEN_TX_LOST_ARBITR ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTEN_TX_LOST_ARBITR_POS))
bogdanm 0:9b334a45a8ff 158 #define MXC_F_I2CM_INTEN_TX_TIMEOUT_POS 3
bogdanm 0:9b334a45a8ff 159 #define MXC_F_I2CM_INTEN_TX_TIMEOUT ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTEN_TX_TIMEOUT_POS))
bogdanm 0:9b334a45a8ff 160 #define MXC_F_I2CM_INTEN_TX_FIFO_EMPTY_POS 4
bogdanm 0:9b334a45a8ff 161 #define MXC_F_I2CM_INTEN_TX_FIFO_EMPTY ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTEN_TX_FIFO_EMPTY_POS))
bogdanm 0:9b334a45a8ff 162 #define MXC_F_I2CM_INTEN_TX_FIFO_3Q_EMPTY_POS 5
bogdanm 0:9b334a45a8ff 163 #define MXC_F_I2CM_INTEN_TX_FIFO_3Q_EMPTY ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTEN_TX_FIFO_3Q_EMPTY_POS))
bogdanm 0:9b334a45a8ff 164 #define MXC_F_I2CM_INTEN_RX_FIFO_EMPTY_POS 6
bogdanm 0:9b334a45a8ff 165 #define MXC_F_I2CM_INTEN_RX_FIFO_EMPTY ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTEN_RX_FIFO_EMPTY_POS))
bogdanm 0:9b334a45a8ff 166 #define MXC_F_I2CM_INTEN_RX_FIFO_2Q_FULL_POS 7
bogdanm 0:9b334a45a8ff 167 #define MXC_F_I2CM_INTEN_RX_FIFO_2Q_FULL ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTEN_RX_FIFO_2Q_FULL_POS))
bogdanm 0:9b334a45a8ff 168 #define MXC_F_I2CM_INTEN_RX_FIFO_3Q_FULL_POS 8
bogdanm 0:9b334a45a8ff 169 #define MXC_F_I2CM_INTEN_RX_FIFO_3Q_FULL ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTEN_RX_FIFO_3Q_FULL_POS))
bogdanm 0:9b334a45a8ff 170 #define MXC_F_I2CM_INTEN_RX_FIFO_FULL_POS 9
bogdanm 0:9b334a45a8ff 171 #define MXC_F_I2CM_INTEN_RX_FIFO_FULL ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTEN_RX_FIFO_FULL_POS))
bogdanm 0:9b334a45a8ff 172
bogdanm 0:9b334a45a8ff 173 #define MXC_F_I2CM_BB_BB_SCL_OUT_POS 0
bogdanm 0:9b334a45a8ff 174 #define MXC_F_I2CM_BB_BB_SCL_OUT ((uint32_t)(0x00000001UL << MXC_F_I2CM_BB_BB_SCL_OUT_POS))
bogdanm 0:9b334a45a8ff 175 #define MXC_F_I2CM_BB_BB_SDA_OUT_POS 1
bogdanm 0:9b334a45a8ff 176 #define MXC_F_I2CM_BB_BB_SDA_OUT ((uint32_t)(0x00000001UL << MXC_F_I2CM_BB_BB_SDA_OUT_POS))
bogdanm 0:9b334a45a8ff 177 #define MXC_F_I2CM_BB_BB_SCL_IN_VAL_POS 2
bogdanm 0:9b334a45a8ff 178 #define MXC_F_I2CM_BB_BB_SCL_IN_VAL ((uint32_t)(0x00000001UL << MXC_F_I2CM_BB_BB_SCL_IN_VAL_POS))
bogdanm 0:9b334a45a8ff 179 #define MXC_F_I2CM_BB_BB_SDA_IN_VAL_POS 3
bogdanm 0:9b334a45a8ff 180 #define MXC_F_I2CM_BB_BB_SDA_IN_VAL ((uint32_t)(0x00000001UL << MXC_F_I2CM_BB_BB_SDA_IN_VAL_POS))
bogdanm 0:9b334a45a8ff 181 #define MXC_F_I2CM_BB_RX_FIFO_CNT_POS 16
bogdanm 0:9b334a45a8ff 182 #define MXC_F_I2CM_BB_RX_FIFO_CNT ((uint32_t)(0x0000001FUL << MXC_F_I2CM_BB_RX_FIFO_CNT_POS))
bogdanm 0:9b334a45a8ff 183
bogdanm 0:9b334a45a8ff 184 #ifdef __cplusplus
bogdanm 0:9b334a45a8ff 185 }
bogdanm 0:9b334a45a8ff 186 #endif
bogdanm 0:9b334a45a8ff 187
bogdanm 0:9b334a45a8ff 188 /**
bogdanm 0:9b334a45a8ff 189 * @}
bogdanm 0:9b334a45a8ff 190 */
bogdanm 0:9b334a45a8ff 191
bogdanm 0:9b334a45a8ff 192 #endif