Jasper Lee / mbed_helloworld

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Dependents:   twr_helloworld

TARGET_K20D50M/core_cmFunc.h@0:b16d94660a33, 2014-12-23 (annotated)

Committer:
Jasper_lee
Date:
Tue Dec 23 03:35:08 2014 +0000
Revision:
0:b16d94660a33
change some io setting used in TWR-K22F120M

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Jasper_lee 0:b16d94660a33 1 /**************************************************************************//**
Jasper_lee 0:b16d94660a33 2 * @file core_cmFunc.h
Jasper_lee 0:b16d94660a33 3 * @brief CMSIS Cortex-M Core Function Access Header File
Jasper_lee 0:b16d94660a33 4 * @version V3.20
Jasper_lee 0:b16d94660a33 5 * @date 25. February 2013
Jasper_lee 0:b16d94660a33 6 *
Jasper_lee 0:b16d94660a33 7 * @note
Jasper_lee 0:b16d94660a33 8 *
Jasper_lee 0:b16d94660a33 9 ******************************************************************************/
Jasper_lee 0:b16d94660a33 10 /* Copyright (c) 2009 - 2013 ARM LIMITED
Jasper_lee 0:b16d94660a33 11
Jasper_lee 0:b16d94660a33 12 All rights reserved.
Jasper_lee 0:b16d94660a33 13 Redistribution and use in source and binary forms, with or without
Jasper_lee 0:b16d94660a33 14 modification, are permitted provided that the following conditions are met:
Jasper_lee 0:b16d94660a33 15 - Redistributions of source code must retain the above copyright
Jasper_lee 0:b16d94660a33 16 notice, this list of conditions and the following disclaimer.
Jasper_lee 0:b16d94660a33 17 - Redistributions in binary form must reproduce the above copyright
Jasper_lee 0:b16d94660a33 18 notice, this list of conditions and the following disclaimer in the
Jasper_lee 0:b16d94660a33 19 documentation and/or other materials provided with the distribution.
Jasper_lee 0:b16d94660a33 20 - Neither the name of ARM nor the names of its contributors may be used
Jasper_lee 0:b16d94660a33 21 to endorse or promote products derived from this software without
Jasper_lee 0:b16d94660a33 22 specific prior written permission.
Jasper_lee 0:b16d94660a33 23 *
Jasper_lee 0:b16d94660a33 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Jasper_lee 0:b16d94660a33 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Jasper_lee 0:b16d94660a33 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
Jasper_lee 0:b16d94660a33 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
Jasper_lee 0:b16d94660a33 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
Jasper_lee 0:b16d94660a33 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
Jasper_lee 0:b16d94660a33 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
Jasper_lee 0:b16d94660a33 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
Jasper_lee 0:b16d94660a33 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
Jasper_lee 0:b16d94660a33 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
Jasper_lee 0:b16d94660a33 34 POSSIBILITY OF SUCH DAMAGE.
Jasper_lee 0:b16d94660a33 35 ---------------------------------------------------------------------------*/
Jasper_lee 0:b16d94660a33 36
Jasper_lee 0:b16d94660a33 37
Jasper_lee 0:b16d94660a33 38 #ifndef __CORE_CMFUNC_H
Jasper_lee 0:b16d94660a33 39 #define __CORE_CMFUNC_H
Jasper_lee 0:b16d94660a33 40
Jasper_lee 0:b16d94660a33 41
Jasper_lee 0:b16d94660a33 42 /* ########################### Core Function Access ########################### */
Jasper_lee 0:b16d94660a33 43 /** \ingroup CMSIS_Core_FunctionInterface
Jasper_lee 0:b16d94660a33 44 \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
Jasper_lee 0:b16d94660a33 45 @{
Jasper_lee 0:b16d94660a33 46 */
Jasper_lee 0:b16d94660a33 47
Jasper_lee 0:b16d94660a33 48 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
Jasper_lee 0:b16d94660a33 49 /* ARM armcc specific functions */
Jasper_lee 0:b16d94660a33 50
Jasper_lee 0:b16d94660a33 51 #if (__ARMCC_VERSION < 400677)
Jasper_lee 0:b16d94660a33 52 #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
Jasper_lee 0:b16d94660a33 53 #endif
Jasper_lee 0:b16d94660a33 54
Jasper_lee 0:b16d94660a33 55 /* intrinsic void __enable_irq(); */
Jasper_lee 0:b16d94660a33 56 /* intrinsic void __disable_irq(); */
Jasper_lee 0:b16d94660a33 57
Jasper_lee 0:b16d94660a33 58 /** \brief Get Control Register
Jasper_lee 0:b16d94660a33 59
Jasper_lee 0:b16d94660a33 60 This function returns the content of the Control Register.
Jasper_lee 0:b16d94660a33 61
Jasper_lee 0:b16d94660a33 62 \return Control Register value
Jasper_lee 0:b16d94660a33 63 */
Jasper_lee 0:b16d94660a33 64 __STATIC_INLINE uint32_t __get_CONTROL(void)
Jasper_lee 0:b16d94660a33 65 {
Jasper_lee 0:b16d94660a33 66 register uint32_t __regControl __ASM("control");
Jasper_lee 0:b16d94660a33 67 return(__regControl);
Jasper_lee 0:b16d94660a33 68 }
Jasper_lee 0:b16d94660a33 69
Jasper_lee 0:b16d94660a33 70
Jasper_lee 0:b16d94660a33 71 /** \brief Set Control Register
Jasper_lee 0:b16d94660a33 72
Jasper_lee 0:b16d94660a33 73 This function writes the given value to the Control Register.
Jasper_lee 0:b16d94660a33 74
Jasper_lee 0:b16d94660a33 75 \param [in] control Control Register value to set
Jasper_lee 0:b16d94660a33 76 */
Jasper_lee 0:b16d94660a33 77 __STATIC_INLINE void __set_CONTROL(uint32_t control)
Jasper_lee 0:b16d94660a33 78 {
Jasper_lee 0:b16d94660a33 79 register uint32_t __regControl __ASM("control");
Jasper_lee 0:b16d94660a33 80 __regControl = control;
Jasper_lee 0:b16d94660a33 81 }
Jasper_lee 0:b16d94660a33 82
Jasper_lee 0:b16d94660a33 83
Jasper_lee 0:b16d94660a33 84 /** \brief Get IPSR Register
Jasper_lee 0:b16d94660a33 85
Jasper_lee 0:b16d94660a33 86 This function returns the content of the IPSR Register.
Jasper_lee 0:b16d94660a33 87
Jasper_lee 0:b16d94660a33 88 \return IPSR Register value
Jasper_lee 0:b16d94660a33 89 */
Jasper_lee 0:b16d94660a33 90 __STATIC_INLINE uint32_t __get_IPSR(void)
Jasper_lee 0:b16d94660a33 91 {
Jasper_lee 0:b16d94660a33 92 register uint32_t __regIPSR __ASM("ipsr");
Jasper_lee 0:b16d94660a33 93 return(__regIPSR);
Jasper_lee 0:b16d94660a33 94 }
Jasper_lee 0:b16d94660a33 95
Jasper_lee 0:b16d94660a33 96
Jasper_lee 0:b16d94660a33 97 /** \brief Get APSR Register
Jasper_lee 0:b16d94660a33 98
Jasper_lee 0:b16d94660a33 99 This function returns the content of the APSR Register.
Jasper_lee 0:b16d94660a33 100
Jasper_lee 0:b16d94660a33 101 \return APSR Register value
Jasper_lee 0:b16d94660a33 102 */
Jasper_lee 0:b16d94660a33 103 __STATIC_INLINE uint32_t __get_APSR(void)
Jasper_lee 0:b16d94660a33 104 {
Jasper_lee 0:b16d94660a33 105 register uint32_t __regAPSR __ASM("apsr");
Jasper_lee 0:b16d94660a33 106 return(__regAPSR);
Jasper_lee 0:b16d94660a33 107 }
Jasper_lee 0:b16d94660a33 108
Jasper_lee 0:b16d94660a33 109
Jasper_lee 0:b16d94660a33 110 /** \brief Get xPSR Register
Jasper_lee 0:b16d94660a33 111
Jasper_lee 0:b16d94660a33 112 This function returns the content of the xPSR Register.
Jasper_lee 0:b16d94660a33 113
Jasper_lee 0:b16d94660a33 114 \return xPSR Register value
Jasper_lee 0:b16d94660a33 115 */
Jasper_lee 0:b16d94660a33 116 __STATIC_INLINE uint32_t __get_xPSR(void)
Jasper_lee 0:b16d94660a33 117 {
Jasper_lee 0:b16d94660a33 118 register uint32_t __regXPSR __ASM("xpsr");
Jasper_lee 0:b16d94660a33 119 return(__regXPSR);
Jasper_lee 0:b16d94660a33 120 }
Jasper_lee 0:b16d94660a33 121
Jasper_lee 0:b16d94660a33 122
Jasper_lee 0:b16d94660a33 123 /** \brief Get Process Stack Pointer
Jasper_lee 0:b16d94660a33 124
Jasper_lee 0:b16d94660a33 125 This function returns the current value of the Process Stack Pointer (PSP).
Jasper_lee 0:b16d94660a33 126
Jasper_lee 0:b16d94660a33 127 \return PSP Register value
Jasper_lee 0:b16d94660a33 128 */
Jasper_lee 0:b16d94660a33 129 __STATIC_INLINE uint32_t __get_PSP(void)
Jasper_lee 0:b16d94660a33 130 {
Jasper_lee 0:b16d94660a33 131 register uint32_t __regProcessStackPointer __ASM("psp");
Jasper_lee 0:b16d94660a33 132 return(__regProcessStackPointer);
Jasper_lee 0:b16d94660a33 133 }
Jasper_lee 0:b16d94660a33 134
Jasper_lee 0:b16d94660a33 135
Jasper_lee 0:b16d94660a33 136 /** \brief Set Process Stack Pointer
Jasper_lee 0:b16d94660a33 137
Jasper_lee 0:b16d94660a33 138 This function assigns the given value to the Process Stack Pointer (PSP).
Jasper_lee 0:b16d94660a33 139
Jasper_lee 0:b16d94660a33 140 \param [in] topOfProcStack Process Stack Pointer value to set
Jasper_lee 0:b16d94660a33 141 */
Jasper_lee 0:b16d94660a33 142 __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
Jasper_lee 0:b16d94660a33 143 {
Jasper_lee 0:b16d94660a33 144 register uint32_t __regProcessStackPointer __ASM("psp");
Jasper_lee 0:b16d94660a33 145 __regProcessStackPointer = topOfProcStack;
Jasper_lee 0:b16d94660a33 146 }
Jasper_lee 0:b16d94660a33 147
Jasper_lee 0:b16d94660a33 148
Jasper_lee 0:b16d94660a33 149 /** \brief Get Main Stack Pointer
Jasper_lee 0:b16d94660a33 150
Jasper_lee 0:b16d94660a33 151 This function returns the current value of the Main Stack Pointer (MSP).
Jasper_lee 0:b16d94660a33 152
Jasper_lee 0:b16d94660a33 153 \return MSP Register value
Jasper_lee 0:b16d94660a33 154 */
Jasper_lee 0:b16d94660a33 155 __STATIC_INLINE uint32_t __get_MSP(void)
Jasper_lee 0:b16d94660a33 156 {
Jasper_lee 0:b16d94660a33 157 register uint32_t __regMainStackPointer __ASM("msp");
Jasper_lee 0:b16d94660a33 158 return(__regMainStackPointer);
Jasper_lee 0:b16d94660a33 159 }
Jasper_lee 0:b16d94660a33 160
Jasper_lee 0:b16d94660a33 161
Jasper_lee 0:b16d94660a33 162 /** \brief Set Main Stack Pointer
Jasper_lee 0:b16d94660a33 163
Jasper_lee 0:b16d94660a33 164 This function assigns the given value to the Main Stack Pointer (MSP).
Jasper_lee 0:b16d94660a33 165
Jasper_lee 0:b16d94660a33 166 \param [in] topOfMainStack Main Stack Pointer value to set
Jasper_lee 0:b16d94660a33 167 */
Jasper_lee 0:b16d94660a33 168 __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
Jasper_lee 0:b16d94660a33 169 {
Jasper_lee 0:b16d94660a33 170 register uint32_t __regMainStackPointer __ASM("msp");
Jasper_lee 0:b16d94660a33 171 __regMainStackPointer = topOfMainStack;
Jasper_lee 0:b16d94660a33 172 }
Jasper_lee 0:b16d94660a33 173
Jasper_lee 0:b16d94660a33 174
Jasper_lee 0:b16d94660a33 175 /** \brief Get Priority Mask
Jasper_lee 0:b16d94660a33 176
Jasper_lee 0:b16d94660a33 177 This function returns the current state of the priority mask bit from the Priority Mask Register.
Jasper_lee 0:b16d94660a33 178
Jasper_lee 0:b16d94660a33 179 \return Priority Mask value
Jasper_lee 0:b16d94660a33 180 */
Jasper_lee 0:b16d94660a33 181 __STATIC_INLINE uint32_t __get_PRIMASK(void)
Jasper_lee 0:b16d94660a33 182 {
Jasper_lee 0:b16d94660a33 183 register uint32_t __regPriMask __ASM("primask");
Jasper_lee 0:b16d94660a33 184 return(__regPriMask);
Jasper_lee 0:b16d94660a33 185 }
Jasper_lee 0:b16d94660a33 186
Jasper_lee 0:b16d94660a33 187
Jasper_lee 0:b16d94660a33 188 /** \brief Set Priority Mask
Jasper_lee 0:b16d94660a33 189
Jasper_lee 0:b16d94660a33 190 This function assigns the given value to the Priority Mask Register.
Jasper_lee 0:b16d94660a33 191
Jasper_lee 0:b16d94660a33 192 \param [in] priMask Priority Mask
Jasper_lee 0:b16d94660a33 193 */
Jasper_lee 0:b16d94660a33 194 __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
Jasper_lee 0:b16d94660a33 195 {
Jasper_lee 0:b16d94660a33 196 register uint32_t __regPriMask __ASM("primask");
Jasper_lee 0:b16d94660a33 197 __regPriMask = (priMask);
Jasper_lee 0:b16d94660a33 198 }
Jasper_lee 0:b16d94660a33 199
Jasper_lee 0:b16d94660a33 200
Jasper_lee 0:b16d94660a33 201 #if (__CORTEX_M >= 0x03)
Jasper_lee 0:b16d94660a33 202
Jasper_lee 0:b16d94660a33 203 /** \brief Enable FIQ
Jasper_lee 0:b16d94660a33 204
Jasper_lee 0:b16d94660a33 205 This function enables FIQ interrupts by clearing the F-bit in the CPSR.
Jasper_lee 0:b16d94660a33 206 Can only be executed in Privileged modes.
Jasper_lee 0:b16d94660a33 207 */
Jasper_lee 0:b16d94660a33 208 #define __enable_fault_irq __enable_fiq
Jasper_lee 0:b16d94660a33 209
Jasper_lee 0:b16d94660a33 210
Jasper_lee 0:b16d94660a33 211 /** \brief Disable FIQ
Jasper_lee 0:b16d94660a33 212
Jasper_lee 0:b16d94660a33 213 This function disables FIQ interrupts by setting the F-bit in the CPSR.
Jasper_lee 0:b16d94660a33 214 Can only be executed in Privileged modes.
Jasper_lee 0:b16d94660a33 215 */
Jasper_lee 0:b16d94660a33 216 #define __disable_fault_irq __disable_fiq
Jasper_lee 0:b16d94660a33 217
Jasper_lee 0:b16d94660a33 218
Jasper_lee 0:b16d94660a33 219 /** \brief Get Base Priority
Jasper_lee 0:b16d94660a33 220
Jasper_lee 0:b16d94660a33 221 This function returns the current value of the Base Priority register.
Jasper_lee 0:b16d94660a33 222
Jasper_lee 0:b16d94660a33 223 \return Base Priority register value
Jasper_lee 0:b16d94660a33 224 */
Jasper_lee 0:b16d94660a33 225 __STATIC_INLINE uint32_t __get_BASEPRI(void)
Jasper_lee 0:b16d94660a33 226 {
Jasper_lee 0:b16d94660a33 227 register uint32_t __regBasePri __ASM("basepri");
Jasper_lee 0:b16d94660a33 228 return(__regBasePri);
Jasper_lee 0:b16d94660a33 229 }
Jasper_lee 0:b16d94660a33 230
Jasper_lee 0:b16d94660a33 231
Jasper_lee 0:b16d94660a33 232 /** \brief Set Base Priority
Jasper_lee 0:b16d94660a33 233
Jasper_lee 0:b16d94660a33 234 This function assigns the given value to the Base Priority register.
Jasper_lee 0:b16d94660a33 235
Jasper_lee 0:b16d94660a33 236 \param [in] basePri Base Priority value to set
Jasper_lee 0:b16d94660a33 237 */
Jasper_lee 0:b16d94660a33 238 __STATIC_INLINE void __set_BASEPRI(uint32_t basePri)
Jasper_lee 0:b16d94660a33 239 {
Jasper_lee 0:b16d94660a33 240 register uint32_t __regBasePri __ASM("basepri");
Jasper_lee 0:b16d94660a33 241 __regBasePri = (basePri & 0xff);
Jasper_lee 0:b16d94660a33 242 }
Jasper_lee 0:b16d94660a33 243
Jasper_lee 0:b16d94660a33 244
Jasper_lee 0:b16d94660a33 245 /** \brief Get Fault Mask
Jasper_lee 0:b16d94660a33 246
Jasper_lee 0:b16d94660a33 247 This function returns the current value of the Fault Mask register.
Jasper_lee 0:b16d94660a33 248
Jasper_lee 0:b16d94660a33 249 \return Fault Mask register value
Jasper_lee 0:b16d94660a33 250 */
Jasper_lee 0:b16d94660a33 251 __STATIC_INLINE uint32_t __get_FAULTMASK(void)
Jasper_lee 0:b16d94660a33 252 {
Jasper_lee 0:b16d94660a33 253 register uint32_t __regFaultMask __ASM("faultmask");
Jasper_lee 0:b16d94660a33 254 return(__regFaultMask);
Jasper_lee 0:b16d94660a33 255 }
Jasper_lee 0:b16d94660a33 256
Jasper_lee 0:b16d94660a33 257
Jasper_lee 0:b16d94660a33 258 /** \brief Set Fault Mask
Jasper_lee 0:b16d94660a33 259
Jasper_lee 0:b16d94660a33 260 This function assigns the given value to the Fault Mask register.
Jasper_lee 0:b16d94660a33 261
Jasper_lee 0:b16d94660a33 262 \param [in] faultMask Fault Mask value to set
Jasper_lee 0:b16d94660a33 263 */
Jasper_lee 0:b16d94660a33 264 __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
Jasper_lee 0:b16d94660a33 265 {
Jasper_lee 0:b16d94660a33 266 register uint32_t __regFaultMask __ASM("faultmask");
Jasper_lee 0:b16d94660a33 267 __regFaultMask = (faultMask & (uint32_t)1);
Jasper_lee 0:b16d94660a33 268 }
Jasper_lee 0:b16d94660a33 269
Jasper_lee 0:b16d94660a33 270 #endif /* (__CORTEX_M >= 0x03) */
Jasper_lee 0:b16d94660a33 271
Jasper_lee 0:b16d94660a33 272
Jasper_lee 0:b16d94660a33 273 #if (__CORTEX_M == 0x04)
Jasper_lee 0:b16d94660a33 274
Jasper_lee 0:b16d94660a33 275 /** \brief Get FPSCR
Jasper_lee 0:b16d94660a33 276
Jasper_lee 0:b16d94660a33 277 This function returns the current value of the Floating Point Status/Control register.
Jasper_lee 0:b16d94660a33 278
Jasper_lee 0:b16d94660a33 279 \return Floating Point Status/Control register value
Jasper_lee 0:b16d94660a33 280 */
Jasper_lee 0:b16d94660a33 281 __STATIC_INLINE uint32_t __get_FPSCR(void)
Jasper_lee 0:b16d94660a33 282 {
Jasper_lee 0:b16d94660a33 283 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
Jasper_lee 0:b16d94660a33 284 register uint32_t __regfpscr __ASM("fpscr");
Jasper_lee 0:b16d94660a33 285 return(__regfpscr);
Jasper_lee 0:b16d94660a33 286 #else
Jasper_lee 0:b16d94660a33 287 return(0);
Jasper_lee 0:b16d94660a33 288 #endif
Jasper_lee 0:b16d94660a33 289 }
Jasper_lee 0:b16d94660a33 290
Jasper_lee 0:b16d94660a33 291
Jasper_lee 0:b16d94660a33 292 /** \brief Set FPSCR
Jasper_lee 0:b16d94660a33 293
Jasper_lee 0:b16d94660a33 294 This function assigns the given value to the Floating Point Status/Control register.
Jasper_lee 0:b16d94660a33 295
Jasper_lee 0:b16d94660a33 296 \param [in] fpscr Floating Point Status/Control value to set
Jasper_lee 0:b16d94660a33 297 */
Jasper_lee 0:b16d94660a33 298 __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
Jasper_lee 0:b16d94660a33 299 {
Jasper_lee 0:b16d94660a33 300 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
Jasper_lee 0:b16d94660a33 301 register uint32_t __regfpscr __ASM("fpscr");
Jasper_lee 0:b16d94660a33 302 __regfpscr = (fpscr);
Jasper_lee 0:b16d94660a33 303 #endif
Jasper_lee 0:b16d94660a33 304 }
Jasper_lee 0:b16d94660a33 305
Jasper_lee 0:b16d94660a33 306 #endif /* (__CORTEX_M == 0x04) */
Jasper_lee 0:b16d94660a33 307
Jasper_lee 0:b16d94660a33 308
Jasper_lee 0:b16d94660a33 309 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
Jasper_lee 0:b16d94660a33 310 /* IAR iccarm specific functions */
Jasper_lee 0:b16d94660a33 311
Jasper_lee 0:b16d94660a33 312 #include <cmsis_iar.h>
Jasper_lee 0:b16d94660a33 313
Jasper_lee 0:b16d94660a33 314
Jasper_lee 0:b16d94660a33 315 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
Jasper_lee 0:b16d94660a33 316 /* TI CCS specific functions */
Jasper_lee 0:b16d94660a33 317
Jasper_lee 0:b16d94660a33 318 #include <cmsis_ccs.h>
Jasper_lee 0:b16d94660a33 319
Jasper_lee 0:b16d94660a33 320
Jasper_lee 0:b16d94660a33 321 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
Jasper_lee 0:b16d94660a33 322 /* GNU gcc specific functions */
Jasper_lee 0:b16d94660a33 323
Jasper_lee 0:b16d94660a33 324 /** \brief Enable IRQ Interrupts
Jasper_lee 0:b16d94660a33 325
Jasper_lee 0:b16d94660a33 326 This function enables IRQ interrupts by clearing the I-bit in the CPSR.
Jasper_lee 0:b16d94660a33 327 Can only be executed in Privileged modes.
Jasper_lee 0:b16d94660a33 328 */
Jasper_lee 0:b16d94660a33 329 __attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_irq(void)
Jasper_lee 0:b16d94660a33 330 {
Jasper_lee 0:b16d94660a33 331 __ASM volatile ("cpsie i" : : : "memory");
Jasper_lee 0:b16d94660a33 332 }
Jasper_lee 0:b16d94660a33 333
Jasper_lee 0:b16d94660a33 334
Jasper_lee 0:b16d94660a33 335 /** \brief Disable IRQ Interrupts
Jasper_lee 0:b16d94660a33 336
Jasper_lee 0:b16d94660a33 337 This function disables IRQ interrupts by setting the I-bit in the CPSR.
Jasper_lee 0:b16d94660a33 338 Can only be executed in Privileged modes.
Jasper_lee 0:b16d94660a33 339 */
Jasper_lee 0:b16d94660a33 340 __attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_irq(void)
Jasper_lee 0:b16d94660a33 341 {
Jasper_lee 0:b16d94660a33 342 __ASM volatile ("cpsid i" : : : "memory");
Jasper_lee 0:b16d94660a33 343 }
Jasper_lee 0:b16d94660a33 344
Jasper_lee 0:b16d94660a33 345
Jasper_lee 0:b16d94660a33 346 /** \brief Get Control Register
Jasper_lee 0:b16d94660a33 347
Jasper_lee 0:b16d94660a33 348 This function returns the content of the Control Register.
Jasper_lee 0:b16d94660a33 349
Jasper_lee 0:b16d94660a33 350 \return Control Register value
Jasper_lee 0:b16d94660a33 351 */
Jasper_lee 0:b16d94660a33 352 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_CONTROL(void)
Jasper_lee 0:b16d94660a33 353 {
Jasper_lee 0:b16d94660a33 354 uint32_t result;
Jasper_lee 0:b16d94660a33 355
Jasper_lee 0:b16d94660a33 356 __ASM volatile ("MRS %0, control" : "=r" (result) );
Jasper_lee 0:b16d94660a33 357 return(result);
Jasper_lee 0:b16d94660a33 358 }
Jasper_lee 0:b16d94660a33 359
Jasper_lee 0:b16d94660a33 360
Jasper_lee 0:b16d94660a33 361 /** \brief Set Control Register
Jasper_lee 0:b16d94660a33 362
Jasper_lee 0:b16d94660a33 363 This function writes the given value to the Control Register.
Jasper_lee 0:b16d94660a33 364
Jasper_lee 0:b16d94660a33 365 \param [in] control Control Register value to set
Jasper_lee 0:b16d94660a33 366 */
Jasper_lee 0:b16d94660a33 367 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_CONTROL(uint32_t control)
Jasper_lee 0:b16d94660a33 368 {
Jasper_lee 0:b16d94660a33 369 __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
Jasper_lee 0:b16d94660a33 370 }
Jasper_lee 0:b16d94660a33 371
Jasper_lee 0:b16d94660a33 372
Jasper_lee 0:b16d94660a33 373 /** \brief Get IPSR Register
Jasper_lee 0:b16d94660a33 374
Jasper_lee 0:b16d94660a33 375 This function returns the content of the IPSR Register.
Jasper_lee 0:b16d94660a33 376
Jasper_lee 0:b16d94660a33 377 \return IPSR Register value
Jasper_lee 0:b16d94660a33 378 */
Jasper_lee 0:b16d94660a33 379 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_IPSR(void)
Jasper_lee 0:b16d94660a33 380 {
Jasper_lee 0:b16d94660a33 381 uint32_t result;
Jasper_lee 0:b16d94660a33 382
Jasper_lee 0:b16d94660a33 383 __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
Jasper_lee 0:b16d94660a33 384 return(result);
Jasper_lee 0:b16d94660a33 385 }
Jasper_lee 0:b16d94660a33 386
Jasper_lee 0:b16d94660a33 387
Jasper_lee 0:b16d94660a33 388 /** \brief Get APSR Register
Jasper_lee 0:b16d94660a33 389
Jasper_lee 0:b16d94660a33 390 This function returns the content of the APSR Register.
Jasper_lee 0:b16d94660a33 391
Jasper_lee 0:b16d94660a33 392 \return APSR Register value
Jasper_lee 0:b16d94660a33 393 */
Jasper_lee 0:b16d94660a33 394 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_APSR(void)
Jasper_lee 0:b16d94660a33 395 {
Jasper_lee 0:b16d94660a33 396 uint32_t result;
Jasper_lee 0:b16d94660a33 397
Jasper_lee 0:b16d94660a33 398 __ASM volatile ("MRS %0, apsr" : "=r" (result) );
Jasper_lee 0:b16d94660a33 399 return(result);
Jasper_lee 0:b16d94660a33 400 }
Jasper_lee 0:b16d94660a33 401
Jasper_lee 0:b16d94660a33 402
Jasper_lee 0:b16d94660a33 403 /** \brief Get xPSR Register
Jasper_lee 0:b16d94660a33 404
Jasper_lee 0:b16d94660a33 405 This function returns the content of the xPSR Register.
Jasper_lee 0:b16d94660a33 406
Jasper_lee 0:b16d94660a33 407 \return xPSR Register value
Jasper_lee 0:b16d94660a33 408 */
Jasper_lee 0:b16d94660a33 409 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_xPSR(void)
Jasper_lee 0:b16d94660a33 410 {
Jasper_lee 0:b16d94660a33 411 uint32_t result;
Jasper_lee 0:b16d94660a33 412
Jasper_lee 0:b16d94660a33 413 __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
Jasper_lee 0:b16d94660a33 414 return(result);
Jasper_lee 0:b16d94660a33 415 }
Jasper_lee 0:b16d94660a33 416
Jasper_lee 0:b16d94660a33 417
Jasper_lee 0:b16d94660a33 418 /** \brief Get Process Stack Pointer
Jasper_lee 0:b16d94660a33 419
Jasper_lee 0:b16d94660a33 420 This function returns the current value of the Process Stack Pointer (PSP).
Jasper_lee 0:b16d94660a33 421
Jasper_lee 0:b16d94660a33 422 \return PSP Register value
Jasper_lee 0:b16d94660a33 423 */
Jasper_lee 0:b16d94660a33 424 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PSP(void)
Jasper_lee 0:b16d94660a33 425 {
Jasper_lee 0:b16d94660a33 426 register uint32_t result;
Jasper_lee 0:b16d94660a33 427
Jasper_lee 0:b16d94660a33 428 __ASM volatile ("MRS %0, psp\n" : "=r" (result) );
Jasper_lee 0:b16d94660a33 429 return(result);
Jasper_lee 0:b16d94660a33 430 }
Jasper_lee 0:b16d94660a33 431
Jasper_lee 0:b16d94660a33 432
Jasper_lee 0:b16d94660a33 433 /** \brief Set Process Stack Pointer
Jasper_lee 0:b16d94660a33 434
Jasper_lee 0:b16d94660a33 435 This function assigns the given value to the Process Stack Pointer (PSP).
Jasper_lee 0:b16d94660a33 436
Jasper_lee 0:b16d94660a33 437 \param [in] topOfProcStack Process Stack Pointer value to set
Jasper_lee 0:b16d94660a33 438 */
Jasper_lee 0:b16d94660a33 439 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
Jasper_lee 0:b16d94660a33 440 {
Jasper_lee 0:b16d94660a33 441 __ASM volatile ("MSR psp, %0\n" : : "r" (topOfProcStack) : "sp");
Jasper_lee 0:b16d94660a33 442 }
Jasper_lee 0:b16d94660a33 443
Jasper_lee 0:b16d94660a33 444
Jasper_lee 0:b16d94660a33 445 /** \brief Get Main Stack Pointer
Jasper_lee 0:b16d94660a33 446
Jasper_lee 0:b16d94660a33 447 This function returns the current value of the Main Stack Pointer (MSP).
Jasper_lee 0:b16d94660a33 448
Jasper_lee 0:b16d94660a33 449 \return MSP Register value
Jasper_lee 0:b16d94660a33 450 */
Jasper_lee 0:b16d94660a33 451 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_MSP(void)
Jasper_lee 0:b16d94660a33 452 {
Jasper_lee 0:b16d94660a33 453 register uint32_t result;
Jasper_lee 0:b16d94660a33 454
Jasper_lee 0:b16d94660a33 455 __ASM volatile ("MRS %0, msp\n" : "=r" (result) );
Jasper_lee 0:b16d94660a33 456 return(result);
Jasper_lee 0:b16d94660a33 457 }
Jasper_lee 0:b16d94660a33 458
Jasper_lee 0:b16d94660a33 459
Jasper_lee 0:b16d94660a33 460 /** \brief Set Main Stack Pointer
Jasper_lee 0:b16d94660a33 461
Jasper_lee 0:b16d94660a33 462 This function assigns the given value to the Main Stack Pointer (MSP).
Jasper_lee 0:b16d94660a33 463
Jasper_lee 0:b16d94660a33 464 \param [in] topOfMainStack Main Stack Pointer value to set
Jasper_lee 0:b16d94660a33 465 */
Jasper_lee 0:b16d94660a33 466 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
Jasper_lee 0:b16d94660a33 467 {
Jasper_lee 0:b16d94660a33 468 __ASM volatile ("MSR msp, %0\n" : : "r" (topOfMainStack) : "sp");
Jasper_lee 0:b16d94660a33 469 }
Jasper_lee 0:b16d94660a33 470
Jasper_lee 0:b16d94660a33 471
Jasper_lee 0:b16d94660a33 472 /** \brief Get Priority Mask
Jasper_lee 0:b16d94660a33 473
Jasper_lee 0:b16d94660a33 474 This function returns the current state of the priority mask bit from the Priority Mask Register.
Jasper_lee 0:b16d94660a33 475
Jasper_lee 0:b16d94660a33 476 \return Priority Mask value
Jasper_lee 0:b16d94660a33 477 */
Jasper_lee 0:b16d94660a33 478 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PRIMASK(void)
Jasper_lee 0:b16d94660a33 479 {
Jasper_lee 0:b16d94660a33 480 uint32_t result;
Jasper_lee 0:b16d94660a33 481
Jasper_lee 0:b16d94660a33 482 __ASM volatile ("MRS %0, primask" : "=r" (result) );
Jasper_lee 0:b16d94660a33 483 return(result);
Jasper_lee 0:b16d94660a33 484 }
Jasper_lee 0:b16d94660a33 485
Jasper_lee 0:b16d94660a33 486
Jasper_lee 0:b16d94660a33 487 /** \brief Set Priority Mask
Jasper_lee 0:b16d94660a33 488
Jasper_lee 0:b16d94660a33 489 This function assigns the given value to the Priority Mask Register.
Jasper_lee 0:b16d94660a33 490
Jasper_lee 0:b16d94660a33 491 \param [in] priMask Priority Mask
Jasper_lee 0:b16d94660a33 492 */
Jasper_lee 0:b16d94660a33 493 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
Jasper_lee 0:b16d94660a33 494 {
Jasper_lee 0:b16d94660a33 495 __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
Jasper_lee 0:b16d94660a33 496 }
Jasper_lee 0:b16d94660a33 497
Jasper_lee 0:b16d94660a33 498
Jasper_lee 0:b16d94660a33 499 #if (__CORTEX_M >= 0x03)
Jasper_lee 0:b16d94660a33 500
Jasper_lee 0:b16d94660a33 501 /** \brief Enable FIQ
Jasper_lee 0:b16d94660a33 502
Jasper_lee 0:b16d94660a33 503 This function enables FIQ interrupts by clearing the F-bit in the CPSR.
Jasper_lee 0:b16d94660a33 504 Can only be executed in Privileged modes.
Jasper_lee 0:b16d94660a33 505 */
Jasper_lee 0:b16d94660a33 506 __attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_fault_irq(void)
Jasper_lee 0:b16d94660a33 507 {
Jasper_lee 0:b16d94660a33 508 __ASM volatile ("cpsie f" : : : "memory");
Jasper_lee 0:b16d94660a33 509 }
Jasper_lee 0:b16d94660a33 510
Jasper_lee 0:b16d94660a33 511
Jasper_lee 0:b16d94660a33 512 /** \brief Disable FIQ
Jasper_lee 0:b16d94660a33 513
Jasper_lee 0:b16d94660a33 514 This function disables FIQ interrupts by setting the F-bit in the CPSR.
Jasper_lee 0:b16d94660a33 515 Can only be executed in Privileged modes.
Jasper_lee 0:b16d94660a33 516 */
Jasper_lee 0:b16d94660a33 517 __attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_fault_irq(void)
Jasper_lee 0:b16d94660a33 518 {
Jasper_lee 0:b16d94660a33 519 __ASM volatile ("cpsid f" : : : "memory");
Jasper_lee 0:b16d94660a33 520 }
Jasper_lee 0:b16d94660a33 521
Jasper_lee 0:b16d94660a33 522
Jasper_lee 0:b16d94660a33 523 /** \brief Get Base Priority
Jasper_lee 0:b16d94660a33 524
Jasper_lee 0:b16d94660a33 525 This function returns the current value of the Base Priority register.
Jasper_lee 0:b16d94660a33 526
Jasper_lee 0:b16d94660a33 527 \return Base Priority register value
Jasper_lee 0:b16d94660a33 528 */
Jasper_lee 0:b16d94660a33 529 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_BASEPRI(void)
Jasper_lee 0:b16d94660a33 530 {
Jasper_lee 0:b16d94660a33 531 uint32_t result;
Jasper_lee 0:b16d94660a33 532
Jasper_lee 0:b16d94660a33 533 __ASM volatile ("MRS %0, basepri_max" : "=r" (result) );
Jasper_lee 0:b16d94660a33 534 return(result);
Jasper_lee 0:b16d94660a33 535 }
Jasper_lee 0:b16d94660a33 536
Jasper_lee 0:b16d94660a33 537
Jasper_lee 0:b16d94660a33 538 /** \brief Set Base Priority
Jasper_lee 0:b16d94660a33 539
Jasper_lee 0:b16d94660a33 540 This function assigns the given value to the Base Priority register.
Jasper_lee 0:b16d94660a33 541
Jasper_lee 0:b16d94660a33 542 \param [in] basePri Base Priority value to set
Jasper_lee 0:b16d94660a33 543 */
Jasper_lee 0:b16d94660a33 544 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI(uint32_t value)
Jasper_lee 0:b16d94660a33 545 {
Jasper_lee 0:b16d94660a33 546 __ASM volatile ("MSR basepri, %0" : : "r" (value) : "memory");
Jasper_lee 0:b16d94660a33 547 }
Jasper_lee 0:b16d94660a33 548
Jasper_lee 0:b16d94660a33 549
Jasper_lee 0:b16d94660a33 550 /** \brief Get Fault Mask
Jasper_lee 0:b16d94660a33 551
Jasper_lee 0:b16d94660a33 552 This function returns the current value of the Fault Mask register.
Jasper_lee 0:b16d94660a33 553
Jasper_lee 0:b16d94660a33 554 \return Fault Mask register value
Jasper_lee 0:b16d94660a33 555 */
Jasper_lee 0:b16d94660a33 556 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FAULTMASK(void)
Jasper_lee 0:b16d94660a33 557 {
Jasper_lee 0:b16d94660a33 558 uint32_t result;
Jasper_lee 0:b16d94660a33 559
Jasper_lee 0:b16d94660a33 560 __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
Jasper_lee 0:b16d94660a33 561 return(result);
Jasper_lee 0:b16d94660a33 562 }
Jasper_lee 0:b16d94660a33 563
Jasper_lee 0:b16d94660a33 564
Jasper_lee 0:b16d94660a33 565 /** \brief Set Fault Mask
Jasper_lee 0:b16d94660a33 566
Jasper_lee 0:b16d94660a33 567 This function assigns the given value to the Fault Mask register.
Jasper_lee 0:b16d94660a33 568
Jasper_lee 0:b16d94660a33 569 \param [in] faultMask Fault Mask value to set
Jasper_lee 0:b16d94660a33 570 */
Jasper_lee 0:b16d94660a33 571 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
Jasper_lee 0:b16d94660a33 572 {
Jasper_lee 0:b16d94660a33 573 __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
Jasper_lee 0:b16d94660a33 574 }
Jasper_lee 0:b16d94660a33 575
Jasper_lee 0:b16d94660a33 576 #endif /* (__CORTEX_M >= 0x03) */
Jasper_lee 0:b16d94660a33 577
Jasper_lee 0:b16d94660a33 578
Jasper_lee 0:b16d94660a33 579 #if (__CORTEX_M == 0x04)
Jasper_lee 0:b16d94660a33 580
Jasper_lee 0:b16d94660a33 581 /** \brief Get FPSCR
Jasper_lee 0:b16d94660a33 582
Jasper_lee 0:b16d94660a33 583 This function returns the current value of the Floating Point Status/Control register.
Jasper_lee 0:b16d94660a33 584
Jasper_lee 0:b16d94660a33 585 \return Floating Point Status/Control register value
Jasper_lee 0:b16d94660a33 586 */
Jasper_lee 0:b16d94660a33 587 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FPSCR(void)
Jasper_lee 0:b16d94660a33 588 {
Jasper_lee 0:b16d94660a33 589 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
Jasper_lee 0:b16d94660a33 590 uint32_t result;
Jasper_lee 0:b16d94660a33 591
Jasper_lee 0:b16d94660a33 592 /* Empty asm statement works as a scheduling barrier */
Jasper_lee 0:b16d94660a33 593 __ASM volatile ("");
Jasper_lee 0:b16d94660a33 594 __ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
Jasper_lee 0:b16d94660a33 595 __ASM volatile ("");
Jasper_lee 0:b16d94660a33 596 return(result);
Jasper_lee 0:b16d94660a33 597 #else
Jasper_lee 0:b16d94660a33 598 return(0);
Jasper_lee 0:b16d94660a33 599 #endif
Jasper_lee 0:b16d94660a33 600 }
Jasper_lee 0:b16d94660a33 601
Jasper_lee 0:b16d94660a33 602
Jasper_lee 0:b16d94660a33 603 /** \brief Set FPSCR
Jasper_lee 0:b16d94660a33 604
Jasper_lee 0:b16d94660a33 605 This function assigns the given value to the Floating Point Status/Control register.
Jasper_lee 0:b16d94660a33 606
Jasper_lee 0:b16d94660a33 607 \param [in] fpscr Floating Point Status/Control value to set
Jasper_lee 0:b16d94660a33 608 */
Jasper_lee 0:b16d94660a33 609 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
Jasper_lee 0:b16d94660a33 610 {
Jasper_lee 0:b16d94660a33 611 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
Jasper_lee 0:b16d94660a33 612 /* Empty asm statement works as a scheduling barrier */
Jasper_lee 0:b16d94660a33 613 __ASM volatile ("");
Jasper_lee 0:b16d94660a33 614 __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc");
Jasper_lee 0:b16d94660a33 615 __ASM volatile ("");
Jasper_lee 0:b16d94660a33 616 #endif
Jasper_lee 0:b16d94660a33 617 }
Jasper_lee 0:b16d94660a33 618
Jasper_lee 0:b16d94660a33 619 #endif /* (__CORTEX_M == 0x04) */
Jasper_lee 0:b16d94660a33 620
Jasper_lee 0:b16d94660a33 621
Jasper_lee 0:b16d94660a33 622 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
Jasper_lee 0:b16d94660a33 623 /* TASKING carm specific functions */
Jasper_lee 0:b16d94660a33 624
Jasper_lee 0:b16d94660a33 625 /*
Jasper_lee 0:b16d94660a33 626 * The CMSIS functions have been implemented as intrinsics in the compiler.
Jasper_lee 0:b16d94660a33 627 * Please use "carm -?i" to get an up to date list of all instrinsics,
Jasper_lee 0:b16d94660a33 628 * Including the CMSIS ones.
Jasper_lee 0:b16d94660a33 629 */
Jasper_lee 0:b16d94660a33 630
Jasper_lee 0:b16d94660a33 631 #endif
Jasper_lee 0:b16d94660a33 632
Jasper_lee 0:b16d94660a33 633 /*@} end of CMSIS_Core_RegAccFunctions */
Jasper_lee 0:b16d94660a33 634
Jasper_lee 0:b16d94660a33 635
Jasper_lee 0:b16d94660a33 636 #endif /* __CORE_CMFUNC_H */