FT_GPU_Hal.cpp

00001 /* mbed Library for FTDI FT813  Enbedded Video Engine "EVE"
00002  * based on Original Code Sample from FTDI
00003  * ported to mbed by Peter Drescher, DC2PD 2014
00004  * Released under the MIT License: http://mbed.org/license/mit 
00005  * 19.09.14 changed to shorter function names  
00006  * FTDI was using very long names. 
00007  * Ft_App_Flush_Co_Buffer -> Flush_Co_Buffer ...  */
00008 
00009 #include "FT_Platform.h"
00010 #include "mbed.h"
00011 #include "FT_LCD_Type.h"
00012 //Serial pc(USBTX, USBRX);
00013 
00014 #define SPI_SPEED_START 10000000
00015 #define SPI_SPEED_AFTER 27000000
00016 
00017 FT813::FT813(PinName mosi,
00018             PinName miso,
00019             PinName sck,
00020             PinName ss,
00021             PinName intr,
00022             PinName pd)
00023 :
00024 _spi(mosi, miso, sck),
00025 _ss(ss),
00026 _pd(pd),
00027 _f800_isr(InterruptIn(intr))
00028 {
00029     _spi.format(8, 0);                  // 8 bit spi mode 0
00030     _spi.frequency(SPI_SPEED_START);          // start with 10 Mhz SPI clock
00031     _ss = 1;                           // cs high
00032     _pd = 1;                           // PD high
00033     Bootup();
00034     _address = 0;
00035     _bitmap_count = 0;
00036     _bitmapCount = 0;
00037     _bitmapAddress = 0;
00038 }
00039 
00040 
00041 ft_bool_t FT813::Bootup(void)
00042 {
00043 //    terminal.printf("Bootup() entered\r\n");
00044     Open();
00045 
00046     BootupConfig();
00047 
00048     return(1);
00049 }
00050 
00051 
00052 ft_void_t FT813::BootupConfig(void)
00053 {
00054     ft_uint8_t chipid;
00055     /* Do a power cycle for safer side */
00056     Powercycle(FT_TRUE);
00057     /*
00058     7/8/16: Curt added the sleep delay below...
00059     */
00060 //  Sleep(30);
00061     
00062     /* Set the clk to external clock */
00063     HostCommand(FT_GPU_EXTERNAL_OSC);
00064     Sleep(10);
00065     
00066     /* Access address 0 to wake up the FT813 */
00067     HostCommand(FT_GPU_ACTIVE_M);
00068     Sleep(500);
00069 
00070     /* Switch PLL output to 48MHz */
00071     HostCommand(FT_GPU_PLL_48M);
00072     Sleep(10);
00073 
00074     /* Do a core reset for safer side */
00075     HostCommand(FT_GPU_CORE_RESET);
00076     Sleep(500);
00077     //Read Register ID to check if FT813 is ready.
00078     chipid = Rd8(REG_ID);
00079 //  chipid = Rd8(0x0C0000);
00080 //    printf("ID1: 0x%08X\n", chipid);
00081     while(chipid != 0x7C)
00082 //    wait(1);
00083 //    printf("ID2: 0x%08X\n", chipid);
00084 
00085     // Speed up
00086 //    _spi.frequency(50000000);           // 30 Mhz SPI clock DC
00087     _spi.frequency(SPI_SPEED_AFTER);           // 20 Mhz SPI clock DC
00088 //    _spi.frequency(12000000);           // 12 Mhz SPI clock
00089     /* Configuration of LCD display */
00090     DispHCycle = my_DispHCycle;
00091     Wr16(REG_HCYCLE, DispHCycle);
00092     DispHOffset = my_DispHOffset;
00093     Wr16(REG_HOFFSET, DispHOffset);
00094     DispWidth = my_DispWidth;
00095     Wr16(REG_HSIZE, DispWidth);
00096     DispHSync0 = my_DispHSync0;
00097     Wr16(REG_HSYNC0, DispHSync0);
00098     DispHSync1 = my_DispHSync1;
00099     Wr16(REG_HSYNC1, DispHSync1);
00100     DispVCycle = my_DispVCycle;
00101     Wr16(REG_VCYCLE, DispVCycle);
00102     DispVOffset = my_DispVOffset;
00103     Wr16(REG_VOFFSET, DispVOffset);
00104     DispHeight = my_DispHeight;
00105     Wr16(REG_VSIZE, DispHeight);
00106     DispVSync0 = my_DispVSync0;
00107     Wr16(REG_VSYNC0, DispVSync0);
00108     DispVSync1 = my_DispVSync1;
00109     Wr16(REG_VSYNC1, DispVSync1);
00110     DispSwizzle = my_DispSwizzle;
00111     Wr8(REG_SWIZZLE, DispSwizzle);
00112     DispPCLKPol = my_DispPCLKPol;
00113     Wr8(REG_PCLK_POL, DispPCLKPol);
00114     Wr8(REG_CSPREAD, 0);
00115     DispPCLK = my_DispPCLK;
00116     Wr8(REG_PCLK, DispPCLK);    // After this display is visible on the LCD
00117 
00118     Wr16(REG_PWM_HZ, 10000);
00119 //#ifdef Inv_Backlite               // turn on backlite
00120 //    Wr16(REG_PWM_DUTY, 0);
00121 //#else
00122     Wr16(REG_PWM_DUTY, 255); // Brightness 127
00123 //#endif
00124     Wr8(REG_GPIO_DIR, 0x82);  //| Rd8(REG_GPIO_DIR));
00125     Wr8(REG_GPIO, 0x080);     //| Rd8(REG_GPIO));
00126 
00127     Wr32(RAM_DL, CLEAR(1, 1, 1));
00128     Wr32(RAM_DL+4, DISPLAY());
00129     Wr32(REG_DLSWAP, 1);
00130 
00131     Wr16(REG_PCLK, DispPCLK);
00132 
00133     /* Touch configuration - configure the resistance value to 1200 */
00134     /* This value is specific to customer requirement and derived by experiment */
00135 //    Wr16(REG_TOUCH_RZTHRESH,2400);
00136     Wr16(REG_TOUCH_RZTHRESH, 0xFFFF);
00137 }
00138 
00139 /* API to initialize the SPI interface */
00140 ft_bool_t FT813::Init()
00141 {
00142     // This is done in the constructor
00143     return 1;
00144 }
00145 
00146 ft_bool_t FT813::Open()
00147 {
00148     cmd_fifo_wp = dl_buff_wp = 0;
00149     status = OPENED;
00150     return 1;
00151 }
00152 
00153 ft_void_t FT813::Close()
00154 {
00155     status = CLOSED;
00156 }
00157 
00158 ft_void_t FT813::DeInit()
00159 {
00160 }
00161 
00162 /*The APIs for reading/writing transfer continuously only with small buffer system*/
00163 ft_void_t FT813::StartTransfer(FT_GPU_TRANSFERDIR_T rw, ft_uint32_t addr)
00164 {
00165     if (FT_GPU_READ == rw) {
00166         _ss = 0;       // cs low
00167         _spi.write(addr >> 16);
00168         _spi.write(addr >> 8);
00169         _spi.write(addr & 0xff);
00170         _spi.write(0); //Dummy Read Byte
00171         status = READING;
00172     } else {
00173         _ss = 0;       // cs low
00174         _spi.write(0x80 | (addr >> 16));
00175         _spi.write(addr >> 8);
00176         _spi.write(addr & 0xff);
00177         status = WRITING;
00178     }
00179 }
00180 
00181 
00182 /*The APIs for writing transfer continuously only*/
00183 ft_void_t FT813::StartCmdTransfer(FT_GPU_TRANSFERDIR_T rw, ft_uint16_t count)
00184 {
00185     StartTransfer(rw, cmd_fifo_wp + RAM_CMD);
00186 }
00187 
00188 ft_uint8_t FT813::TransferString(const ft_char8_t *string)
00189 {
00190     ft_uint16_t length = strlen(string);
00191     while(length --) {
00192        Transfer8(*string);
00193        string++;
00194     }
00195     //Append one null as ending flag
00196     Transfer8(0);
00197     return(1);
00198 }
00199 
00200 
00201 ft_uint8_t FT813::Transfer8(ft_uint8_t value)
00202 {
00203         return _spi.write(value);
00204 }
00205 
00206 
00207 ft_uint16_t FT813::Transfer16(ft_uint16_t value)
00208 {
00209     ft_uint16_t retVal = 0;
00210 
00211         if (status == WRITING) {
00212         Transfer8(value & 0xFF);//LSB first
00213         Transfer8((value >> 8) & 0xFF);
00214     } else {
00215         retVal = Transfer8(0);
00216         retVal |= (ft_uint16_t)Transfer8(0) << 8;
00217     }
00218 
00219     return retVal;
00220 }
00221 
00222 ft_uint32_t FT813::Transfer32(ft_uint32_t value)
00223 {
00224     ft_uint32_t retVal = 0;
00225     if (status == WRITING) {
00226         Transfer16(value & 0xFFFF);//LSB first
00227         Transfer16((value >> 16) & 0xFFFF);
00228     } else {
00229         retVal = Transfer16(0);
00230         retVal |= (ft_uint32_t)Transfer16(0) << 16;
00231     }
00232     return retVal;
00233 }
00234 
00235 ft_void_t FT813::EndTransfer()
00236 {
00237     _ss = 1;
00238     status = OPENED;
00239 }
00240 
00241 ft_uint8_t FT813::Rd8(ft_uint32_t addr)
00242 {
00243     ft_uint8_t value;
00244     StartTransfer(FT_GPU_READ, addr);
00245     value = Transfer8(0);
00246     EndTransfer();
00247     return value;
00248 }
00249 
00250 ft_uint16_t FT813::Rd16(ft_uint32_t addr)
00251 {
00252     ft_uint16_t value;
00253     StartTransfer(FT_GPU_READ, addr);
00254     value = Transfer16(0);
00255     EndTransfer();
00256     return value;
00257 }
00258 
00259 ft_uint32_t FT813::Rd32(ft_uint32_t addr)
00260 {
00261     ft_uint32_t value;
00262     StartTransfer(FT_GPU_READ, addr);
00263     value = Transfer32(0);
00264     EndTransfer();
00265     return value;
00266 }
00267 
00268 ft_void_t FT813::Wr8(ft_uint32_t addr, ft_uint8_t v)
00269 {
00270 //    StartTransfer(FT_GPU_WRITE, addr);
00271 //    if (FT_GPU_READ == rw) {  // if (FT_GPU_READ == FT_GPU_WRITE)
00272 //        _ss = 0;       // cs low
00273 //        _spi.write(addr >> 16);
00274 //        _spi.write(addr >> 8);
00275 //        _spi.write(addr & 0xff);
00276 //        _spi.write(0); //Dummy Read Byte
00277 //        status = READING;
00278 //    } else {
00279         _ss = 0;       // cs low
00280         _spi.write(0x80 | (addr >> 16));
00281         _spi.write(addr >> 8);
00282         _spi.write(addr & 0xff);
00283         status = WRITING;
00284 //    }
00285 
00286 //    Transfer8(v);
00287     _spi.write(v);
00288 //    EndTransfer();
00289     _ss = 1;
00290     status = OPENED;
00291 }
00292 
00293 ft_void_t FT813::Wr16(ft_uint32_t addr, ft_uint16_t v)
00294 {
00295     StartTransfer(FT_GPU_WRITE, addr);
00296     Transfer16(v);
00297     EndTransfer();
00298 }
00299 
00300 ft_void_t FT813::Wr32(ft_uint32_t addr, ft_uint32_t v)
00301 {
00302     StartTransfer(FT_GPU_WRITE, addr);
00303     Transfer32(v);
00304     EndTransfer();
00305 }
00306 
00307 ft_void_t FT813::HostCommand(ft_uint8_t cmd)
00308 {
00309   _ss = 0;
00310   _spi.write(cmd);
00311   _spi.write(0);
00312   _spi.write(0);
00313   _ss = 1;
00314 }
00315 
00316 ft_void_t FT813::ClockSelect(FT_GPU_PLL_SOURCE_T pllsource)
00317 {
00318    HostCommand(pllsource);
00319 }
00320 
00321 ft_void_t FT813::PLL_FreqSelect(FT_GPU_PLL_FREQ_T freq)
00322 {
00323    HostCommand(freq);
00324 }
00325 
00326 ft_void_t FT813::PowerModeSwitch(FT_GPU_POWER_MODE_T pwrmode)
00327 {
00328    HostCommand(pwrmode);
00329 }
00330 
00331 ft_void_t FT813::CoreReset()
00332 {
00333    HostCommand(0x68);
00334 }
00335 
00336 ft_void_t FT813::Updatecmdfifo(ft_uint16_t count)
00337 {
00338      cmd_fifo_wp  = (cmd_fifo_wp + count) & 4095;
00339     //4 byte alignment
00340      cmd_fifo_wp = (cmd_fifo_wp + 3) & 0xffc;
00341     Wr16(REG_CMD_WRITE, cmd_fifo_wp);
00342 }
00343 
00344 ft_uint16_t FT813::fifo_Freespace()
00345 {
00346     ft_uint16_t fullness,retval;
00347 
00348     fullness = (cmd_fifo_wp - Rd16(REG_CMD_READ)) & 4095;
00349     retval = (FT_CMD_FIFO_SIZE - 4) - fullness;
00350     return (retval);
00351 }
00352 
00353 ft_void_t FT813::WrCmdBuf(ft_uint8_t *buffer, ft_uint16_t count)
00354 {
00355     ft_uint32_t length =0, SizeTransfered = 0;
00356 
00357 #define MAX_CMD_FIFO_TRANSFER   fifo_Freespace()
00358     do {
00359         length = count;
00360         if (length > MAX_CMD_FIFO_TRANSFER) {
00361             length = MAX_CMD_FIFO_TRANSFER;
00362         }
00363         CheckCmdBuffer(length);
00364 
00365         StartCmdTransfer(FT_GPU_WRITE, length);
00366 
00367         SizeTransfered = 0;
00368         while (length--) {
00369 //            Transfer8(*buffer);
00370             _spi.write(*buffer);
00371             buffer++;
00372             SizeTransfered++;
00373         }
00374         length = SizeTransfered;
00375 
00376         EndTransfer();
00377         Updatecmdfifo(length);
00378 
00379         WaitCmdfifo_empty();
00380 
00381         count -= length;
00382     } while (count > 0);
00383 }
00384 
00385 ft_void_t FT813::WrCmdBufFromFlash(FT_PROGMEM ft_prog_uchar8_t *buffer, ft_uint16_t count)
00386 {
00387     ft_uint32_t length =0, SizeTransfered = 0;
00388 
00389 #define MAX_CMD_FIFO_TRANSFER   fifo_Freespace()
00390     do {
00391         length = count;
00392         if (length > MAX_CMD_FIFO_TRANSFER) {
00393             length = MAX_CMD_FIFO_TRANSFER;
00394         }
00395         CheckCmdBuffer(length);
00396 
00397         StartCmdTransfer(FT_GPU_WRITE,length);
00398 
00399         SizeTransfered = 0;
00400         while (length--) {
00401             Transfer8(ft_pgm_read_byte_near(buffer));
00402             buffer++;
00403             SizeTransfered++;
00404         }
00405         length = SizeTransfered;
00406 
00407         EndTransfer();
00408         Updatecmdfifo(length);
00409 
00410         WaitCmdfifo_empty();
00411 
00412         count -= length;
00413     } while (count > 0);
00414 }
00415 
00416 ft_void_t FT813::CheckCmdBuffer(ft_uint16_t count)
00417 {
00418    ft_uint16_t getfreespace;
00419    do {
00420         getfreespace = fifo_Freespace();
00421    } while(getfreespace < count);
00422 }
00423 
00424 ft_void_t FT813::WaitCmdfifo_empty()
00425 {
00426    while(Rd16(REG_CMD_READ) != Rd16(REG_CMD_WRITE));
00427 
00428     cmd_fifo_wp = Rd16(REG_CMD_WRITE);
00429 }
00430 
00431 ft_void_t FT813::WaitLogo_Finish()
00432 {
00433     ft_int16_t cmdrdptr, cmdwrptr;
00434 
00435     do {
00436          cmdrdptr = Rd16(REG_CMD_READ);
00437          cmdwrptr = Rd16(REG_CMD_WRITE);
00438     } while ((cmdwrptr != cmdrdptr) || (cmdrdptr != 0));
00439     cmd_fifo_wp = 0;
00440 }
00441 
00442 ft_void_t FT813::ResetCmdFifo()
00443 {
00444     cmd_fifo_wp = 0;
00445 }
00446 
00447 ft_void_t FT813::WrCmd32(ft_uint32_t cmd)
00448 {
00449      CheckCmdBuffer(sizeof(cmd));
00450 
00451      Wr32(RAM_CMD + cmd_fifo_wp, cmd);
00452 
00453      Updatecmdfifo(sizeof(cmd));
00454 }
00455 
00456 ft_void_t FT813::ResetDLBuffer()
00457 {
00458     dl_buff_wp = 0;
00459 }
00460 
00461 /* Toggle PD_N pin of FT813 board for a power cycle*/
00462 ft_void_t FT813::Powercycle(ft_bool_t up)
00463 {
00464     if (up)
00465     {
00466         //Toggle PD_N from low to high for power up switch
00467         _pd = 0;
00468         Sleep(20);
00469 
00470         _pd = 1;
00471         Sleep(20);
00472     } else {
00473         //Toggle PD_N from high to low for power down switch
00474         _pd = 1;
00475         Sleep(20);
00476 
00477         _pd = 0;
00478         Sleep(20);
00479     }
00480 }
00481 
00482 ft_void_t FT813::WrMemFromFlash(ft_uint32_t addr, const ft_prog_uchar8_t *buffer, ft_uint32_t length)
00483 {
00484     //ft_uint32_t SizeTransfered = 0;
00485 
00486     StartTransfer(FT_GPU_WRITE,addr);
00487 
00488     while (length--) {
00489         Transfer8(ft_pgm_read_byte_near(buffer));
00490         buffer++;
00491     }
00492 
00493     EndTransfer();
00494 }
00495 
00496 ft_void_t FT813::WrMem(ft_uint32_t addr, const ft_uint8_t *buffer, ft_uint32_t length)
00497 {
00498     //ft_uint32_t SizeTransfered = 0;
00499 
00500     StartTransfer(FT_GPU_WRITE,addr);
00501 
00502     while (length--) {
00503         Transfer8(*buffer);
00504         buffer++;
00505     }
00506 
00507     EndTransfer();
00508 }
00509 
00510 ft_void_t FT813::RdMem(ft_uint32_t addr, ft_uint8_t *buffer, ft_uint32_t length)
00511 {
00512     //ft_uint32_t SizeTransfered = 0;
00513 
00514     StartTransfer(FT_GPU_READ,addr);
00515 
00516     while (length--) {
00517        *buffer = Transfer8(0);
00518        buffer++;
00519     }
00520 
00521     EndTransfer();
00522 }
00523 
00524 ft_int32_t FT813::Dec2Ascii(ft_char8_t *pSrc, ft_int32_t value)
00525 {
00526     ft_int16_t Length;
00527     ft_char8_t *pdst, charval;
00528     ft_int32_t CurrVal = value, tmpval,i;
00529     ft_char8_t tmparray[16], idx = 0;
00530 
00531     Length = strlen(pSrc);
00532     pdst = pSrc + Length;
00533 
00534     if(0 == value) {
00535         *pdst++ = '0';
00536         *pdst++ = '\0';
00537         return 0;
00538     }
00539 
00540     if(CurrVal < 0) {
00541         *pdst++ = '-';
00542         CurrVal = - CurrVal;
00543     }
00544     /* insert the value */
00545     while(CurrVal > 0) {
00546         tmpval = CurrVal;
00547         CurrVal /= 10;
00548         tmpval = tmpval - CurrVal*10;
00549         charval = '0' + tmpval;
00550         tmparray[idx++] = charval;
00551     }
00552 
00553     for(i = 0; i < idx; i++) {
00554         *pdst++ = tmparray[idx - i - 1];
00555     }
00556     *pdst++ = '\0';
00557 
00558     return 0;
00559 }
00560 
00561 ft_void_t FT813::Sleep(ft_uint16_t ms)
00562 {
00563     wait_ms(ms);
00564 }
00565 
00566 ft_void_t FT813::Sound_ON()
00567 {
00568      Wr8(REG_GPIO, 0x02 | Rd8(REG_GPIO));
00569 }
00570 
00571 ft_void_t FT813::Sound_OFF()
00572 {
00573      Wr8(REG_GPIO, 0xFD & Rd8(REG_GPIO));
00574 }